docs: rover: small improvements

Only if SYS_FAILURE_EN is enabled and CA_FAILURE_MODE is > 0.

.editorconfig

@@ -12,3 +12,11 @@ max_line_length = 120
 [*.yaml, *.yml]
 indent_style = space
 indent_size = 2
+
+[*.sh]
+indent_style = tab
+indent_size = 2
+insert_final_newline = true
+trim_trailing_whitespace = true
+# Not in the official standard, but supported by many editors
+max_line_length = 80

.github/fuzzing_issue_template.md

@@ -0,0 +1,6 @@
+---
+title: '[CI] Fuzzing Workflow Failed'
+labels: ['Fuzzing']
+---
+The automated fuzzing workflow has failed.
+See {{ env.WORKFLOW_RUN_URL }} for details.

.github/workflows/clang-tidy.yml

@@ -19,7 +19,7 @@ jobs:
       with:
         fetch-depth: 0
 
-    - name: Testing (clang-tidy-quiet)
+    - name: Testing (clang-tidy)
       uses: addnab/docker-run-action@v3
       with:
         image: px4io/px4-dev-clang:2021-09-08
@@ -27,4 +27,4 @@ jobs:
         run: |
           cd /workspace
           git config --global --add safe.directory /workspace
-          make clang-tidy-quiet
+          make clang-tidy

.github/workflows/compile_macos.yml

@@ -34,7 +34,8 @@ jobs:
     - uses: actions/checkout@v4
 
     - name: setup
-      run: ./Tools/setup/macos.sh; ./Tools/setup/macos.sh
+      run: |
+        ./Tools/setup/macos.sh
 
     - name: Prepare ccache timestamp
       id: ccache_cache_timestamp

.github/workflows/docs_deploy.yml

@@ -7,11 +7,15 @@ on:
       - 'release/**'
     paths:
       - 'docs/en/**'
+      - 'docs/uk/**'
+      - 'docs/zh/**'
   pull_request:
     branches:
       - '**'
     paths:
       - 'docs/en/**'
+      - 'docs/uk/**'
+      - 'docs/zh/**'
 
   # Allows you to run this workflow manually from the Actions tab
   workflow_dispatch:

.github/workflows/docs_deploy2.yml

@@ -0,0 +1,104 @@
+name: Docs - Deploy PX4 User Guide to AWS
+
+on:
+  push:
+    branches:
+      - "main"
+      - "release/**"
+    paths:
+      - "docs/en/**"
+  pull_request:
+    branches:
+      - "**"
+    paths:
+      - "docs/en/**"
+
+  workflow_dispatch:
+
+permissions:
+  contents: read
+  id-token: write # for AWS OIDC
+
+concurrency:
+  group: docs-deploy
+  cancel-in-progress: false
+
+env:
+  BRANCH_NAME: ${{ github.head_ref || github.ref_name }}
+
+jobs:
+  build:
+    runs-on:
+      [
+        runs-on,
+        runner=8cpu-linux-x64,
+        image=ubuntu24-full-x64,
+        "run-id=${{ github.run_id }}",
+        spot=false,
+        extras=s3-cache,
+      ]
+    steps:
+      - uses: runs-on/action@v1
+
+      - name: Checkout
+        uses: actions/checkout@v4
+
+      - name: Setup Node
+        uses: actions/setup-node@v4
+        with:
+          node-version: 20
+          cache: npm
+          cache-dependency-path: ./docs/yarn.lock
+
+      - name: Install dependencies
+        run: yarn install --frozen-lockfile --cwd ./docs
+
+      - name: Build with VitePress
+        working-directory: ./docs
+        run: |
+          npm run docs:build_ubuntu
+          touch .vitepress/dist/.nojekyll
+          npm run docs:sitemap
+
+      - name: Upload artifact
+        if: ${{ github.event_name == 'push' || (github.event_name == 'pull_request' && github.event.pull_request.merged) || github.event_name == 'workflow_dispatch' }}
+        uses: actions/upload-artifact@v4
+        with:
+          name: px4_docs_build
+          path: docs/.vitepress/dist/
+          retention-days: 1
+
+  deploy:
+    if: ${{ github.event_name == 'push' || (github.event_name == 'pull_request' && github.event.pull_request.merged) || github.event_name == 'workflow_dispatch' }}
+    needs: build
+    runs-on: ubuntu-latest
+
+    steps:
+      - name: Download Artifact
+        uses: actions/download-artifact@v4
+        with:
+          name: px4_docs_build
+          path: ~/_book
+
+      - name: Configure AWS from OIDC
+        uses: aws-actions/configure-aws-credentials@v4
+        with:
+          role-to-assume: ${{ secrets.AWS_ROLE_ARN }}
+          aws-region: us-west-2
+
+      - name: Sanity check AWS credentials
+        run: aws sts get-caller-identity
+
+      - name: Upload HTML with short cache
+        run: |
+          aws s3 sync ~/_book/ s3://px4-docs/${{ env.BRANCH_NAME }}/ \
+            --delete \
+            --exclude "*" --include "*.html" \
+            --cache-control "public, max-age=60"
+
+      - name: Upload assets with long cache
+        run: |
+          aws s3 sync ~/_book/ s3://px4-docs/${{ env.BRANCH_NAME }}/ \
+            --delete \
+            --exclude "*.html" \
+            --cache-control "public, max-age=86400, immutable"

.github/workflows/docs_flaw_checker.yml

@@ -29,7 +29,7 @@ jobs:
 
       - name: Get changed english doc files
         id: get_changed_markdown_english
-        uses: tj-actions/changed-files@v35.9.2
+        uses: tj-actions/changed-files@v46.0.5
         with:
           json: true
           base_sha: "${{ github.event.pull_request.base.sha }}"
@@ -42,14 +42,24 @@ jobs:
 
       - name: Save JSON file containing files to link check
         run: |
-          echo "${{ steps.get_changed_markdown_english.outputs.all_changed_files }}"
-          echo "${{ steps.get_changed_markdown_english.outputs.all_changed_files }}" > ./logs/prFiles.json
+          echo "$ALL_CHANGED_FILES"
+          # echo "$ALL_CHANGED_FILES" > ./logs/prFiles.json
+          echo "$ALL_CHANGED_FILES" | sed 's/\\//g' | jq '.' > ./logs/prFiles.json
+        env:
+          ALL_CHANGED_FILES: ${{ steps.get_changed_markdown_english.outputs.all_changed_files }}
 
       - name: Run link checker
         id: link-check
         run: |
           npm -g install markdown_link_checker_sc@0.0.138
-          markdown_link_checker_sc -r ${{ github.workspace }} -d docs -e en -f ./logs/prFiles.json -i assets -u docs.px4.io/main/ > ./logs/errorsFilteredByPrPages.md
+          markdown_link_checker_sc \
+            -r "$GITHUB_WORKSPACE" \
+            -d docs \
+            -e en \
+            -f ./logs/prFiles.json \
+            -i assets \
+            -u docs.px4.io/main/ \
+            > ./logs/errorsFilteredByPrPages.md
           mkdir -p ./pr
           cp ./logs/errorsFilteredByPrPages.md ./pr/errorsFilteredByPrPages.md
 
@@ -60,14 +70,15 @@ jobs:
           path: ./logs/errorsFilteredByPrPages.md
 
       - name: Echo Errors by Page
-        run: echo "${{ steps.read-errors-by-page.outputs.content }}"
+        run: echo "$ERRORS"
+        env:
+          ERRORS: ${{ steps.read-errors-by-page.outputs.content }}
 
       - name: Save PR number
+        run: echo "$PR_NUMBER" > ./pr/pr_number
         env:
           PR_NUMBER: ${{ github.event.number }}
-        run: |
-          #mkdir -p ./pr
-          echo $PR_NUMBER > ./pr/pr_number
+
       - uses: actions/upload-artifact@v4
         with:
           name: pr_number

.github/workflows/docs_pr_comment.yml

@@ -4,6 +4,7 @@ on:
     workflows: ["Docs - Check for flaws in PX4 Guide Source"]
     types:
       - completed
+
 jobs:
   comment:
     permissions:
@@ -56,8 +57,11 @@ jobs:
 
       - name: File detail info
         run: |
-          echo "${{ steps.read-errors-by-page.outputs.content }}"
-          echo "${{ steps.read-error-pr-number.outputs.content }}"
+          echo "$ERRORS"
+          echo "$PRNUM"
+        env:
+          ERRORS: ${{ steps.read-errors-by-page.outputs.content }}
+          PRNUM: ${{ steps.read-error-pr-number.outputs.content }}
 
       - name: Create or update comment
         id: comment_to_pr

.github/workflows/fuzzing.yml

@@ -5,6 +5,7 @@ on:
 
 permissions:
   contents: read
+  issues: write # for JasonEtco/create-an-issue
 
 env:
   RUNS_IN_DOCKER: true
@@ -13,7 +14,7 @@ jobs:
   Fuzzing:
     runs-on: ubuntu-latest
     container:
-      image: px4io/px4-dev:v1.16.0-rc1-258-g0369abd556
+      image: px4io/px4-dev:v1.16.0-rc2-4-gb67c65bfe6
     steps:
       - name: Install Dependencies
         run: |
@@ -36,3 +37,13 @@ jobs:
           for fuzz_binary in build/px4_sitl_test/*fuzz*; do
             ./Tools/ci/run_fuzz_tests.sh $fuzz_binary 15m
           done
+
+      # Create a github issue in case of a failure
+      - name: Create Issue
+        if: ${{ failure() }}
+        uses: JasonEtco/create-an-issue@v2
+        env:
+          GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }}
+          WORKFLOW_RUN_URL: https://github.com/${{ github.repository }}/actions/runs/${{ github.run_id }}
+        with:
+          filename: .github/fuzzing_issue_template.md

.github/workflows/stale.yml

@@ -7,10 +7,15 @@ jobs:
   stale:
     runs-on: ubuntu-latest
     steps:
-      - uses: actions/stale@v8
+      - uses: actions/stale@v10
         with:
-          days-before-stale: 30
-          days-before-close: -1
+          operations-per-run: 250
+          days-before-stale: 90
+          days-before-close: 30
           stale-issue-label: 'stale'
           stale-pr-label: 'stale'
           remove-stale-when-updated: true
+          stale-issue-message: 'This issue has been marked as stale due to 90 days of inactivity. If no further activity occurs, it will be automatically closed in 30 days. Please leave a comment, add a reaction, make an update, or remove the stale label if you’d like to keep it open.'
+          close-issue-message: 'This issue has been closed due to prolonged inactivity after being marked as stale. If you believe this was closed in error or the topic is still relevant, please feel free to reopen it or create a new issue.'
+          stale-pr-message: 'This PR was identified as stale and it will be closed in 30 days unless any activity is detected.'
+          close-pr-message: 'This pull request has been closed after being marked as stale with no further activity. Thank you for the time and effort you put into this contribution. If you’d like to continue the discussion or update the work, please feel free to reopen it or submit a new PR.'

.gitmodules

@@ -1,6 +1,6 @@
 [submodule "src/modules/mavlink/mavlink"]
 	path = src/modules/mavlink/mavlink
-	url = https://github.com/Auterion/mavlink.git
+	url = https://github.com/mavlink/mavlink.git
 	branch = master
 [submodule "Tools/simulation/jmavsim/jMAVSim"]
 	path = Tools/simulation/jmavsim/jMAVSim
@@ -92,3 +92,14 @@
 [submodule "test/fuzztest"]
 	path = test/fuzztest
 	url = https://github.com/google/fuzztest.git
+	branch = main
+[submodule "src/lib/tensorflow_lite_micro/tflite_micro"]
+	path = src/lib/tensorflow_lite_micro/tflite_micro
+	url = https://github.com/PX4/tflite-micro.git
+	branch = main
+[submodule "src/drivers/ins/microstrain/mip_sdk"]
+	path = src/drivers/ins/microstrain/mip_sdk
+	url = https://github.com/PX4/LORD-MicroStrain_mip_sdk.git
+[submodule "src/drivers/ins/sbgecom/sbgECom"]
+	path = src/drivers/ins/sbgecom/sbgECom
+	url = https://github.com/PX4/sbgECom.git

.vscode/cmake-variants.yaml

@@ -36,6 +36,11 @@ CONFIG:
       buildType: RelWithDebInfo
       settings:
         CONFIG: px4_sitl_test
+    px4_sitl_zenoh:
+      short: px4_sitl_zenoh
+      buildType: RelWithDebInfo
+      settings:
+        CONFIG: px4_sitl_test
     px4_io-v2_default:
       short: px4_io-v2
       buildType: MinSizeRel
@@ -191,6 +196,26 @@ CONFIG:
       buildType: MinSizeRel
       settings:
         CONFIG: ark_cannode_canbootloader
+    ark_dist_default:
+      short: ark_dist_default
+      buildType: MinSizeRel
+      settings:
+        CONFIG: ark_dist_default
+    ark_dist_canbootloader:
+      short: ark_dist_canbootloader
+      buildType: MinSizeRel
+      settings:
+        CONFIG: ark_dist_canbootloader
+    ark_f9p-gps_default:
+      short: ark_f9p-gps_default
+      buildType: MinSizeRel
+      settings:
+        CONFIG: ark_f9p-gps_default
+    ark_f9p-gps_canbootloader:
+      short: ark_f9p-gps_canbootloader
+      buildType: MinSizeRel
+      settings:
+        CONFIG: ark_f9p-gps_canbootloader
     ark_fmu-v6x_bootloader:
       short: ark_fmu-v6x_bootloader
       buildType: MinSizeRel
@@ -221,6 +246,16 @@ CONFIG:
       buildType: MinSizeRel
       settings:
         CONFIG: ark_pi6x_default
+    ark_x20-gps_default:
+      short: ark_x20-gps_default
+      buildType: MinSizeRel
+      settings:
+        CONFIG: ark_x20-gps_default
+    ark_x20-gps_canbootloader:
+      short: ark_x20-gps_canbootloader
+      buildType: MinSizeRel
+      settings:
+        CONFIG: ark_x20-gps_canbootloader
     atl_mantis-edu_default:
       short: atl_mantis-edu
       buildType: MinSizeRel
@@ -266,6 +301,16 @@ CONFIG:
       buildType: MinSizeRel
       settings:
         CONFIG: cuav_7-nano_default
+    cuav_fmu-v6x_default:
+      short: cuav_fmu-v6x
+      buildType: MinSizeRel
+      settings:
+        CONFIG: cuav_fmu-v6x_default
+    cuav_x25_default:
+      short: cuav_x25-evo
+      buildType: MinSizeRel
+      settings:
+        CONFIG: cuav_x25-evo_default
     cubepilot_cubeorange_test:
       short: cubepilot_cubeorange
       buildType: MinSizeRel

.vscode/settings.json

@@ -43,7 +43,7 @@
         "files.watcherExclude": {
                 "**/build/**": true
         },
-        "git.detectSubmodulesLimit": 20,
+        "git.detectSubmodulesLimit": 25,
         "git.ignoreLimitWarning": true,
         "githubPullRequests.defaultMergeMethod": "squash",
         "githubPullRequests.telemetry.enabled": false,

Kconfig

@@ -73,6 +73,11 @@ menu "Toolchain"
         help
             relative path to the ROMFS root directory
 
+    config BOARD_ADDITIONAL_INIT
+        string "Additional init file"
+        help
+            additional configurable init file to include in the ROMFS
+
     config BOARD_IO
         string "IO board name"
         default "px4_io-v2_default"
@@ -206,8 +211,8 @@ source "src/examples/Kconfig"
 endmenu
 
 menu "platforms"
-depends on PLATFORM_QURT || PLATFORM_POSIX
-source "platforms/common/Kconfig"
+depends on PLATFORM_QURT || PLATFORM_POSIX || PLATFORM_NUTTX
+source "platforms/Kconfig"
 endmenu
 
 source "src/lib/*/Kconfig"

MAINTAINERS.md

@@ -19,7 +19,7 @@ See [the documentation on Maintainers](https://docs.px4.io/main/en/contribute/ma
 | Matthias Grob | Multirotor | [@MaEtUgR](https://github.com/MaEtUgR) | maetugr |
 | Silvan Fuhrer | Fixed-Wing / VTOL | [@sfuhrer](https://github.com/sfuhrer) | sfuhrer |
 | Christian Friedrich | Rover | [@chfriedrich98](https://github.com/chfriedrich98) | christian982564 |
-| Pedro Roque | Spacecraft | [@Pedro-Roque](https://github.com/Pedro-Roque) | .pedroroque | <padr@kth.se>
+| Pedro Roque | Spacecraft | [@Pedro-Roque](https://github.com/Pedro-Roque) | .pedroroque | <roque@caltech.edu>
 | Jacob Dahl | Simulation | [@dakejahl](https://github.com/dakejahl) | dakejahl | <dahl.jakejacob@gmail.com>
 
 

Makefile

@@ -328,6 +328,8 @@ bootloaders_update: \
 	cuav_nora_bootloader \
 	cuav_x7pro_bootloader \
 	cuav_7-nano_bootloader \
+	cuav_fmu-v6x_bootloader \
+	cuav_x25-evo_bootloader \
 	cubepilot_cubeorange_bootloader \
 	cubepilot_cubeorangeplus_bootloader \
 	hkust_nxt-dual_bootloader \
@@ -347,6 +349,7 @@ bootloaders_update: \
 	mro_ctrl-zero-h7_bootloader \
 	mro_ctrl-zero-h7-oem_bootloader \
 	mro_pixracerpro_bootloader \
+	narinfc_h7_bootloader \
 	px4_fmu-v6c_bootloader \
 	px4_fmu-v6u_bootloader \
 	px4_fmu-v6x_bootloader \
@@ -468,7 +471,7 @@ python_coverage:
 
 # static analyzers (scan-build, clang-tidy, cppcheck)
 # --------------------------------------------------------------------
-.PHONY: scan-build px4_sitl_default-clang clang-tidy clang-tidy-fix clang-tidy-quiet
+.PHONY: scan-build px4_sitl_default-clang clang-tidy clang-tidy-fix
 .PHONY: cppcheck shellcheck_all validate_module_configs
 
 scan-build:
@@ -494,10 +497,6 @@ clang-tidy: px4_sitl_default-clang
 clang-tidy-fix: px4_sitl_default-clang
 	@cd "$(SRC_DIR)"/build/px4_sitl_default-clang && "$(SRC_DIR)"/Tools/run-clang-tidy.py -header-filter=".*\.hpp" -j$(j_clang_tidy) -fix -p .
 
-# modified version of run-clang-tidy.py to return error codes and only output relevant results
-clang-tidy-quiet: px4_sitl_default-clang
-	@cd "$(SRC_DIR)"/build/px4_sitl_default-clang && "$(SRC_DIR)"/Tools/run-clang-tidy.py -header-filter=".*\.hpp" -j$(j_clang_tidy) -p .
-
 # TODO: Fix cppcheck errors then try --enable=warning,performance,portability,style,unusedFunction or --enable=all
 cppcheck: px4_sitl_default
 	@mkdir -p "$(SRC_DIR)"/build/cppcheck
@@ -512,6 +511,7 @@ validate_module_configs:
 	@find "$(SRC_DIR)"/src/modules "$(SRC_DIR)"/src/drivers "$(SRC_DIR)"/src/lib -name *.yaml -type f \
 	-not -path "$(SRC_DIR)/src/lib/mixer_module/*" \
 	-not -path "$(SRC_DIR)/src/modules/uxrce_dds_client/dds_topics.yaml" \
+	-not -path "$(SRC_DIR)/src/modules/zenoh/dds_topics.yaml" \
 	-not -path "$(SRC_DIR)/src/modules/zenoh/zenoh-pico/*" \
 	-not -path "$(SRC_DIR)/src/lib/events/libevents/*" \
 	-not -path "$(SRC_DIR)/src/lib/cdrstream/*" \

ROMFS/CMakeLists.txt

@@ -202,6 +202,31 @@ foreach(board_rc_file ${OPTIONAL_BOARD_RC})
 
 endforeach()
 
+if(config_additional_init)
+	if(EXISTS "${PX4_BOARD_DIR}/init/${config_additional_init}")
+		file(RELATIVE_PATH rc_file_relative ${PX4_SOURCE_DIR} ${PX4_BOARD_DIR}/init/${config_additional_init})
+		message(STATUS "ROMFS:  Adding ${rc_file_relative} -> /etc/init.d/rc.additional_init")
+
+		add_custom_command(
+			OUTPUT
+				${romfs_gen_root_dir}/init.d/rc.additional_init
+				${config_additional_init}.stamp
+			COMMAND ${CMAKE_COMMAND} -E copy_if_different ${PX4_BOARD_DIR}/init/${config_additional_init} ${romfs_gen_root_dir}/init.d/rc.additional_init
+			COMMAND ${CMAKE_COMMAND} -E touch ${config_additional_init}.stamp
+			DEPENDS
+				${PX4_BOARD_DIR}/init/${config_additional_init}
+				romfs_copy.stamp
+			COMMENT "ROMFS: copying ${config_additional_init}"
+		)
+
+		list(APPEND extras_dependencies
+			${config_additional_init}.stamp
+			)
+	else()
+		message(FATAL_ERROR "BOARD_ADDITIONAL_INIT file not found at: ${PX4_BOARD_DIR}/init/${config_additional_init}")
+	endif()
+endif()
+
 
 # board extras
 set(OPTIONAL_BOARD_EXTRAS)

ROMFS/cannode/init.d/rcS

@@ -56,6 +56,17 @@ then
 fi
 unset BOARD_RC_DEFAULTS
 
+#
+# Optional additional init file: rc.additional_init
+#
+set BOARD_RC_ADDITIONAL_INIT ${R}etc/init.d/rc.additional_init
+if [ -f $BOARD_RC_ADDITIONAL_INIT ]
+then
+	echo "Board additional init: ${BOARD_RC_ADDITIONAL_INIT}"
+	. $BOARD_RC_ADDITIONAL_INIT
+fi
+unset BOARD_RC_ADDITIONAL_INIT
+
 #
 # Start system state indicator.
 #

ROMFS/px4fmu_common/init.d-posix/airframes/50000_gz_rover_differential

@@ -17,6 +17,7 @@ param set-default NAV_ACC_RAD 0.5
 param set-default RD_WHEEL_TRACK 0.6
 param set-default RD_TRANS_DRV_TRN 0.785398
 param set-default RD_TRANS_TRN_DRV 0.174533
+param set-default RD_YAW_STK_GAIN 0.6
 
 # Rate Control Parameters
 param set-default RO_YAW_RATE_I 0.01
@@ -25,6 +26,8 @@ param set-default RO_YAW_RATE_LIM 250
 param set-default RO_YAW_ACCEL_LIM 400
 param set-default RO_YAW_DECEL_LIM 800
 param set-default RO_YAW_RATE_CORR 1
+param set-default RO_YAW_EXPO 0.85
+param set-default RO_YAW_SUPEXPO 0.3
 
 # Attitude Control Parameters
 param set-default RO_YAW_P 5

ROMFS/px4fmu_common/init.d-posix/airframes/51000_gz_rover_ackermann

@@ -1,5 +1,5 @@
 #!/bin/sh
-# @name Rover Ackermann
+# @name Generic Ackermann Rover
 # @type Rover
 # @class Rover
 
@@ -14,30 +14,32 @@ param set-default SIM_GZ_EN 1 # Gazebo bridge
 param set-default NAV_ACC_RAD 0.5
 
 # Ackermann Parameters
-param set-default RA_WHEEL_BASE 0.321
+param set-default RA_WHEEL_BASE 0.5
 param set-default RA_ACC_RAD_GAIN 2
-param set-default RA_ACC_RAD_MAX 3
+param set-default RA_ACC_RAD_MAX 1.5
 param set-default RA_MAX_STR_ANG 0.5236
 param set-default RA_STR_RATE_LIM 360
 
-# Rover Control Parameters
-param set-default RO_ACCEL_LIM 3
-param set-default RO_DECEL_LIM 6
-param set-default RO_JERK_LIM 15
-param set-default RO_MAX_THR_SPEED 3.1
-
-# Rover Rate Control Parameters
-param set-default RO_YAW_RATE_I 0.1
-param set-default RO_YAW_RATE_P 1
-param set-default RO_YAW_RATE_LIM 180
+# Rate Control Parameters
+param set-default RO_YAW_RATE_I 0.01
+param set-default RO_YAW_RATE_P 0.25
+param set-default RO_YAW_RATE_LIM 130
+param set-default RO_YAW_ACCEL_LIM 800
+param set-default RO_YAW_DECEL_LIM 800
 param set-default RO_YAW_RATE_CORR 1
+param set-default RO_YAW_EXPO 0.85
+param set-default RO_YAW_SUPEXPO 0.3
 
-# Rover Attitude Control Parameters
+# Attitude Control Parameters
 param set-default RO_YAW_P 3
 
-# Rover Velocity Control Parameters
-param set-default RO_SPEED_LIM 3
-param set-default RO_SPEED_I 0.1
+# Velocity Control Parameters
+param set-default RO_ACCEL_LIM 4
+param set-default RO_DECEL_LIM 6
+param set-default RO_JERK_LIM 10
+param set-default RO_MAX_THR_SPEED 3.1
+param set-default RO_SPEED_LIM 2.5
+param set-default RO_SPEED_I 0.01
 param set-default RO_SPEED_P 1
 param set-default RO_SPEED_RED 1
 
@@ -48,8 +50,8 @@ param set-default PP_LOOKAHD_MIN 1
 
 # Wheels
 param set-default SIM_GZ_WH_FUNC1 101
-param set-default SIM_GZ_WH_MIN1 0
-param set-default SIM_GZ_WH_MAX1 200
+param set-default SIM_GZ_WH_MIN1 70
+param set-default SIM_GZ_WH_MAX1 130
 param set-default SIM_GZ_WH_DIS1 100
 
 # Steering

ROMFS/px4fmu_common/init.d-posix/airframes/52000_gz_rover_mecanum

@@ -1,5 +1,5 @@
 #!/bin/sh
-# @name Aion Robotics R1 Rover
+# @name Generic Mecanum Rover
 # @type Rover
 # @class Rover
 
@@ -7,14 +7,15 @@
 
 PX4_SIMULATOR=${PX4_SIMULATOR:=gz}
 PX4_GZ_WORLD=${PX4_GZ_WORLD:=rover}
-PX4_SIM_MODEL=${PX4_SIM_MODEL:=r1_rover_mecanum}
+PX4_SIM_MODEL=${PX4_SIM_MODEL:=rover_mecanum}
 
 param set-default SIM_GZ_EN 1 # Gazebo bridge
 
 param set-default NAV_ACC_RAD 0.5
 
 # Mecanum Parameters
-param set-default RM_WHEEL_TRACK 0.3
+param set-default RM_WHEEL_TRACK 0.6
+param set-default RM_YAW_STK_GAIN 0.6
 
 # Rover Control Parameters
 param set-default RO_ACCEL_LIM 3
@@ -29,15 +30,21 @@ param set-default RO_YAW_RATE_LIM 120
 param set-default RO_YAW_ACCEL_LIM 240
 param set-default RO_YAW_DECEL_LIM 1000
 param set-default RO_YAW_RATE_CORR 1.75
+param set-default RO_YAW_EXPO 0.85
+param set-default RO_YAW_SUPEXPO 0.3
 
 # Rover Attitude Control Parameters
 param set-default RO_YAW_P 5
 
-# Rover Velocity Control Parameters
-param set-default RO_SPEED_LIM 2
-param set-default RO_SPEED_I 0.5
-param set-default RO_SPEED_P 1
-param set-default RO_SPEED_RED 1
+# Velocity Control Parameters
+param set-default RO_ACCEL_LIM 4
+param set-default RO_DECEL_LIM 6
+param set-default RO_JERK_LIM 10
+param set-default RO_MAX_THR_SPEED 3.1
+param set-default RO_SPEED_LIM 2.5
+param set-default RO_SPEED_I 0.01
+param set-default RO_SPEED_P 0.1
+param set-default RO_SPEED_RED 0.5
 
 # Pure Pursuit parameters
 param set-default PP_LOOKAHD_GAIN 0.5
@@ -48,24 +55,24 @@ param set-default PP_LOOKAHD_MIN 1
 param set-default SENS_EN_MAGSIM 1
 
 # Actuator mapping
-param set-default SIM_GZ_WH_FUNC1 102 # right wheel front
+param set-default SIM_GZ_WH_FUNC1 104 # left wheel back
 param set-default SIM_GZ_WH_MIN1 70
 param set-default SIM_GZ_WH_MAX1 130
 param set-default SIM_GZ_WH_DIS1 100
 
-param set-default SIM_GZ_WH_FUNC2 101 # left wheel front
+param set-default SIM_GZ_WH_FUNC2 103 # right wheel back
 param set-default SIM_GZ_WH_MIN2 70
 param set-default SIM_GZ_WH_MAX2 130
 param set-default SIM_GZ_WH_DIS2 100
 
-param set-default SIM_GZ_WH_FUNC3 104 # right wheel back
+param set-default SIM_GZ_WH_FUNC3 102 # left wheel front
 param set-default SIM_GZ_WH_MIN3 70
 param set-default SIM_GZ_WH_MAX3 130
 param set-default SIM_GZ_WH_DIS3 100
 
-param set-default SIM_GZ_WH_FUNC4 103 # left wheel back
+param set-default SIM_GZ_WH_FUNC4 101 # right wheel front
 param set-default SIM_GZ_WH_MIN4 70
 param set-default SIM_GZ_WH_MAX4 130
 param set-default SIM_GZ_WH_DIS4 100
 
-param set-default SIM_GZ_WH_REV 10
+param set-default SIM_GZ_WH_REV 0

ROMFS/px4fmu_common/init.d-posix/airframes/60002_gz_uuv_bluerov2_heavy

@@ -0,0 +1,137 @@
+#!/bin/sh
+#
+# @name BlueROV2 Heavy
+#
+# @type UUV
+#
+# @maintainer Pedro Roque <padr@kth.se>
+# @maintainer Nicola De Carli <ndc@kth.se>
+#
+
+# Source PX4 parameters and configuration
+. ${R}/etc/init.d/rc.uuv_defaults
+
+PX4_SIMULATOR=${PX4_SIMULATOR:=gz}
+PX4_GZ_WORLD=${PX4_GZ_WORLD:=underwater}
+PX4_SIM_MODEL=${PX4_SIM_MODEL:=uuv_bluerov2_heavy}
+
+param set-default SIM_GZ_EN 1
+
+# Set parameters using `param` utility for SITL
+param set-default CA_AIRFRAME 7
+param set-default CA_METHOD 0
+param set-default MAV_TYPE 12
+
+param set-default SENS_EN_GPSSIM 1
+param set-default SENS_EN_BAROSIM 1
+param set-default SENS_EN_MAGSIM 1
+param set-default COM_ARM_CHK_ESCS 0  # We don't have ESCs
+param set-default FD_ESCS_EN 0 # We don't have ESCs - but maybe we need this later?
+
+# Set proper failsafes
+param set-default COM_ACT_FAIL_ACT 0
+param set-default COM_LOW_BAT_ACT 0
+param set-default NAV_DLL_ACT 0
+param set-default GF_ACTION 1
+param set-default NAV_RCL_ACT 1
+
+# disable attitude failure detection
+param set-default FD_FAIL_P 0
+param set-default FD_FAIL_R 0
+
+param set-default CA_ROTOR_COUNT 8
+param set-default CA_R_REV 255
+
+param set-default CA_ROTOR0_AX -1
+param set-default CA_ROTOR0_AY 1
+param set-default CA_ROTOR0_AZ 0
+param set-default CA_ROTOR0_KM 0
+param set-default CA_ROTOR0_PX 0.14
+param set-default CA_ROTOR0_PY 0.10
+param set-default CA_ROTOR0_PZ 0.06
+#param set-default CA_ROTOR0_PZ 0.0
+
+param set-default CA_ROTOR1_AX -1
+param set-default CA_ROTOR1_AY -1
+param set-default CA_ROTOR1_AZ 0
+param set-default CA_ROTOR1_KM 0
+param set-default CA_ROTOR1_PX 0.14
+param set-default CA_ROTOR1_PY -0.10
+param set-default CA_ROTOR1_PZ 0.06
+#param set-default CA_ROTOR1_PZ 0.0
+
+param set-default CA_ROTOR2_AX 1
+param set-default CA_ROTOR2_AY 1
+param set-default CA_ROTOR2_AZ 0
+param set-default CA_ROTOR2_KM 0
+param set-default CA_ROTOR2_PX -0.14
+param set-default CA_ROTOR2_PY 0.10
+param set-default CA_ROTOR2_PZ 0.06
+#param set-default CA_ROTOR2_PZ 0.0
+
+param set-default CA_ROTOR3_AX 1
+param set-default CA_ROTOR3_AY -1
+param set-default CA_ROTOR3_AZ 0
+param set-default CA_ROTOR3_KM 0
+param set-default CA_ROTOR3_PX -0.14
+param set-default CA_ROTOR3_PY -0.10
+param set-default CA_ROTOR3_PZ 0.06
+
+param set-default CA_ROTOR4_AX 0
+param set-default CA_ROTOR4_AY 0
+param set-default CA_ROTOR4_AZ 1
+param set-default CA_ROTOR4_KM 0
+param set-default CA_ROTOR4_PX 0.12
+param set-default CA_ROTOR4_PY 0.22
+param set-default CA_ROTOR4_PZ 0
+
+param set-default CA_ROTOR5_AX 0
+param set-default CA_ROTOR5_AY 0
+param set-default CA_ROTOR5_AZ 1
+param set-default CA_ROTOR5_KM 0
+param set-default CA_ROTOR5_PX 0.12
+param set-default CA_ROTOR5_PY -0.22
+param set-default CA_ROTOR5_PZ 0
+
+param set-default CA_ROTOR6_AX 0
+param set-default CA_ROTOR6_AY 0
+param set-default CA_ROTOR6_AZ 1
+param set-default CA_ROTOR6_KM 0
+param set-default CA_ROTOR6_PX -0.12
+param set-default CA_ROTOR6_PY 0.22
+param set-default CA_ROTOR6_PZ 0
+
+param set-default CA_ROTOR7_AX 0
+param set-default CA_ROTOR7_AY 0
+param set-default CA_ROTOR7_AZ 1
+param set-default CA_ROTOR7_KM 0
+param set-default CA_ROTOR7_PX -0.12
+param set-default CA_ROTOR7_PY -0.22
+param set-default CA_ROTOR7_PZ 0
+
+param set-default SIM_GZ_EC_FUNC1 101
+param set-default SIM_GZ_EC_FUNC2 102
+param set-default SIM_GZ_EC_FUNC3 103
+param set-default SIM_GZ_EC_FUNC4 104
+param set-default SIM_GZ_EC_FUNC5 105
+param set-default SIM_GZ_EC_FUNC6 106
+param set-default SIM_GZ_EC_FUNC7 107
+param set-default SIM_GZ_EC_FUNC8 108
+
+param set-default SIM_GZ_EC_MIN1 1100
+param set-default SIM_GZ_EC_MIN2 1100
+param set-default SIM_GZ_EC_MIN3 1100
+param set-default SIM_GZ_EC_MIN4 1100
+param set-default SIM_GZ_EC_MIN5 1100
+param set-default SIM_GZ_EC_MIN6 1100
+param set-default SIM_GZ_EC_MIN7 1100
+param set-default SIM_GZ_EC_MIN8 1100
+
+param set-default SIM_GZ_EC_MAX1 1900
+param set-default SIM_GZ_EC_MAX2 1900
+param set-default SIM_GZ_EC_MAX3 1900
+param set-default SIM_GZ_EC_MAX4 1900
+param set-default SIM_GZ_EC_MAX5 1900
+param set-default SIM_GZ_EC_MAX6 1900
+param set-default SIM_GZ_EC_MAX7 1900
+param set-default SIM_GZ_EC_MAX8 1900

ROMFS/px4fmu_common/init.d-posix/airframes/70000_gz_atmos

@@ -0,0 +1,155 @@
+#!/bin/sh
+#
+# @name KTH-ATMOS
+#
+# @type Free-Flyer
+# @class Spacecraft
+#
+# @output Motor1 back left thruster, +x thrust
+# @output Motor2 front left thruster, -x thrust
+# @output Motor3 back right thruster, +x thrust
+# @output Motor4 front right thruster, -x thrust
+# @output Motor5 front left thruster, +y thrust
+# @output Motor6 front right thruster, -y thrust
+# @output Motor7 back left thruster, +y thrust
+# @output Motor8 back right thruster, -y thrust
+#
+# @maintainer discower-io
+# @url https://atmos.discower.io
+#
+
+. ${R}etc/init.d/rc.sc_defaults
+
+PX4_SIMULATOR=${PX4_SIMULATOR:=gz}
+PX4_GZ_WORLD=${PX4_GZ_WORLD:=default}
+PX4_SIM_MODEL=${PX4_SIM_MODEL:=atmos}
+
+param set-default SIM_GZ_EN 1
+
+param set-default SENS_EN_MAGSIM 1
+param set-default COM_ARM_CHK_ESCS 0  # We don't have ESCs
+param set-default FD_ESCS_EN 0
+
+param set-default CA_AIRFRAME 14
+param set-default MAV_TYPE 45
+
+param set-default CA_ROTOR_COUNT 8
+param set-default CA_R_REV 0
+
+# Auto to be provided by Custom Airframe
+param set-default CA_METHOD 0
+
+# Set proper failsafes
+param set-default COM_ACT_FAIL_ACT 0
+param set-default COM_LOW_BAT_ACT 0
+param set-default NAV_DLL_ACT 0
+param set-default GF_ACTION 1
+param set-default NAV_RCL_ACT 1
+
+# disable attitude failure detection
+param set-default FD_FAIL_P 0
+param set-default FD_FAIL_R 0
+
+param set-default CA_ROTOR0_PX -0.12
+param set-default CA_ROTOR0_PY -0.12
+param set-default CA_ROTOR0_PZ 0.0
+param set-default CA_ROTOR0_CT 1.4
+param set-default CA_ROTOR0_AX 1.0
+param set-default CA_ROTOR0_AY 0.0
+param set-default CA_ROTOR0_AZ 0.0
+
+param set-default CA_ROTOR1_PX 0.12
+param set-default CA_ROTOR1_PY -0.12
+param set-default CA_ROTOR1_PZ 0.0
+param set-default CA_ROTOR1_CT 1.4
+param set-default CA_ROTOR1_AX -1.0
+param set-default CA_ROTOR1_AY 0.0
+param set-default CA_ROTOR1_AZ 0.0
+
+param set-default CA_ROTOR2_PX -0.12
+param set-default CA_ROTOR2_PY 0.12
+param set-default CA_ROTOR2_PZ 0.0
+param set-default CA_ROTOR2_CT 1.4
+param set-default CA_ROTOR2_AX 1.0
+param set-default CA_ROTOR2_AY 0.0
+param set-default CA_ROTOR2_AZ 0.0
+
+param set-default CA_ROTOR3_PX 0.12
+param set-default CA_ROTOR3_PY 0.12
+param set-default CA_ROTOR3_PZ 0.0
+param set-default CA_ROTOR3_CT 1.4
+param set-default CA_ROTOR3_AX -1.0
+param set-default CA_ROTOR3_AY 0.0
+param set-default CA_ROTOR3_AZ 0.0
+
+param set-default CA_ROTOR4_PX 0.12
+param set-default CA_ROTOR4_PY -0.12
+param set-default CA_ROTOR4_PZ 0.0
+param set-default CA_ROTOR4_CT 1.4
+param set-default CA_ROTOR4_AX 0.0
+param set-default CA_ROTOR4_AY 1.0
+param set-default CA_ROTOR4_AZ 0.0
+
+param set-default CA_ROTOR5_PX 0.12
+param set-default CA_ROTOR5_PY 0.12
+param set-default CA_ROTOR5_PZ 0.0
+param set-default CA_ROTOR5_CT 1.4
+param set-default CA_ROTOR5_AX 0.0
+param set-default CA_ROTOR5_AY -1.0
+param set-default CA_ROTOR5_AZ 0.0
+
+param set-default CA_ROTOR6_PX -0.12
+param set-default CA_ROTOR6_PY -0.12
+param set-default CA_ROTOR6_PZ 0.0
+param set-default CA_ROTOR6_CT 1.4
+param set-default CA_ROTOR6_AX 0.0
+param set-default CA_ROTOR6_AY 1.0
+param set-default CA_ROTOR6_AZ 0.0
+
+param set-default CA_ROTOR7_PX -0.12
+param set-default CA_ROTOR7_PY 0.12
+param set-default CA_ROTOR7_PZ 0.0
+param set-default CA_ROTOR7_CT 1.4
+param set-default CA_ROTOR7_AX 0.0
+param set-default CA_ROTOR7_AY -1.0
+param set-default CA_ROTOR7_AZ 0.0
+
+param set-default SIM_GZ_EC_FUNC1 101
+param set-default SIM_GZ_EC_FUNC2 102
+param set-default SIM_GZ_EC_FUNC3 103
+param set-default SIM_GZ_EC_FUNC4 104
+param set-default SIM_GZ_EC_FUNC5 105
+param set-default SIM_GZ_EC_FUNC6 106
+param set-default SIM_GZ_EC_FUNC7 107
+param set-default SIM_GZ_EC_FUNC8 108
+
+param set-default SIM_GZ_EC_MIN1 0
+param set-default SIM_GZ_EC_MIN2 0
+param set-default SIM_GZ_EC_MIN3 0
+param set-default SIM_GZ_EC_MIN4 0
+param set-default SIM_GZ_EC_MIN5 0
+param set-default SIM_GZ_EC_MIN6 0
+param set-default SIM_GZ_EC_MIN7 0
+param set-default SIM_GZ_EC_MIN8 0
+
+param set-default SIM_GZ_EC_MAX1 10000
+param set-default SIM_GZ_EC_MAX2 10000
+param set-default SIM_GZ_EC_MAX3 10000
+param set-default SIM_GZ_EC_MAX4 10000
+param set-default SIM_GZ_EC_MAX5 10000
+param set-default SIM_GZ_EC_MAX6 10000
+param set-default SIM_GZ_EC_MAX7 10000
+param set-default SIM_GZ_EC_MAX8 10000
+
+# Controller Tunings
+param set SC_YAWRATE_P 3.335
+param set SC_YAWRATE_I 0.87
+param set SC_YAWRATE_D 0.15
+param set SC_YR_INT_LIM 0.2
+param set SC_YAW_P 3.0
+
+param set SPC_POS_P 0.20
+param set SPC_VEL_P 6.55
+param set SPC_VEL_I 0.0
+param set SPC_VEL_D 0.0
+param set SPC_VEL_MAX 12.0

ROMFS/px4fmu_common/init.d-posix/airframes/71002_gz_spacecraft_2d

@@ -1,147 +0,0 @@
-#!/bin/sh
-#
-# @name 3DoF Spacecraft Model
-#
-# @type 2D Freeflyer with 8 thrusters - Planar motion
-#
-# @maintainer Pedro Roque <padr@kth.se>
-#
-
-. ${R}etc/init.d/rc.sc_defaults
-
-PX4_SIMULATOR=${PX4_SIMULATOR:=gz}
-PX4_GZ_WORLD=${PX4_GZ_WORLD:=default}
-PX4_SIM_MODEL=${PX4_SIM_MODEL:=spacecraft_2d}
-
-param set-default SIM_GZ_EN 1
-
-param set-default SENS_EN_MAGSIM 1
-param set-default COM_ARM_CHK_ESCS 0  # We don't have ESCs
-param set-default FD_ESCS_EN 0 # We don't have ESCs - but maybe we need this later?
-
-param set-default CA_AIRFRAME 14
-param set-default MAV_TYPE 45
-
-param set-default CA_THRUSTER_CNT 8
-param set-default CA_R_REV 0
-
-# param set-default FW_ARSP_MODE 1
-
-# Auto to be provided by Custom Airframe
-param set-default CA_METHOD 0  # 0 is PseudoInverse, 3 is Metric
-
-# Set proper failsafes
-param set-default COM_ACT_FAIL_ACT 0
-param set-default COM_LOW_BAT_ACT 0
-param set-default NAV_DLL_ACT 0
-param set-default GF_ACTION 1
-param set-default NAV_RCL_ACT 1
-param set-default COM_POSCTL_NAVL 2
-
-# disable attitude failure detection
-param set-default FD_FAIL_P 0
-param set-default FD_FAIL_R 0
-
-param set-default CA_THRUSTER0_PX -0.12
-param set-default CA_THRUSTER0_PY -0.12
-param set-default CA_THRUSTER0_PZ 0.0
-param set-default CA_THRUSTER0_CT 1.4
-param set-default CA_THRUSTER0_AX 1.0
-param set-default CA_THRUSTER0_AY 0.0
-param set-default CA_THRUSTER0_AZ 0.0
-
-param set-default CA_THRUSTER1_PX 0.12
-param set-default CA_THRUSTER1_PY -0.12
-param set-default CA_THRUSTER1_PZ 0.0
-param set-default CA_THRUSTER1_CT 1.4
-param set-default CA_THRUSTER1_AX -1.0
-param set-default CA_THRUSTER1_AY 0.0
-param set-default CA_THRUSTER1_AZ 0.0
-
-param set-default CA_THRUSTER2_PX -0.12
-param set-default CA_THRUSTER2_PY 0.12
-param set-default CA_THRUSTER2_PZ 0.0
-param set-default CA_THRUSTER2_CT 1.4
-param set-default CA_THRUSTER2_AX 1.0
-param set-default CA_THRUSTER2_AY 0.0
-param set-default CA_THRUSTER2_AZ 0.0
-
-param set-default CA_THRUSTER3_PX 0.12
-param set-default CA_THRUSTER3_PY 0.12
-param set-default CA_THRUSTER3_PZ 0.0
-param set-default CA_THRUSTER3_CT 1.4
-param set-default CA_THRUSTER3_AX -1.0
-param set-default CA_THRUSTER3_AY 0.0
-param set-default CA_THRUSTER3_AZ 0.0
-
-param set-default CA_THRUSTER4_PX 0.12
-param set-default CA_THRUSTER4_PY -0.12
-param set-default CA_THRUSTER4_PZ 0.0
-param set-default CA_THRUSTER4_CT 1.4
-param set-default CA_THRUSTER4_AX 0.0
-param set-default CA_THRUSTER4_AY 1.0
-param set-default CA_THRUSTER4_AZ 0.0
-
-param set-default CA_THRUSTER5_PX 0.12
-param set-default CA_THRUSTER5_PY 0.12
-param set-default CA_THRUSTER5_PZ 0.0
-param set-default CA_THRUSTER5_CT 1.4
-param set-default CA_THRUSTER5_AX 0.0
-param set-default CA_THRUSTER5_AY -1.0
-param set-default CA_THRUSTER5_AZ 0.0
-
-param set-default CA_THRUSTER6_PX -0.12
-param set-default CA_THRUSTER6_PY -0.12
-param set-default CA_THRUSTER6_PZ 0.0
-param set-default CA_THRUSTER6_CT 1.4
-param set-default CA_THRUSTER6_AX 0.0
-param set-default CA_THRUSTER6_AY 1.0
-param set-default CA_THRUSTER6_AZ 0.0
-
-param set-default CA_THRUSTER7_PX -0.12
-param set-default CA_THRUSTER7_PY 0.12
-param set-default CA_THRUSTER7_PZ 0.0
-param set-default CA_THRUSTER7_CT 1.4
-param set-default CA_THRUSTER7_AX 0.0
-param set-default CA_THRUSTER7_AY -1.0
-param set-default CA_THRUSTER7_AZ 0.0
-
-param set-default SIM_GZ_TH_FUNC1 101
-param set-default SIM_GZ_TH_FUNC2 102
-param set-default SIM_GZ_TH_FUNC3 103
-param set-default SIM_GZ_TH_FUNC4 104
-param set-default SIM_GZ_TH_FUNC5 105
-param set-default SIM_GZ_TH_FUNC6 106
-param set-default SIM_GZ_TH_FUNC7 107
-param set-default SIM_GZ_TH_FUNC8 108
-
-param set-default SIM_GZ_TH_MIN1 0
-param set-default SIM_GZ_TH_MIN2 0
-param set-default SIM_GZ_TH_MIN3 0
-param set-default SIM_GZ_TH_MIN4 0
-param set-default SIM_GZ_TH_MIN5 0
-param set-default SIM_GZ_TH_MIN6 0
-param set-default SIM_GZ_TH_MIN7 0
-param set-default SIM_GZ_TH_MIN8 0
-
-param set-default SIM_GZ_TH_MAX1 10000
-param set-default SIM_GZ_TH_MAX2 10000
-param set-default SIM_GZ_TH_MAX3 10000
-param set-default SIM_GZ_TH_MAX4 10000
-param set-default SIM_GZ_TH_MAX5 10000
-param set-default SIM_GZ_TH_MAX6 10000
-param set-default SIM_GZ_TH_MAX7 10000
-param set-default SIM_GZ_TH_MAX8 10000
-
-# Controller Tunings
-param set SC_YAWRATE_P 3.335
-param set SC_YAWRATE_I 0.87
-param set SC_YAWRATE_D 0.15
-param set SC_YR_INT_LIM 0.2
-param set SC_YAW_P 3.0
-
-param set SPC_POS_P 0.20
-param set SPC_VEL_P 6.55
-param set SPC_VEL_I 0.0
-param set SPC_VEL_D 0.0
-param set SPC_VEL_MAX 12.0

ROMFS/px4fmu_common/init.d-posix/airframes/CMakeLists.txt

@@ -80,10 +80,8 @@ px4_add_romfs_files(
 	4009_gz_r1_rover
 	4010_gz_x500_mono_cam
 	4011_gz_lawnmower
-	4012_gz_rover_ackermann
 	4013_gz_x500_lidar_2d
 	4014_gz_x500_mono_cam_down
-	4015_gz_r1_rover_mecanum
 	4016_gz_x500_lidar_down
 	4017_gz_x500_lidar_front
 	4018_gz_quadtailsitter
@@ -114,8 +112,12 @@ px4_add_romfs_files(
 	17002_flightgear_tf-g2
 
 	50000_gz_rover_differential
+	51000_gz_rover_ackermann
+	52000_gz_rover_mecanum
 
-	71002_gz_spacecraft_2d
+	60002_gz_uuv_bluerov2_heavy
+
+	70000_gz_atmos
 
 	# [22000, 22999] Reserve for custom models
 )

ROMFS/px4fmu_common/init.d-posix/rcS

@@ -190,6 +190,9 @@ param set-default SYS_FAILURE_EN 1
 # does not go below 50% by default, but failure injection can trigger failsafes.
 param set-default COM_LOW_BAT_ACT 3
 
+# set default IP to localhost
+param set-default UXRCE_DDS_AG_IP 2130706433  # 127.0.0.1
+
 
 # Adapt timeout parameters if simulation runs faster or slower than realtime.
 if [ -n "$PX4_SIM_SPEED_FACTOR" ]; then
@@ -319,7 +322,12 @@ then
 	uxrce_dds_port="$PX4_UXRCE_DDS_PORT"
 fi
 
-uxrce_dds_client start -t udp -h 127.0.0.1 -p $uxrce_dds_port $uxrce_dds_ns
+uxrce_dds_client start -t udp -p $uxrce_dds_port $uxrce_dds_ns
+
+if param greater -s ZENOH_ENABLE 0
+then
+	zenoh start
+fi
 
 if param greater -s MNT_MODE_IN -1
 then
@@ -342,11 +350,7 @@ then
 	gyro_calibration start
 fi
 
-# Payload deliverer module if gripper is enabled
-if param compare -s PD_GRIPPER_EN 1
-then
-	payload_deliverer start
-fi
+payload_deliverer start
 
 if param compare -s ICE_EN 1
 then

ROMFS/px4fmu_common/init.d/airframes/1104_standard_ackermann_sih.hil

@@ -0,0 +1,65 @@
+#!/bin/sh
+# @name SIH Rover Ackermann
+# @type Rover
+# @class Rover
+
+. ${R}etc/init.d/rc.rover_ackermann_defaults
+
+set VEHICLE_TYPE rover_ackermann
+param set-default CA_AIRFRAME 5         # Rover (Ackermann)
+param set-default CA_R_REV 1            # Motor is assumed to be reversible
+param set-default EKF2_MAG_TYPE 1       # Make sure magnetometer is fused even when not driving
+param set-default NAV_ACC_RAD 0.5       # Waypoint acceptance radius
+param set-default EKF2_GBIAS_INIT 0.01
+param set-default EKF2_ANGERR_INIT 0.01
+
+param set-default SIH_VEHICLE_TYPE 5 # sih as rover ackermann
+param set-default SYS_HITL 2 # set SYS_HITL to 2 to start the SIH and avoid sensors startup
+
+param set-default HIL_ACT_FUNC1 201 # Steering
+param set-default HIL_ACT_FUNC2 101 # Throttle
+param set-default SIH_MASS 20
+param set-default SIH_IXX 0.4333
+param set-default SIH_IYY 1.6833
+param set-default SIH_IZZ 2.0833
+param set-default SIH_IXZ 0
+param set-default SIH_KDV 50
+param set-default SIH_KDW 10
+
+# Ackermann Parameters
+param set-default RA_WHEEL_BASE 0.321
+param set-default RA_ACC_RAD_GAIN 2
+param set-default RA_ACC_RAD_MAX 3
+param set-default RA_MAX_STR_ANG 0.5236
+param set-default RA_STR_RATE_LIM 360
+
+# Rate Control Parameters
+param set-default RO_YAW_RATE_I 0.01
+param set-default RO_YAW_RATE_P 0.25
+param set-default RO_YAW_RATE_LIM 180
+param set-default RO_YAW_ACCEL_LIM 400
+param set-default RO_YAW_DECEL_LIM 800
+param set-default RO_YAW_RATE_CORR 1
+
+# Attitude Control Parameters
+param set-default RO_YAW_P 5
+
+# Velocity Control Parameters
+param set-default RO_ACCEL_LIM 3
+param set-default RO_DECEL_LIM 3
+param set-default RO_JERK_LIM 10
+param set-default RO_MAX_THR_SPEED 3.2
+param set-default RO_SPEED_LIM 3
+param set-default RO_SPEED_I 0.001
+param set-default RO_SPEED_P 0.001
+param set-default RO_SPEED_RED 1
+
+# Pure Pursuit parameters
+param set-default PP_LOOKAHD_GAIN 1
+param set-default PP_LOOKAHD_MAX 10
+param set-default PP_LOOKAHD_MIN 1
+
+# Pure Pursuit parameters
+param set-default PP_LOOKAHD_GAIN 1
+param set-default PP_LOOKAHD_MAX 10
+param set-default PP_LOOKAHD_MIN 1

ROMFS/px4fmu_common/init.d/airframes/4050_generic_250

@@ -47,3 +47,6 @@ param set-default CA_ROTOR2_KM -0.05
 param set-default CA_ROTOR3_PX -1
 param set-default CA_ROTOR3_PY 1
 param set-default CA_ROTOR3_KM -0.05
+
+param set-default MPC_Z_VEL_MAX_UP 3.0
+param set-default MPC_Z_VEL_MAX_DN 3.0

ROMFS/px4fmu_common/init.d/airframes/50001_aion_robotics_r1_rover

@@ -2,7 +2,7 @@
 #
 # @name Aion Robotics R1 UGV
 #
-# @url https://www.aionrobotics.com/r1
+# @url https://docs.px4.io/main/en/complete_vehicles_rover/aion_r1.html
 #
 # @type Rover
 # @class Rover

ROMFS/px4fmu_common/init.d/airframes/50002_hiwonder_tracked

@@ -0,0 +1,45 @@
+#!/bin/sh
+#
+# @name Hiwonder Tracked
+#
+# @url https://www.hiwonder.com/products/suspended-shock-absorbing-tracked-chassis?variant=40378709835863
+#
+# @type Rover
+# @class Rover
+#
+
+. ${R}etc/init.d/rc.rover_differential_defaults
+
+param set-default HIWONDER_EMM_EN 1 # Enable motor driver
+param set-default BAT1_N_CELLS 3
+param set-default NAV_ACC_RAD 0.5
+
+# Differential Parameters
+param set-default RD_WHEEL_TRACK 0.16
+param set-default RD_TRANS_DRV_TRN 0.785398
+param set-default RD_TRANS_TRN_DRV 0.0872665
+
+# Rover Rate Control Parameters
+param set-default RO_YAW_EXPO 0.2
+param set-default RO_YAW_SUPEXPO 0.1
+param set-default RO_YAW_RATE_I 0.1
+param set-default RO_YAW_RATE_P 0.1
+param set-default RO_YAW_RATE_LIM 140
+
+# Rover Attitude Control Parameters
+param set-default RO_YAW_P 5
+
+# Rover Velocity Control Parameters
+param set-default RO_ACCEL_LIM 1
+param set-default RO_DECEL_LIM 1
+param set-default RO_JERK_LIM 10
+param set-default RO_MAX_THR_SPEED 0.3
+param set-default RO_SPEED_LIM 0.28
+param set-default RO_SPEED_I 0.05
+param set-default RO_SPEED_P 0.1
+param set-default RO_SPEED_RED 1
+
+# Pure Pursuit parameters
+param set-default PP_LOOKAHD_GAIN 1
+param set-default PP_LOOKAHD_MAX 10
+param set-default PP_LOOKAHD_MIN 1

ROMFS/px4fmu_common/init.d/airframes/51002_hiwonder_ackermann

@@ -0,0 +1,46 @@
+#!/bin/sh
+#
+# @name Hiwonder Ackermann
+#
+# @url https://www.hiwonder.com/products/ackermann-steering-chassis?variant=40382428348503
+#
+# @type Rover
+# @class Rover
+#
+
+. ${R}etc/init.d/rc.rover_ackermann_defaults
+
+param set-default HIWONDER_EMM_EN 1 # Enable motor driver
+param set-default BAT1_N_CELLS 3
+param set-default NAV_ACC_RAD 0.5
+
+# Ackermann Parameters
+param set-default RA_WHEEL_BASE 0.17
+param set-default RA_ACC_RAD_GAIN 1
+param set-default RA_ACC_RAD_MAX 1
+param set-default RA_MAX_STR_ANG 0.698132
+
+# Rover Rate Control Parameters
+param set-default RO_YAW_EXPO 0.6
+param set-default RO_YAW_SUPEXPO 0.3
+param set-default RO_YAW_RATE_I 0.1
+param set-default RO_YAW_RATE_P 0.1
+param set-default RO_YAW_RATE_LIM 150
+
+# Rover Attitude Control Parameters
+param set-default RO_YAW_P 5
+
+# Rover Velocity Control Parameters
+param set-default RO_ACCEL_LIM 1.6
+param set-default RO_DECEL_LIM 3
+param set-default RO_JERK_LIM 10
+param set-default RO_MAX_THR_SPEED 1.2
+param set-default RO_SPEED_LIM 1.1
+param set-default RO_SPEED_I 0.05
+param set-default RO_SPEED_P 0.1
+param set-default RO_SPEED_RED 1
+
+# Pure Pursuit parameters
+param set-default PP_LOOKAHD_GAIN 1
+param set-default PP_LOOKAHD_MAX 10
+param set-default PP_LOOKAHD_MIN 1

ROMFS/px4fmu_common/init.d/airframes/52001_hiwonder_mecanum

@@ -0,0 +1,43 @@
+#!/bin/sh
+#
+# @name Hiwonder Mecanum
+#
+# @url https://www.hiwonder.com/products/large-metal-4wd-vehicle-chassis-green
+#
+# @type Rover
+# @class Rover
+#
+
+. ${R}etc/init.d/rc.rover_mecanum_defaults
+
+param set-default HIWONDER_EMM_EN 1 # Enable motor driver
+param set-default BAT1_N_CELLS 3
+param set-default NAV_ACC_RAD 0.5
+
+# Mecanum Parameters
+param set-default RM_WHEEL_TRACK 0.16
+
+# Rover Rate Control Parameters
+param set-default RO_YAW_EXPO 0.2
+param set-default RO_YAW_SUPEXPO 0.1
+param set-default RO_YAW_RATE_I 0.1
+param set-default RO_YAW_RATE_P 0.1
+param set-default RO_YAW_RATE_LIM 130
+
+# Rover Attitude Control Parameters
+param set-default RO_YAW_P 5
+
+# Rover Velocity Control Parameters
+param set-default RO_ACCEL_LIM 0.9
+param set-default RO_DECEL_LIM 1.2
+param set-default RO_JERK_LIM 10
+param set-default RO_MAX_THR_SPEED 0.5
+param set-default RO_SPEED_LIM 0.45
+param set-default RO_SPEED_I 0.05
+param set-default RO_SPEED_P 0.1
+param set-default RO_SPEED_RED 1
+
+# Pure Pursuit parameters
+param set-default PP_LOOKAHD_GAIN 1
+param set-default PP_LOOKAHD_MAX 10
+param set-default PP_LOOKAHD_MIN 1

ROMFS/px4fmu_common/init.d/airframes/60002_uuv_bluerov2_heavy

@@ -22,7 +22,7 @@
 
 . ${R}etc/init.d/rc.uuv_defaults
 
-param set-default MAV_1_CONFIG 102
+# param set-default MAV_1_CONFIG 102
 
 param set-default BAT1_A_PER_V 37.8798
 param set-default BAT1_CAPACITY 18000
@@ -30,53 +30,92 @@ param set-default BAT1_V_DIV 11
 param set-default BAT1_N_CELLS 4
 param set-default BAT_V_OFFS_CURR 0.33
 
+# Set parameters using `param` utility for SITL
 param set-default CA_AIRFRAME 7
+param set-default CA_METHOD 0
+param set-default MAV_TYPE 12
+
+# Board rotation: set to direct replacement of RPi with PX4
+#       with forward facing vehicle forward
+param set-default SENS_BOARD_ROT 16
+
+# Set proper failsafes
+param set-default COM_ACT_FAIL_ACT 0
+param set-default COM_LOW_BAT_ACT 0
+param set-default NAV_DLL_ACT 0
+param set-default GF_ACTION 1
+param set-default NAV_RCL_ACT 1
+
+# disable attitude failure detection
+param set-default FD_FAIL_P 0
+param set-default FD_FAIL_R 0
 
 param set-default CA_ROTOR_COUNT 8
 param set-default CA_R_REV 255
+
 param set-default CA_ROTOR0_AX 1
 param set-default CA_ROTOR0_AY -1
 param set-default CA_ROTOR0_AZ 0
 param set-default CA_ROTOR0_KM 0
-param set-default CA_ROTOR0_PX 0.5
-param set-default CA_ROTOR0_PY 0.3
-param set-default CA_ROTOR0_PZ 0.2
+param set-default CA_ROTOR0_PX 0.14
+param set-default CA_ROTOR0_PY 0.10
+param set-default CA_ROTOR0_PZ 0.06
+
 param set-default CA_ROTOR1_AX 1
 param set-default CA_ROTOR1_AY 1
 param set-default CA_ROTOR1_AZ 0
 param set-default CA_ROTOR1_KM 0
-param set-default CA_ROTOR1_PX 0.5
-param set-default CA_ROTOR1_PY -0.3
-param set-default CA_ROTOR1_PZ 0.2
+param set-default CA_ROTOR1_PX 0.14
+param set-default CA_ROTOR1_PY -0.10
+param set-default CA_ROTOR1_PZ 0.06
+
 param set-default CA_ROTOR2_AX 1
 param set-default CA_ROTOR2_AY 1
 param set-default CA_ROTOR2_AZ 0
 param set-default CA_ROTOR2_KM 0
-param set-default CA_ROTOR2_PX -0.5
-param set-default CA_ROTOR2_PY 0.3
-param set-default CA_ROTOR2_PZ 0.2
+param set-default CA_ROTOR2_PX -0.14
+param set-default CA_ROTOR2_PY 0.10
+param set-default CA_ROTOR2_PZ 0.06
+
 param set-default CA_ROTOR3_AX 1
 param set-default CA_ROTOR3_AY -1
 param set-default CA_ROTOR3_AZ 0
 param set-default CA_ROTOR3_KM 0
-param set-default CA_ROTOR3_PX -0.5
-param set-default CA_ROTOR3_PY -0.3
-param set-default CA_ROTOR3_PZ 0.2
+param set-default CA_ROTOR3_PX -0.14
+param set-default CA_ROTOR3_PY -0.10
+param set-default CA_ROTOR3_PZ 0.06
+
+param set-default CA_ROTOR4_AX 0
+param set-default CA_ROTOR4_AY 0
 param set-default CA_ROTOR4_AZ -1
 param set-default CA_ROTOR4_KM 0
-param set-default CA_ROTOR4_PX 0.5
-param set-default CA_ROTOR4_PY 0.5
+param set-default CA_ROTOR4_PX 0.12
+param set-default CA_ROTOR4_PY 0.22
+param set-default CA_ROTOR4_PZ 0
+
+param set-default CA_ROTOR5_AX 0
+param set-default CA_ROTOR5_AY 0
 param set-default CA_ROTOR5_AZ 1
 param set-default CA_ROTOR5_KM 0
-param set-default CA_ROTOR5_PX 0.5
-param set-default CA_ROTOR5_PY -0.5
+param set-default CA_ROTOR5_PX 0.12
+param set-default CA_ROTOR5_PY -0.22
+param set-default CA_ROTOR5_PZ 0
+
+param set-default CA_ROTOR6_AX 0
+param set-default CA_ROTOR6_AY 0
 param set-default CA_ROTOR6_AZ 1
 param set-default CA_ROTOR6_KM 0
-param set-default CA_ROTOR6_PX -0.5
-param set-default CA_ROTOR6_PY 0.5
+param set-default CA_ROTOR6_PX -0.12
+param set-default CA_ROTOR6_PY 0.22
+param set-default CA_ROTOR6_PZ 0
+
+param set-default CA_ROTOR7_AX 0
+param set-default CA_ROTOR7_AY 0
+param set-default CA_ROTOR7_AZ -1
 param set-default CA_ROTOR7_KM 0
-param set-default CA_ROTOR7_PX -0.5
-param set-default CA_ROTOR7_PY -0.5
+param set-default CA_ROTOR7_PX -0.12
+param set-default CA_ROTOR7_PY -0.22
+param set-default CA_ROTOR7_PZ 0
 
 param set-default PWM_MAIN_FUNC1 101
 param set-default PWM_MAIN_FUNC2 102
@@ -86,3 +125,30 @@ param set-default PWM_MAIN_FUNC5 105
 param set-default PWM_MAIN_FUNC6 106
 param set-default PWM_MAIN_FUNC7 107
 param set-default PWM_MAIN_FUNC8 108
+
+param set-default PWM_MAIN_MIN1 1100
+param set-default PWM_MAIN_MIN2 1100
+param set-default PWM_MAIN_MIN3 1100
+param set-default PWM_MAIN_MIN4 1100
+param set-default PWM_MAIN_MIN5 1100
+param set-default PWM_MAIN_MIN6 1100
+param set-default PWM_MAIN_MIN7 1100
+param set-default PWM_MAIN_MIN8 1100
+
+param set-default PWM_MAIN_MAX1 1900
+param set-default PWM_MAIN_MAX2 1900
+param set-default PWM_MAIN_MAX3 1900
+param set-default PWM_MAIN_MAX4 1900
+param set-default PWM_MAIN_MAX5 1900
+param set-default PWM_MAIN_MAX6 1900
+param set-default PWM_MAIN_MAX7 1900
+param set-default PWM_MAIN_MAX8 1900
+
+param set-default PWM_MAIN_DIS1 1500
+param set-default PWM_MAIN_DIS2 1500
+param set-default PWM_MAIN_DIS3 1500
+param set-default PWM_MAIN_DIS4 1500
+param set-default PWM_MAIN_DIS5 1500
+param set-default PWM_MAIN_DIS6 1500
+param set-default PWM_MAIN_DIS7 1500
+param set-default PWM_MAIN_DIS8 1500

ROMFS/px4fmu_common/init.d/airframes/70000_atmos

@@ -0,0 +1,159 @@
+#!/bin/sh
+#
+# @name KTH-ATMOS
+#
+# @type Free-Flyer
+# @class Spacecraft
+#
+# @output Motor1 back left thruster, +x thrust
+# @output Motor2 front left thruster, -x thrust
+# @output Motor3 back right thruster, +x thrust
+# @output Motor4 front right thruster, -x thrust
+# @output Motor5 front left thruster, +y thrust
+# @output Motor6 front right thruster, -y thrust
+# @output Motor7 back left thruster, +y thrust
+# @output Motor8 back right thruster, -y thrust
+#
+# @maintainer DISCOWER
+# @url https://atmos.discower.io
+#
+
+. ${R}etc/init.d/rc.sc_defaults
+
+param set-default CA_AIRFRAME 14
+param set-default MAV_TYPE 45
+
+param set-default CA_ROTOR_COUNT 8
+param set-default CA_R_REV 0
+
+# Auto to be provided by Custom Airframe
+param set-default CA_METHOD 0
+
+# Set proper failsafes
+param set-default COM_ACT_FAIL_ACT 0
+param set-default COM_LOW_BAT_ACT 0
+param set-default NAV_DLL_ACT 0
+param set-default GF_ACTION 1
+param set-default NAV_RCL_ACT 1
+
+# Set Mocap Vision frame
+param set EKF2_EV_CTRL 15
+param set EKF2_HGT_REF 3
+
+# disable attitude failure detection
+param set-default FD_FAIL_P 0
+param set-default FD_FAIL_R 0
+
+param set-default CA_ROTOR0_PX -0.12
+param set-default CA_ROTOR0_PY -0.12
+param set-default CA_ROTOR0_PZ 0.0
+param set-default CA_ROTOR0_CT 1.4
+param set-default CA_ROTOR0_AX 1.0
+param set-default CA_ROTOR0_AY 0.0
+param set-default CA_ROTOR0_AZ 0.0
+
+param set-default CA_ROTOR1_PX 0.12
+param set-default CA_ROTOR1_PY -0.12
+param set-default CA_ROTOR1_PZ 0.0
+param set-default CA_ROTOR1_CT 1.4
+param set-default CA_ROTOR1_AX -1.0
+param set-default CA_ROTOR1_AY 0.0
+param set-default CA_ROTOR1_AZ 0.0
+
+param set-default CA_ROTOR2_PX -0.12
+param set-default CA_ROTOR2_PY 0.12
+param set-default CA_ROTOR2_PZ 0.0
+param set-default CA_ROTOR2_CT 1.4
+param set-default CA_ROTOR2_AX 1.0
+param set-default CA_ROTOR2_AY 0.0
+param set-default CA_ROTOR2_AZ 0.0
+
+param set-default CA_ROTOR3_PX 0.12
+param set-default CA_ROTOR3_PY 0.12
+param set-default CA_ROTOR3_PZ 0.0
+param set-default CA_ROTOR3_CT 1.4
+param set-default CA_ROTOR3_AX -1.0
+param set-default CA_ROTOR3_AY 0.0
+param set-default CA_ROTOR3_AZ 0.0
+
+param set-default CA_ROTOR4_PX 0.12
+param set-default CA_ROTOR4_PY -0.12
+param set-default CA_ROTOR4_PZ 0.0
+param set-default CA_ROTOR4_CT 1.4
+param set-default CA_ROTOR4_AX 0.0
+param set-default CA_ROTOR4_AY 1.0
+param set-default CA_ROTOR4_AZ 0.0
+
+param set-default CA_ROTOR5_PX 0.12
+param set-default CA_ROTOR5_PY 0.12
+param set-default CA_ROTOR5_PZ 0.0
+param set-default CA_ROTOR5_CT 1.4
+param set-default CA_ROTOR5_AX 0.0
+param set-default CA_ROTOR5_AY -1.0
+param set-default CA_ROTOR5_AZ 0.0
+
+param set-default CA_ROTOR6_PX -0.12
+param set-default CA_ROTOR6_PY -0.12
+param set-default CA_ROTOR6_PZ 0.0
+param set-default CA_ROTOR6_CT 1.4
+param set-default CA_ROTOR6_AX 0.0
+param set-default CA_ROTOR6_AY 1.0
+param set-default CA_ROTOR6_AZ 0.0
+
+param set-default CA_ROTOR7_PX -0.12
+param set-default CA_ROTOR7_PY 0.12
+param set-default CA_ROTOR7_PZ 0.0
+param set-default CA_ROTOR7_CT 1.4
+param set-default CA_ROTOR7_AX 0.0
+param set-default CA_ROTOR7_AY -1.0
+param set-default CA_ROTOR7_AZ 0.0
+
+
+param set-default PWM_AUX_TIM0 10
+param set-default PWM_AUX_TIM1 10
+param set-default PWM_AUX_TIM2 10
+
+param set-default PWM_AUX_FUNC1 101
+param set-default PWM_AUX_FUNC2 102
+param set-default PWM_AUX_FUNC3 103
+param set-default PWM_AUX_FUNC4 104
+param set-default PWM_AUX_FUNC5 105
+param set-default PWM_AUX_FUNC6 106
+param set-default PWM_AUX_FUNC7 107
+param set-default PWM_AUX_FUNC8 108
+
+param set-default PWM_AUX_DIS1 0
+param set-default PWM_AUX_DIS2 0
+param set-default PWM_AUX_DIS3 0
+param set-default PWM_AUX_DIS4 0
+param set-default PWM_AUX_DIS5 0
+param set-default PWM_AUX_DIS6 0
+param set-default PWM_AUX_DIS7 0
+param set-default PWM_AUX_DIS8 0
+
+param set-default PWM_AUX_MIN1 0
+param set-default PWM_AUX_MIN2 0
+param set-default PWM_AUX_MIN3 0
+param set-default PWM_AUX_MIN4 0
+param set-default PWM_AUX_MIN5 0
+param set-default PWM_AUX_MIN6 0
+param set-default PWM_AUX_MIN7 0
+param set-default PWM_AUX_MIN8 0
+
+# BOARD_PWM_FREQ is downscaled by 10, thus PWM value is given in 10s of usec
+param set-default PWM_AUX_MAX1 10000
+param set-default PWM_AUX_MAX2 10000
+param set-default PWM_AUX_MAX3 10000
+param set-default PWM_AUX_MAX4 10000
+param set-default PWM_AUX_MAX5 10000
+param set-default PWM_AUX_MAX6 10000
+param set-default PWM_AUX_MAX7 10000
+param set-default PWM_AUX_MAX8 10000
+
+# Controller Tunings
+param set-default SC_ROLLRATE_P 0.14
+param set-default SC_PITCHRATE_P 0.14
+param set-default SC_ROLLRATE_I 0.3
+param set-default SC_PITCHRATE_I 0.3
+param set-default SC_ROLLRATE_D 0.004
+param set-default SC_PITCHRATE_D 0.00

ROMFS/px4fmu_common/init.d/airframes/70000_spacecraft_2d

@@ -1,150 +0,0 @@
-#!/bin/sh
-#
-# @name KTH Space Robot
-#
-# @type Space Robot
-# @class 2D Space Robot
-#
-# @maintainer DISCOWER
-#
-
-. ${R}etc/init.d/rc.sc_defaults
-
-param set-default CA_AIRFRAME 14
-param set-default MAV_TYPE 45
-
-param set-default CA_THRUSTER_CNT 8
-param set-default CA_R_REV 0
-
-# Auto to be provided by Custom Airframe
-param set-default CA_METHOD 0
-
-# Set proper failsafes
-param set-default COM_ACT_FAIL_ACT 0
-param set-default COM_LOW_BAT_ACT 0
-param set-default NAV_DLL_ACT 0
-param set-default GF_ACTION 1
-param set-default NAV_RCL_ACT 1
-param set-default COM_POSCTL_NAVL 2
-
-# Set Mocap Vision frame
-param set EKF2_EV_CTRL 15
-param set EKF2_HGT_REF 3
-
-# disable attitude failure detection
-param set-default FD_FAIL_P 0
-param set-default FD_FAIL_R 0
-
-param set-default CA_THRUSTER0_PX -0.12
-param set-default CA_THRUSTER0_PY -0.12
-param set-default CA_THRUSTER0_PZ 0.0
-param set-default CA_THRUSTER0_CT 1.4
-param set-default CA_THRUSTER0_AX 1.0
-param set-default CA_THRUSTER0_AY 0.0
-param set-default CA_THRUSTER0_AZ 0.0
-
-param set-default CA_THRUSTER1_PX 0.12
-param set-default CA_THRUSTER1_PY -0.12
-param set-default CA_THRUSTER1_PZ 0.0
-param set-default CA_THRUSTER1_CT 1.4
-param set-default CA_THRUSTER1_AX -1.0
-param set-default CA_THRUSTER1_AY 0.0
-param set-default CA_THRUSTER1_AZ 0.0
-
-param set-default CA_THRUSTER2_PX -0.12
-param set-default CA_THRUSTER2_PY 0.12
-param set-default CA_THRUSTER2_PZ 0.0
-param set-default CA_THRUSTER2_CT 1.4
-param set-default CA_THRUSTER2_AX 1.0
-param set-default CA_THRUSTER2_AY 0.0
-param set-default CA_THRUSTER2_AZ 0.0
-
-param set-default CA_THRUSTER3_PX 0.12
-param set-default CA_THRUSTER3_PY 0.12
-param set-default CA_THRUSTER3_PZ 0.0
-param set-default CA_THRUSTER3_CT 1.4
-param set-default CA_THRUSTER3_AX -1.0
-param set-default CA_THRUSTER3_AY 0.0
-param set-default CA_THRUSTER3_AZ 0.0
-
-param set-default CA_THRUSTER4_PX 0.12
-param set-default CA_THRUSTER4_PY -0.12
-param set-default CA_THRUSTER4_PZ 0.0
-param set-default CA_THRUSTER4_CT 1.4
-param set-default CA_THRUSTER4_AX 0.0
-param set-default CA_THRUSTER4_AY 1.0
-param set-default CA_THRUSTER4_AZ 0.0
-
-param set-default CA_THRUSTER5_PX 0.12
-param set-default CA_THRUSTER5_PY 0.12
-param set-default CA_THRUSTER5_PZ 0.0
-param set-default CA_THRUSTER5_CT 1.4
-param set-default CA_THRUSTER5_AX 0.0
-param set-default CA_THRUSTER5_AY -1.0
-param set-default CA_THRUSTER5_AZ 0.0
-
-param set-default CA_THRUSTER6_PX -0.12
-param set-default CA_THRUSTER6_PY -0.12
-param set-default CA_THRUSTER6_PZ 0.0
-param set-default CA_THRUSTER6_CT 1.4
-param set-default CA_THRUSTER6_AX 0.0
-param set-default CA_THRUSTER6_AY 1.0
-param set-default CA_THRUSTER6_AZ 0.0
-
-param set-default CA_THRUSTER7_PX -0.12
-param set-default CA_THRUSTER7_PY 0.12
-param set-default CA_THRUSTER7_PZ 0.0
-param set-default CA_THRUSTER7_CT 1.4
-param set-default CA_THRUSTER7_AX 0.0
-param set-default CA_THRUSTER7_AY -1.0
-param set-default CA_THRUSTER7_AZ 0.0
-
-
-param set-default PWM_AUX_TIM0 10
-param set-default PWM_AUX_TIM1 10
-param set-default PWM_AUX_TIM2 10
-
-param set-default PWM_AUX_FUNC1 101
-param set-default PWM_AUX_FUNC2 102
-param set-default PWM_AUX_FUNC3 103
-param set-default PWM_AUX_FUNC4 104
-param set-default PWM_AUX_FUNC5 105
-param set-default PWM_AUX_FUNC6 106
-param set-default PWM_AUX_FUNC7 107
-param set-default PWM_AUX_FUNC8 108
-
-param set-default PWM_AUX_DIS1 0
-param set-default PWM_AUX_DIS2 0
-param set-default PWM_AUX_DIS3 0
-param set-default PWM_AUX_DIS4 0
-param set-default PWM_AUX_DIS5 0
-param set-default PWM_AUX_DIS6 0
-param set-default PWM_AUX_DIS7 0
-param set-default PWM_AUX_DIS8 0
-
-param set-default PWM_AUX_MIN1 0
-param set-default PWM_AUX_MIN2 0
-param set-default PWM_AUX_MIN3 0
-param set-default PWM_AUX_MIN4 0
-param set-default PWM_AUX_MIN5 0
-param set-default PWM_AUX_MIN6 0
-param set-default PWM_AUX_MIN7 0
-param set-default PWM_AUX_MIN8 0
-
-# BOARD_PWM_FREQ is downscaled by 10, thus PWM value is given in 10s of usec
-param set-default PWM_AUX_MAX1 10000
-param set-default PWM_AUX_MAX2 10000
-param set-default PWM_AUX_MAX3 10000
-param set-default PWM_AUX_MAX4 10000
-param set-default PWM_AUX_MAX5 10000
-param set-default PWM_AUX_MAX6 10000
-param set-default PWM_AUX_MAX7 10000
-param set-default PWM_AUX_MAX8 10000
-
-# Controller Tunings
-param set-default SC_ROLLRATE_P 0.14
-param set-default SC_PITCHRATE_P 0.14
-param set-default SC_ROLLRATE_I 0.3
-param set-default SC_PITCHRATE_I 0.3
-param set-default SC_ROLLRATE_D 0.004
-param set-default SC_PITCHRATE_D 0.004

ROMFS/px4fmu_common/init.d/airframes/CMakeLists.txt

@@ -50,6 +50,11 @@ if(CONFIG_MODULES_SIMULATION_PWM_OUT_SIM)
 		1102_tailsitter_duo_sih.hil
 		1103_standard_vtol_sih.hil
 	)
+	if(CONFIG_MODULES_ROVER_ACKERMANN)
+		px4_add_romfs_files(
+			1104_standard_ackermann_sih.hil
+		)
+	endif()
 endif()
 
 if(CONFIG_MODULES_MC_RATE_CONTROL)
@@ -140,6 +145,7 @@ if(CONFIG_MODULES_ROVER_DIFFERENTIAL)
 		# [50000, 50999] Differential rovers
 		50000_generic_rover_differential
 		50001_aion_robotics_r1_rover
+		50002_hiwonder_tracked
 	)
 endif()
 
@@ -148,6 +154,7 @@ if(CONFIG_MODULES_ROVER_ACKERMANN)
 		# [51000, 51999] Ackermann rovers
 		51000_generic_rover_ackermann
 		51001_axial_scx10_2_trail_honcho
+		51002_hiwonder_ackermann
 	)
 endif()
 
@@ -155,6 +162,7 @@ if(CONFIG_MODULES_ROVER_MECANUM)
 	px4_add_romfs_files(
 		# [52000, 52999] Mecanum rovers
 		52000_generic_rover_mecanum
+		52001_hiwonder_mecanum
 	)
 endif()
 
@@ -166,3 +174,10 @@ if(CONFIG_MODULES_UUV_ATT_CONTROL)
 		60002_uuv_bluerov2_heavy
 	)
 endif()
+
+if(CONFIG_MODULES_SPACECRAFT)
+	px4_add_romfs_files(
+		# [70000, 70999] Spacecraft
+		70000_atmos
+	)
+endif()

ROMFS/px4fmu_common/init.d/rc.logging

@@ -8,6 +8,9 @@
 #                 End Setup for board specific configurations.                #
 ###############################################################################
 
+#
+# Set SD logging mode
+#
 if param compare SDLOG_MODE 1
 then
 	set LOGGER_ARGS "${LOGGER_ARGS} -e"
@@ -28,8 +31,28 @@ then
 	set LOGGER_ARGS "${LOGGER_ARGS} -a"
 fi
 
+#
+# Set logging backend
+#
+if param compare SDLOG_BACKEND 1
+then
+	set LOGGER_ARGS "${LOGGER_ARGS} -m file"
+fi
 
-if ! param compare SDLOG_MODE -1
+if param compare SDLOG_BACKEND 2
+then
+	set LOGGER_ARGS "${LOGGER_ARGS} -m mavlink"
+fi
+
+if param compare SDLOG_BACKEND 3
+then
+	set LOGGER_ARGS "${LOGGER_ARGS} -m all"
+fi
+
+#
+# Start logger if any logging backend is enabled
+#
+if ! param compare SDLOG_BACKEND 0
 then
 	logger start -b ${LOGGER_BUF} -t ${LOGGER_ARGS}
 fi

ROMFS/px4fmu_common/init.d/rc.mc_apps

@@ -36,3 +36,8 @@ mc_pos_control start
 # Start Multicopter Land Detector.
 #
 land_detector start multicopter
+
+if param compare -s MC_NN_EN 1
+then
+	mc_nn_control start
+fi

ROMFS/px4fmu_common/init.d/rc.sc_apps

@@ -5,32 +5,6 @@
 # NOTE: Script variables are declared/initialized/unset in the rcS script.
 #
 
-# Start Spacecraft App
+control_allocator start
+
 spacecraft start
-
-# Estimator Group Selection
-# ekf2 start &
-
-# Start MicroDDS Client
-# uxrce_dds_client start -t udp -h 192.168.0.1 -n spacebot2
-# uxrce_dds_client start -t udp -p 8888
-
-#
-# Start Control Allocator
-#
-# sc_control_allocator start
-
-#
-# Start Spacecraft Rate Controller.
-#
-# sc_rate_control start
-
-#
-# Start Spacecraft Attitude Controller.
-#
-# sc_att_control start
-
-#
-# Start Spacecraft Position Controller.
-#
-# sc_pos_control start

ROMFS/px4fmu_common/init.d/rc.sensors

@@ -237,6 +237,7 @@ then
 	qmc5883p -X -q start
 	rm3100 -X -q start
 	bmm350 -X -q start
+	iis2mdc -X -q start
 
 	# start last (wait for possible icm20948 passthrough mode)
 	ak09916 -X -q start

ROMFS/px4fmu_common/init.d/rc.uuv_apps

@@ -16,6 +16,6 @@ control_allocator start
 uuv_att_control start
 
 #
-# Start UUV Land Detector.
+# Start UUV Position Controller.
 #
-land_detector start rover
+uuv_pos_control start

ROMFS/px4fmu_common/init.d/rc.uuv_defaults

@@ -9,3 +9,21 @@ set VEHICLE_TYPE uuv
 
 # MAV_TYPE_SUBMARINE 12
 param set-default MAV_TYPE 12
+
+# Set micro-dds-client to use ethernet and IP-address 192.168.0.1
+param set-default UXRCE_DDS_AG_IP -1062731775
+
+# Disable preflight disarm to not interfere with external launching
+param set-default COM_DISARM_PRFLT -1
+param set-default CBRK_SUPPLY_CHK 894281
+param set-default COM_ARM_HFLT_CHK 0
+
+#Missing params
+param set-default CP_DIST -1.0
+
+# Default to MoCap fusion
+param set-default ATT_EXT_HDG_M 2
+param set-default EKF2_EV_CTRL 15
+param set-default EKF2_EV_DELAY 5
+param set-default EKF2_GPS_CTRL 0
+param set-default EKF2_HGT_REF 3

ROMFS/px4fmu_common/init.d/rc.vehicle_setup

@@ -69,7 +69,7 @@ then
 fi
 
 #
-# Spapcecraft setup.
+# Spacecraft setup.
 #
 if [ $VEHICLE_TYPE = spacecraft ]
 then

ROMFS/px4fmu_common/init.d/rcS

@@ -217,6 +217,17 @@ else
 	fi
 	unset BOARD_RC_DEFAULTS
 
+	#
+	# Optional additional init file: rc.additional_init
+	#
+	set BOARD_RC_ADDITIONAL_INIT ${R}etc/init.d/rc.additional_init
+	if [ -f $BOARD_RC_ADDITIONAL_INIT ]
+	then
+		echo "Board additional init: ${BOARD_RC_ADDITIONAL_INIT}"
+		. $BOARD_RC_ADDITIONAL_INIT
+	fi
+	unset BOARD_RC_ADDITIONAL_INIT
+
 	# Load airframe configuration based on SYS_AUTOSTART parameter
 	if ! param compare SYS_AUTOSTART 0
 	then
@@ -568,11 +579,7 @@ else
 		px4flow start -X &
 	fi
 
-	# Payload deliverer module if gripper is enabled
-	if param compare -s PD_GRIPPER_EN 1
-	then
-		payload_deliverer start
-	fi
+	payload_deliverer start
 
 	if param compare -s ICE_EN 1
 	then

Tools/astyle/files_to_check_code_style.sh

@@ -11,6 +11,8 @@ exec find boards msg src platforms test \
     -path msg/translation_node -prune -o \
     -path platforms/nuttx/NuttX -prune -o \
     -path platforms/qurt/dspal -prune -o \
+    -path src/drivers/ins/ilabs -prune -o \
+		-path src/drivers/ins/microstrain/mip_sdk -prune -o \
     -path src/drivers/ins/vectornav/libvnc -prune -o \
     -path src/drivers/uavcan/libdronecan -prune -o \
     -path src/drivers/uavcan/libuavcan -prune -o \
@@ -36,4 +38,6 @@ exec find boards msg src platforms test \
     -path src/modules/zenoh/zenoh-pico -prune -o \
     -path boards/modalai/voxl2/libfc-sensor-api -prune -o \
     -path src/drivers/actuators/vertiq_io/iq-module-communication-cpp -prune -o \
+    -path src/lib/tensorflow_lite_micro/tflite_micro -prune -o \
+    -path src/drivers/ins/sbgecom/sbgECom -prune -o \
     \( -type f \( -name "*.c" -o -name "*.h" -o -name "*.cpp" -o -name "*.hpp" \) -print \) | grep $PATTERN

Tools/boot_now.py

@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
 ############################################################################
 #
 #   Copyright (C) 2012-2015 PX4 Development Team. All rights reserved.

Tools/ci/generate_board_targets_json.py

@@ -38,7 +38,7 @@ if args.filter:
 default_container = 'ghcr.io/px4/px4-dev:v1.16.0-rc1-258-g0369abd556'
 build_configs = []
 grouped_targets = {}
-excluded_boards = ['modalai_voxl2', 'px4_ros2']  # TODO: fix and enable
+excluded_boards = ['modalai_voxl2', 'px4_ros2', 'espressif_esp32']  # TODO: fix and enable
 excluded_manufacturers = ['atlflight']
 excluded_platforms = ['qurt']
 excluded_labels = [

Tools/compress.py

@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
 
 import argparse
 import lzma

Tools/fetch_file.py

@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
 ############################################################################
 #
 #   Copyright (C) 2013-2014 PX4 Development Team. All rights reserved.
@@ -34,7 +34,7 @@
 
 """Fetch files via nsh console
 
-Usage: python fetch_file.py [-l] [-f] [-d device] [-s speed] [-o out_path] path
+Usage: python3 fetch_file.py [-l] [-f] [-d device] [-s speed] [-o out_path] path
 \t-l\tList files
 \t-f\tOverwrite existing files
 \t-d\tSerial device
@@ -134,7 +134,7 @@ def _get_files_in_dir(ser, path, path_out, force, timeout):
             _get_file(ser, path_fn, path_fn_out, force, timeout)
 
 def _usage():
-    print("""Usage: python fetch_file.py [-l] [-f] [-d device] [-s speed] [-o out_path] path
+    print("""Usage: python3 fetch_file.py [-l] [-f] [-d device] [-s speed] [-o out_path] path
 \t-l\tList files
 \t-f\tOverwrite existing files
 \t-d\tSerial device

Tools/geotag_images_ulog.py

@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
 #######################################################################################
 #
 # DeltaTag: enhanced geo-referencing survey images
@@ -15,8 +15,8 @@
 # Note: DeltaTag does not make copies, it writes the Exif information directly to the images
 #
 # Install: pip install pyulog piexif Pillow numpy
-# Run: python geotag_images_ulog.py [logfile] [image dir] (optional offset)
-# eg: python geotag_images_ulog.py mylog.ulg ./images
+# Run: python3 geotag_images_ulog.py [logfile] [image dir] (optional offset)
+# eg: python3 geotag_images_ulog.py mylog.ulg ./images
 #
 # Parameters
 # logfile: a ulog formatted logfile containing camera_capture events (survey missions)
@@ -39,8 +39,8 @@ from fractions import Fraction
 
 
 if(len(sys.argv)) < 3:
-    print("Usage: python geotag_images_ulog.py [logfile] [image dir]")
-    print("Example: python geotag_images_ulog.py mylog.ulg ./images")
+    print("Usage: python3 geotag_images_ulog.py [logfile] [image dir]")
+    print("Example: python3 geotag_images_ulog.py mylog.ulg ./images")
     print(len(sys.argv))
     sys.exit()
 

Tools/kconfig/merge_config.py

@@ -101,7 +101,6 @@ def main(kconfig_file, config1, config2):
     # load_config() and write_config() returns a message to print.
     print(kconf.load_config(config1, replace=False))
     print(kconf.load_config(config2, replace=False))
-
     # Modification for PX4 unset all symbols (INT,HEX etc) from 2nd config
 
     f = open(config2, 'r')
@@ -113,13 +112,16 @@ def main(kconfig_file, config1, config2):
         #pprint.pprint(line)
         if match is not None:
             sym_name = match.group(1)
-            kconf.syms[sym_name].unset_value()
+            try:
+                kconf.syms[sym_name].unset_value()
 
-            if kconf.syms[sym_name].type is BOOL:
-                for default, cond in kconf.syms[sym_name].orig_defaults:
-                    if(cond.str_value == 'y'):
-                        # Default is y, our diff is unset thus we've set it to no
-                        kconf.syms[sym_name].set_value(0)
+                if kconf.syms[sym_name].type is BOOL:
+                    for default, cond in kconf.syms[sym_name].orig_defaults:
+                        if(cond.str_value == 'y'):
+                            # Default is y, our diff is unset thus we've set it to no
+                            kconf.syms[sym_name].set_value(0)
+            except KeyError:
+                pass
 
     f.close()
 

Tools/kconfig/updateconfig.py

@@ -41,6 +41,7 @@ import glob
 import kconfiglib
 import tempfile
 import sys
+from pathlib import Path
 
 import diffconfig
 import merge_config
@@ -52,6 +53,14 @@ for name in glob.glob(px4_dir + '/boards/*/*/default.px4board'):
     kconf.load_config(name)
     print(kconf.write_min_config(name))
 
+    board_path = Path(name)
+    defconfig_path = board_path.parent / "nuttx-config" / "nsh" / "defconfig"
+
+    if os.path.exists(defconfig_path):
+        # Merge NuttX with default config
+        kconf = merge_config.main(px4_dir + "/Kconfig", name, defconfig_path)
+        print(kconf.write_min_config(name))
+
 for name in glob.glob(px4_dir + '/boards/*/*/bootloader.px4board'):
     kconf = kconfiglib.Kconfig()
     kconf.load_config(name)

Tools/mavlink_shell.py

@@ -191,7 +191,7 @@ def main():
                         cur_history_index = len(command_history)
                     mav_serialport.write(cur_line+'\n')
                     cur_line = ''
-                elif ord(ch) == 127: # backslash
+                elif ord(ch) == 8: # backspace
                     if len(cur_line) > 0:
                         erase_last_n_chars(1)
                         cur_line = cur_line[:-1]

Tools/msg/templates/cdrstream/uorb_idl_header.h.em

@@ -49,14 +49,14 @@ for field in spec.parsed_fields():
             (package, name) = genmsg.names.package_resource_name(field.base_type)
             package = package or spec.package # convert '' to package
 
-            print('typedef px4_msg_%s px4_msg_px4__msg__%s;' % (name,name))
+            print('typedef px4_msgs_msg_%s px4_msgs_msg_px4_msgs__msg__%s;' % (name,name))
 }@
 
 
 
-typedef struct @uorb_struct px4_msg_@(file_base_name);
+typedef struct @uorb_struct px4_msgs_msg_@(file_base_name);
 
-extern const struct dds_cdrstream_desc px4_msg_@(file_base_name)_cdrstream_desc;
+extern const struct dds_cdrstream_desc px4_msgs_msg_@(file_base_name)_cdrstream_desc;
 
 #ifdef __cplusplus
 }

Tools/package_firmware.py

@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
 
 import glob
 import zipfile

Tools/parameter_update.py

@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
 # -*- coding: utf-8 -*-
 
 ############################################################################
@@ -55,7 +55,7 @@ Usage:
     The script needs a list of files as an input. To quickly find and feed all the file
     that it needs to inspect, one can simply pipe the result of a ripgrep -l command as follows:
 
-        rg -l '\.[gs]et\(|px4::params::' -tcpp | python parameter_update.py
+        rg -l '\.[gs]et\(|px4::params::' -tcpp | python3 parameter_update.py
 """
 
 import re

Tools/process_sensor_caldata.py

@@ -23,7 +23,7 @@ Data can be gathered using the following sequence:
 5) Move to a warm dry, still air, constant pressure environment.
 6) Apply power for 45 minutes, keeping the board still.
 7) Remove power and extract the .ulog file
-8) Open a terminal window in the Firmware/Tools directory and run the python calibration script script file: 'python process_sensor_caldata.py <full path name to .ulog file>
+8) Open a terminal window in the Firmware/Tools directory and run the python calibration script script file: 'python3 process_sensor_caldata.py <full path name to .ulog file>
 9) Power the board, connect QGC and load the parameter from the generated .params file onto the board using QGC. Due to the number of parameters, loading them may take some time.
 10) TODO - we need a way for user to reliably tell when parameters have all been changed and saved.
 11) After parameters have finished loading, set SDLOG_MODE and SDLOG_PROFILE to their respective values prior to step 4) and remove power.

Tools/px4.py

@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
 ############################################################################
 #
 #   Copyright (c) 2017-2020 PX4 Development Team. All rights reserved.

Tools/px4airframes/srcparser.py

@@ -14,7 +14,6 @@ class AirframeGroup(object):
         self.af_class = af_class
         self.airframes = []
 
-
     def AddAirframe(self, airframe):
         """
         Add airframe to the airframe group
@@ -107,6 +106,8 @@ class AirframeGroup(object):
             return "Balloon"
         elif (self.type == "Vectored 6 DOF UUV"):
             return "Vectored6DofUUV"
+        elif self.type == "Free-Flyer":
+            return "FreeFlyer"
         return "AirframeUnknown"
 
     def GetAirframes(self):

Tools/px_mkfw.py

@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
 ############################################################################
 #
 #   Copyright (C) 2012, 2013 PX4 Development Team. All rights reserved.

Tools/px_process_airframes.py

@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
 ############################################################################
 #
 #   Copyright (C) 2013-2017 PX4 Development Team. All rights reserved.

Tools/px_process_events.py

@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
 ############################################################################
 #
 #   Copyright (C) 2020 PX4 Development Team. All rights reserved.

Tools/px_process_module_doc.py

@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
 ############################################################################
 #
 #   Copyright (C) 2017 PX4 Development Team. All rights reserved.

Tools/px_romfs_pruner.py

@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
 ############################################################################
 #
 #   Copyright (C) 2014-2018 PX4 Development Team. All rights reserved.

Tools/run-clang-tidy.py

@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
 #
 #===- run-clang-tidy.py - Parallel clang-tidy runner ---------*- python -*--===#
 #
@@ -110,10 +110,11 @@ def run_tidy(args, tmpdir, build_path, queue):
                                      args.extra_arg, args.extra_arg_before)
 
     try:
-      subprocess.check_call(invocation, stdin=None, stdout=open(os.devnull, 'wb'), stderr=subprocess.STDOUT)
+      subprocess.check_call(invocation, stdin=None, stdout=open(os.devnull, 'w'), stderr=open(os.devnull, 'w'))
     except subprocess.CalledProcessError as e:
-      sys.stdout.write(' '.join(invocation) + '\n')
-      subprocess.call(invocation)
+      sys.stdout.write(f'failed on {name} --> {" ".join(invocation)}\n')
+      # Now run again to see the actual output
+      subprocess.call(invocation, stdin=None)
       global tidy_failures
       tidy_failures = tidy_failures + 1
 

Tools/setup/Dockerfile

@@ -29,6 +29,8 @@ RUN git config --global --add safe.directory '*'
 # Create user with id 1001 (jenkins docker workflow default)
 RUN useradd --shell /bin/bash -u 1001 -c "" -m user && usermod -a -G dialout user
 
+ENV PATH="${PATH}:/opt/xtensa-esp-elf/bin"
+
 ENTRYPOINT ["/usr/local/bin/docker-entrypoint.sh"]
 
 CMD ["/bin/bash"]

Tools/setup/macos.sh

@@ -1,5 +1,18 @@
 #! /usr/bin/env bash
 
+## Basch script to setup the PX4 development environment on macOS
+## Works for Intel and Arm based Apple hardware
+##
+## Installs:
+##	- Common dependencies and tools for building PX4
+##	- Cross compilers for building hardware targets using NuttX
+##	- Can also install the default simulation provided by the px4-sim homebrew
+##		Formula
+##
+## For more information regarding the Homebrew Formulas see:
+##		https://github.com/PX4/homebrew-px4/
+##
+
 # script directory
 DIR=$( cd "$( dirname "${BASH_SOURCE[0]}" )" && pwd )
 
@@ -18,37 +31,43 @@ do
 	fi
 done
 
+echo "[macos.sh] Installing the development dependencies for the PX4 Autopilot"
+
 if ! command -v brew &> /dev/null
 then
 	# install Homebrew if not installed yet
+	echo "[macos.sh] Installing Homebrew"
 	/bin/bash -c "$(curl -fsSL https://raw.githubusercontent.com/Homebrew/install/master/install.sh)"
 fi
 
 # Install px4-dev formula
 if [[ $REINSTALL_FORMULAS == "--reinstall" ]]; then
-	echo "Re-installing PX4 general dependencies (homebrew px4-dev)"
+	echo "[macos.sh] Re-installing dependencies (homebrew px4-dev)"
 
 	# confirm Homebrew installed correctly
 	brew doctor
 
+	brew tap osx-cross/arm
 	brew tap PX4/px4
+
 	brew reinstall px4-dev
-	brew install ncurses
-	brew install python-tk
+	brew link --overwrite --force arm-gcc-bin@13
 else
 	if brew ls --versions px4-dev > /dev/null; then
-		echo "px4-dev already installed"
+		echo "[macos.sh] px4-dev already installed"
 	else
-		echo "Installing PX4 general dependencies (homebrew px4-dev)"
+		echo "[macos.sh] Installing general dependencies (homebrew px4-dev)"
+
+		brew tap osx-cross/arm
 		brew tap PX4/px4
+
 		brew install px4-dev
-		brew install ncurses
-		brew install python-tk
+		brew link --overwrite --force arm-gcc-bin@13
 	fi
 fi
 
 # Python dependencies
-echo "Installing PX4 Python3 dependencies"
+echo "[macos.sh] Installing Python3 dependencies"
 # We need to have future to install pymavlink later.
 python3 -m pip install future
 python3 -m pip install --user -r ${DIR}/requirements.txt
@@ -62,4 +81,4 @@ if [[ $INSTALL_SIM == "--sim-tools" ]]; then
 	fi
 fi
 
-echo "All set! PX4 toolchain installed!"
+echo "[macos.sh] All set! The PX4 Autopilot toolchain was installed."

Tools/setup/ubuntu.sh

@@ -54,6 +54,22 @@ if [[ ! -f "${DIR}/${REQUIREMENTS_FILE}" ]]; then
 	return 1
 fi
 
+# Linux Mint compatibility: use upstream Ubuntu values
+if [ -r /etc/upstream-release/lsb-release ]; then
+    . /etc/upstream-release/lsb-release
+    UBUNTU_CODENAME="${DISTRIB_CODENAME:-${UBUNTU_CODENAME:-}}"
+    UBUNTU_RELEASE="${DISTRIB_RELEASE:-${UBUNTU_RELEASE:-}}"
+
+    lsb_release() {
+        if [ "$1" = "-cs" ]; then
+            printf '%s' "$UBUNTU_CODENAME"
+        elif [ "$1" = "-rs" ]; then
+            printf '%s' "$UBUNTU_RELEASE"
+        else
+            command lsb_release "$@"
+        fi
+    }
+fi
 
 # check ubuntu version
 # otherwise warn and point to docker?
@@ -155,7 +171,14 @@ if [[ $INSTALL_NUTTX == "true" ]]; then
 			g++-multilib \
 			gcc-arm-none-eabi \
 			gcc-multilib \
+			esptool \
 			;
+
+		echo
+		echo "Fetching Xtensa compilers"
+		wget -q -P $DIR https://github.com/espressif/crosstool-NG/releases/download/esp-13.2.0_20240530/xtensa-esp-elf-13.2.0_20240530-x86_64-linux-gnu.tar.xz
+		sudo tar -xf $DIR/xtensa-esp-elf-13.2.0_20240530-x86_64-linux-gnu.tar.xz -C /opt
+		echo 'export PATH=$PATH:/opt/xtensa-esp-elf/bin/' >> /home/$USER/.bashrc
 	fi
 
 	if [[ "${INSTALL_ARCH}" == "aarch64" ]]; then

Tools/simulation/gz

@@ -1 +1 @@
-Subproject commit 929d55e8832fcd1a1432d2ae1b36601455ec7ed7
+Subproject commit b6127f4ec20de867e215fb5f78ae88b80f371909

Tools/simulation/jsbsim/jsbsim_bridge

@@ -1 +1 @@
-Subproject commit 68de2cc63ded9a0d6641d45e9eb3ed2b43454cba
+Subproject commit f37ec259bd7a43565fe0ff4722465b7a303200f6

Tools/uorb_graph/create.py

@@ -1,4 +1,4 @@
-#! /usr/bin/env python3
+#!/usr/bin/env python3
 
 from __future__ import print_function
 

Tools/validate_yaml.py

@@ -1,4 +1,4 @@
-#! /usr/bin/env python3
+#!/usr/bin/env python3
 """ Script to validate YAML file(s) against a YAML schema file """
 
 from __future__ import print_function

Tools/zenoh/px_generate_zenoh_topic_files.py

@@ -42,6 +42,7 @@ import os
 import argparse
 import re
 import sys
+import json
 
 try:
     import em
@@ -124,7 +125,7 @@ def generate_by_template(output_file, template_file, em_globals):
     return True
 
 
-def generate_topics_list_file_from_files(files, outputdir, template_filename, templatedir):
+def generate_topics_list_file_from_files(files, outputdir, template_filename, templatedir, rihs_path):
     # generate cpp file with topics list
     filenames = []
     for filename in [os.path.basename(p) for p in files if os.path.basename(p).endswith(".msg")]:
@@ -138,11 +139,27 @@ def generate_topics_list_file_from_files(files, outputdir, template_filename, te
     for filename in [os.path.basename(p) for p in files if os.path.basename(p).endswith(".msg")]:
         full_base_names.append(filename.replace(".msg",""))
 
-    topics = []
-    for msg_filename in files:
-        topics.extend(get_topics(msg_filename))
+    rihs01_hashes = dict()
+    if rihs_path != '':
+        for topic in full_base_names:
+            with open(rihs_path + "/msg/" + topic + ".json") as f:
+                d = json.load(f)
+                assert d['type_hashes'][0]['hash_string'][:7] == 'RIHS01_'
 
-    tl_globals = {"msgs": filenames, "topics": topics, "datatypes": datatypes, "full_base_names": full_base_names}
+                rihs01_hash = d['type_hashes'][0]['hash_string'][7:]
+
+                byte_array = [f"0x{rihs01_hash[i:i+2]}" for i in range(0, len(rihs01_hash), 2)]
+                c_code = f"{{ {', '.join(byte_array)} }};"
+                rihs01_hashes[topic] = c_code
+
+    topics = []
+    datatypes_with_topics = dict()
+    for msg_filename in files:
+        datatype = re.sub(r'(?<!^)(?=[A-Z])', '_', os.path.basename(msg_filename)).lower().replace(".msg","")
+        datatypes_with_topics[datatype] = get_topics(msg_filename)
+        topics.extend(datatypes_with_topics[datatype])
+
+    tl_globals = {"msgs": filenames, "topics": topics, "datatypes": datatypes, "full_base_names": full_base_names, "rihs01_hashes": rihs01_hashes, "datatypes_with_topics": datatypes_with_topics}
     tl_template_file = os.path.join(templatedir, template_filename)
     tl_out_file = os.path.join(outputdir, template_filename.replace(".em", ""))
 
@@ -162,13 +179,15 @@ if __name__ == "__main__":
     parser.add_argument('-p', dest='prefix', default='',
                         help='string added as prefix to the output file '
                         ' name when converting directories')
+    parser.add_argument('--rihs', dest='rihs', default='',
+                        help='path where rihs01 json files located')
     args = parser.parse_args()
 
     if args.zenoh_config:
-        generate_topics_list_file_from_files(args.file, args.outputdir, ZENOH_TEMPLATE_FILE[0], args.templatedir)
+        generate_topics_list_file_from_files(args.file, args.outputdir, ZENOH_TEMPLATE_FILE[0], args.templatedir, args.rihs)
         exit(0)
     elif args.zenoh_pub_sub:
-        generate_topics_list_file_from_files(args.file, args.outputdir, ZENOH_TEMPLATE_FILE[1], args.templatedir)
+        generate_topics_list_file_from_files(args.file, args.outputdir, ZENOH_TEMPLATE_FILE[1], args.templatedir, args.rihs)
         exit(0)
     else:
         print('Error: either --headers or --sources must be specified')

Tools/zenoh/templates/zenoh/uorb_pubsub_factory.hpp.em

@@ -74,7 +74,7 @@ full_base_names.sort()
 
 @[for idx, topic_name in enumerate(datatypes)]@
 @{
-type_topic_count = len([e for e in topic_names_all if e.startswith(topic_name)])
+type_topic_count = len(datatypes_with_topics[topic_name])
 }@
 #ifdef CONFIG_ZENOH_PUBSUB_@(topic_name.upper())
 #  define CONFIG_ZENOH_PUBSUB_@(topic_name.upper())_COUNT @(type_topic_count)
@@ -88,9 +88,28 @@ type_topic_count = len([e for e in topic_names_all if e.startswith(topic_name)])
         CONFIG_ZENOH_PUBSUB_@(topic_name.upper())_COUNT + \
 @[end for]        0
 
+@[for topic_name, rihs01_hash in rihs01_hashes.items()]@
+const uint8_t @(topic_name)_hash[32] = @(rihs01_hash)
+@[end for]
+
+@[for idx, topic_name in enumerate(datatypes)]@
+#ifdef CONFIG_ZENOH_PUBSUB_@(topic_name.upper())
+@{
+topic_names = datatypes_with_topics[topic_name]
+}@
+const orb_metadata* @(topic_name)_topic_meta[@(len(topic_names))] = {
+@[for topic_name_inst in topic_names]@
+	ORB_ID(@(topic_name_inst)),
+@[end for]};
+#endif
+@[end for]
+
 typedef struct {
+	const char *data_type_name;
 	const uint32_t *ops;
-	const orb_metadata* orb_meta;
+	const uint8_t *hash;
+	const orb_metadata** orb_topic;
+	const uint8_t orb_topics_size;
 } UorbPubSubTopicBinder;
 
 const UorbPubSubTopicBinder _topics[ZENOH_PUBSUB_COUNT] {
@@ -100,54 +119,95 @@ uorb_id_idx = 0
 @[for idx, topic_name in enumerate(datatypes)]@
 #ifdef CONFIG_ZENOH_PUBSUB_@(topic_name.upper())
 @{
-topic_names = [e for e in topic_names_all if e.startswith(topic_name)]
+topic_names = datatypes_with_topics[topic_name]
 }@
-@[for topic_name_inst in topic_names]@
 		{
-		  px4_msg_@(topic_dict[topic_name])_cdrstream_desc.ops.ops,
-		  ORB_ID(@(topic_name_inst))
+		  "@(topic_name)",
+		  px4_msgs_msg_@(topic_dict[topic_name])_cdrstream_desc.ops.ops,
+		  @(topic_dict[topic_name])_hash,
+		  @(topic_name)_topic_meta,
+		  @(len(topic_names)),
 		},
-@{
-uorb_id_idx += 1
-}@
-@[end for]#endif
+#endif
 @[end for]
 };
 
-uORB_Zenoh_Publisher* genPublisher(const orb_metadata *meta) {
+uORB_Zenoh_Publisher* genPublisher(const orb_metadata *meta, int instance) {
     for (auto &pub : _topics) {
-        if(pub.orb_meta->o_id == meta->o_id) {
-            return new uORB_Zenoh_Publisher(meta, pub.ops);
+        for(int i = 0; i < pub.orb_topics_size; i++) {
+            if(pub.orb_topic[i]->o_id == meta->o_id) {
+                return new uORB_Zenoh_Publisher(meta, pub.ops, instance);
+            }
         }
     }
     return NULL;
 }
 
 
-uORB_Zenoh_Publisher* genPublisher(const char *name) {
+uORB_Zenoh_Publisher* genPublisher(const char *name, int instance) {
     for (auto &pub : _topics) {
-        if(strcmp(pub.orb_meta->o_name, name) == 0) {
-            return new uORB_Zenoh_Publisher(pub.orb_meta, pub.ops);
+        for(int i = 0; i < pub.orb_topics_size; i++) {
+            if(strcmp(pub.orb_topic[i]->o_name, name) == 0) {
+                return new uORB_Zenoh_Publisher(pub.orb_topic[i], pub.ops, instance);
+            }
         }
     }
     return NULL;
 }
 
 
-Zenoh_Subscriber* genSubscriber(const orb_metadata *meta) {
+Zenoh_Subscriber* genSubscriber(const orb_metadata *meta, int instance) {
     for (auto &sub : _topics) {
-        if(sub.orb_meta->o_id == meta->o_id) {
-            return new uORB_Zenoh_Subscriber(meta, sub.ops);
+        for(int i = 0; i < sub.orb_topics_size; i++) {
+            if(sub.orb_topic[i]->o_id == meta->o_id) {
+                return new uORB_Zenoh_Subscriber(meta, sub.ops, instance);
+            }
         }
     }
     return NULL;
 }
 
 
-Zenoh_Subscriber* genSubscriber(const char *name) {
+Zenoh_Subscriber* genSubscriber(const char *name, int instance) {
     for (auto &sub : _topics) {
-        if(strcmp(sub.orb_meta->o_name, name) == 0) {
-            return new uORB_Zenoh_Subscriber(sub.orb_meta, sub.ops);
+        for(int i = 0; i < sub.orb_topics_size; i++) {
+            if(strcmp(sub.orb_topic[i]->o_name, name) == 0) {
+                return new uORB_Zenoh_Subscriber(sub.orb_topic[i], sub.ops, instance);
+            }
+        }
+    }
+    return NULL;
+}
+
+const char* getTypeName(const char *name) {
+    for (auto &sub : _topics) {
+        for(int i = 0; i < sub.orb_topics_size; i++) {
+            if(strcmp(sub.orb_topic[i]->o_name, name) == 0) {
+                return sub.data_type_name;
+            }
+        }
+    }
+    return NULL;
+}
+
+
+const uint8_t* getRIHS01_Hash(const orb_metadata *meta) {
+    for (auto &sub : _topics) {
+        for(int i = 0; i < sub.orb_topics_size; i++) {
+            if(sub.orb_topic[i]->o_id == meta->o_id) {
+                return sub.hash;
+            }
+        }
+    }
+    return NULL;
+}
+
+const uint8_t* getRIHS01_Hash(const char *name) {
+    for (auto &sub : _topics) {
+        for(int i = 0; i < sub.orb_topics_size; i++) {
+            if(strcmp(sub.orb_topic[i]->o_name, name) == 0) {
+                return sub.hash;
+            }
         }
     }
     return NULL;

boards/accton-godwit/ga1/bootloader.px4board

@@ -0,0 +1,3 @@
+CONFIG_BOARD_TOOLCHAIN="arm-none-eabi"
+CONFIG_BOARD_ARCHITECTURE="cortex-m7"
+CONFIG_BOARD_ROMFSROOT=""

boards/accton-godwit/ga1/default.px4board

@@ -0,0 +1,105 @@
+CONFIG_BOARD_TOOLCHAIN="arm-none-eabi"
+CONFIG_BOARD_ARCHITECTURE="cortex-m7"
+CONFIG_BOARD_ETHERNET=y
+CONFIG_BOARD_SERIAL_GPS1="/dev/ttyS0"
+CONFIG_BOARD_SERIAL_GPS2="/dev/ttyS7"
+CONFIG_BOARD_SERIAL_TEL1="/dev/ttyS6"
+CONFIG_BOARD_SERIAL_TEL2="/dev/ttyS4"
+CONFIG_BOARD_SERIAL_TEL3="/dev/ttyS1"
+CONFIG_BOARD_SERIAL_EXT2="/dev/ttyS3"
+CONFIG_DRIVERS_ADC_ADS1115=y
+CONFIG_DRIVERS_ADC_BOARD_ADC=y
+CONFIG_DRIVERS_BAROMETER_BMP388=y
+CONFIG_DRIVERS_BAROMETER_INVENSENSE_ICP201XX=y
+CONFIG_DRIVERS_BAROMETER_MS5611=y
+CONFIG_DRIVERS_CAMERA_CAPTURE=y
+CONFIG_DRIVERS_CAMERA_TRIGGER=y
+CONFIG_DRIVERS_CDCACM_AUTOSTART=y
+CONFIG_COMMON_DIFFERENTIAL_PRESSURE=y
+CONFIG_COMMON_DISTANCE_SENSOR=y
+CONFIG_DRIVERS_DSHOT=y
+CONFIG_DRIVERS_GNSS_SEPTENTRIO=y
+CONFIG_DRIVERS_GPIO_MCP23009=y
+CONFIG_DRIVERS_GPS=y
+CONFIG_DRIVERS_HEATER=y
+CONFIG_DRIVERS_IMU_BOSCH_BMI088=y
+CONFIG_DRIVERS_IMU_INVENSENSE_ICM42688P=y
+CONFIG_COMMON_LIGHT=y
+CONFIG_DRIVERS_MAGNETOMETER_BOSCH_BMM150=y
+CONFIG_DRIVERS_MAGNETOMETER_ISENTEK_IST8308=y
+CONFIG_DRIVERS_MAGNETOMETER_ISENTEK_IST8310=y
+CONFIG_DRIVERS_MAGNETOMETER_MEMSIC_MMC5983MA=y
+CONFIG_DRIVERS_MAGNETOMETER_RM3100=y
+CONFIG_DRIVERS_OSD_MSP_OSD=y
+CONFIG_DRIVERS_POWER_MONITOR_INA226=y
+CONFIG_DRIVERS_POWER_MONITOR_INA228=y
+CONFIG_DRIVERS_POWER_MONITOR_INA238=y
+CONFIG_DRIVERS_POWER_MONITOR_PM_SELECTOR_AUTERION=y
+CONFIG_DRIVERS_PWM_OUT=y
+CONFIG_DRIVERS_PX4IO=y
+CONFIG_DRIVERS_RC_INPUT=y
+CONFIG_DRIVERS_SAFETY_BUTTON=y
+CONFIG_DRIVERS_TONE_ALARM=y
+CONFIG_DRIVERS_UAVCAN=y
+CONFIG_BOARD_UAVCAN_TIMER_OVERRIDE=2
+CONFIG_MODULES_AIRSPEED_SELECTOR=y
+CONFIG_MODULES_BATTERY_STATUS=y
+CONFIG_MODULES_CAMERA_FEEDBACK=y
+CONFIG_MODULES_COMMANDER=y
+CONFIG_MODULES_CONTROL_ALLOCATOR=y
+CONFIG_MODULES_DATAMAN=y
+CONFIG_MODULES_EKF2=y
+CONFIG_MODULES_ESC_BATTERY=y
+CONFIG_MODULES_EVENTS=y
+CONFIG_MODULES_FLIGHT_MODE_MANAGER=y
+CONFIG_MODULES_FW_ATT_CONTROL=y
+CONFIG_MODULES_FW_AUTOTUNE_ATTITUDE_CONTROL=y
+CONFIG_MODULES_FW_LATERAL_LONGITUDINAL_CONTROL=y
+CONFIG_MODULES_FW_MODE_MANAGER=y
+CONFIG_MODULES_FW_RATE_CONTROL=y
+CONFIG_MODULES_GIMBAL=y
+CONFIG_MODULES_GYRO_CALIBRATION=y
+CONFIG_MODULES_HARDFAULT_STREAM=y
+CONFIG_MODULES_LAND_DETECTOR=y
+CONFIG_MODULES_LANDING_TARGET_ESTIMATOR=y
+CONFIG_MODULES_LOAD_MON=y
+CONFIG_MODULES_LOGGER=y
+CONFIG_MODULES_MAG_BIAS_ESTIMATOR=y
+CONFIG_MODULES_MANUAL_CONTROL=y
+CONFIG_MODULES_MAVLINK=y
+CONFIG_MAVLINK_DIALECT="development"
+CONFIG_MODULES_MC_ATT_CONTROL=y
+CONFIG_MODULES_MC_AUTOTUNE_ATTITUDE_CONTROL=y
+CONFIG_MODULES_MC_HOVER_THRUST_ESTIMATOR=y
+CONFIG_MODULES_MC_POS_CONTROL=y
+CONFIG_MODULES_MC_RATE_CONTROL=y
+CONFIG_MODULES_NAVIGATOR=y
+CONFIG_MODE_NAVIGATOR_VTOL_TAKEOFF=y
+CONFIG_NUM_MISSION_ITMES_SUPPORTED=1000
+CONFIG_MODULES_RC_UPDATE=y
+CONFIG_MODULES_SENSORS=y
+CONFIG_MODULES_TEMPERATURE_COMPENSATION=y
+CONFIG_MODULES_UXRCE_DDS_CLIENT=y
+CONFIG_MODULES_VTOL_ATT_CONTROL=y
+CONFIG_SYSTEMCMDS_ACTUATOR_TEST=y
+CONFIG_SYSTEMCMDS_BSONDUMP=y
+CONFIG_SYSTEMCMDS_DMESG=y
+CONFIG_SYSTEMCMDS_GPIO=y
+CONFIG_SYSTEMCMDS_HARDFAULT_LOG=y
+CONFIG_SYSTEMCMDS_I2C_LAUNCHER=y
+CONFIG_SYSTEMCMDS_I2CDETECT=y
+CONFIG_SYSTEMCMDS_LED_CONTROL=y
+CONFIG_SYSTEMCMDS_MFT=y
+CONFIG_SYSTEMCMDS_MTD=y
+CONFIG_SYSTEMCMDS_NETMAN=y
+CONFIG_SYSTEMCMDS_NSHTERM=y
+CONFIG_SYSTEMCMDS_PARAM=y
+CONFIG_SYSTEMCMDS_PERF=y
+CONFIG_SYSTEMCMDS_REBOOT=y
+CONFIG_SYSTEMCMDS_SYSTEM_TIME=y
+CONFIG_SYSTEMCMDS_TOP=y
+CONFIG_SYSTEMCMDS_TOPIC_LISTENER=y
+CONFIG_SYSTEMCMDS_TUNE_CONTROL=y
+CONFIG_SYSTEMCMDS_UORB=y
+CONFIG_SYSTEMCMDS_VER=y
+CONFIG_SYSTEMCMDS_WORK_QUEUE=y

boards/accton-godwit/ga1/firmware.prototype

@@ -0,0 +1,13 @@
+{
+    "board_id": 7120,
+    "magic": "PX4FWv1",
+    "description": "Firmware for the AcctonGodwitGA1 board",
+    "image": "",
+    "build_time": 0,
+    "summary": "AcctonGodwitGA1",
+    "version": "0.1",
+    "image_size": 0,
+    "image_maxsize": 1966080,
+    "git_identity": "",
+    "board_revision": 0
+}

boards/accton-godwit/ga1/init/rc.board_defaults

@@ -0,0 +1,21 @@
+#!/bin/sh
+#
+# board specific defaults
+#------------------------------------------------------------------------------
+
+# By disabling all 3 INA modules, we use the
+# i2c_launcher instead.
+param set - default SENS_EN_INA238 0
+param set - default SENS_EN_INA228 0
+param set - default SENS_EN_INA226 0
+
+# Mavlink ethernet (CFG 1000)
+param set - default MAV_2_CONFIG 1000
+param set - default MAV_2_BROADCAST 1
+param set - default MAV_2_MODE 0
+param set - default MAV_2_RADIO_CTL 0
+param set - default MAV_2_RATE 100000
+param set - default MAV_2_REMOTE_PRT 14550
+param set - default MAV_2_UDP_PRT 14550
+
+safety_button start

boards/accton-godwit/ga1/init/rc.board_sensors

@@ -0,0 +1,92 @@
+#!/bin/sh
+#
+# PX4 FMUv6X specific board sensors init
+#------------------------------------------------------------------------------
+set HAVE_PM2 yes
+set INA_CONFIGURED no
+
+if mft query -q -k MFT -s MFT_PM2 -v 0
+then
+	set HAVE_PM2 no
+fi
+if param compare -s ADC_ADS1115_EN 1
+then
+	ads1115 start -X
+	board_adc start -n
+else
+	board_adc start
+fi
+
+
+if param compare SENS_EN_INA226 1
+then
+	# Start Digital power monitors
+	ina226 -X -b 1 -t 1 -k start
+
+	if [ $HAVE_PM2 = yes ]
+	then
+		ina226 -X -b 2 -t 2 -k start
+	fi
+
+	set INA_CONFIGURED yes
+fi
+
+if param compare SENS_EN_INA228 1
+then
+	# Start Digital power monitors
+	ina228 -X -b 1 -t 1 -k start
+	if [ $HAVE_PM2 = yes ]
+	then
+		ina228 -X -b 2 -t 2 -k start
+	fi
+
+	set INA_CONFIGURED yes
+fi
+
+if param compare SENS_EN_INA238 1
+then
+	# Start Digital power monitors
+	ina238 -X -b 1 -t 1 -k start
+	if [ $HAVE_PM2 = yes ]
+	then
+		ina238 -X -b 2 -t 2 -k start
+	fi
+
+	set INA_CONFIGURED yes
+fi
+
+if [ $INA_CONFIGURED = no ]
+then
+	# INA226, INA228, INA238 auto-start
+	i2c_launcher start -b 1
+	if [ $HAVE_PM2 = yes ]
+	then
+		i2c_launcher start -b 2
+	fi
+fi
+
+# Internal SPI BMI088
+bmi088 -A -R 4 -s start
+bmi088 -G -R 4 -s start
+
+# Internal SPI bus ICM42688p
+icm42688p -R 6 -s -b 2 start
+icm42688p -R 14 -s -b 1 start
+
+# Internal magnetometer on I2c
+rm3100 -I -b 4 start
+
+# External compass on GPS1/I2C1 (the 3rd external bus): standard Holybro Pixhawk 4 or CUAV V5 GPS/compass puck (with lights, safety button, and buzzer)
+ist8310 -X -b 1 -R 10 start
+
+# Possible internal Baro
+if param compare SENS_INT_BARO_EN 1
+then
+	icp201xx -I -a 0x64 start
+fi
+
+#external baro
+icp201xx -X start
+
+unset INA_CONFIGURED
+unset HAVE_PM2

boards/accton-godwit/ga1/nuttx-config/Kconfig

@@ -0,0 +1,17 @@
+#
+# For a description of the syntax of this configuration file,
+# see misc/tools/kconfig-language.txt.
+#
+config BOARD_HAS_PROBES
+	bool "Board provides GPIO or other Hardware for signaling to timing analyze."
+	default y
+	---help---
+		This board provides GPIO FMU-CH1-5, CAP1-6 as PROBE_1-11 to provide timing signals from selected drivers.
+
+config BOARD_USE_PROBES
+	bool "Enable the use the board provided FMU-CH1-5, CAP1-6 as PROBE_1-11"
+	default n
+	depends on BOARD_HAS_PROBES
+
+	---help---
+		Select to use GPIO FMU-CH1-5, CAP1-6  to provide timing signals from selected drivers.

boards/accton-godwit/ga1/nuttx-config/bootloader/defconfig

@@ -0,0 +1,95 @@
+#
+# This file is autogenerated: PLEASE DO NOT EDIT IT.
+#
+# You can use "make menuconfig" to make any modifications to the installed .config file.
+# You can then do "make savedefconfig" to generate a new defconfig file that includes your
+# modifications.
+#
+# CONFIG_DEV_CONSOLE is not set
+# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set
+# CONFIG_DISABLE_PTHREAD is not set
+# CONFIG_SPI_EXCHANGE is not set
+# CONFIG_STM32H7_SYSCFG is not set
+CONFIG_ARCH="arm"
+CONFIG_ARCH_BOARD_CUSTOM=y
+CONFIG_ARCH_BOARD_CUSTOM_DIR="../../../../boards/accton-godwit/ga1/nuttx-config"
+CONFIG_ARCH_BOARD_CUSTOM_DIR_RELPATH=y
+CONFIG_ARCH_BOARD_CUSTOM_NAME="px4"
+CONFIG_ARCH_CHIP="stm32h7"
+CONFIG_ARCH_CHIP_STM32H753II=y
+CONFIG_ARCH_CHIP_STM32H7=y
+CONFIG_ARCH_INTERRUPTSTACK=768
+CONFIG_ARMV7M_BASEPRI_WAR=y
+CONFIG_ARMV7M_ICACHE=y
+CONFIG_ARMV7M_MEMCPY=y
+CONFIG_ARMV7M_USEBASEPRI=y
+CONFIG_BOARDCTL=y
+CONFIG_BOARDCTL_RESET=y
+CONFIG_BOARD_ASSERT_RESET_VALUE=0
+CONFIG_BOARD_INITTHREAD_PRIORITY=254
+CONFIG_BOARD_LATE_INITIALIZE=y
+CONFIG_BOARD_LOOPSPERMSEC=95150
+CONFIG_BOARD_RESET_ON_ASSERT=2
+CONFIG_CDCACM=y
+CONFIG_CDCACM_IFLOWCONTROL=y
+CONFIG_CDCACM_PRODUCTID=0x1BD0
+CONFIG_CDCACM_PRODUCTSTR="PX4 BL Accton Godwit GA1"
+CONFIG_CDCACM_RXBUFSIZE=600
+CONFIG_CDCACM_TXBUFSIZE=12000
+CONFIG_CDCACM_VENDORID=0x083A
+CONFIG_CDCACM_VENDORSTR="Accton"
+CONFIG_DEBUG_FULLOPT=y
+CONFIG_DEBUG_SYMBOLS=y
+CONFIG_DEBUG_TCBINFO=y
+CONFIG_DEFAULT_SMALL=y
+CONFIG_EXPERIMENTAL=y
+CONFIG_FDCLONE_DISABLE=y
+CONFIG_FDCLONE_STDIO=y
+CONFIG_HAVE_CXX=y
+CONFIG_HAVE_CXXINITIALIZE=y
+CONFIG_IDLETHREAD_STACKSIZE=750
+CONFIG_INIT_ENTRYPOINT="bootloader_main"
+CONFIG_INIT_STACKSIZE=3194
+CONFIG_LIBC_FLOATINGPOINT=y
+CONFIG_LIBC_LONG_LONG=y
+CONFIG_LIBC_STRERROR=y
+CONFIG_MEMSET_64BIT=y
+CONFIG_MEMSET_OPTSPEED=y
+CONFIG_PREALLOC_TIMERS=50
+CONFIG_PTHREAD_MUTEX_ROBUST=y
+CONFIG_PTHREAD_STACK_MIN=512
+CONFIG_RAM_SIZE=245760
+CONFIG_RAM_START=0x20010000
+CONFIG_RAW_BINARY=y
+CONFIG_SERIAL_TERMIOS=y
+CONFIG_SIG_DEFAULT=y
+CONFIG_SIG_SIGALRM_ACTION=y
+CONFIG_SIG_SIGUSR1_ACTION=y
+CONFIG_SIG_SIGUSR2_ACTION=y
+CONFIG_SPI=y
+CONFIG_STACK_COLORATION=y
+CONFIG_START_DAY=30
+CONFIG_START_MONTH=11
+CONFIG_STDIO_BUFFER_SIZE=32
+CONFIG_STM32H7_BKPSRAM=y
+CONFIG_STM32H7_DMA1=y
+CONFIG_STM32H7_DMA2=y
+CONFIG_STM32H7_OTGFS=y
+CONFIG_STM32H7_PROGMEM=y
+CONFIG_STM32H7_SERIAL_DISABLE_REORDERING=y
+CONFIG_STM32H7_TIM1=y
+CONFIG_STM32H7_UART5=y
+CONFIG_SYSTEMTICK_HOOK=y
+CONFIG_SYSTEM_CDCACM=y
+CONFIG_TASK_NAME_SIZE=24
+CONFIG_TTY_SIGINT=y
+CONFIG_TTY_SIGINT_CHAR=0x03
+CONFIG_TTY_SIGTSTP=y
+CONFIG_UART5_RXBUFSIZE=512
+CONFIG_UART5_RXDMA=y
+CONFIG_UART5_TXBUFSIZE=512
+CONFIG_UART5_TXDMA=y
+CONFIG_USBDEV=y
+CONFIG_USBDEV_BUSPOWERED=y
+CONFIG_USBDEV_MAXPOWER=500
+CONFIG_USEC_PER_TICK=1000

boards/accton-godwit/ga1/nuttx-config/include/board.h

@@ -0,0 +1,566 @@
+/************************************************************************************
+ * nuttx-configs/accton-godwit_ga1/include/board.h
+ *
+ *   Copyright (C) 2016-2019 Gregory Nutt. All rights reserved.
+ *   Authors: David Sidrane <david.sidrane@nscdg.com>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+#ifndef __NUTTX_CONFIG_ACCTON_GODWIT_GA1_INCLUDE_BOARD_H
+#define __NUTTX_CONFIG_ACCTON_GODWIT_GA1_INCLUDE_BOARD_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include "board_dma_map.h"
+
+#include <nuttx/config.h>
+
+#ifndef __ASSEMBLY__
+# include <stdint.h>
+#endif
+
+#include "stm32_rcc.h"
+#include "stm32_sdmmc.h"
+
+/************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************/
+
+/* Clocking *************************************************************************/
+/* The px4_fmu-v6X  board provides the following clock sources:
+ *
+ *   X1: 16 MHz crystal for HSE
+ *
+ * So we have these clock source available within the STM32
+ *
+ *   HSI: 16 MHz RC factory-trimmed
+ *   HSE: 16 MHz crystal for HSE
+ */
+
+#define STM32_BOARD_XTAL        16000000ul
+
+#define STM32_HSI_FREQUENCY     16000000ul
+#define STM32_LSI_FREQUENCY     32000
+#define STM32_HSE_FREQUENCY     STM32_BOARD_XTAL
+#define STM32_LSE_FREQUENCY     32768
+
+/* Main PLL Configuration.
+ *
+ * PLL source is HSE = 16,000,000
+ *
+ * PLL_VCOx = (STM32_HSE_FREQUENCY / PLLM) * PLLN
+ * Subject to:
+ *
+ *     1 <= PLLM <= 63
+ *     4 <= PLLN <= 512
+ *   150 MHz <= PLL_VCOL <= 420MHz
+ *   192 MHz <= PLL_VCOH <= 836MHz
+ *
+ * SYSCLK  = PLL_VCO / PLLP
+ * CPUCLK  = SYSCLK / D1CPRE
+ * Subject to
+ *
+ *   PLLP1   = {2, 4, 6, 8, ..., 128}
+ *   PLLP2,3 = {2, 3, 4, ..., 128}
+ *   CPUCLK <= 480 MHz
+ */
+
+#define STM32_BOARD_USEHSE
+
+#define STM32_PLLCFG_PLLSRC      RCC_PLLCKSELR_PLLSRC_HSE
+
+/* PLL1, wide 4 - 8 MHz input, enable DIVP, DIVQ, DIVR
+ *
+ *   PLL1_VCO = (16,000,000 / 1) * 60 = 960 MHz
+ *
+ *   PLL1P = PLL1_VCO/2  = 960 MHz / 2   = 480 MHz
+ *   PLL1Q = PLL1_VCO/4  = 960 MHz / 4   = 240 MHz
+ *   PLL1R = PLL1_VCO/8  = 960 MHz / 8   = 120 MHz
+ */
+
+#define STM32_PLLCFG_PLL1CFG    (RCC_PLLCFGR_PLL1VCOSEL_WIDE | \
+				 RCC_PLLCFGR_PLL1RGE_4_8_MHZ | \
+				 RCC_PLLCFGR_DIVP1EN | \
+				 RCC_PLLCFGR_DIVQ1EN | \
+				 RCC_PLLCFGR_DIVR1EN)
+#define STM32_PLLCFG_PLL1M       RCC_PLLCKSELR_DIVM1(1)
+#define STM32_PLLCFG_PLL1N       RCC_PLL1DIVR_N1(60)
+#define STM32_PLLCFG_PLL1P       RCC_PLL1DIVR_P1(2)
+#define STM32_PLLCFG_PLL1Q       RCC_PLL1DIVR_Q1(4)
+#define STM32_PLLCFG_PLL1R       RCC_PLL1DIVR_R1(8)
+
+#define STM32_VCO1_FREQUENCY     ((STM32_HSE_FREQUENCY / 1) * 60)
+#define STM32_PLL1P_FREQUENCY    (STM32_VCO1_FREQUENCY / 2)
+#define STM32_PLL1Q_FREQUENCY    (STM32_VCO1_FREQUENCY / 4)
+#define STM32_PLL1R_FREQUENCY    (STM32_VCO1_FREQUENCY / 8)
+
+/* PLL2 */
+
+#define STM32_PLLCFG_PLL2CFG     (RCC_PLLCFGR_PLL2VCOSEL_WIDE | \
+				  RCC_PLLCFGR_PLL2RGE_4_8_MHZ | \
+				  RCC_PLLCFGR_DIVP2EN | \
+				  RCC_PLLCFGR_DIVQ2EN | \
+				  RCC_PLLCFGR_DIVR2EN)
+#define STM32_PLLCFG_PLL2M       RCC_PLLCKSELR_DIVM2(4)
+#define STM32_PLLCFG_PLL2N       RCC_PLL2DIVR_N2(48)
+#define STM32_PLLCFG_PLL2P       RCC_PLL2DIVR_P2(2)
+#define STM32_PLLCFG_PLL2Q       RCC_PLL2DIVR_Q2(2)
+#define STM32_PLLCFG_PLL2R       RCC_PLL2DIVR_R2(2)
+
+#define STM32_VCO2_FREQUENCY     ((STM32_HSE_FREQUENCY / 4) * 48)
+#define STM32_PLL2P_FREQUENCY    (STM32_VCO2_FREQUENCY / 2)
+#define STM32_PLL2Q_FREQUENCY    (STM32_VCO2_FREQUENCY / 2)
+#define STM32_PLL2R_FREQUENCY    (STM32_VCO2_FREQUENCY / 2)
+
+/* PLL3 */
+
+#define STM32_PLLCFG_PLL3CFG    (RCC_PLLCFGR_PLL3VCOSEL_WIDE | \
+				 RCC_PLLCFGR_PLL3RGE_4_8_MHZ | \
+				 RCC_PLLCFGR_DIVQ3EN)
+#define STM32_PLLCFG_PLL3M      RCC_PLLCKSELR_DIVM3(4)
+#define STM32_PLLCFG_PLL3N      RCC_PLL3DIVR_N3(48)
+#define STM32_PLLCFG_PLL3P      RCC_PLL3DIVR_P3(2)
+#define STM32_PLLCFG_PLL3Q      RCC_PLL3DIVR_Q3(4)
+#define STM32_PLLCFG_PLL3R      RCC_PLL3DIVR_R3(2)
+
+#define STM32_VCO3_FREQUENCY    ((STM32_HSE_FREQUENCY / 4) * 48)
+#define STM32_PLL3P_FREQUENCY   (STM32_VCO3_FREQUENCY / 2)
+#define STM32_PLL3Q_FREQUENCY   (STM32_VCO3_FREQUENCY / 4)
+#define STM32_PLL3R_FREQUENCY   (STM32_VCO3_FREQUENCY / 2)
+
+/* SYSCLK = PLL1P = 480MHz
+ * CPUCLK = SYSCLK / 1 = 480 MHz
+ */
+
+#define STM32_RCC_D1CFGR_D1CPRE  (RCC_D1CFGR_D1CPRE_SYSCLK)
+#define STM32_SYSCLK_FREQUENCY   (STM32_PLL1P_FREQUENCY)
+#define STM32_CPUCLK_FREQUENCY   (STM32_SYSCLK_FREQUENCY / 1)
+
+/* Configure Clock Assignments */
+
+/* AHB clock (HCLK) is SYSCLK/2 (240 MHz max)
+ * HCLK1 = HCLK2 = HCLK3 = HCLK4 = 240
+ */
+
+#define STM32_RCC_D1CFGR_HPRE   RCC_D1CFGR_HPRE_SYSCLKd2        /* HCLK  = SYSCLK / 2 */
+#define STM32_ACLK_FREQUENCY    (STM32_CPUCLK_FREQUENCY / 2)    /* ACLK in D1, HCLK3 in D1 */
+#define STM32_HCLK_FREQUENCY    (STM32_CPUCLK_FREQUENCY / 2)    /* HCLK in D2, HCLK4 in D3 */
+#define STM32_BOARD_HCLK        STM32_HCLK_FREQUENCY            /* same as above, to satisfy compiler */
+
+/* APB1 clock (PCLK1) is HCLK/2 (120 MHz) */
+
+#define STM32_RCC_D2CFGR_D2PPRE1  RCC_D2CFGR_D2PPRE1_HCLKd2       /* PCLK1 = HCLK / 2 */
+#define STM32_PCLK1_FREQUENCY     (STM32_HCLK_FREQUENCY/2)
+
+/* APB2 clock (PCLK2) is HCLK/2 (120 MHz) */
+
+#define STM32_RCC_D2CFGR_D2PPRE2  RCC_D2CFGR_D2PPRE2_HCLKd2       /* PCLK2 = HCLK / 2 */
+#define STM32_PCLK2_FREQUENCY     (STM32_HCLK_FREQUENCY/2)
+
+/* APB3 clock (PCLK3) is HCLK/2 (120 MHz) */
+
+#define STM32_RCC_D1CFGR_D1PPRE   RCC_D1CFGR_D1PPRE_HCLKd2        /* PCLK3 = HCLK / 2 */
+#define STM32_PCLK3_FREQUENCY     (STM32_HCLK_FREQUENCY/2)
+
+/* APB4 clock (PCLK4) is HCLK/4 (120 MHz) */
+
+#define STM32_RCC_D3CFGR_D3PPRE   RCC_D3CFGR_D3PPRE_HCLKd2       /* PCLK4 = HCLK / 2 */
+#define STM32_PCLK4_FREQUENCY     (STM32_HCLK_FREQUENCY/2)
+
+/* Timer clock frequencies */
+
+/* Timers driven from APB1 will be twice PCLK1 */
+
+#define STM32_APB1_TIM2_CLKIN   (2*STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM3_CLKIN   (2*STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM4_CLKIN   (2*STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM5_CLKIN   (2*STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM6_CLKIN   (2*STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM7_CLKIN   (2*STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM12_CLKIN  (2*STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM13_CLKIN  (2*STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM14_CLKIN  (2*STM32_PCLK1_FREQUENCY)
+
+/* Timers driven from APB2 will be twice PCLK2 */
+
+#define STM32_APB2_TIM1_CLKIN   (2*STM32_PCLK2_FREQUENCY)
+#define STM32_APB2_TIM8_CLKIN   (2*STM32_PCLK2_FREQUENCY)
+#define STM32_APB2_TIM15_CLKIN  (2*STM32_PCLK2_FREQUENCY)
+#define STM32_APB2_TIM16_CLKIN  (2*STM32_PCLK2_FREQUENCY)
+#define STM32_APB2_TIM17_CLKIN  (2*STM32_PCLK2_FREQUENCY)
+
+/* Kernel Clock Configuration
+ *
+ * Note: look at Table 54 in ST Manual
+ */
+
+/* I2C123 clock source */
+
+#define STM32_RCC_D2CCIP2R_I2C123SRC RCC_D2CCIP2R_I2C123SEL_HSI
+
+/* I2C4 clock source */
+
+#define STM32_RCC_D3CCIPR_I2C4SRC    RCC_D3CCIPR_I2C4SEL_HSI
+
+/* SPI123 clock source */
+
+#define STM32_RCC_D2CCIP1R_SPI123SRC RCC_D2CCIP1R_SPI123SEL_PLL2
+
+/* SPI45 clock source */
+
+#define STM32_RCC_D2CCIP1R_SPI45SRC  RCC_D2CCIP1R_SPI45SEL_PLL2
+
+/* SPI6 clock source */
+
+#define STM32_RCC_D3CCIPR_SPI6SRC    RCC_D3CCIPR_SPI6SEL_PLL2
+
+/* USB 1 and 2 clock source */
+
+#define STM32_RCC_D2CCIP2R_USBSRC    RCC_D2CCIP2R_USBSEL_PLL3
+
+/* ADC 1 2 3 clock source */
+
+#define STM32_RCC_D3CCIPR_ADCSRC     RCC_D3CCIPR_ADCSEL_PLL2
+
+/* UART clock selection */
+/* reset to default to overwrite any changes done by any bootloader */
+
+#define STM32_RCC_D2CCIP2R_USART234578_SEL RCC_D2CCIP2R_USART234578SEL_RCC
+#define STM32_RCC_D2CCIP2R_USART16_SEL     RCC_D2CCIP2R_USART16SEL_RCC
+
+/* FDCAN 1 2 clock source */
+
+#define STM32_RCC_D2CCIP1R_FDCANSEL  RCC_D2CCIP1R_FDCANSEL_HSE   /* FDCAN 1 2 clock source */
+
+#define STM32_FDCANCLK               STM32_HSE_FREQUENCY
+
+/* FLASH wait states
+ *
+ *  ------------ ---------- -----------
+ *  Vcore        MAX ACLK   WAIT STATES
+ *  ------------ ---------- -----------
+ *  1.15-1.26 V     70 MHz    0
+ *  (VOS1 level)   140 MHz    1
+ *                 210 MHz    2
+ *  1.05-1.15 V     55 MHz    0
+ *  (VOS2 level)   110 MHz    1
+ *                 165 MHz    2
+ *                 220 MHz    3
+ *  0.95-1.05 V     45 MHz    0
+ *  (VOS3 level)    90 MHz    1
+ *                 135 MHz    2
+ *                 180 MHz    3
+ *                 225 MHz    4
+ *  ------------ ---------- -----------
+ */
+
+#define BOARD_FLASH_WAITSTATES 2
+
+/* SDMMC definitions ********************************************************/
+
+/* Init 400kHz, freq = PLL1Q/(2*div)  div =  PLL1Q/(2*freq) */
+
+#define STM32_SDMMC_INIT_CLKDIV     (300 << STM32_SDMMC_CLKCR_CLKDIV_SHIFT)
+
+/* 25 MHz Max for now, 25 mHZ = PLL1Q/(2*div), div =  PLL1Q/(2*freq)
+ * div = 4.8 = 240 / 50, So round up to 5 for default speed 24 MB/s
+ */
+
+#if defined(CONFIG_STM32H7_SDMMC_XDMA) || defined(CONFIG_STM32H7_SDMMC_IDMA)
+#  define STM32_SDMMC_MMCXFR_CLKDIV   (5 << STM32_SDMMC_CLKCR_CLKDIV_SHIFT)
+#else
+#  define STM32_SDMMC_MMCXFR_CLKDIV   (100 << STM32_SDMMC_CLKCR_CLKDIV_SHIFT)
+#endif
+#if defined(CONFIG_STM32H7_SDMMC_XDMA) || defined(CONFIG_STM32H7_SDMMC_IDMA)
+#  define STM32_SDMMC_SDXFR_CLKDIV    (5 << STM32_SDMMC_CLKCR_CLKDIV_SHIFT)
+#else
+#  define STM32_SDMMC_SDXFR_CLKDIV    (100 << STM32_SDMMC_CLKCR_CLKDIV_SHIFT)
+#endif
+
+#define STM32_SDMMC_CLKCR_EDGE      STM32_SDMMC_CLKCR_NEGEDGE
+
+/* LED definitions ******************************************************************/
+/* The Accton Godwit GA1 board has three, LED_GREEN a Green LED, LED_BLUE a Blue LED and
+ * LED_RED a Red LED, that can be controlled by software.
+ *
+ * If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs in any way.
+ * The following definitions are used to access individual LEDs.
+ */
+
+/* LED index values for use with board_userled() */
+
+/* LED definitions ******************************************************************/
+/* The px4_fmu-v6x board has three, LED_GREEN a Green LED, LED_BLUE a Blue LED and
+ * LED_RED a Red LED, that can be controlled by software.
+ *
+ * If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs in any way.
+ * The following definitions are used to access individual LEDs.
+ */
+
+/* LED index values for use with board_userled() */
+
+#define BOARD_LED1        0
+#define BOARD_LED2        1
+#define BOARD_LED3        2
+#define BOARD_NLEDS       3
+
+#define BOARD_LED_RED     BOARD_LED1
+#define BOARD_LED_GREEN   BOARD_LED2
+#define BOARD_LED_BLUE    BOARD_LED3
+
+/* LED bits for use with board_userled_all() */
+
+#define BOARD_LED1_BIT    (1 << BOARD_LED1)
+#define BOARD_LED2_BIT    (1 << BOARD_LED2)
+#define BOARD_LED3_BIT    (1 << BOARD_LED3)
+
+/* If CONFIG_ARCH_LEDS is defined, the usage by the board port is defined in
+ * include/board.h and src/stm32_leds.c. The LEDs are used to encode OS-related
+ * events as follows:
+ *
+ *
+ *   SYMBOL                     Meaning                      LED state
+ *                                                        Red   Green Blue
+ *   ----------------------  --------------------------  ------ ------ ----*/
+
+#define LED_STARTED        0 /* NuttX has been started   OFF    OFF   OFF  */
+#define LED_HEAPALLOCATE   1 /* Heap has been allocated  OFF    OFF   ON   */
+#define LED_IRQSENABLED    2 /* Interrupts enabled       OFF    ON    OFF  */
+#define LED_STACKCREATED   3 /* Idle stack created       OFF    ON    ON   */
+#define LED_INIRQ          4 /* In an interrupt          N/C    N/C   GLOW */
+#define LED_SIGNAL         5 /* In a signal handler      N/C    GLOW  N/C  */
+#define LED_ASSERTION      6 /* An assertion failed      GLOW   N/C   GLOW */
+#define LED_PANIC          7 /* The system has crashed   Blink  OFF   N/C  */
+#define LED_IDLE           8 /* MCU is is sleep mode     ON     OFF   OFF  */
+
+/* Thus if the Green LED is statically on, NuttX has successfully booted and
+ * is, apparently, running normally.  If the Red LED is flashing at
+ * approximately 2Hz, then a fatal error has been detected and the system
+ * has halted.
+ */
+
+/* Alternate function pin selections ************************************************/
+
+#define GPIO_USART1_RX   GPIO_USART1_RX_3      /* PB7 */
+#define GPIO_USART1_TX   GPIO_USART1_TX_3      /* PB6 */
+
+#define GPIO_USART2_RX   GPIO_USART2_RX_1       /* PA3   */
+#define GPIO_USART2_TX   GPIO_USART2_TX_2       /* PD5   */
+#define GPIO_USART2_RTS  GPIO_USART2_RTS_2      /* PD4   */
+#define GPIO_USART2_CTS  GPIO_USART2_CTS_NSS_2  /* PD3   */
+
+#define GPIO_USART3_RX   GPIO_USART3_RX_3   /* PD9   */
+#define GPIO_USART3_TX   GPIO_USART3_TX_3   /* PD8   */
+
+#define GPIO_UART4_RX    GPIO_UART4_RX_6    /* PH14 */
+#define GPIO_UART4_TX    GPIO_UART4_TX_6    /* PH13 */
+
+#define GPIO_UART5_RX    GPIO_UART5_RX_3    /* PD2  */
+#define GPIO_UART5_TX    GPIO_UART5_TX_3    /* PC12 */
+// GPIO_UART5_RTS   no remap                /* PC8  */
+#undef GPIO_UART5_CTS
+#define GPIO_UART5_CTS   ((GPIO_ALT|GPIO_AF8|GPIO_PORTC|GPIO_PIN9) | GPIO_PULLDOWN) /* PC9  */
+
+
+#define GPIO_USART6_RX   GPIO_USART6_RX_1   /* PC7 */
+#define GPIO_USART6_TX   GPIO_USART6_TX_1   /* PC6  */
+
+#define GPIO_UART7_RX    GPIO_UART7_RX_4    /* PF6  */
+#define GPIO_UART7_TX    GPIO_UART7_TX_3    /* PE8  */
+#define GPIO_UART7_RTS   GPIO_UART7_RTS_2   /* PF8  */
+#define GPIO_UART7_CTS   (GPIO_UART7_CTS_1 | GPIO_PULLDOWN)   /* PE10 */
+
+#define GPIO_UART8_RX    GPIO_UART8_RX_1    /* PE0 */
+#define GPIO_UART8_TX    GPIO_UART8_TX_1    /* PE1 */
+
+
+/* CAN
+ *
+ * CAN1 is routed to transceiver.
+ * CAN2 is routed to transceiver.
+ */
+#define GPIO_CAN1_RX     GPIO_CAN1_RX_3     /* PD0  */
+#define GPIO_CAN1_TX     GPIO_CAN1_TX_3     /* PD1  */
+#define GPIO_CAN2_RX     GPIO_CAN2_RX_1     /* PB12 */
+#define GPIO_CAN2_TX     GPIO_CAN2_TX_1     /* PB13  */
+
+/* SPI
+ * SPI1 is sensors1
+ * SPI2 is sensors2
+ * SPI3 is sensors3
+ * SPI4 is Not Used
+ * SPI5 is FRAM
+ * SPI6 is EXTERNAL1
+ *
+ */
+
+#define ADJ_SLEW_RATE(p) (((p) & ~GPIO_SPEED_MASK) | (GPIO_SPEED_2MHz))
+
+#define GPIO_SPI1_MISO   GPIO_SPI1_MISO_3               /* PG9  */
+#define GPIO_SPI1_MOSI   GPIO_SPI1_MOSI_2               /* PB5  */
+#define GPIO_SPI1_SCK    ADJ_SLEW_RATE(GPIO_SPI1_SCK_1) /* PA5  */
+
+#define GPIO_SPI2_MISO   GPIO_SPI2_MISO_3               /* PI2  */
+#define GPIO_SPI2_MOSI   GPIO_SPI2_MOSI_4               /* PI3  */
+#define GPIO_SPI2_SCK    ADJ_SLEW_RATE(GPIO_SPI2_SCK_6) /* PI1  */
+
+#define GPIO_SPI3_MISO   GPIO_SPI3_MISO_2               /* PC11 */
+#define GPIO_SPI3_MOSI   GPIO_SPI3_MOSI_3               /* PB2  */
+#define GPIO_SPI3_SCK    ADJ_SLEW_RATE(GPIO_SPI3_SCK_2) /* PC10 */
+
+#define GPIO_SPI5_MISO   GPIO_SPI5_MISO_2               /* PH7  */
+#define GPIO_SPI5_MOSI   GPIO_SPI5_MOSI_1               /* PF11 */
+#define GPIO_SPI5_SCK    ADJ_SLEW_RATE(GPIO_SPI5_SCK_1) /* PF7  */
+
+#define GPIO_SPI6_MISO   GPIO_SPI6_MISO_2               /* PA6  */
+#define GPIO_SPI6_MOSI   GPIO_SPI6_MOSI_1               /* PG14 */
+#define GPIO_SPI6_SCK    ADJ_SLEW_RATE(GPIO_SPI6_SCK_3) /* PB3  */
+
+/* I2C
+ *
+ *   The optional _GPIO configurations allow the I2C driver to manually
+ *   reset the bus to clear stuck slaves.  They match the pin configuration,
+ *   but are normally-high GPIOs.
+ *
+ */
+
+#define GPIO_I2C1_SCL GPIO_I2C1_SCL_2       /* PB8  */
+#define GPIO_I2C1_SDA GPIO_I2C1_SDA_2       /* PB9  */
+
+#define GPIO_I2C1_SCL_GPIO                  (GPIO_OUTPUT | GPIO_OPENDRAIN |GPIO_SPEED_50MHz | GPIO_OUTPUT_SET | GPIO_PORTB | GPIO_PIN8)
+#define GPIO_I2C1_SDA_GPIO                  (GPIO_OUTPUT | GPIO_OPENDRAIN |GPIO_SPEED_50MHz | GPIO_OUTPUT_SET | GPIO_PORTB | GPIO_PIN9)
+
+#define GPIO_I2C2_SCL GPIO_I2C2_SCL_2       /* PF1 */
+#define GPIO_I2C2_SDA GPIO_I2C2_SDA_2       /* PF0 */
+
+#define GPIO_I2C2_SCL_GPIO                  (GPIO_OUTPUT | GPIO_OPENDRAIN |GPIO_SPEED_50MHz | GPIO_OUTPUT_SET | GPIO_PORTF | GPIO_PIN1)
+#define GPIO_I2C2_SDA_GPIO                  (GPIO_OUTPUT | GPIO_OPENDRAIN |GPIO_SPEED_50MHz | GPIO_OUTPUT_SET | GPIO_PORTF | GPIO_PIN0)
+
+#define GPIO_I2C3_SCL GPIO_I2C3_SCL_1       /* PA8 */
+#define GPIO_I2C3_SDA GPIO_I2C3_SDA_2       /* PH8 */
+
+#define GPIO_I2C3_SCL_GPIO                  (GPIO_OUTPUT | GPIO_OPENDRAIN |GPIO_SPEED_50MHz | GPIO_OUTPUT_SET | GPIO_PORTA | GPIO_PIN8)
+#define GPIO_I2C3_SDA_GPIO                  (GPIO_OUTPUT | GPIO_OPENDRAIN |GPIO_SPEED_50MHz | GPIO_OUTPUT_SET | GPIO_PORTH | GPIO_PIN8)
+
+#define GPIO_I2C4_SCL GPIO_I2C4_SCL_2       /* PF14 */
+#define GPIO_I2C4_SDA GPIO_I2C4_SDA_2       /* PF15 */
+
+#define GPIO_I2C4_SCL_GPIO                  (GPIO_OUTPUT | GPIO_OPENDRAIN | GPIO_SPEED_50MHz | GPIO_OUTPUT_SET | GPIO_PORTF | GPIO_PIN14)
+#define GPIO_I2C4_SDA_GPIO                  (GPIO_OUTPUT | GPIO_OPENDRAIN | GPIO_SPEED_50MHz | GPIO_OUTPUT_SET | GPIO_PORTF | GPIO_PIN15)
+
+/* SDMMC2
+ *
+ *      VDD 3.3
+ *      GND
+ *      SDMMC2_CK                           PD6
+ *      SDMMC2_CMD                          PD7
+ *      SDMMC2_D0                           PB14
+ *      SDMMC2_D1                           PB15
+ *      SDMMC2_D2                           PG11
+ *      SDMMC2_D3                           PB4
+ */
+
+#define GPIO_SDMMC2_CK   GPIO_SDMMC2_CK_1  /* PD6 */
+#define GPIO_SDMMC2_CMD  GPIO_SDMMC2_CMD_1 /* PD7 */
+//      GPIO_SDMMC2_D0   No Remap          /* PB14 */
+//      GPIO_SDMMC2_D1   No Remap          /* PB15 */
+#define GPIO_SDMMC2_D2   GPIO_SDMMC2_D2_1  /* PG11 */
+//      GPIO_SDMMC2_D3    No Remap         /* PB4 */
+
+/* The STM32 H7 connects to a TI DP83848TSQ/NOPB
+ * using RMII
+ *
+ *   STM32 H7 BOARD        DP83848TSQ/NOPB
+ *   GPIO     SIGNAL       PIN NAME
+ *   -------- ------------ -------------
+ *   PA7     ETH_CRS_DV    CRS_DV
+ *   PC1     ETH_MDC       MDC
+ *   PA2     ETH_MDIO      MDIO
+ *   PA1     ETH_REF_CL    X1
+ *   PC4     ETH_RXD0      RX_D0
+ *   PC5     ETH_RXD1      RX_D1
+ *   PB11    ETH_TX_EN     TX_EN
+ *   PG13    ETH_TXD0      TX_D0
+ *   PG12    ETH_TXD1      TX_D1
+ *
+ * The PHY address is 1, since COL/PHYAD0 features a pull up.
+ */
+
+#define GPIO_ETH_RMII_TX_EN	GPIO_ETH_RMII_TX_EN_1 /* PB11 */
+#define GPIO_ETH_RMII_TXD0	GPIO_ETH_RMII_TXD0_2  /* PG13 */
+#define GPIO_ETH_RMII_TXD1	GPIO_ETH_RMII_TXD1_2  /* PG12 */
+
+
+/* USB
+ *
+ *      OTG_FS_DM                           PA11
+ *      OTG_FS_DP                           PA12
+ *      VBUS                                PA9
+ */
+
+
+/* Board provides GPIO or other Hardware for signaling to timing analyzer */
+
+#if defined(CONFIG_BOARD_USE_PROBES)
+# include "stm32_gpio.h"
+# define PROBE_N(n) (1<<((n)-1))
+# define PROBE_1    (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTI|GPIO_PIN0)   /* PI0 AUX1 */
+# define PROBE_2    (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTH|GPIO_PIN12)  /* PH12 AUX2 */
+# define PROBE_3    (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTH|GPIO_PIN11)  /* PH11 AUX3 */
+# define PROBE_4    (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTH|GPIO_PIN10)  /* PH10 AUX4 */
+# define PROBE_5    (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTD|GPIO_PIN13)  /* PD13 AUX5 */
+# define PROBE_6    (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTD|GPIO_PIN14)  /* PD14 AUX6 */
+# define PROBE_7    (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTH|GPIO_PIN6)   /* PH6  AUX7 */
+# define PROBE_8    (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTH|GPIO_PIN9)   /* PH9  AUX8 */
+# define PROBE_9    (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTE|GPIO_PIN11)  /* PE11  CAP1 */
+
+# define PROBE_INIT(mask) \
+	do { \
+		if ((mask)& PROBE_N(1)) { stm32_configgpio(PROBE_1); } \
+		if ((mask)& PROBE_N(2)) { stm32_configgpio(PROBE_2); } \
+		if ((mask)& PROBE_N(3)) { stm32_configgpio(PROBE_3); } \
+		if ((mask)& PROBE_N(4)) { stm32_configgpio(PROBE_4); } \
+		if ((mask)& PROBE_N(5)) { stm32_configgpio(PROBE_5); } \
+		if ((mask)& PROBE_N(6)) { stm32_configgpio(PROBE_6); } \
+		if ((mask)& PROBE_N(7)) { stm32_configgpio(PROBE_7); } \
+		if ((mask)& PROBE_N(8)) { stm32_configgpio(PROBE_8); } \
+		if ((mask)& PROBE_N(9)) { stm32_configgpio(PROBE_9); } \
+	} while(0)
+
+# define PROBE(n,s)  do {stm32_gpiowrite(PROBE_##n,(s));}while(0)
+# define PROBE_MARK(n) PROBE(n,false);PROBE(n,true)
+#else
+# define PROBE_INIT(mask)
+# define PROBE(n,s)
+# define PROBE_MARK(n)
+#endif
+
+#endif  /*__NUTTX_CONFIG_ACCTON_GODWIT_GA1_INCLUDE_BOARD_H  */

boards/accton-godwit/ga1/nuttx-config/include/board_dma_map.h

@@ -0,0 +1,87 @@
+/****************************************************************************
+ *
+ *   Copyright (c) 2020 PX4 Development Team. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name PX4 nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#pragma once
+
+// DMAMUX1 Using at most 8 Channels on DMA1 --------   Assigned
+//                                                     V
+
+#define DMAMAP_SPI1_RX    DMAMAP_DMA12_SPI1RX_0     /* 1 DMA1:37 ICM-20649 */
+#define DMAMAP_SPI1_TX    DMAMAP_DMA12_SPI1TX_0     /* 2 DMA1:38 ICM-20649 */
+
+#define DMAMAP_SPI2_RX    DMAMAP_DMA12_SPI2RX_0     /* 3 DMA1:39 ICM-42688-P */
+#define DMAMAP_SPI2_TX    DMAMAP_DMA12_SPI2TX_0     /* 4 DMA1:40 ICM-42688-P */
+
+//#define DMAMAP_USART1_RX  DMAMAP_DMA12_USART1RX_0 /*  DMA1:41  GPS1 */
+//#define DMAMAP_USART1_TX  DMAMAP_DMA12_USART1TX_0 /*  DMA1:42  GPS1 */
+
+//#define DMAMAP_USART2_RX  DMAMAP_DMA12_USART2RX_0 /*  DMA1:43 Telem3 */
+//#define DMAMAP_USART2_TX  DMAMAP_DMA12_USART2TX_0 /*  DMA1:44 Telem3 */
+
+//#define DMAMAP_USART3_RX  DMAMAP_DMA12_USART3RX_0 /*  DMA1:45 DEBUG */
+//#define DMAMAP_USART3_TX  DMAMAP_DMA12_USART3TX_0 /*  DMA1:46 DEBUG */
+
+//#define DMAMAP_UART4_RX   DMAMAP_DMA12_UART4RX_0  /*  DMA1:63 EXT2 */
+//#define DMAMAP_UART4_TX   DMAMAP_DMA12_UART4TX_0  /*  DMA1:64 EXT2 */
+
+#define DMAMAP_USART6_RX  DMAMAP_DMA12_USART6RX_0   /* 5 DMA1:71 PX4IO */
+#define DMAMAP_USART6_TX  DMAMAP_DMA12_USART6TX_0   /* 6 DMA1:72 PX4IO */
+
+// Assigned in timer_config.cpp
+
+// Timer 4                                          /* 7 DMA1:32 TIM4UP */
+// Timer 5                                          /* 8 DMA1:50 TIM5UP */
+
+// DMAMUX2 Using at most 8 Channels on DMA2 --------   Assigned
+//                                                     V
+
+#define DMAMAP_SPI3_RX    DMAMAP_DMA12_SPI3RX_1     /* 1 DMA2:61 BMI088 */
+#define DMAMAP_SPI3_TX    DMAMAP_DMA12_SPI3TX_1     /* 2 DMA2:62 BMI088 */
+
+#define DMAMAP_USART3_RX  DMAMAP_DMA12_USART3RX_1   /* 3 DMA2:45 DEBUG */
+#define DMAMAP_USART3_TX  DMAMAP_DMA12_USART3TX_1   /* 4 DMA2:46 DEBUG */
+
+#define DMAMAP_UART5_RX   DMAMAP_DMA12_UART5RX_1    /* 5 DMA2:65 TELEM2 */
+#define DMAMAP_UART5_TX   DMAMAP_DMA12_UART5TX_1    /* 6 DMA2:66  TELEM2 */
+
+#define DMAMAP_UART7_RX   DMAMAP_DMA12_UART7RX_1    /* 7 DMA1:79  TELEM1 */
+#define DMAMAP_UART7_TX   DMAMAP_DMA12_UART7TX_1    /* 8 DMA1:80  TELEM1 */
+
+//#define DMAMAP_UART8_RX   DMAMAP_DMA12_UART8RX_1  /*  DMA1:81  GPS2 */
+//#define DMAMAP_UART8_TX   DMAMAP_DMA12_UART8TX_1  /*  DMA1:82  GPS2 */
+
+// DMAMUX2 Using at most 8 Channels on BDMA --------   Assigned
+//                                                     V
+
+#define DMAMAP_SPI6_RX    DMAMAP_BDMA_SPI6_RX       /* 1 BDMA:11 SPI J11 */
+#define DMAMAP_SPI6_TX    DMAMAP_BDMA_SPI6_TX       /* 2 BDMA:12 SPI J11 */

boards/accton-godwit/ga1/nuttx-config/nsh/defconfig

@@ -0,0 +1,332 @@
+#
+# This file is autogenerated: PLEASE DO NOT EDIT IT.
+#
+# You can use "make menuconfig" to make any modifications to the installed .config file.
+# You can then do "make savedefconfig" to generate a new defconfig file that includes your
+# modifications.
+#
+# CONFIG_DISABLE_ENVIRON is not set
+# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set
+# CONFIG_DISABLE_PTHREAD is not set
+# CONFIG_MMCSD_HAVE_CARDDETECT is not set
+# CONFIG_MMCSD_HAVE_WRITEPROTECT is not set
+# CONFIG_MMCSD_MMCSUPPORT is not set
+# CONFIG_MMCSD_SPI is not set
+# CONFIG_NSH_DISABLEBG is not set
+# CONFIG_NSH_DISABLESCRIPT is not set
+# CONFIG_NSH_DISABLE_ARP is not set
+# CONFIG_NSH_DISABLE_CAT is not set
+# CONFIG_NSH_DISABLE_CD is not set
+# CONFIG_NSH_DISABLE_CP is not set
+# CONFIG_NSH_DISABLE_DATE is not set
+# CONFIG_NSH_DISABLE_DF is not set
+# CONFIG_NSH_DISABLE_ECHO is not set
+# CONFIG_NSH_DISABLE_ENV is not set
+# CONFIG_NSH_DISABLE_EXEC is not set
+# CONFIG_NSH_DISABLE_EXPORT is not set
+# CONFIG_NSH_DISABLE_FREE is not set
+# CONFIG_NSH_DISABLE_GET is not set
+# CONFIG_NSH_DISABLE_HELP is not set
+# CONFIG_NSH_DISABLE_IFCONFIG is not set
+# CONFIG_NSH_DISABLE_IFUPDOWN is not set
+# CONFIG_NSH_DISABLE_ITEF is not set
+# CONFIG_NSH_DISABLE_KILL is not set
+# CONFIG_NSH_DISABLE_LOOPS is not set
+# CONFIG_NSH_DISABLE_LS is not set
+# CONFIG_NSH_DISABLE_MKDIR is not set
+# CONFIG_NSH_DISABLE_MKFATFS is not set
+# CONFIG_NSH_DISABLE_MOUNT is not set
+# CONFIG_NSH_DISABLE_MV is not set
+# CONFIG_NSH_DISABLE_NSLOOKUP is not set
+# CONFIG_NSH_DISABLE_PS is not set
+# CONFIG_NSH_DISABLE_PSSTACKUSAGE is not set
+# CONFIG_NSH_DISABLE_PWD is not set
+# CONFIG_NSH_DISABLE_RM is not set
+# CONFIG_NSH_DISABLE_RMDIR is not set
+# CONFIG_NSH_DISABLE_SEMICOLON is not set
+# CONFIG_NSH_DISABLE_SET is not set
+# CONFIG_NSH_DISABLE_SLEEP is not set
+# CONFIG_NSH_DISABLE_SOURCE is not set
+# CONFIG_NSH_DISABLE_TELNETD is not set
+# CONFIG_NSH_DISABLE_TEST is not set
+# CONFIG_NSH_DISABLE_TIME is not set
+# CONFIG_NSH_DISABLE_UMOUNT is not set
+# CONFIG_NSH_DISABLE_UNSET is not set
+# CONFIG_NSH_DISABLE_USLEEP is not set
+CONFIG_ARCH="arm"
+CONFIG_ARCH_BOARD_CUSTOM=y
+CONFIG_ARCH_BOARD_CUSTOM_DIR="../../../../boards/accton-godwit/ga1/nuttx-config"
+CONFIG_ARCH_BOARD_CUSTOM_DIR_RELPATH=y
+CONFIG_ARCH_BOARD_CUSTOM_NAME="px4"
+CONFIG_ARCH_CHIP="stm32h7"
+CONFIG_ARCH_CHIP_STM32H753II=y
+CONFIG_ARCH_CHIP_STM32H7=y
+CONFIG_ARCH_INTERRUPTSTACK=768
+CONFIG_ARCH_STACKDUMP=y
+CONFIG_ARMV7M_BASEPRI_WAR=y
+CONFIG_ARMV7M_DCACHE=y
+CONFIG_ARMV7M_DTCM=y
+CONFIG_ARMV7M_ICACHE=y
+CONFIG_ARMV7M_MEMCPY=y
+CONFIG_ARMV7M_USEBASEPRI=y
+CONFIG_ARM_MPU_EARLY_RESET=y
+CONFIG_BOARDCTL_RESET=y
+CONFIG_BOARD_ASSERT_RESET_VALUE=0
+CONFIG_BOARD_CRASHDUMP=y
+CONFIG_BOARD_LOOPSPERMSEC=95751
+CONFIG_BOARD_RESET_ON_ASSERT=2
+CONFIG_BUILTIN=y
+CONFIG_CDCACM=y
+CONFIG_CDCACM_IFLOWCONTROL=y
+CONFIG_CDCACM_PRODUCTID=0x1BD0
+CONFIG_CDCACM_PRODUCTSTR="PX4 Accton Godwit GA1"
+CONFIG_CDCACM_RXBUFSIZE=600
+CONFIG_CDCACM_TXBUFSIZE=12000
+CONFIG_CDCACM_VENDORID=0x083A
+CONFIG_CDCACM_VENDORSTR="Accton"
+CONFIG_DEBUG_FULLOPT=y
+CONFIG_DEBUG_HARDFAULT_ALERT=y
+CONFIG_DEBUG_MEMFAULT=y
+CONFIG_DEBUG_SYMBOLS=y
+CONFIG_DEBUG_TCBINFO=y
+CONFIG_DEFAULT_SMALL=y
+CONFIG_DEV_FIFO_SIZE=0
+CONFIG_DEV_GPIO=y
+CONFIG_DEV_PIPE_MAXSIZE=1024
+CONFIG_DEV_PIPE_SIZE=70
+CONFIG_DEV_URANDOM=y
+CONFIG_ETH0_PHY_LAN8742A=y
+CONFIG_EXPERIMENTAL=y
+CONFIG_FAT_DMAMEMORY=y
+CONFIG_FAT_LCNAMES=y
+CONFIG_FAT_LFN=y
+CONFIG_FAT_LFN_ALIAS_HASH=y
+CONFIG_FDCLONE_STDIO=y
+CONFIG_FSUTILS_IPCFG=y
+CONFIG_FS_BINFS=y
+CONFIG_FS_CROMFS=y
+CONFIG_FS_FAT=y
+CONFIG_FS_FATTIME=y
+CONFIG_FS_PROCFS=y
+CONFIG_FS_PROCFS_INCLUDE_PROGMEM=y
+CONFIG_FS_PROCFS_MAX_TASKS=64
+CONFIG_FS_PROCFS_REGISTER=y
+CONFIG_FS_ROMFS=y
+CONFIG_GRAN=y
+CONFIG_GRAN_INTR=y
+CONFIG_HAVE_CXX=y
+CONFIG_HAVE_CXXINITIALIZE=y
+CONFIG_I2C=y
+CONFIG_I2C_RESET=y
+CONFIG_IDLETHREAD_STACKSIZE=750
+CONFIG_INIT_ENTRYPOINT="nsh_main"
+CONFIG_INIT_STACKSIZE=3194
+CONFIG_IOB_NBUFFERS=24
+CONFIG_IOB_THROTTLE=0
+CONFIG_IPCFG_BINARY=y
+CONFIG_IPCFG_CHARDEV=y
+CONFIG_IPCFG_PATH="/fs/mtd_net"
+CONFIG_LIBC_FLOATINGPOINT=y
+CONFIG_LIBC_LONG_LONG=y
+CONFIG_LIBC_MAX_EXITFUNS=1
+CONFIG_LIBC_STRERROR=y
+CONFIG_MEMSET_64BIT=y
+CONFIG_MEMSET_OPTSPEED=y
+CONFIG_MMCSD=y
+CONFIG_MMCSD_SDIO=y
+CONFIG_MMCSD_SDIOWAIT_WRCOMPLETE=y
+CONFIG_MM_REGIONS=4
+CONFIG_MTD=y
+CONFIG_MTD_BYTE_WRITE=y
+CONFIG_MTD_PARTITION=y
+CONFIG_MTD_PROGMEM=y
+CONFIG_MTD_RAMTRON=y
+CONFIG_NAME_MAX=40
+CONFIG_NET=y
+CONFIG_NETDB_DNSCLIENT=y
+CONFIG_NETDB_DNSCLIENT_ENTRIES=8
+CONFIG_NETDB_DNSSERVER_NOADDR=y
+CONFIG_NETDEV_PHY_IOCTL=y
+CONFIG_NETINIT_DHCPC=y
+CONFIG_NETINIT_DNS=y
+CONFIG_NETINIT_DNSIPADDR=0xA290AFE
+CONFIG_NETINIT_DRIPADDR=0xA290AFE
+CONFIG_NETINIT_MONITOR=y
+CONFIG_NETINIT_THREAD=y
+CONFIG_NETINIT_THREAD_PRIORITY=49
+CONFIG_NETUTILS_TELNETD=y
+CONFIG_NET_ARP_IPIN=y
+CONFIG_NET_ARP_SEND=y
+CONFIG_NET_BROADCAST=y
+CONFIG_NET_ETH_PKTSIZE=1518
+CONFIG_NET_ICMP=y
+CONFIG_NET_ICMP_SOCKET=y
+CONFIG_NET_NACTIVESOCKETS=16
+CONFIG_NET_SOLINGER=y
+CONFIG_NET_TCP=y
+CONFIG_NET_TCPBACKLOG=y
+CONFIG_NET_TCP_DELAYED_ACK=y
+CONFIG_NET_TCP_WRITE_BUFFERS=y
+CONFIG_NET_UDP=y
+CONFIG_NET_UDP_CHECKSUMS=y
+CONFIG_NET_UDP_WRITE_BUFFERS=y
+CONFIG_NSH_ARCHINIT=y
+CONFIG_NSH_ARGCAT=y
+CONFIG_NSH_BUILTIN_APPS=y
+CONFIG_NSH_CMDPARMS=y
+CONFIG_NSH_CROMFSETC=y
+CONFIG_NSH_LINELEN=128
+CONFIG_NSH_MAXARGUMENTS=15
+CONFIG_NSH_NESTDEPTH=8
+CONFIG_NSH_QUOTE=y
+CONFIG_NSH_ROMFSETC=y
+CONFIG_NSH_ROMFSSECTSIZE=128
+CONFIG_NSH_STRERROR=y
+CONFIG_NSH_TELNET=y
+CONFIG_NSH_TELNET_LOGIN=y
+CONFIG_NSH_VARS=y
+CONFIG_OTG_ID_GPIO_DISABLE=y
+CONFIG_PIPES=y
+CONFIG_PREALLOC_TIMERS=50
+CONFIG_PRIORITY_INHERITANCE=y
+CONFIG_PTHREAD_MUTEX_ROBUST=y
+CONFIG_PTHREAD_STACK_MIN=512
+CONFIG_RAMTRON_EMULATE_PAGE_SHIFT=5
+CONFIG_RAMTRON_EMULATE_SECTOR_SHIFT=5
+CONFIG_RAMTRON_SETSPEED=y
+CONFIG_RAM_SIZE=245760
+CONFIG_RAM_START=0x20010000
+CONFIG_RAW_BINARY=y
+CONFIG_READLINE_CMD_HISTORY=y
+CONFIG_READLINE_TABCOMPLETION=y
+CONFIG_RTC_DATETIME=y
+CONFIG_SCHED_HPWORK=y
+CONFIG_SCHED_HPWORKPRIORITY=249
+CONFIG_SCHED_HPWORKSTACKSIZE=1280
+CONFIG_SCHED_INSTRUMENTATION=y
+CONFIG_SCHED_INSTRUMENTATION_EXTERNAL=y
+CONFIG_SCHED_INSTRUMENTATION_SWITCH=y
+CONFIG_SCHED_LPWORK=y
+CONFIG_SCHED_LPWORKPRIORITY=50
+CONFIG_SCHED_LPWORKSTACKSIZE=1632
+CONFIG_SDMMC2_SDIO_PULLUP=y
+CONFIG_SEM_PREALLOCHOLDERS=32
+CONFIG_SERIAL_IFLOWCONTROL_WATERMARKS=y
+CONFIG_SERIAL_TERMIOS=y
+CONFIG_SIG_DEFAULT=y
+CONFIG_SIG_SIGALRM_ACTION=y
+CONFIG_SIG_SIGUSR1_ACTION=y
+CONFIG_SIG_SIGUSR2_ACTION=y
+CONFIG_SIG_SIGWORK=4
+CONFIG_STACK_COLORATION=y
+CONFIG_START_DAY=30
+CONFIG_START_MONTH=11
+CONFIG_STDIO_BUFFER_SIZE=256
+CONFIG_STM32H7_ADC1=y
+CONFIG_STM32H7_ADC3=y
+CONFIG_STM32H7_BBSRAM=y
+CONFIG_STM32H7_BBSRAM_FILES=5
+CONFIG_STM32H7_BDMA=y
+CONFIG_STM32H7_BKPSRAM=y
+CONFIG_STM32H7_DMA1=y
+CONFIG_STM32H7_DMA2=y
+CONFIG_STM32H7_DMACAPABLE=y
+CONFIG_STM32H7_ETHMAC=y
+CONFIG_STM32H7_FLASH_OVERRIDE_I=y
+CONFIG_STM32H7_FLOWCONTROL_BROKEN=y
+CONFIG_STM32H7_I2C1=y
+CONFIG_STM32H7_I2C2=y
+CONFIG_STM32H7_I2C3=y
+CONFIG_STM32H7_I2C4=y
+CONFIG_STM32H7_I2C_DYNTIMEO=y
+CONFIG_STM32H7_I2C_DYNTIMEO_STARTSTOP=10
+CONFIG_STM32H7_OTGFS=y
+CONFIG_STM32H7_PHYSR=31
+CONFIG_STM32H7_PHYSR_100MBPS=0x8
+CONFIG_STM32H7_PHYSR_FULLDUPLEX=0x10
+CONFIG_STM32H7_PHYSR_MODE=0x10
+CONFIG_STM32H7_PHYSR_SPEED=0x8
+CONFIG_STM32H7_PHY_POLLING=y
+CONFIG_STM32H7_PROGMEM=y
+CONFIG_STM32H7_RTC=y
+CONFIG_STM32H7_RTC_AUTO_LSECLOCK_START_DRV_CAPABILITY=y
+CONFIG_STM32H7_RTC_MAGIC_REG=1
+CONFIG_STM32H7_SAVE_CRASHDUMP=y
+CONFIG_STM32H7_SDMMC2=y
+CONFIG_STM32H7_SERIALBRK_BSDCOMPAT=y
+CONFIG_STM32H7_SERIAL_DISABLE_REORDERING=y
+CONFIG_STM32H7_SPI1=y
+CONFIG_STM32H7_SPI1_DMA=y
+CONFIG_STM32H7_SPI1_DMA_BUFFER=1024
+CONFIG_STM32H7_SPI2=y
+CONFIG_STM32H7_SPI2_DMA=y
+CONFIG_STM32H7_SPI2_DMA_BUFFER=4096
+CONFIG_STM32H7_SPI3=y
+CONFIG_STM32H7_SPI3_DMA=y
+CONFIG_STM32H7_SPI3_DMA_BUFFER=1024
+CONFIG_STM32H7_SPI5=y
+CONFIG_STM32H7_SPI6=y
+CONFIG_STM32H7_SPI6_DMA=y
+CONFIG_STM32H7_SPI6_DMA_BUFFER=1024
+CONFIG_STM32H7_TIM12=y
+CONFIG_STM32H7_TIM1=y
+CONFIG_STM32H7_TIM4=y
+CONFIG_STM32H7_TIM5=y
+CONFIG_STM32H7_UART4=y
+CONFIG_STM32H7_UART5=y
+CONFIG_STM32H7_UART7=y
+CONFIG_STM32H7_UART8=y
+CONFIG_STM32H7_USART1=y
+CONFIG_STM32H7_USART2=y
+CONFIG_STM32H7_USART3=y
+CONFIG_STM32H7_USART6=y
+CONFIG_STM32H7_USART_BREAKS=y
+CONFIG_STM32H7_USART_INVERT=y
+CONFIG_STM32H7_USART_SINGLEWIRE=y
+CONFIG_STM32H7_USART_SWAP=y
+CONFIG_SYSTEM_CDCACM=y
+CONFIG_SYSTEM_DHCPC_RENEW=y
+CONFIG_SYSTEM_NSH=y
+CONFIG_SYSTEM_PING=y
+CONFIG_SYSTEM_SYSTEM=y
+CONFIG_TASK_NAME_SIZE=24
+CONFIG_UART4_BAUD=57600
+CONFIG_UART4_RXBUFSIZE=600
+CONFIG_UART4_TXBUFSIZE=1500
+CONFIG_UART5_IFLOWCONTROL=y
+CONFIG_UART5_OFLOWCONTROL=y
+CONFIG_UART5_RXDMA=y
+CONFIG_UART5_TXBUFSIZE=10000
+CONFIG_UART5_TXDMA=y
+CONFIG_UART7_BAUD=57600
+CONFIG_UART7_IFLOWCONTROL=y
+CONFIG_UART7_OFLOWCONTROL=y
+CONFIG_UART7_RXBUFSIZE=600
+CONFIG_UART7_RXDMA=y
+CONFIG_UART7_TXBUFSIZE=3000
+CONFIG_UART7_TXDMA=y
+CONFIG_UART8_BAUD=57600
+CONFIG_UART8_RXBUFSIZE=600
+CONFIG_UART8_TXBUFSIZE=1500
+CONFIG_USART1_BAUD=57600
+CONFIG_USART1_RXBUFSIZE=600
+CONFIG_USART1_TXBUFSIZE=1500
+CONFIG_USART2_BAUD=57600
+CONFIG_USART2_IFLOWCONTROL=y
+CONFIG_USART2_OFLOWCONTROL=y
+CONFIG_USART2_RXBUFSIZE=600
+CONFIG_USART2_TXBUFSIZE=3000
+CONFIG_USART3_BAUD=57600
+CONFIG_USART3_RXBUFSIZE=180
+CONFIG_USART3_RXDMA=y
+CONFIG_USART3_SERIAL_CONSOLE=y
+CONFIG_USART3_TXBUFSIZE=1500
+CONFIG_USART3_TXDMA=y
+CONFIG_USART6_BAUD=57600
+CONFIG_USART6_RXBUFSIZE=600
+CONFIG_USART6_TXBUFSIZE=1500
+CONFIG_USBDEV=y
+CONFIG_USBDEV_BUSPOWERED=y
+CONFIG_USBDEV_MAXPOWER=500
+CONFIG_USEC_PER_TICK=1000
+CONFIG_WATCHDOG=y

boards/accton-godwit/ga1/nuttx-config/scripts/bootloader_script.ld

@@ -0,0 +1,215 @@
+/****************************************************************************
+ * scripts/script.ld
+ *
+ *   Copyright (C) 2016, 2019 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <gnutt@nuttx.org>
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/* The PX4 FMUV6X uses an STM32H753II has 2048Kb of main FLASH memory.
+ * The flash memory is partitioned into a User Flash memory and a System
+ * Flash memory. Each of these memories has two banks:
+ *
+ *   1) User Flash memory:
+ *
+ *      Bank 1: Start address 0x0800:0000 to 0x080F:FFFF with 8 sectors, 128Kb each
+ *      Bank 2: Start address 0x0810:0000 to 0x081F:FFFF with 8 sectors, 128Kb each
+ *
+ *   2) System Flash memory:
+ *
+ *      Bank 1: Start address 0x1FF0:0000 to 0x1FF1:FFFF with 1 x 128Kb sector
+ *      Bank 1: Start address 0x1FF4:0000 to 0x1FF5:FFFF with 1 x 128Kb sector
+ *
+ *   3) User option bytes for user configuration, only in Bank 1.
+ *
+ * In the STM32H743II, two different boot spaces can be selected through
+ * the BOOT pin and the boot base address programmed in the BOOT_ADD0 and
+ * BOOT_ADD1 option bytes:
+ *
+ *   1) BOOT=0: Boot address defined by user option byte BOOT_ADD0[15:0].
+ *      ST programmed value: Flash memory at 0x0800:0000
+ *   2) BOOT=1: Boot address defined by user option byte BOOT_ADD1[15:0].
+ *      ST programmed value: System bootloader at 0x1FF0:0000
+ *
+ * The PX4 FMUV6X has a test point on board, the BOOT0 pin is at ground so by
+ * default, the STM32 will boot to address 0x0800:0000 in FLASH unless the test
+ * point is pulled to 3.3V.then the boot will be from 0x1FF0:0000
+ *
+ * The STM32H743II also has 1024Kb of data SRAM.
+ * SRAM is split up into several blocks and into three power domains:
+ *
+ *   1) TCM SRAMs are dedicated to the Cortex-M7 and are accessible with
+ *      0 wait states by the Cortex-M7 and by MDMA through AHBS slave bus
+ *
+ *      1.1) 128Kb of DTCM-RAM beginning at address 0x2000:0000
+ *
+ *           The DTCM-RAM is organized as 2 x 64Kb DTCM-RAMs on 2 x 32 bit
+ *           DTCM ports. The DTCM-RAM could be used for critical real-time
+ *           data, such as interrupt service routines or stack / heap memory.
+ *           Both DTCM-RAMs can be used in parallel (for load/store operations)
+ *           thanks to the Cortex-M7 dual issue capability.
+ *
+ *      1.2)  64Kb of ITCM-RAM beginning at address 0x0000:0000
+ *
+ *           This RAM is connected to ITCM 64-bit interface designed for
+ *           execution of critical real-times routines by the CPU.
+ *
+ *   2) AXI SRAM (D1 domain) accessible by all system masters except BDMA
+ *      through D1 domain AXI bus matrix
+ *
+ *      2.1) 512Kb of SRAM beginning at address 0x2400:0000
+ *
+ *   3) AHB SRAM (D2 domain) accessible by all system masters except BDMA
+ *      through D2 domain AHB bus matrix
+ *
+ *      3.1) 128Kb of SRAM1 beginning at address 0x3000:0000
+ *      3.2) 128Kb of SRAM2 beginning at address 0x3002:0000
+ *      3.3)  32Kb of SRAM3 beginning at address 0x3004:0000
+ *
+ *      SRAM1 - SRAM3 are one contiguous block: 288Kb at address 0x3000:0000
+ *
+ *   4) AHB SRAM (D3 domain) accessible by most of system masters
+ *      through D3 domain AHB bus matrix
+ *
+ *      4.1)  64Kb of SRAM4 beginning at address 0x3800:0000
+ *      4.1)   4Kb of backup RAM beginning at address 0x3880:0000
+ *
+ * When booting from FLASH, FLASH memory is aliased to address 0x0000:0000
+ * where the code expects to begin execution by jumping to the entry point in
+ * the 0x0800:0000 address range.
+ *
+ * The bootloader uses the first sector of the flash, which is 128K in length.
+ */
+
+MEMORY
+{
+	itcm  (rwx) : ORIGIN = 0x00000000, LENGTH =   64K
+	flash (rx)  : ORIGIN = 0x08000000, LENGTH =  128K
+	dtcm1 (rwx) : ORIGIN = 0x20000000, LENGTH =   64K
+	dtcm2 (rwx) : ORIGIN = 0x20010000, LENGTH =   64K
+	sram  (rwx) : ORIGIN = 0x24000000, LENGTH =  512K
+	sram1 (rwx) : ORIGIN = 0x30000000, LENGTH =  128K
+	sram2 (rwx) : ORIGIN = 0x30020000, LENGTH =  128K
+	sram3 (rwx) : ORIGIN = 0x30040000, LENGTH =   32K
+	sram4 (rwx) : ORIGIN = 0x38000000, LENGTH =   64K
+	bbram (rwx) : ORIGIN = 0x38800000, LENGTH =    4K
+}
+
+OUTPUT_ARCH(arm)
+EXTERN(_vectors)
+ENTRY(_stext)
+
+/*
+ * Ensure that abort() is present in the final object.  The exception handling
+ * code pulled in by libgcc.a requires it (and that code cannot be easily avoided).
+ */
+EXTERN(abort)
+EXTERN(_bootdelay_signature)
+
+SECTIONS
+{
+	.text : {
+		_stext = ABSOLUTE(.);
+		*(.vectors)
+		. = ALIGN(32);
+		/*
+		This signature provides the bootloader with a way to delay booting
+		*/
+		_bootdelay_signature = ABSOLUTE(.);
+		FILL(0xffecc2925d7d05c5)
+		. += 8;
+		*(.text .text.*)
+		*(.fixup)
+		*(.gnu.warning)
+		*(.rodata .rodata.*)
+		*(.gnu.linkonce.t.*)
+		*(.glue_7)
+		*(.glue_7t)
+		*(.got)
+		*(.gcc_except_table)
+		*(.gnu.linkonce.r.*)
+		_etext = ABSOLUTE(.);
+
+	} > flash
+
+	/*
+	 * Init functions (static constructors and the like)
+	 */
+	.init_section : {
+		_sinit = ABSOLUTE(.);
+		KEEP(*(.init_array .init_array.*))
+		_einit = ABSOLUTE(.);
+	} > flash
+
+
+	.ARM.extab : {
+		*(.ARM.extab*)
+	} > flash
+
+	__exidx_start = ABSOLUTE(.);
+	.ARM.exidx : {
+		*(.ARM.exidx*)
+	} > flash
+	__exidx_end = ABSOLUTE(.);
+
+	_eronly = ABSOLUTE(.);
+
+	.data : {
+		_sdata = ABSOLUTE(.);
+		*(.data .data.*)
+		*(.gnu.linkonce.d.*)
+		CONSTRUCTORS
+		_edata = ABSOLUTE(.);
+	} > sram AT > flash
+
+	.bss : {
+		_sbss = ABSOLUTE(.);
+		*(.bss .bss.*)
+		*(.gnu.linkonce.b.*)
+		*(COMMON)
+		. = ALIGN(4);
+		_ebss = ABSOLUTE(.);
+	} > sram
+
+	/* Stabs debugging sections. */
+	.stab 0 : { *(.stab) }
+	.stabstr 0 : { *(.stabstr) }
+	.stab.excl 0 : { *(.stab.excl) }
+	.stab.exclstr 0 : { *(.stab.exclstr) }
+	.stab.index 0 : { *(.stab.index) }
+	.stab.indexstr 0 : { *(.stab.indexstr) }
+	.comment 0 : { *(.comment) }
+	.debug_abbrev 0 : { *(.debug_abbrev) }
+	.debug_info 0 : { *(.debug_info) }
+	.debug_line 0 : { *(.debug_line) }
+	.debug_pubnames 0 : { *(.debug_pubnames) }
+	.debug_aranges 0 : { *(.debug_aranges) }
+}

boards/accton-godwit/ga1/nuttx-config/scripts/script.ld

@@ -0,0 +1,229 @@
+/****************************************************************************
+ * scripts/script.ld
+ *
+ *   Copyright (C) 2016, 2019 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <gnutt@nuttx.org>
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/* The PX4 FMUV6X uses an STM32H753II has 2048Kb of main FLASH memory.
+ * The flash memory is partitioned into a User Flash memory and a System
+ * Flash memory. Each of these memories has two banks:
+ *
+ *   1) User Flash memory:
+ *
+ *      Bank 1: Start address 0x0800:0000 to 0x080F:FFFF with 8 sectors, 128Kb each
+ *      Bank 2: Start address 0x0810:0000 to 0x081F:FFFF with 8 sectors, 128Kb each
+ *
+ *   2) System Flash memory:
+ *
+ *      Bank 1: Start address 0x1FF0:0000 to 0x1FF1:FFFF with 1 x 128Kb sector
+ *      Bank 1: Start address 0x1FF4:0000 to 0x1FF5:FFFF with 1 x 128Kb sector
+ *
+ *   3) User option bytes for user configuration, only in Bank 1.
+ *
+ * In the STM32H743II, two different boot spaces can be selected through
+ * the BOOT pin and the boot base address programmed in the BOOT_ADD0 and
+ * BOOT_ADD1 option bytes:
+ *
+ *   1) BOOT=0: Boot address defined by user option byte BOOT_ADD0[15:0].
+ *      ST programmed value: Flash memory at 0x0800:0000
+ *   2) BOOT=1: Boot address defined by user option byte BOOT_ADD1[15:0].
+ *      ST programmed value: System bootloader at 0x1FF0:0000
+ *
+ * The PX4 FMUV6X has a test point on board, the BOOT0 pin is at ground so by
+ * default, the STM32 will boot to address 0x0800:0000 in FLASH unless the test
+ * point is pulled to 3.3V.then the boot will be from 0x1FF0:0000
+ *
+ * The STM32H743II also has 1024Kb of data SRAM.
+ * SRAM is split up into several blocks and into three power domains:
+ *
+ *   1) TCM SRAMs are dedicated to the Cortex-M7 and are accessible with
+ *      0 wait states by the Cortex-M7 and by MDMA through AHBS slave bus
+ *
+ *      1.1) 128Kb of DTCM-RAM beginning at address 0x2000:0000
+ *
+ *           The DTCM-RAM is organized as 2 x 64Kb DTCM-RAMs on 2 x 32 bit
+ *           DTCM ports. The DTCM-RAM could be used for critical real-time
+ *           data, such as interrupt service routines or stack / heap memory.
+ *           Both DTCM-RAMs can be used in parallel (for load/store operations)
+ *           thanks to the Cortex-M7 dual issue capability.
+ *
+ *      1.2)  64Kb of ITCM-RAM beginning at address 0x0000:0000
+ *
+ *           This RAM is connected to ITCM 64-bit interface designed for
+ *           execution of critical real-times routines by the CPU.
+ *
+ *   2) AXI SRAM (D1 domain) accessible by all system masters except BDMA
+ *      through D1 domain AXI bus matrix
+ *
+ *      2.1) 512Kb of SRAM beginning at address 0x2400:0000
+ *
+ *   3) AHB SRAM (D2 domain) accessible by all system masters except BDMA
+ *      through D2 domain AHB bus matrix
+ *
+ *      3.1) 128Kb of SRAM1 beginning at address 0x3000:0000
+ *      3.2) 128Kb of SRAM2 beginning at address 0x3002:0000
+ *      3.3)  32Kb of SRAM3 beginning at address 0x3004:0000
+ *
+ *      SRAM1 - SRAM3 are one contiguous block: 288Kb at address 0x3000:0000
+ *
+ *   4) AHB SRAM (D3 domain) accessible by most of system masters
+ *      through D3 domain AHB bus matrix
+ *
+ *      4.1)  64Kb of SRAM4 beginning at address 0x3800:0000
+ *      4.1)   4Kb of backup RAM beginning at address 0x3880:0000
+ *
+ * When booting from FLASH, FLASH memory is aliased to address 0x0000:0000
+ * where the code expects to begin execution by jumping to the entry point in
+ * the 0x0800:0000 address range.
+ */
+
+MEMORY
+{
+	ITCM_RAM  (rwx) : ORIGIN = 0x00000000, LENGTH =   64K
+	FLASH      (rx) : ORIGIN = 0x08020000, LENGTH = 1920K
+
+	DTCM1_RAM (rwx) : ORIGIN = 0x20000000, LENGTH =   64K
+	DTCM2_RAM (rwx) : ORIGIN = 0x20010000, LENGTH =   64K
+	AXI_SRAM  (rwx) : ORIGIN = 0x24000000, LENGTH =  512K /* D1 domain AXI bus */
+	SRAM1     (rwx) : ORIGIN = 0x30000000, LENGTH =  128K /* D2 domain AHB bus */
+	SRAM2     (rwx) : ORIGIN = 0x30020000, LENGTH =  128K /* D2 domain AHB bus */
+	SRAM3     (rwx) : ORIGIN = 0x30040000, LENGTH =   32K /* D2 domain AHB bus */
+	SRAM4     (rwx) : ORIGIN = 0x38000000, LENGTH =   64K /* D3 domain */
+	BKPRAM    (rwx) : ORIGIN = 0x38800000, LENGTH =    4K
+}
+
+OUTPUT_ARCH(arm)
+EXTERN(_vectors)
+ENTRY(_stext)
+
+/*
+ * Ensure that abort() is present in the final object.  The exception handling
+ * code pulled in by libgcc.a requires it (and that code cannot be easily avoided).
+ */
+EXTERN(abort)
+EXTERN(_bootdelay_signature)
+EXTERN(board_get_manifest)
+
+SECTIONS
+{
+	.text : {
+		_stext = ABSOLUTE(.);
+		*(.vectors)
+		. = ALIGN(32);
+		/*
+		This signature provides the bootloader with a way to delay booting
+		*/
+		_bootdelay_signature = ABSOLUTE(.);
+		FILL(0xffecc2925d7d05c5)
+		. += 8;
+		*(.text .text.*)
+		*(.fixup)
+		*(.gnu.warning)
+		*(.rodata .rodata.*)
+		*(.gnu.linkonce.t.*)
+		*(.glue_7)
+		*(.glue_7t)
+		*(.got)
+		*(.gcc_except_table)
+		*(.gnu.linkonce.r.*)
+		_etext = ABSOLUTE(.);
+
+	} > FLASH
+
+	/*
+	 * Init functions (static constructors and the like)
+	 */
+	.init_section : {
+		_sinit = ABSOLUTE(.);
+		KEEP(*(.init_array .init_array.*))
+		_einit = ABSOLUTE(.);
+	} > FLASH
+
+
+	.ARM.extab : {
+		*(.ARM.extab*)
+	} > FLASH
+
+	__exidx_start = ABSOLUTE(.);
+	.ARM.exidx : {
+		*(.ARM.exidx*)
+	} > FLASH
+	__exidx_end = ABSOLUTE(.);
+
+	_eronly = ABSOLUTE(.);
+
+	.data : {
+		_sdata = ABSOLUTE(.);
+		*(.data .data.*)
+		*(.gnu.linkonce.d.*)
+		CONSTRUCTORS
+		_edata = ABSOLUTE(.);
+
+		/* Pad out last section as the STM32H7 Flash write size is 256 bits. 32 bytes */
+		. = ALIGN(16);
+		FILL(0xffff)
+		. += 16;
+	} > AXI_SRAM AT > FLASH  = 0xffff
+
+	.bss : {
+		_sbss = ABSOLUTE(.);
+		*(.bss .bss.*)
+		*(.gnu.linkonce.b.*)
+		*(COMMON)
+		. = ALIGN(4);
+		_ebss = ABSOLUTE(.);
+	} > AXI_SRAM
+
+	/* Emit the the D3 power domain section for locating BDMA data */
+
+	.sram4_reserve (NOLOAD) :
+	{
+		*(.sram4)
+		. = ALIGN(4);
+		_sram4_heap_start = ABSOLUTE(.);
+	} > SRAM4
+
+	/* Stabs debugging sections. */
+	.stab 0 : { *(.stab) }
+	.stabstr 0 : { *(.stabstr) }
+	.stab.excl 0 : { *(.stab.excl) }
+	.stab.exclstr 0 : { *(.stab.exclstr) }
+	.stab.index 0 : { *(.stab.index) }
+	.stab.indexstr 0 : { *(.stab.indexstr) }
+	.comment 0 : { *(.comment) }
+	.debug_abbrev 0 : { *(.debug_abbrev) }
+	.debug_info 0 : { *(.debug_info) }
+	.debug_line 0 : { *(.debug_line) }
+	.debug_pubnames 0 : { *(.debug_pubnames) }
+	.debug_aranges 0 : { *(.debug_aranges) }
+}

boards/accton-godwit/ga1/performance-test.px4board

@@ -0,0 +1,31 @@
+CONFIG_BOARD_TOOLCHAIN="arm-none-eabi"
+CONFIG_BOARD_ARCHITECTURE="cortex-m7"
+CONFIG_BOARD_ETHERNET=y
+CONFIG_BOARD_SERIAL_GPS1="/dev/ttyS0"
+CONFIG_BOARD_SERIAL_GPS2="/dev/ttyS7"
+CONFIG_BOARD_SERIAL_TEL1="/dev/ttyS6"
+CONFIG_BOARD_SERIAL_TEL2="/dev/ttyS4"
+CONFIG_BOARD_SERIAL_TEL3="/dev/ttyS1"
+CONFIG_BOARD_SERIAL_EXT2="/dev/ttyS3"
+CONFIG_BOARD_ROMFSROOT="performance-test"
+CONFIG_DRIVERS_ADC_BOARD_ADC=y
+CONFIG_SYSTEMCMDS_DMESG=y
+CONFIG_SYSTEMCMDS_GPIO=y
+CONFIG_SYSTEMCMDS_HARDFAULT_LOG=y
+CONFIG_SYSTEMCMDS_I2CDETECT=y
+CONFIG_SYSTEMCMDS_LED_CONTROL=y
+CONFIG_SYSTEMCMDS_MFT=y
+CONFIG_SYSTEMCMDS_MTD=y
+CONFIG_SYSTEMCMDS_MFT_CFG=y
+CONFIG_SYSTEMCMDS_PARAM=y
+CONFIG_SYSTEMCMDS_PERF=y
+CONFIG_SYSTEMCMDS_REBOOT=y
+CONFIG_SYSTEMCMDS_SD_BENCH=y
+CONFIG_SYSTEMCMDS_SD_STRESS=y
+CONFIG_SYSTEMCMDS_SERIAL_TEST=y
+CONFIG_SYSTEMCMDS_SYSTEM_TIME=y
+CONFIG_SYSTEMCMDS_TOP=y
+CONFIG_SYSTEMCMDS_TOPIC_LISTENER=y
+CONFIG_SYSTEMCMDS_UORB=y
+CONFIG_SYSTEMCMDS_VER=y
+CONFIG_SYSTEMCMDS_WORK_QUEUE=y

boards/accton-godwit/ga1/src/CMakeLists.txt

@@ -0,0 +1,76 @@
+############################################################################
+#
+#   Copyright (c) 2016 PX4 Development Team. All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name PX4 nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+############################################################################
+if("${PX4_BOARD_LABEL}" STREQUAL  "bootloader")
+	add_compile_definitions(BOOTLOADER)
+	add_library(drivers_board
+		bootloader_main.c
+		init.cpp
+		usb.c
+		timer_config.cpp
+	)
+	target_link_libraries(drivers_board
+		PRIVATE
+			nuttx_arch # sdio
+			nuttx_drivers # sdio
+			px4_layer #gpio
+			arch_io_pins # iotimer
+			bootloader
+	)
+	target_include_directories(drivers_board PRIVATE ${PX4_SOURCE_DIR}/platforms/nuttx/src/bootloader/common)
+
+else()
+	add_library(drivers_board
+		can.c
+		i2c.cpp
+		init.cpp
+		led.c
+		mtd.cpp
+		sdio.c
+		spi.cpp
+		timer_config.cpp
+		usb.c
+	)
+	add_dependencies(drivers_board arch_board_hw_info)
+
+	target_link_libraries(drivers_board
+		PRIVATE
+			arch_io_pins
+			arch_spi
+			arch_board_hw_info
+			drivers__led # drv_led_start
+			nuttx_arch # sdio
+			nuttx_drivers # sdio
+			px4_layer
+			platform_gpio_mcp23009
+	)
+endif()

boards/accton-godwit/ga1/src/board_config.h

@@ -0,0 +1,519 @@
+/****************************************************************************
+ *
+ *   Copyright (c) 2016-2022 PX4 Development Team. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name PX4 nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/**
+ * @file board_config.h
+ *
+ * PX4FMU-v6x internal definitions
+ */
+
+#pragma once
+
+/****************************************************************************************************
+ * Included Files
+ ****************************************************************************************************/
+
+#include <px4_platform_common/px4_config.h>
+#include <nuttx/compiler.h>
+#include <stdint.h>
+
+
+#include <stm32_gpio.h>
+
+/****************************************************************************************************
+ * Definitions
+ ****************************************************************************************************/
+
+#undef TRACE_PINS
+
+/* PX4IO connection configuration */
+
+#define BOARD_USES_PX4IO_VERSION       2
+#define PX4IO_SERIAL_DEVICE            "/dev/ttyS5"
+#define PX4IO_SERIAL_TX_GPIO           GPIO_USART6_TX
+#define PX4IO_SERIAL_RX_GPIO           GPIO_USART6_RX
+#define PX4IO_SERIAL_BASE              STM32_USART6_BASE
+#define PX4IO_SERIAL_VECTOR            STM32_IRQ_USART6
+#define PX4IO_SERIAL_TX_DMAMAP         DMAMAP_USART6_TX
+#define PX4IO_SERIAL_RX_DMAMAP         DMAMAP_USART6_RX
+#define PX4IO_SERIAL_RCC_REG           STM32_RCC_APB2ENR
+#define PX4IO_SERIAL_RCC_EN            RCC_APB2ENR_USART6EN
+#define PX4IO_SERIAL_CLOCK             STM32_PCLK2_FREQUENCY
+#define PX4IO_SERIAL_BITRATE           1500000               /* 1.5Mbps -> max rate for IO */
+
+/* Configuration ************************************************************************************/
+
+#define BOARD_HAS_LTC44XX_VALIDS      2 //  N Bricks
+#define BOARD_HAS_USB_VALID           1 // LTC Has USB valid
+#define BOARD_HAS_NBAT_V              2d // 2 Digital Voltage
+#define BOARD_HAS_NBAT_I              2d // 2 Digital Current
+
+/* PX4FMU GPIOs ***********************************************************************************/
+
+/* Trace Clock and D0-D3 are available on the trace connector
+ *
+ * TRACECLK PE2  - Dedicated       - Trace Connector Pin 1
+ * TRACED0  PE3  - nLED_RED        - Trace Connector Pin 3
+ * TRACED1  PE4  - nLED_GREEN      - Trace Connector Pin 5
+ * TRACED2  PE5  - nLED_BLUE       - Trace Connector Pin 7
+ * TRACED3  PE6  - nARMED          - Trace Connector Pin 8
+
+ */
+
+/* LEDs are driven with push open drain to support Anode to 5V or 3.3V or used as TRACE0-2 */
+
+#if !defined(TRACE_PINS)
+#  define GPIO_nLED_RED        /* PE3 */  (GPIO_OUTPUT|GPIO_OPENDRAIN|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET|GPIO_PORTE|GPIO_PIN3)
+#  define GPIO_nLED_GREEN      /* PE4 */  (GPIO_OUTPUT|GPIO_OPENDRAIN|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET|GPIO_PORTE|GPIO_PIN4)
+#  define GPIO_nLED_BLUE       /* PE5 */  (GPIO_OUTPUT|GPIO_OPENDRAIN|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET|GPIO_PORTE|GPIO_PIN5)
+
+#  define BOARD_HAS_CONTROL_STATUS_LEDS      1
+#  define BOARD_OVERLOAD_LED     LED_RED
+#  define BOARD_ARMED_STATE_LED  LED_BLUE
+
+#else
+
+#  define GPIO_TRACECLK1 (GPIO_TRACECLK |GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL)  //(GPIO_ALT|GPIO_AF0|GPIO_PORTE|GPIO_PIN2)
+#  define GPIO_TRACED0   (GPIO_TRACED0_2|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL)  //(GPIO_ALT|GPIO_AF0|GPIO_PORTE|GPIO_PIN3)
+#  define GPIO_TRACED1   (GPIO_TRACED1_2|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL)  //(GPIO_ALT|GPIO_AF0|GPIO_PORTE|GPIO_PIN4)
+#  define GPIO_TRACED2   (GPIO_TRACED2_2|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL)  //(GPIO_ALT|GPIO_AF0|GPIO_PORTE|GPIO_PIN5)
+#  define GPIO_TRACED3   (GPIO_TRACED3_2|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL)  //(GPIO_ALT|GPIO_AF0|GPIO_PORTE|GPIO_PIN6)
+//#define GPIO_TRACESWO                        //(GPIO_ALT|GPIO_AF0|GPIO_PORTB|GPIO_PIN3)
+
+#  undef  BOARD_HAS_CONTROL_STATUS_LEDS
+#  undef  BOARD_OVERLOAD_LED
+#  undef  BOARD_ARMED_STATE_LED
+
+#  define GPIO_nLED_RED    GPIO_TRACED0
+#  define GPIO_nLED_GREEN  GPIO_TRACED1
+#  define GPIO_nLED_BLUE   GPIO_TRACED2
+#  define GPIO_nARMED      GPIO_TRACED3
+#  define GPIO_nARMED_INIT GPIO_TRACED3
+#endif
+
+
+/* SPI */
+
+#define SPI6_nRESET_EXTERNAL1       /* PF10 */ (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTF|GPIO_PIN10)
+#define GPIO_SYNC                   /* PE9  */ (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_100MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTE|GPIO_PIN9)
+
+/* I2C busses */
+
+/* Devices on the onboard buses.
+ *
+ * Note that these are unshifted addresses.
+ */
+#define BOARD_MTD_NUM_EEPROM        2 /* MTD: base_eeprom, imu_eeprom*/
+
+#define PX4_I2C_OBDEV_SE050         0x48
+
+#define GPIO_I2C2_DRDY1_BMP388      /* PG5  */  (GPIO_INPUT|GPIO_FLOAT|GPIO_EXTI|GPIO_PORTG|GPIO_PIN5)
+
+/*
+ * ADC channels
+ *
+ * These are the channel numbers of the ADCs of the microcontroller that
+ * can be used by the Px4 Firmware in the adc driver
+ */
+
+/* ADC defines to be used in sensors.cpp to read from a particular channel */
+
+#define ADC1_CH(n)                  (n)
+
+/* N.B. there is no offset mapping needed for ADC3 because */
+#define ADC3_CH(n)                  (n)
+
+/* We are only use ADC3 for REV/VER.
+ * ADC3_6V6 and ADC3_3V3 are mapped back to ADC1
+ * To do this We are relying on PC2_C, PC3_C being connected to PC2, PC3
+ * respectively by the SYSCFG_PMCR default of setting for PC3SO PC2SO PA1SO
+ * PA0SO of 0.
+ *
+ *  0 Analog switch closed (pads are connected through the analog switch)
+ *
+ * So ADC3_INP0 is GPIO_ADC123_INP12
+ *    ADC3_INP1 is GPIO_ADC12_INP13
+ */
+
+/* Define GPIO pins used as ADC N.B. Channel numbers must match below  */
+
+#define PX4_ADC_GPIO  \
+	/* PA0  */  GPIO_ADC1_INP16,   \
+	/* PA4  */  GPIO_ADC12_INP18,  \
+	/* PB0  */  GPIO_ADC12_INP9,   \
+	/* PB1  */  GPIO_ADC12_INP5,   \
+	/* PC2  */  GPIO_ADC123_INP12, \
+	/* PC3  */  GPIO_ADC12_INP13,  \
+	/* PF12 */  GPIO_ADC1_INP6,    \
+	/* PH3  */  GPIO_ADC3_INP14,   \
+	/* PH4  */  GPIO_ADC3_INP15
+
+/* Define Channel numbers must match above GPIO pin IN(n)*/
+#define ADC_SCALED_VDD_3V3_SENSORS1_CHANNEL     /* PA0  */  ADC1_CH(16)
+#define ADC_SCALED_VDD_3V3_SENSORS2_CHANNEL     /* PA4  */  ADC1_CH(18)
+#define ADC_SCALED_VDD_3V3_SENSORS3_CHANNEL     /* PB0  */  ADC1_CH(9)
+#define ADC_SCALED_V5_CHANNEL                   /* PB1  */  ADC1_CH(5)
+#define ADC_ADC3_6V6_CHANNEL                    /* PC2  */  ADC3_CH(12)
+#define ADC_ADC3_3V3_CHANNEL                    /* PC3  */  ADC3_CH(13)
+#define ADC_SCALED_VDD_3V3_SENSORS4_CHANNEL     /* PF12 */  ADC1_CH(6)
+#define ADC_HW_VER_SENSE_CHANNEL                /* PH3  */  ADC3_CH(14)
+#define ADC_HW_REV_SENSE_CHANNEL                /* PH4  */  ADC3_CH(15)
+
+#define ADC_CHANNELS \
+	((1 << ADC_SCALED_VDD_3V3_SENSORS1_CHANNEL) | \
+	 (1 << ADC_SCALED_VDD_3V3_SENSORS2_CHANNEL) | \
+	 (1 << ADC_SCALED_VDD_3V3_SENSORS3_CHANNEL) | \
+	 (1 << ADC_SCALED_V5_CHANNEL)               | \
+	 (1 << ADC_ADC3_6V6_CHANNEL)                | \
+	 (1 << ADC_ADC3_3V3_CHANNEL))               | \
+	(1 << ADC_SCALED_VDD_3V3_SENSORS4_CHANNEL)
+
+/* HW has to large of R termination on ADC todo:change when HW value is chosen */
+
+#define HW_REV_VER_ADC_BASE STM32_ADC3_BASE
+
+#define SYSTEM_ADC_BASE STM32_ADC1_BASE
+
+/* HW has to large of R termination on ADC todo:change when HW value is chosen */
+#define BOARD_ADC_OPEN_CIRCUIT_V     (5.6f)
+
+/* HW Version and Revision drive signals Default to 1 to detect */
+#define BOARD_HAS_HW_SPLIT_VERSIONING
+
+#define GPIO_HW_VER_REV_DRIVE  /* PG0 */ (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_SET|GPIO_PORTG|GPIO_PIN0)
+#define GPIO_HW_REV_SENSE      /* PH4 */  GPIO_ADC3_INP15
+#define GPIO_HW_VER_SENSE      /* PH3 */  GPIO_ADC3_INP14
+#define HW_INFO_INIT_PREFIX    "GA1"
+
+
+#define UAVCAN_NUM_IFACES_RUNTIME  1
+
+/* HEATER
+ * PWM in future
+ */
+#define GPIO_HEATER_OUTPUT   /* PB10  T2CH3 */ (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTB|GPIO_PIN10)
+#define HEATER_OUTPUT_EN(on_true)	       px4_arch_gpiowrite(GPIO_HEATER_OUTPUT, (on_true))
+
+/* PE6 is nARMED
+ *  The GPIO will be set as input while not armed HW will have external HW Pull UP.
+ *  While armed it shall be configured at a GPIO OUT set LOW
+ */
+#if !defined(TRACE_PINS)
+#define GPIO_nARMED_INIT     /* PE6 */  (GPIO_INPUT|GPIO_PULLUP|GPIO_PORTE|GPIO_PIN6)
+#define GPIO_nARMED          /* PE6 */  (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTE|GPIO_PIN6)
+#define BOARD_INDICATE_EXTERNAL_LOCKOUT_STATE(enabled)  px4_arch_configgpio((enabled) ? GPIO_nARMED : GPIO_nARMED_INIT)
+#define BOARD_GET_EXTERNAL_LOCKOUT_STATE() px4_arch_gpioread(GPIO_nARMED)
+#endif
+
+
+/* PWM
+ */
+#define DIRECT_PWM_OUTPUT_CHANNELS   9
+
+
+/* Power supply control and monitoring GPIOs */
+
+#define GPIO_nPOWER_IN_A                /* PG1  */ (GPIO_INPUT|GPIO_PULLUP|GPIO_PORTG|GPIO_PIN1)
+#define GPIO_nPOWER_IN_B                /* PG2  */ (GPIO_INPUT|GPIO_PULLUP|GPIO_PORTG|GPIO_PIN2)
+#define GPIO_nPOWER_IN_C                /* PG3  */ (GPIO_INPUT|GPIO_PULLUP|GPIO_PORTG|GPIO_PIN3)
+
+#define GPIO_nVDD_BRICK1_VALID          GPIO_nPOWER_IN_A /* Brick 1 Is Chosen */
+#define GPIO_nVDD_BRICK2_VALID          GPIO_nPOWER_IN_B /* Brick 2 Is Chosen  */
+#define BOARD_NUMBER_BRICKS             2
+#define BOARD_NUMBER_DIGITAL_BRICKS     2
+#define GPIO_nVDD_USB_VALID             GPIO_nPOWER_IN_C /* USB     Is Chosen */
+
+#define GPIO_VDD_5V_PERIPH_nEN          /* PG4  */ (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_SET|GPIO_PORTG|GPIO_PIN4)
+#define GPIO_VDD_5V_PERIPH_nOC          /* PE15 */ (GPIO_INPUT |GPIO_FLOAT|GPIO_PORTE|GPIO_PIN15)
+#define GPIO_VDD_5V_HIPOWER_nEN         /* PG10 */ (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_SET|GPIO_PORTG|GPIO_PIN10)
+#define GPIO_VDD_5V_HIPOWER_nOC         /* PF13 */ (GPIO_INPUT |GPIO_FLOAT|GPIO_PORTF|GPIO_PIN13)
+#define GPIO_VDD_3V3_SENSORS4_EN        /* PG8  */ (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTG|GPIO_PIN8)
+#define GPIO_VDD_3V3_SPEKTRUM_POWER_EN  /* PH2  */ (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTH|GPIO_PIN2)
+#define GPIO_VDD_3V3_SD_CARD_EN         /* PC13 */ (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTC|GPIO_PIN13)
+
+/* MCP23009 GPIO expander */
+#define BOARD_GPIO_VDD_5V_COMP_VALID           "/dev/gpio4"
+#define BOARD_GPIO_VDD_5V_CAN1_GPS1_VALID      "/dev/gpio5"
+
+
+/* Spare GPIO */
+
+#define GPIO_PG6                        /* PG6  */  (GPIO_INPUT|GPIO_PULLUP|GPIO_PORTG|GPIO_PIN6)
+#define GPIO_PD15                       /* PD15 */  (GPIO_INPUT|GPIO_FLOAT|GPIO_PORTD|GPIO_PIN15)
+
+/* ETHERNET GPIO */
+
+#define GPIO_ETH_POWER_EN              /* PG15 */ (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTG|GPIO_PIN15)
+
+/* NFC GPIO */
+
+#define GPIO_NFC_GPIO                   /* PC0 */ (GPIO_INPUT|GPIO_FLOAT|GPIO_EXTI|GPIO_PORTC|GPIO_PIN0)
+
+
+/* Define True logic Power Control in arch agnostic form */
+
+#define VDD_5V_PERIPH_EN(on_true)          px4_arch_gpiowrite(GPIO_VDD_5V_PERIPH_nEN, !(on_true))
+#define VDD_5V_HIPOWER_EN(on_true)         px4_arch_gpiowrite(GPIO_VDD_5V_HIPOWER_nEN, !(on_true))
+#define VDD_3V3_SENSORS4_EN(on_true)       px4_arch_gpiowrite(GPIO_VDD_3V3_SENSORS4_EN, (on_true))
+#define VDD_3V3_SPEKTRUM_POWER_EN(on_true) px4_arch_gpiowrite(GPIO_VDD_3V3_SPEKTRUM_POWER_EN, (on_true))
+#define READ_VDD_3V3_SPEKTRUM_POWER_EN()   px4_arch_gpioread(GPIO_VDD_3V3_SPEKTRUM_POWER_EN)
+#define VDD_3V3_SD_CARD_EN(on_true)        px4_arch_gpiowrite(GPIO_VDD_3V3_SD_CARD_EN, (on_true))
+#define VDD_3V3_ETH_POWER_EN(on_true)      px4_arch_gpiowrite(GPIO_ETH_POWER_EN, (on_true))
+
+
+/* Tone alarm output */
+
+#define TONE_ALARM_TIMER        14  /* Timer 14 */
+#define TONE_ALARM_CHANNEL      1  /* PF9 GPIO_TIM14_CH1OUT_2 */
+
+#define GPIO_BUZZER_1           /* PF9 */ (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTF|GPIO_PIN9)
+
+#define GPIO_TONE_ALARM_IDLE    GPIO_BUZZER_1
+#define GPIO_TONE_ALARM         GPIO_TIM14_CH1OUT_2
+
+/* USB OTG FS
+ *
+ * PA9  OTG_FS_VBUS VBUS sensing
+ */
+#define GPIO_OTGFS_VBUS         /* PA9 */ (GPIO_INPUT|GPIO_PULLDOWN|GPIO_SPEED_100MHz|GPIO_PORTA|GPIO_PIN9)
+
+/* High-resolution timer */
+#define HRT_TIMER               8  /* use timer8 for the HRT */
+#define HRT_TIMER_CHANNEL       3  /* use capture/compare channel 3 */
+
+#define HRT_PPM_CHANNEL         /* T8C1 */  1  /* use capture/compare channel 1 */
+#define GPIO_PPM_IN             /* PI5 T8C1 */ GPIO_TIM8_CH1IN_2
+
+/* RC Serial port */
+#define RC_SERIAL_PORT                     "/dev/ttyS5"
+/* Some RC protocols are bi-directional, therefore we need a half-duplex UART */
+#define RC_SERIAL_SINGLEWIRE
+/* The STM32 UART by default wires half-duplex mode to the TX pin, but our
+ * signal in routed to the RX pin, so we need to swap the pins */
+#define RC_SERIAL_SWAP_RXTX
+
+/* Input Capture Channels. */
+#define INPUT_CAP1_TIMER                  1
+#define INPUT_CAP1_CHANNEL     /* T1C2 */ 2
+#define GPIO_INPUT_CAP1        /*  PE11 */ GPIO_TIM1_CH2IN
+
+/* PWM input driver. Use FMU AUX5 pins attached to timer4 channel 2 */
+#define PWMIN_TIMER                       4
+#define PWMIN_TIMER_CHANNEL    /* T4C2 */ 2
+#define GPIO_PWM_IN            /* PD13 */ GPIO_TIM4_CH2IN_2
+
+/* Safety Switch is HW version dependent on having an PX4IO
+ * So we init to a benign state with the _INIT definition
+ * and provide the the non _INIT one for the driver to make a run time
+ * decision to use it.
+ */
+#define GPIO_nSAFETY_SWITCH_LED_OUT_INIT   /* PD10 */ (GPIO_INPUT|GPIO_FLOAT|GPIO_PORTD|GPIO_PIN10)
+#define GPIO_nSAFETY_SWITCH_LED_OUT        /* PD10 */ (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_SET|GPIO_PORTD|GPIO_PIN10)
+
+/* Enable the FMU to control it if there is no px4io fixme:This should be BOARD_SAFETY_LED(__ontrue) */
+#define GPIO_LED_SAFETY GPIO_nSAFETY_SWITCH_LED_OUT
+
+#define GPIO_SAFETY_SWITCH_IN              /* PF5 */ (GPIO_INPUT|GPIO_PULLUP|GPIO_PORTF|GPIO_PIN5)
+/* Enable the FMU to use the switch it if there is no px4io fixme:This should be BOARD_SAFTY_BUTTON() */
+#define GPIO_BTN_SAFETY GPIO_SAFETY_SWITCH_IN /* Enable the FMU to control it if there is no px4io */
+
+/* Power switch controls ******************************************************/
+
+#define SPEKTRUM_POWER(_on_true)           VDD_3V3_SPEKTRUM_POWER_EN(_on_true)
+
+/*
+ * FMUv6X has a separate RC_IN
+ *
+ * GPIO PPM_IN on PI5 T8CH1
+ * SPEKTRUM_RX (it's TX or RX in Bind) on UART6 PC7
+ *   Inversion is possible in the UART and can drive  GPIO PPM_IN as an output
+ */
+
+#define GPIO_PPM_IN_AS_OUT             (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_SET|GPIO_PORTI|GPIO_PIN5)
+#define SPEKTRUM_RX_AS_GPIO_OUTPUT()   px4_arch_configgpio(GPIO_PPM_IN_AS_OUT)
+#define SPEKTRUM_RX_AS_UART()          /* Can be left as uart */
+#define SPEKTRUM_OUT(_one_true)        px4_arch_gpiowrite(GPIO_PPM_IN_AS_OUT, (_one_true))
+
+#define SDIO_SLOTNO                    0  /* Only one slot */
+#define SDIO_MINOR                     0
+
+/* SD card bringup does not work if performed on the IDLE thread because it
+ * will cause waiting.  Use either:
+ *
+ *  CONFIG_BOARDCTL=y, OR
+ *  CONFIG_BOARD_INITIALIZE=y && CONFIG_BOARD_INITTHREAD=y
+ */
+
+#if defined(CONFIG_BOARD_INITIALIZE) && !defined(CONFIG_BOARDCTL) && \
+   !defined(CONFIG_BOARD_INITTHREAD)
+#  warning SDIO initialization cannot be perfomed on the IDLE thread
+#endif
+
+/* By Providing BOARD_ADC_USB_CONNECTED (using the px4_arch abstraction)
+ * this board support the ADC system_power interface, and therefore
+ * provides the true logic GPIO BOARD_ADC_xxxx macros.
+ */
+#define BOARD_ADC_USB_CONNECTED (px4_arch_gpioread(GPIO_OTGFS_VBUS))
+#define BOARD_ADC_USB_VALID     (!px4_arch_gpioread(GPIO_nVDD_USB_VALID))
+
+/* FMUv6X never powers off the Servo rail */
+
+#define BOARD_ADC_SERVO_VALID     (1)
+
+#if !defined(BOARD_HAS_LTC44XX_VALIDS) || BOARD_HAS_LTC44XX_VALIDS == 0
+#  define BOARD_ADC_BRICK1_VALID  (1)
+#  define BOARD_ADC_BRICK2_VALID  (0)
+#elif BOARD_HAS_LTC44XX_VALIDS == 1
+#  define BOARD_ADC_BRICK1_VALID  (!px4_arch_gpioread(GPIO_nVDD_BRICK1_VALID))
+#  define BOARD_ADC_BRICK2_VALID  (0)
+#elif BOARD_HAS_LTC44XX_VALIDS == 2
+#  define BOARD_ADC_BRICK1_VALID  (!px4_arch_gpioread(GPIO_nVDD_BRICK1_VALID))
+#  define BOARD_ADC_BRICK2_VALID  (!px4_arch_gpioread(GPIO_nVDD_BRICK2_VALID))
+#elif BOARD_HAS_LTC44XX_VALIDS == 3
+#  define BOARD_ADC_BRICK1_VALID  (!px4_arch_gpioread(GPIO_nVDD_BRICK1_VALID))
+#  define BOARD_ADC_BRICK2_VALID  (!px4_arch_gpioread(GPIO_nVDD_BRICK2_VALID))
+#  define BOARD_ADC_BRICK3_VALID  (!px4_arch_gpioread(GPIO_nVDD_BRICK3_VALID))
+#elif BOARD_HAS_LTC44XX_VALIDS == 4
+#  define BOARD_ADC_BRICK1_VALID  (!px4_arch_gpioread(GPIO_nVDD_BRICK1_VALID))
+#  define BOARD_ADC_BRICK2_VALID  (!px4_arch_gpioread(GPIO_nVDD_BRICK2_VALID))
+#  define BOARD_ADC_BRICK3_VALID  (!px4_arch_gpioread(GPIO_nVDD_BRICK3_VALID))
+#  define BOARD_ADC_BRICK4_VALID  (!px4_arch_gpioread(GPIO_nVDD_BRICK4_VALID))
+#else
+#  error Unsupported BOARD_HAS_LTC44XX_VALIDS value
+#endif
+
+#define BOARD_ADC_PERIPH_5V_OC  (!px4_arch_gpioread(GPIO_VDD_5V_PERIPH_nOC))
+#define BOARD_ADC_HIPOWER_5V_OC (!px4_arch_gpioread(GPIO_VDD_5V_HIPOWER_nOC))
+
+
+/* This board provides a DMA pool and APIs */
+#define BOARD_DMA_ALLOC_POOL_SIZE 5120
+
+/* This board provides the board_on_reset interface */
+
+#define BOARD_HAS_ON_RESET 1
+
+#if defined(TRACE_PINS)
+#define GPIO_TRACE                          \
+	GPIO_TRACECLK1,                           \
+	GPIO_TRACED0,                             \
+	GPIO_TRACED1,                             \
+	GPIO_TRACED2,                             \
+	GPIO_TRACED3
+#else
+#define GPIO_TRACE (GPIO_OUTPUT|GPIO_OUTPUT_SET|GPIO_PORTE|GPIO_PIN2)
+#endif
+
+#define PX4_GPIO_INIT_LIST { \
+		GPIO_TRACE,                       \
+		PX4_ADC_GPIO,                     \
+		GPIO_HW_VER_REV_DRIVE,            \
+		GPIO_CAN1_TX,                     \
+		GPIO_CAN1_RX,                     \
+		GPIO_CAN2_TX,                     \
+		GPIO_CAN2_RX,                     \
+		GPIO_HEATER_OUTPUT,               \
+		GPIO_nPOWER_IN_A,                 \
+		GPIO_nPOWER_IN_B,                 \
+		GPIO_nPOWER_IN_C,                 \
+		GPIO_VDD_5V_PERIPH_nEN,           \
+		GPIO_VDD_5V_PERIPH_nOC,           \
+		GPIO_VDD_5V_HIPOWER_nEN,          \
+		GPIO_VDD_5V_HIPOWER_nOC,          \
+		GPIO_VDD_3V3_SENSORS4_EN,         \
+		GPIO_VDD_3V3_SPEKTRUM_POWER_EN,   \
+		GPIO_VDD_3V3_SD_CARD_EN,          \
+		GPIO_PD15,                        \
+		GPIO_SYNC,                        \
+		SPI6_nRESET_EXTERNAL1,            \
+		GPIO_ETH_POWER_EN,                \
+		GPIO_NFC_GPIO,                    \
+		GPIO_TONE_ALARM_IDLE,             \
+		GPIO_nSAFETY_SWITCH_LED_OUT_INIT, \
+		GPIO_SAFETY_SWITCH_IN,            \
+		GPIO_PG6,                         \
+		GPIO_nARMED_INIT                  \
+	}
+
+#define BOARD_ENABLE_CONSOLE_BUFFER
+
+#define PX4_I2C_BUS_MTD      4,5
+
+
+#define BOARD_NUM_IO_TIMERS 5
+
+__BEGIN_DECLS
+
+/****************************************************************************************************
+ * Public Types
+ ****************************************************************************************************/
+
+/****************************************************************************************************
+ * Public data
+ ****************************************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+/****************************************************************************************************
+ * Public Functions
+ ****************************************************************************************************/
+
+/****************************************************************************
+ * Name: stm32_sdio_initialize
+ *
+ * Description:
+ *   Initialize SDIO-based MMC/SD card support
+ *
+ ****************************************************************************/
+
+int stm32_sdio_initialize(void);
+
+/****************************************************************************************************
+ * Name: stm32_spiinitialize
+ *
+ * Description:
+ *   Called to configure SPI chip select GPIO pins for the PX4FMU board.
+ *
+ ****************************************************************************************************/
+
+extern void stm32_spiinitialize(void);
+
+extern void stm32_usbinitialize(void);
+
+extern void board_peripheral_reset(int ms);
+
+#include <px4_platform_common/board_common.h>
+
+#endif /* __ASSEMBLY__ */
+
+__END_DECLS

boards/accton-godwit/ga1/src/bootloader_main.c

@@ -0,0 +1,62 @@
+/****************************************************************************
+ *
+ *   Copyright (c) 2019-2021 PX4 Development Team. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name PX4 nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/**
+ * @file bootloader_main.c
+ *
+ * FMU-specific early startup code for bootloader
+*/
+
+#include "board_config.h"
+#include "bl.h"
+
+#include <nuttx/config.h>
+#include <nuttx/board.h>
+#include <chip.h>
+#include <stm32_uart.h>
+#include <arch/board/board.h>
+#include "arm_internal.h"
+#include <px4_platform_common/init.h>
+
+extern int sercon_main(int c, char **argv);
+
+void board_late_initialize(void)
+{
+	sercon_main(0, NULL);
+}
+
+extern void sys_tick_handler(void);
+void board_timerhook(void)
+{
+	sys_tick_handler();
+}

boards/accton-godwit/ga1/src/can.c

@@ -0,0 +1,142 @@
+/****************************************************************************
+ *
+ *   Copyright (C) 2012 PX4 Development Team. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name PX4 nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/**
+ * @file can.c
+ *
+ * Board-specific CAN functions.
+ */
+
+#if !defined(CONFIG_CAN)
+
+#include <stdint.h>
+
+#include "board_config.h"
+
+
+__EXPORT
+uint16_t board_get_can_interfaces(void)
+{
+	uint16_t enabled_interfaces = 0x3;
+
+	if (!PX4_MFT_HW_SUPPORTED(PX4_MFT_CAN2)) {
+		enabled_interfaces &= ~(1 << 1);
+	}
+
+	return enabled_interfaces;
+}
+
+#else
+
+#include <errno.h>
+#include <debug.h>
+
+#include <nuttx/can/can.h>
+#include <arch/board/board.h>
+
+#include "chip.h"
+#include "arm_internal.h"
+
+#include "chip.h"
+#include "stm32_can.h"
+#include "board_config.h"
+
+/************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************/
+/* Configuration ********************************************************************/
+
+#if defined(CONFIG_STM32_CAN1) && defined(CONFIG_STM32_CAN2)
+#  warning "Both CAN1 and CAN2 are enabled.  Assuming only CAN1."
+#  undef CONFIG_STM32_CAN2
+#endif
+
+#ifdef CONFIG_STM32_CAN1
+#  define CAN_PORT 1
+#else
+#  define CAN_PORT 2
+#endif
+
+/************************************************************************************
+ * Private Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+int can_devinit(void);
+
+/************************************************************************************
+ * Name: can_devinit
+ *
+ * Description:
+ *   All STM32 architectures must provide the following interface to work with
+ *   examples/can.
+ *
+ ************************************************************************************/
+
+int can_devinit(void)
+{
+	static bool initialized = false;
+	struct can_dev_s *can;
+	int ret;
+
+	/* Check if we have already initialized */
+
+	if (!initialized) {
+		/* Call stm32_caninitialize() to get an instance of the CAN interface */
+
+		can = stm32_caninitialize(CAN_PORT);
+
+		if (can == NULL) {
+			canerr("ERROR:  Failed to get CAN interface\n");
+			return -ENODEV;
+		}
+
+		/* Register the CAN driver at "/dev/can0" */
+
+		ret = can_register("/dev/can0", can);
+
+		if (ret < 0) {
+			canerr("ERROR: can_register failed: %d\n", ret);
+			return ret;
+		}
+
+		/* Now we are initialized */
+
+		initialized = true;
+	}
+
+	return OK;
+}
+#endif /* CONFIG_CAN */

boards/accton-godwit/ga1/src/hw_config.h

@@ -0,0 +1,128 @@
+/*
+ * hw_config.h
+ *
+ *  Created on: May 17, 2015
+ *      Author: david_s5
+ */
+
+#ifndef HW_CONFIG_H_
+#define HW_CONFIG_H_
+
+/****************************************************************************
+ * 10-8--2016:
+ *  To simplify the ripple effect on the tools, we will be using
+ *  /dev/serial/by-id/<asterisk>PX4<asterisk> to locate PX4 devices. Therefore
+ *  moving forward all Bootloaders must contain the prefix "PX4 BL "
+ *  in the USBDEVICESTRING
+ *  This Change will be made in an upcoming BL release
+ ****************************************************************************/
+/*
+ * Define usage to configure a bootloader
+ *
+ *
+ * Constant                example          Usage
+ * APP_LOAD_ADDRESS     0x08004000            - The address in Linker Script, where the app fw is org-ed
+ * BOOTLOADER_DELAY     5000                  - Ms to wait while under USB pwr or bootloader request
+ * BOARD_FMUV2
+ * INTERFACE_USB        1                     - (Optional) Scan and use the USB interface for bootloading
+ * INTERFACE_USART      1                     - (Optional) Scan and use the Serial interface for bootloading
+ * USBDEVICESTRING      "PX4 BL FMU v2.x"     - USB id string
+ * USBPRODUCTID         0x0011                - PID Should match defconfig
+ * BOOT_DELAY_ADDRESS   0x000001a0            - (Optional) From the linker script from Linker Script to get a custom
+ *                                               delay provided by an APP FW
+ * BOARD_TYPE           9                     - Must match .prototype boad_id
+ * _FLASH_KBYTES        (*(uint16_t *)0x1fff7a22) - Run time flash size detection
+ * BOARD_FLASH_SECTORS  ((_FLASH_KBYTES == 0x400) ? 11 : 23) - Run time determine the physical last sector
+ * BOARD_FLASH_SECTORS   11                   - Hard coded zero based last sector
+ * BOARD_FLASH_SIZE     (_FLASH_KBYTES*1024)-   Total Flash size of device, determined at run time.
+ *                         (1024 * 1024)      - Hard coded Total Flash of device - The bootloader and app reserved will be deducted
+ *                                              programmatically
+ *
+ * BOARD_FIRST_FLASH_SECTOR_TO_ERASE  2        - Optional sectors index in the flash_sectors table  (F4 only), to begin erasing.
+ *                                               This is to allow sectors to be reserved for app fw usage. That will NOT be erased
+ *                                               during a FW upgrade.
+ *                                               The default is 0, and selects the first sector to be erased, as the 0th entry in the
+ *                                               flash_sectors table. Which is the second physical sector of FLASH in the device.
+ *                                               The first physical sector of FLASH is used by the bootloader, and is not defined
+ *                                               in the table.
+ *
+ * APP_RESERVATION_SIZE (BOARD_FIRST_FLASH_SECTOR_TO_ERASE * 16 * 1024) - Number of bytes reserved by the APP FW. This number plus
+ *                                                                        BOOTLOADER_RESERVATION_SIZE  will be deducted from
+ *                                                                        BOARD_FLASH_SIZE to determine the size of the App FW
+ *                                                                        and hence the address space of FLASH to erase and program.
+ * USBMFGSTRING            "PX4 AP"            - Optional USB MFG string (default is '3D Robotics' if not defined.)
+ * SERIAL_BREAK_DETECT_DISABLED                -  Optional prevent break selection on Serial port from entering or staying in BL
+ *
+ * * Other defines are somewhat self explanatory.
+ */
+
+/* Boot device selection list*/
+#define USB0_DEV       0x01
+#define SERIAL0_DEV    0x02
+#define SERIAL1_DEV    0x04
+
+#define APP_LOAD_ADDRESS               0x08020000
+#define BOOTLOADER_DELAY               5000
+#define INTERFACE_USB                  1
+#define INTERFACE_USB_CONFIG           "/dev/ttyACM0"
+#define BOARD_VBUS                     MK_GPIO_INPUT(GPIO_OTGFS_VBUS)
+
+//#define USE_VBUS_PULL_DOWN
+#define INTERFACE_USART                1
+#define INTERFACE_USART_CONFIG         "/dev/ttyS0,1500000"
+#define BOOT_DELAY_ADDRESS             0x000001a0
+#define BOARD_TYPE                     7120
+#define _FLASH_KBYTES                  (*(uint32_t *)0x1FF1E880)
+#define BOARD_FLASH_SECTORS            (15)
+#define BOARD_FLASH_SIZE               (_FLASH_KBYTES * 1024)
+
+#define OSC_FREQ                       16
+
+#define BOARD_PIN_LED_ACTIVITY         GPIO_nLED_BLUE // BLUE
+#define BOARD_PIN_LED_BOOTLOADER       GPIO_nLED_GREEN // GREEN
+#define BOARD_LED_ON                   0
+#define BOARD_LED_OFF                  1
+
+#define SERIAL_BREAK_DETECT_DISABLED   1
+
+/*
+ * Uncommenting this allows to force the bootloader through
+ * a PWM output pin. As this can accidentally initialize
+ * an ESC prematurely, it is not recommended. This feature
+ * has not been used and hence defaults now to off.
+ *
+ * # define BOARD_FORCE_BL_PIN_OUT         (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_SET|GPIO_PORTE|GPIO_PIN14)
+ * # define BOARD_FORCE_BL_PIN_IN          (GPIO_INPUT|GPIO_PULLUP|GPIO_PORTE|GPIO_PIN11)
+ *
+ * # define BOARD_POWER_PIN_OUT           (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_SET|GPIO_PORTA|GPIO_PIN4)
+ * # define BOARD_POWER_ON                 1
+ * # define BOARD_POWER_OFF                0
+ * # undef  BOARD_POWER_PIN_RELEASE        // Leave pin enabling Power - un comment to release (disable power)
+ *
+*/
+
+#if !defined(ARCH_SN_MAX_LENGTH)
+# define ARCH_SN_MAX_LENGTH 12
+#endif
+
+#if !defined(APP_RESERVATION_SIZE)
+#  define APP_RESERVATION_SIZE 0
+#endif
+
+#if !defined(BOARD_FIRST_FLASH_SECTOR_TO_ERASE)
+#  define BOARD_FIRST_FLASH_SECTOR_TO_ERASE 1
+#endif
+
+#if !defined(USB_DATA_ALIGN)
+# define USB_DATA_ALIGN
+#endif
+
+#ifndef BOOT_DEVICES_SELECTION
+#  define BOOT_DEVICES_SELECTION USB0_DEV|SERIAL0_DEV|SERIAL1_DEV
+#endif
+
+#ifndef BOOT_DEVICES_FILTER_ONUSB
+#  define BOOT_DEVICES_FILTER_ONUSB USB0_DEV|SERIAL0_DEV|SERIAL1_DEV
+#endif
+
+#endif /* HW_CONFIG_H_ */

boards/accton-godwit/ga1/src/i2c.cpp

@@ -0,0 +1,41 @@
+/****************************************************************************
+ *
+ *   Copyright (C) 2020 PX4 Development Team. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name PX4 nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#include <px4_arch/i2c_hw_description.h>
+
+constexpr px4_i2c_bus_t px4_i2c_buses[I2C_BUS_MAX_BUS_ITEMS] = {
+	initI2CBusExternal(1),
+	initI2CBusExternal(2),
+	initI2CBusExternal(3),
+	initI2CBusInternal(4),
+};

boards/accton-godwit/ga1/src/init.cpp

@@ -0,0 +1,299 @@
+/****************************************************************************
+ *
+ *   Copyright (c) 2012-2022 PX4 Development Team. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name PX4 nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/**
+ * @file init.cpp
+ *
+ * PX4FMU-specific early startup code.  This file implements the
+ * board_app_initialize() function that is called early by nsh during startup.
+ *
+ * Code here is run before the rcS script is invoked; it should start required
+ * subsystems and perform board-specific initialization.
+ */
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include "board_config.h"
+
+#include <stdbool.h>
+#include <stdio.h>
+#include <string.h>
+#include <debug.h>
+#include <errno.h>
+
+#include <nuttx/config.h>
+#include <nuttx/board.h>
+#include <nuttx/spi/spi.h>
+#include <nuttx/sdio.h>
+#include <nuttx/mmcsd.h>
+#include <nuttx/analog/adc.h>
+#include <nuttx/mm/gran.h>
+#include <chip.h>
+#include <stm32_uart.h>
+#include <arch/board/board.h>
+#include "arm_internal.h"
+
+#include <drivers/drv_hrt.h>
+#include <drivers/drv_board_led.h>
+#include <systemlib/px4_macros.h>
+#include <px4_arch/io_timer.h>
+#include <px4_platform_common/init.h>
+#include <px4_platform_common/px4_manifest.h>
+#include <px4_platform/gpio.h>
+#include <px4_platform/board_determine_hw_info.h>
+#include <px4_platform/board_dma_alloc.h>
+#include <px4_platform/gpio/mcp23009.hpp>
+
+/****************************************************************************
+ * Pre-Processor Definitions
+ ****************************************************************************/
+
+/* Configuration ************************************************************/
+
+/*
+ * Ideally we'd be able to get these from arm_internal.h,
+ * but since we want to be able to disable the NuttX use
+ * of leds for system indication at will and there is no
+ * separate switch, we need to build independent of the
+ * CONFIG_ARCH_LEDS configuration switch.
+ */
+__BEGIN_DECLS
+extern void led_init(void);
+extern void led_on(int led);
+extern void led_off(int led);
+__END_DECLS
+
+
+/************************************************************************************
+ * Name: board_peripheral_reset
+ *
+ * Description:
+ *
+ ************************************************************************************/
+__EXPORT void board_peripheral_reset(int ms)
+{
+	/* set the peripheral rails off */
+
+	VDD_5V_PERIPH_EN(false);
+	board_control_spi_sensors_power(false, 0xffff);
+	VDD_3V3_SENSORS4_EN(false);
+
+	bool last = READ_VDD_3V3_SPEKTRUM_POWER_EN();
+	/* Keep Spektum on to discharge rail*/
+	VDD_3V3_SPEKTRUM_POWER_EN(false);
+
+	/* wait for the peripheral rail to reach GND */
+	usleep(ms * 1000);
+	syslog(LOG_DEBUG, "reset done, %d ms\n", ms);
+
+	/* re-enable power */
+
+	/* switch the peripheral rail back on */
+	VDD_3V3_SPEKTRUM_POWER_EN(last);
+	board_control_spi_sensors_power(true, 0xffff);
+	VDD_3V3_SENSORS4_EN(true);
+	VDD_5V_PERIPH_EN(true);
+
+}
+
+/************************************************************************************
+ * Name: board_on_reset
+ *
+ * Description:
+ * Optionally provided function called on entry to board_system_reset
+ * It should perform any house keeping prior to the rest.
+ *
+ * status - 1 if resetting to boot loader
+ *          0 if just resetting
+ *
+ ************************************************************************************/
+__EXPORT void board_on_reset(int status)
+{
+	for (int i = 0; i < DIRECT_PWM_OUTPUT_CHANNELS; ++i) {
+		px4_arch_configgpio(io_timer_channel_get_gpio_output(i));
+	}
+
+	/*
+	 * On resets invoked from system (not boot) ensure we establish a low
+	 * output state on PWM pins to disarm the ESC and prevent the reset from potentially
+	 * spinning up the motors.
+	 */
+	if (status >= 0) {
+		up_mdelay(100);
+	}
+}
+
+/************************************************************************************
+ * Name: stm32_boardinitialize
+ *
+ * Description:
+ *   All STM32 architectures must provide the following entry point.  This entry point
+ *   is called early in the initialization -- after all memory has been configured
+ *   and mapped but before any devices have been initialized.
+ *
+ ************************************************************************************/
+
+extern "C" __EXPORT void
+stm32_boardinitialize(void)
+{
+	board_on_reset(-1); /* Reset PWM first thing */
+
+	/* configure LEDs */
+
+	board_autoled_initialize();
+
+	/* configure pins */
+
+	const uint32_t gpio[] = PX4_GPIO_INIT_LIST;
+	px4_gpio_init(gpio, arraySize(gpio));
+
+	/* configure USB interfaces */
+
+	stm32_usbinitialize();
+
+	VDD_3V3_ETH_POWER_EN(true);
+
+}
+
+/****************************************************************************
+ * Name: board_app_initialize
+ *
+ * Description:
+ *   Perform application specific initialization.  This function is never
+ *   called directly from application code, but only indirectly via the
+ *   (non-standard) boardctl() interface using the command BOARDIOC_INIT.
+ *
+ * Input Parameters:
+ *   arg - The boardctl() argument is passed to the board_app_initialize()
+ *         implementation without modification.  The argument has no
+ *         meaning to NuttX; the meaning of the argument is a contract
+ *         between the board-specific initalization logic and the the
+ *         matching application logic.  The value cold be such things as a
+ *         mode enumeration value, a set of DIP switch switch settings, a
+ *         pointer to configuration data read from a file or serial FLASH,
+ *         or whatever you would like to do with it.  Every implementation
+ *         should accept zero/NULL as a default configuration.
+ *
+ * Returned Value:
+ *   Zero (OK) is returned on success; a negated errno value is returned on
+ *   any failure to indicate the nature of the failure.
+ *
+ ****************************************************************************/
+
+__EXPORT int board_app_initialize(uintptr_t arg)
+{
+#if !defined(BOOTLOADER)
+
+	/* Power on Interfaces */
+	VDD_3V3_SD_CARD_EN(true);
+	VDD_5V_PERIPH_EN(true);
+	VDD_5V_HIPOWER_EN(true);
+	VDD_3V3_SENSORS4_EN(true);
+	VDD_3V3_SPEKTRUM_POWER_EN(true);
+
+	/* Need hrt running before using the ADC */
+
+	px4_platform_init();
+
+	// Use the default HW_VER_REV(0x0,0x0) for Ramtron
+
+	stm32_spiinitialize();
+
+	/* Configure the HW based on the manifest */
+
+	px4_platform_configure();
+	/*
+	if (OK == board_determine_hw_info()) {
+		syslog(LOG_INFO, "[boot] Rev 0x%1x : Ver 0x%1x %s\n", board_get_hw_revision(), board_get_hw_version(),
+		       board_get_hw_type_name());
+
+	} else {
+		syslog(LOG_ERR, "[boot] Failed to read HW revision and version\n");
+	}
+	*/
+	/* Configure the Actual SPI interfaces (after we determined the HW version)  */
+
+	stm32_spiinitialize();
+
+	board_spi_reset(10, 0xffff);
+
+	/* Configure the DMA allocator */
+
+	if (board_dma_alloc_init() < 0) {
+		syslog(LOG_ERR, "[boot] DMA alloc FAILED\n");
+	}
+
+#  if defined(SERIAL_HAVE_RXDMA)
+	// set up the serial DMA polling at 1ms intervals for received bytes that have not triggered a DMA event.
+	static struct hrt_call serial_dma_call;
+	hrt_call_every(&serial_dma_call, 1000, 1000, (hrt_callout)stm32_serial_dma_poll, NULL);
+#  endif
+
+	/* initial LED state */
+	drv_led_start();
+	led_off(LED_RED);
+	led_on(LED_GREEN); // Indicate Power.
+	led_off(LED_BLUE);
+
+	if (board_hardfault_init(2, true) != 0) {
+		led_on(LED_RED);
+	}
+
+	// Ensure Power is off for > 10 mS
+	usleep(15 * 1000);
+	VDD_3V3_SD_CARD_EN(true);
+	usleep(500 * 1000);
+
+#  ifdef CONFIG_MMCSD
+	int ret = stm32_sdio_initialize();
+
+	if (ret != OK) {
+		led_on(LED_RED);
+		return ret;
+	}
+
+#  endif /* CONFIG_MMCSD */
+
+	ret = mcp23009_register_gpios(3, 0x25);
+
+	if (ret != OK) {
+		led_on(LED_RED);
+		return ret;
+	}
+
+#endif /* !defined(BOOTLOADER) */
+
+	return OK;
+}

boards/accton-godwit/ga1/src/led.c

@@ -0,0 +1,235 @@
+/****************************************************************************
+ *
+ *   Copyright (c) 2013 PX4 Development Team. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name PX4 nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/**
+ * @file led.c
+ *
+ * PX4FMU LED backend.
+ */
+
+#include <px4_platform_common/px4_config.h>
+
+#include <stdbool.h>
+
+#include "chip.h"
+#include "stm32_gpio.h"
+#include "board_config.h"
+
+#include <nuttx/board.h>
+#include <arch/board/board.h>
+
+/*
+ * Ideally we'd be able to get these from arm_internal.h,
+ * but since we want to be able to disable the NuttX use
+ * of leds for system indication at will and there is no
+ * separate switch, we need to build independent of the
+ * CONFIG_ARCH_LEDS configuration switch.
+ */
+__BEGIN_DECLS
+extern void led_init(void);
+extern void led_on(int led);
+extern void led_off(int led);
+extern void led_toggle(int led);
+__END_DECLS
+
+#ifdef CONFIG_ARCH_LEDS
+static bool nuttx_owns_leds = true;
+//                                B  R  S  G
+//                                0  1  2  3
+static const uint8_t xlatpx4[] = {1, 2, 4, 0};
+#  define xlat(p) xlatpx4[(p)]
+static uint32_t g_ledmap[] = {
+	GPIO_nLED_GREEN,   // Indexed by BOARD_LED_GREEN
+	GPIO_nLED_BLUE,    // Indexed by BOARD_LED_BLUE
+	GPIO_nLED_RED,     // Indexed by BOARD_LED_RED
+	GPIO_nSAFETY_SWITCH_LED_OUT,  // Indexed by LED_SAFETY by xlatpx4
+};
+
+#else
+
+#  define xlat(p) (p)
+static uint32_t g_ledmap[] = {
+	GPIO_nLED_BLUE,                     // Indexed by LED_BLUE
+	GPIO_nLED_RED,                      // Indexed by LED_RED, LED_AMBER
+	0,                                  // Indexed by LED_SAFETY (defaulted to an input)
+	GPIO_nLED_GREEN,                    // Indexed by LED_GREEN
+};
+
+#endif
+
+__EXPORT void led_init(void)
+{
+	for (size_t l = 0; l < (sizeof(g_ledmap) / sizeof(g_ledmap[0])); l++) {
+		if (g_ledmap[l] != 0) {
+			stm32_configgpio(g_ledmap[l]);
+		}
+	}
+}
+
+static void phy_set_led(int led, bool state)
+{
+	/* Drive Low to switch on */
+
+	if (g_ledmap[led] != 0) {
+		stm32_gpiowrite(g_ledmap[led], !state);
+	}
+}
+
+static bool phy_get_led(int led)
+{
+	/* If Low it is on */
+	if (g_ledmap[led] != 0) {
+		return !stm32_gpioread(g_ledmap[led]);
+	}
+
+	return false;
+}
+
+__EXPORT void led_on(int led)
+{
+	phy_set_led(xlat(led), true);
+}
+
+__EXPORT void led_off(int led)
+{
+	phy_set_led(xlat(led), false);
+}
+
+__EXPORT void led_toggle(int led)
+{
+	phy_set_led(xlat(led), !phy_get_led(xlat(led)));
+}
+
+#ifdef CONFIG_ARCH_LEDS
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: board_autoled_initialize
+ ****************************************************************************/
+
+void board_autoled_initialize(void)
+{
+	led_init();
+}
+
+/****************************************************************************
+ * Name: board_autoled_on
+ ****************************************************************************/
+
+void board_autoled_on(int led)
+{
+	if (!nuttx_owns_leds) {
+		return;
+	}
+
+	switch (led) {
+	default:
+		break;
+
+	case LED_HEAPALLOCATE:
+		phy_set_led(BOARD_LED_BLUE, true);
+		break;
+
+	case LED_IRQSENABLED:
+		phy_set_led(BOARD_LED_BLUE, false);
+		phy_set_led(BOARD_LED_GREEN, true);
+		break;
+
+	case LED_STACKCREATED:
+		phy_set_led(BOARD_LED_GREEN, true);
+		phy_set_led(BOARD_LED_BLUE, true);
+		break;
+
+	case LED_INIRQ:
+		phy_set_led(BOARD_LED_BLUE, true);
+		break;
+
+	case LED_SIGNAL:
+		phy_set_led(BOARD_LED_GREEN, true);
+		break;
+
+	case LED_ASSERTION:
+		phy_set_led(BOARD_LED_RED, true);
+		phy_set_led(BOARD_LED_BLUE, true);
+		break;
+
+	case LED_PANIC:
+		phy_set_led(BOARD_LED_RED, true);
+		break;
+
+	case LED_IDLE : /* IDLE */
+		phy_set_led(BOARD_LED_RED, true);
+		break;
+	}
+}
+
+/****************************************************************************
+ * Name: board_autoled_off
+ ****************************************************************************/
+
+void board_autoled_off(int led)
+{
+	if (!nuttx_owns_leds) {
+		return;
+	}
+
+	switch (led) {
+	default:
+		break;
+
+	case LED_SIGNAL:
+		phy_set_led(BOARD_LED_GREEN, false);
+		break;
+
+	case LED_INIRQ:
+		phy_set_led(BOARD_LED_BLUE, false);
+		break;
+
+	case LED_ASSERTION:
+		phy_set_led(BOARD_LED_RED, false);
+		phy_set_led(BOARD_LED_BLUE, false);
+		break;
+
+	case LED_PANIC:
+		phy_set_led(BOARD_LED_RED, false);
+		break;
+
+	case LED_IDLE : /* IDLE */
+		phy_set_led(BOARD_LED_RED, false);
+		break;
+	}
+}
+
+#endif /* CONFIG_ARCH_LEDS */

boards/accton-godwit/ga1/src/mtd.cpp

@@ -0,0 +1,136 @@
+/****************************************************************************
+ *
+ *   Copyright (C) 2020 PX4 Development Team. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name PX4 nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+#include <board_config.h>
+
+#include <nuttx/spi/spi.h>
+#include <px4_platform_common/px4_manifest.h>
+//                                                              KiB BS    nB
+static const px4_mft_device_t spi5 = {             // FM25V02A on FMUM native: 32K X 8, emulated as (1024 Blocks of 32)
+	.bus_type = px4_mft_device_t::SPI,
+	.devid    = SPIDEV_FLASH(0)
+};
+static const px4_mft_device_t i2c3 = {             // 24LC64T on Base  8K 32 X 256
+	.bus_type = px4_mft_device_t::I2C,
+	.devid    = PX4_MK_I2C_DEVID(3, 0x51)
+};
+static const px4_mft_device_t i2c4 = {             // 24LC64T on IMU   8K 32 X 256
+	.bus_type =  px4_mft_device_t::I2C,
+	.devid    =  PX4_MK_I2C_DEVID(4, 0x50)
+};
+
+
+static const px4_mtd_entry_t fmum_fram = {
+	.device = &spi5,
+	.npart = 1,
+	.partd = {
+		{
+			.type = MTD_PARAMETERS,
+			.path = "/fs/mtd_params",
+			.nblocks = (32768 / (1 << CONFIG_RAMTRON_EMULATE_SECTOR_SHIFT))
+		}
+	},
+};
+
+static const px4_mtd_entry_t base_eeprom = {
+	.device = &i2c3,
+	.npart = 2,
+	.partd = {
+		{
+			.type = MTD_MFT_VER,
+			.path = "/fs/mtd_mft_ver",
+			.nblocks = 248
+		},
+		{
+			.type = MTD_NET,
+			.path = "/fs/mtd_net",
+			.nblocks = 8 // 256 = 32 * 8
+
+		}
+	},
+};
+
+static const px4_mtd_entry_t imu_eeprom = {
+	.device = &i2c4,
+	.npart = 3,
+	.partd = {
+		{
+			.type = MTD_CALDATA,
+			.path = "/fs/mtd_caldata",
+			.nblocks = 240
+		},
+		{
+			.type = MTD_MFT_REV,
+			.path = "/fs/mtd_mft_rev",
+			.nblocks = 8
+		},
+		{
+			.type = MTD_ID,
+			.path = "/fs/mtd_id",
+			.nblocks = 8 // 256 = 32 * 8
+		}
+	},
+};
+
+static const px4_mtd_manifest_t board_mtd_config = {
+	.nconfigs   = 3,
+	.entries = {
+		&fmum_fram,
+		&base_eeprom,
+		&imu_eeprom
+	}
+};
+
+static const px4_mft_entry_s mtd_mft = {
+	.type = MTD,
+	.pmft = (void *) &board_mtd_config,
+};
+
+static const px4_mft_entry_s mft_mft = {
+	.type = MFT,
+	.pmft = (void *) system_query_manifest,
+};
+
+static const px4_mft_s mft = {
+	.nmft = 2,
+	.mfts = {
+		&mtd_mft,
+		&mft_mft,
+	}
+};
+
+const px4_mft_s *board_get_manifest(void)
+{
+	return &mft;
+}

boards/accton-godwit/ga1/src/sdio.c

@@ -0,0 +1,177 @@
+/****************************************************************************
+ *
+ *   Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <gnutt@nuttx.org>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+#include <board_config.h>
+
+#include <stdbool.h>
+#include <stdio.h>
+#include <debug.h>
+#include <errno.h>
+
+#include <nuttx/sdio.h>
+#include <nuttx/mmcsd.h>
+
+#include "chip.h"
+#include "board_config.h"
+#include "stm32_gpio.h"
+#include "stm32_sdmmc.h"
+
+#ifdef CONFIG_MMCSD
+
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* Card detections requires card support and a card detection GPIO */
+
+#define HAVE_NCD   1
+#if !defined(GPIO_SDMMC1_NCD)
+#  undef HAVE_NCD
+#endif
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+static FAR struct sdio_dev_s *sdio_dev;
+#ifdef HAVE_NCD
+static bool g_sd_inserted = 0xff; /* Impossible value */
+#endif
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: stm32_ncd_interrupt
+ *
+ * Description:
+ *   Card detect interrupt handler.
+ *
+ ****************************************************************************/
+
+#ifdef HAVE_NCD
+static int stm32_ncd_interrupt(int irq, FAR void *context)
+{
+	bool present;
+
+	present = !stm32_gpioread(GPIO_SDMMC1_NCD);
+
+	if (sdio_dev && present != g_sd_inserted) {
+		sdio_mediachange(sdio_dev, present);
+		g_sd_inserted = present;
+	}
+
+	return OK;
+}
+#endif
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: stm32_sdio_initialize
+ *
+ * Description:
+ *   Initialize SDIO-based MMC/SD card support
+ *
+ ****************************************************************************/
+
+int stm32_sdio_initialize(void)
+{
+	int ret;
+
+#ifdef HAVE_NCD
+	/* Card detect */
+
+	bool cd_status;
+
+	/* Configure the card detect GPIO */
+
+	stm32_configgpio(GPIO_SDMMC1_NCD);
+
+	/* Register an interrupt handler for the card detect pin */
+
+	stm32_gpiosetevent(GPIO_SDMMC1_NCD, true, true, true, stm32_ncd_interrupt);
+#endif
+
+	/* Mount the SDIO-based MMC/SD block driver */
+	/* First, get an instance of the SDIO interface */
+
+	finfo("Initializing SDIO slot %d\n", SDIO_SLOTNO);
+
+	sdio_dev = sdio_initialize(SDIO_SLOTNO);
+
+	if (!sdio_dev) {
+		syslog(LOG_ERR, "[boot] Failed to initialize SDIO slot %d\n", SDIO_SLOTNO);
+		return -ENODEV;
+	}
+
+	/* Now bind the SDIO interface to the MMC/SD driver */
+
+	finfo("Bind SDIO to the MMC/SD driver, minor=%d\n", SDIO_MINOR);
+
+	ret = mmcsd_slotinitialize(SDIO_MINOR, sdio_dev);
+
+	if (ret != OK) {
+		syslog(LOG_ERR, "[boot] Failed to bind SDIO to the MMC/SD driver: %d\n", ret);
+		return ret;
+	}
+
+	finfo("Successfully bound SDIO to the MMC/SD driver\n");
+
+#ifdef HAVE_NCD
+	/* Use SD card detect pin to check if a card is g_sd_inserted */
+
+	cd_status = !stm32_gpioread(GPIO_SDMMC1_NCD);
+	finfo("Card detect : %d\n", cd_status);
+
+	sdio_mediachange(sdio_dev, cd_status);
+#else
+	/* Assume that the SD card is inserted.  What choice do we have? */
+
+	sdio_mediachange(sdio_dev, true);
+#endif
+
+	return OK;
+}
+
+#endif /* CONFIG_MMCSD */

boards/accton-godwit/ga1/src/spi.cpp

@@ -0,0 +1,63 @@
+/****************************************************************************
+ *
+ *   Copyright (C) 2020, 2022 PX4 Development Team. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name PX4 nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#include <px4_arch/spi_hw_description.h>
+#include <drivers/drv_sensor.h>
+#include <nuttx/spi/spi.h>
+
+constexpr px4_spi_bus_t px4_spi_buses[SPI_BUS_MAX_BUS_ITEMS] = {
+	initSPIBus(SPI::Bus::SPI1, {
+		initSPIDevice(DRV_IMU_DEVTYPE_ICM42688P, SPI::CS{GPIO::PortI, GPIO::Pin9}, SPI::DRDY{GPIO::PortF, GPIO::Pin2}),
+	}, {GPIO::PortI, GPIO::Pin11}),
+	initSPIBus(SPI::Bus::SPI2, {
+		initSPIDevice(DRV_IMU_DEVTYPE_ICM42688P, SPI::CS{GPIO::PortH, GPIO::Pin5}, SPI::DRDY{GPIO::PortA, GPIO::Pin10}),
+	}, {GPIO::PortF, GPIO::Pin4}),
+	initSPIBus(SPI::Bus::SPI3, {
+		initSPIDevice(DRV_GYR_DEVTYPE_BMI088, SPI::CS{GPIO::PortI, GPIO::Pin8}, SPI::DRDY{GPIO::PortI, GPIO::Pin7}),
+		initSPIDevice(DRV_ACC_DEVTYPE_BMI088, SPI::CS{GPIO::PortI, GPIO::Pin4}),
+	}, {GPIO::PortE, GPIO::Pin7}),
+	//  initSPIBus(SPI::Bus::SPI4, {
+	//    // no devices
+	// TODO: if enabled, remove GPIO_VDD_3V3_SENSORS4_EN from board_config.h
+	//  }, {GPIO::PortG, GPIO::Pin8}),
+	initSPIBus(SPI::Bus::SPI5, {
+		initSPIDevice(SPIDEV_FLASH(0), SPI::CS{GPIO::PortG, GPIO::Pin7})
+	}),
+	initSPIBusExternal(SPI::Bus::SPI6, {
+		initSPIConfigExternal(SPI::CS{GPIO::PortI, GPIO::Pin10}, SPI::DRDY{GPIO::PortD, GPIO::Pin11}),
+		initSPIConfigExternal(SPI::CS{GPIO::PortA, GPIO::Pin15}, SPI::DRDY{GPIO::PortD, GPIO::Pin12}),
+	}),
+
+};
+
+static constexpr bool unused = validateSPIConfig(px4_spi_buses);