* feat: configurable board pwm freq from Kconfig
* feat: add board_pwm_config to submenu
* fix: define sequence correction
* fix: revert Tools/simulation/gz
* fix: track upstream gz
* fix: track upstream mavlink
* feat: adjustable pwm for multiple board types
* feat: add conditional check for CONFIG_ for correct fallback
* add: spacecraft board with correct BOARD_PWM_FREQ supporting 10Hz actuation rate
* fix: set dependencies for submenu arch chips
* fix: keep only upper arch level
* fix: proper checking - still not showing up for board config
* feat: add hidden kconfig for platforms
* Merge Nuttx config into px4board
Allows to expose nuttx into PX4 if needed
* Kconfig: Include nuttx symbols in updateconfig
Only if applicable i.e. defined in the kconfig
* fix: merged config with previously generated boardconfig
* doc: updated code comment
---------
Co-authored-by: Daniel Agar <daniel@agar.ca>
Co-authored-by: Peter van der Perk <peter.vanderperk@nxp.com>
I don't think we have a way to explicitly detect if BAT1 or BAT2
"bricks" are correct, so we have to assume they are, and rely on the
voltage/current shown.
Additionally, we can now power cycle sensor power.
- split up old module into two, one handling setpoint generation, one control
- add lateral and longitudinal control setpoints topics that can also be
injected from companion computer
- add configuration topics that (optionally) configure the controller
with limits and momentary settings
Signed-off-by: RomanBapst <bapstroman@gmail.com>
* adis16507: enhance driver to handle and recover from all failure modes
- Clean up driver
- Add optional hardware reset
- Fix scale and range for 125 deg/s variant
- Handle communication errors when read returns zeroes
- Improved perf counters
* change prints to PX4_DEBUG, define BURST_READ_CMD, do both soft and hard reset, use ScheduleNow instead of 1ms delay, change read/write stall period to SPI_STALL value
* hrt: Fix PPM input on channel 2
The CCMR1_PPM define for PPM input on channel 2 was incorrectly set to 2,
which was setting bits for channel 1 instead of channel 2. This prevented
PPM input from functioning properly on channel 2.
Changed CCMR1_PPM for channel 2 from 2 to (1 << 8), which correctly
configures the CC2S bits for input capture mode on TI2.
This fixes an issue noted in the existing code comment:
"FIXME! There is an interaction in the CCMR registers that prevents
using Chan 1 as the timer and chan 2 as the PPM"
Tested on STM32H743 with PPM input on PC7 (TIM8_CH2).
* rc_input: enable sharing serial and PPM pin
By setting RC_SERIAL_PORT_SHARED_PPM_PIN_GPIO_RX it is now possible to
use the same pin on the STM32 for PPM input as well as serial input.
* boards: Add support for Holybro KakuteH7-Wing