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Fix typos in comments (#24681)

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This commit is contained in:
co63oc 2025-04-09 08:47:58 +08:00 committed by GitHub
parent 03345db36e
commit f4cfee6f72
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GPG Key ID: B5690EEEBB952194
53 changed files with 66 additions and 66 deletions
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2
boards/airmind/mindpx-v2/src/init.c
View File

@ -129,7 +129,7 @@ __EXPORT void board_on_reset(int status)
*
* Description:
* All STM32 architectures must provide the following entry point. This entry point
* is called early in the intitialization -- after all memory has been configured
* is called early in the initialization -- after all memory has been configured
* and mapped but before any devices have been initialized.
*
************************************************************************************/

2
boards/ark/can-flow-mr/src/led.c
View File

@ -67,7 +67,7 @@ void rgb_led(int r, int g, int b, int freqs)
if (!once) {
once = 1;
/* Enabel Clock to Block */
/* Enable Clock to Block */
modifyreg32(STM32_RCC_APB2ENR, 0, RCC_APB2ENR_TIM1EN);
/* Reload */

2
boards/ark/can-gps/src/led.c
View File

@ -67,7 +67,7 @@ void rgb_led(int r, int g, int b, int freqs)
if (!once) {
once = 1;
/* Enabel Clock to Block */
/* Enable Clock to Block */
modifyreg32(STM32_RCC_APB2ENR, 0, RCC_APB2ENR_TIM1EN);
/* Reload */

2
boards/ark/can-rtk-gps/src/led.c
View File

@ -67,7 +67,7 @@ void rgb_led(int r, int g, int b, int freqs)
if (!once) {
once = 1;
/* Enabel Clock to Block */
/* Enable Clock to Block */
modifyreg32(STM32_RCC_APB2ENR, 0, RCC_APB2ENR_TIM1EN);
/* Reload */

2
boards/ark/cannode/src/led.c
View File

@ -67,7 +67,7 @@ void rgb_led(int r, int g, int b, int freqs)
if (!once) {
once = 1;
/* Enabel Clock to Block */
/* Enable Clock to Block */
modifyreg32(STM32_RCC_APB2ENR, 0, RCC_APB2ENR_TIM1EN);
/* Reload */

2
boards/ark/septentrio-gps/src/led.c
View File

@ -67,7 +67,7 @@ void rgb_led(int r, int g, int b, int freqs)
if (!once) {
once = 1;
/* Enabel Clock to Block */
/* Enable Clock to Block */
modifyreg32(STM32_RCC_APB2ENR, 0, RCC_APB2ENR_TIM1EN);
/* Reload */

2
boards/ark/teseo-gps/src/led.c
View File

@ -67,7 +67,7 @@ void rgb_led(int r, int g, int b, int freqs)
if (!once) {
once = 1;
/* Enabel Clock to Block */
/* Enable Clock to Block */
modifyreg32(STM32_RCC_APB2ENR, 0, RCC_APB2ENR_TIM1EN);
/* Reload */

2
boards/bitcraze/crazyflie/src/init.c
View File

@ -100,7 +100,7 @@ __END_DECLS
*
* Description:
* All STM32 architectures must provide the following entry point. This entry point
* is called early in the intitialization -- after all memory has been configured
* is called early in the initialization -- after all memory has been configured
* and mapped but before any devices have been initialized.
*
************************************************************************************/

2
boards/bitcraze/crazyflie21/src/init.c
View File

@ -100,7 +100,7 @@ __END_DECLS
*
* Description:
* All STM32 architectures must provide the following entry point. This entry point
* is called early in the intitialization -- after all memory has been configured
* is called early in the initialization -- after all memory has been configured
* and mapped but before any devices have been initialized.
*
************************************************************************************/

2
boards/cubepilot/io-v2/src/init.c
View File

@ -77,7 +77,7 @@
*
* Description:
* All STM32 architectures must provide the following entry point. This entry point
* is called early in the intitialization -- after all memory has been configured
* is called early in the initialization -- after all memory has been configured
* and mapped but before any devices have been initialized.
*
************************************************************************************/

2
boards/hkust/nxt-dual/nuttx-config/scripts/bootloader_script.ld
View File

@ -59,7 +59,7 @@
* 2) BOOT=1: Boot address defined by user option byte BOOT_ADD1[15:0].
* ST programmed value: System bootloader at 0x1FF0:0000
*
* The Durandal has a Swtich on board, the BOOT0 pin is at ground so by default,
* The Durandal has a Switch on board, the BOOT0 pin is at ground so by default,
* the STM32 will boot to address 0x0800:0000 in FLASH unless the swiutch is
* drepresed, then the boot will be from 0x1FF0:0000
*

2
boards/hkust/nxt-dual/src/manifest.c
View File

@ -62,7 +62,7 @@
typedef struct {
uint32_t hw_ver_rev; /* the version and revision */
const px4_hw_mft_item_t *mft; /* The first entry */
uint32_t entries; /* the lenght of the list */
uint32_t entries; /* the length of the list */
} px4_hw_mft_list_entry_t;
typedef px4_hw_mft_list_entry_t *px4_hw_mft_list_entry;

2
boards/hkust/nxt-v1/nuttx-config/scripts/bootloader_script.ld
View File

@ -59,7 +59,7 @@
* 2) BOOT=1: Boot address defined by user option byte BOOT_ADD1[15:0].
* ST programmed value: System bootloader at 0x1FF0:0000
*
* The Durandal has a Swtich on board, the BOOT0 pin is at ground so by default,
* The Durandal has a Switch on board, the BOOT0 pin is at ground so by default,
* the STM32 will boot to address 0x0800:0000 in FLASH unless the swiutch is
* drepresed, then the boot will be from 0x1FF0:0000
*

2
boards/holybro/can-gps-v1/src/manifest.c
View File

@ -62,7 +62,7 @@
typedef struct {
uint32_t hw_ver_rev; /* the version and revision */
const px4_hw_mft_item_t *mft; /* The first entry */
uint32_t entries; /* the lenght of the list */
uint32_t entries; /* the length of the list */
} px4_hw_mft_list_entry_t;
typedef px4_hw_mft_list_entry_t *px4_hw_mft_list_entry;

2
boards/holybro/durandal-v1/nuttx-config/scripts/bootloader_script.ld
View File

@ -59,7 +59,7 @@
* 2) BOOT=1: Boot address defined by user option byte BOOT_ADD1[15:0].
* ST programmed value: System bootloader at 0x1FF0:0000
*
* The Durandal has a Swtich on board, the BOOT0 pin is at ground so by default,
* The Durandal has a Switch on board, the BOOT0 pin is at ground so by default,
* the STM32 will boot to address 0x0800:0000 in FLASH unless the swiutch is
* drepresed, then the boot will be from 0x1FF0:0000
*

2
boards/holybro/durandal-v1/nuttx-config/scripts/script.ld
View File

@ -59,7 +59,7 @@
* 2) BOOT=1: Boot address defined by user option byte BOOT_ADD1[15:0].
* ST programmed value: System bootloader at 0x1FF0:0000
*
* The Durandal has a Swtich on board, the BOOT0 pin is at ground so by default,
* The Durandal has a Switch on board, the BOOT0 pin is at ground so by default,
* the STM32 will boot to address 0x0800:0000 in FLASH unless the swiutch is
* drepresed, then the boot will be from 0x1FF0:0000
*

2
boards/holybro/durandal-v1/src/manifest.c
View File

@ -62,7 +62,7 @@
typedef struct {
uint32_t hw_ver_rev; /* the version and revision */
const px4_hw_mft_item_t *mft; /* The first entry */
uint32_t entries; /* the lenght of the list */
uint32_t entries; /* the length of the list */
} px4_hw_mft_list_entry_t;
typedef px4_hw_mft_list_entry_t *px4_hw_mft_list_entry;

2
boards/holybro/pix32v5/src/manifest.c
View File

@ -62,7 +62,7 @@
typedef struct {
uint32_t hw_ver_rev; /* the version and revision */
const px4_hw_mft_item_t *mft; /* The first entry */
uint32_t entries; /* the lenght of the list */
uint32_t entries; /* the length of the list */
} px4_hw_mft_list_entry_t;
typedef px4_hw_mft_list_entry_t *px4_hw_mft_list_entry;

2
boards/matek/gnss-m9n-f4/src/led.c
View File

@ -71,7 +71,7 @@ void rgb_led(int r, int g, int b, int freqs)
if (!once) {
once = 1;
/* Enabel Clock to Block */
/* Enable Clock to Block */
modifyreg32(STM32_RCC_APB2ENR, 0, RCC_APB2ENR_TIM1EN);
/* Reload */

2
boards/matek/h743-mini/nuttx-config/scripts/bootloader_script.ld
View File

@ -59,7 +59,7 @@
* 2) BOOT=1: Boot address defined by user option byte BOOT_ADD1[15:0].
* ST programmed value: System bootloader at 0x1FF0:0000
*
* The Durandal has a Swtich on board, the BOOT0 pin is at ground so by default,
* The Durandal has a Switch on board, the BOOT0 pin is at ground so by default,
* the STM32 will boot to address 0x0800:0000 in FLASH unless the swiutch is
* drepresed, then the boot will be from 0x1FF0:0000
*

2
boards/matek/h743-slim/nuttx-config/scripts/bootloader_script.ld
View File

@ -59,7 +59,7 @@
* 2) BOOT=1: Boot address defined by user option byte BOOT_ADD1[15:0].
* ST programmed value: System bootloader at 0x1FF0:0000
*
* The Durandal has a Swtich on board, the BOOT0 pin is at ground so by default,
* The Durandal has a Switch on board, the BOOT0 pin is at ground so by default,
* the STM32 will boot to address 0x0800:0000 in FLASH unless the swiutch is
* drepresed, then the boot will be from 0x1FF0:0000
*

2
boards/matek/h743/nuttx-config/scripts/bootloader_script.ld
View File

@ -59,7 +59,7 @@
* 2) BOOT=1: Boot address defined by user option byte BOOT_ADD1[15:0].
* ST programmed value: System bootloader at 0x1FF0:0000
*
* The Durandal has a Swtich on board, the BOOT0 pin is at ground so by default,
* The Durandal has a Switch on board, the BOOT0 pin is at ground so by default,
* the STM32 will boot to address 0x0800:0000 in FLASH unless the swiutch is
* drepresed, then the boot will be from 0x1FF0:0000
*

2
boards/micoair/h743-aio/nuttx-config/scripts/bootloader_script.ld
View File

@ -59,7 +59,7 @@
* 2) BOOT=1: Boot address defined by user option byte BOOT_ADD1[15:0].
* ST programmed value: System bootloader at 0x1FF0:0000
*
* The Durandal has a Swtich on board, the BOOT0 pin is at ground so by default,
* The Durandal has a Switch on board, the BOOT0 pin is at ground so by default,
* the STM32 will boot to address 0x0800:0000 in FLASH unless the swiutch is
* drepresed, then the boot will be from 0x1FF0:0000
*

2
boards/micoair/h743-v2/nuttx-config/scripts/bootloader_script.ld
View File

@ -59,7 +59,7 @@
* 2) BOOT=1: Boot address defined by user option byte BOOT_ADD1[15:0].
* ST programmed value: System bootloader at 0x1FF0:0000
*
* The Durandal has a Swtich on board, the BOOT0 pin is at ground so by default,
* The Durandal has a Switch on board, the BOOT0 pin is at ground so by default,
* the STM32 will boot to address 0x0800:0000 in FLASH unless the swiutch is
* drepresed, then the boot will be from 0x1FF0:0000
*

2
boards/micoair/h743/nuttx-config/scripts/bootloader_script.ld
View File

@ -59,7 +59,7 @@
* 2) BOOT=1: Boot address defined by user option byte BOOT_ADD1[15:0].
* ST programmed value: System bootloader at 0x1FF0:0000
*
* The Durandal has a Swtich on board, the BOOT0 pin is at ground so by default,
* The Durandal has a Switch on board, the BOOT0 pin is at ground so by default,
* the STM32 will boot to address 0x0800:0000 in FLASH unless the swiutch is
* drepresed, then the boot will be from 0x1FF0:0000
*

2
boards/modalai/fc-v1/src/manifest.c
View File

@ -62,7 +62,7 @@
typedef struct {
uint32_t hw_ver_rev; /* the version and revision */
const px4_hw_mft_item_t *mft; /* The first entry */
uint32_t entries; /* the lenght of the list */
uint32_t entries; /* the length of the list */
} px4_hw_mft_list_entry_t;
typedef px4_hw_mft_list_entry_t *px4_hw_mft_list_entry;

2
boards/modalai/fc-v2/src/manifest.c
View File

@ -62,7 +62,7 @@
typedef struct {
uint32_t hw_ver_rev; /* the version and revision */
const px4_hw_mft_item_t *mft; /* The first entry */
uint32_t entries; /* the lenght of the list */
uint32_t entries; /* the length of the list */
} px4_hw_mft_list_entry_t;
typedef px4_hw_mft_list_entry_t *px4_hw_mft_list_entry;

2
boards/modalai/voxl2-io/src/init.c
View File

@ -77,7 +77,7 @@
*
* Description:
* All STM32 architectures must provide the following entry point. This entry point
* is called early in the intitialization -- after all memory has been configured
* is called early in the initialization -- after all memory has been configured
* and mapped but before any devices have been initialized.
*
************************************************************************************/

2
boards/mro/x21/src/init.c
View File

@ -154,7 +154,7 @@ __EXPORT void board_peripheral_reset(int ms)
*
* Description:
* All STM32 architectures must provide the following entry point. This entry point
* is called early in the intitialization -- after all memory has been configured
* is called early in the initialization -- after all memory has been configured
* and mapped but before any devices have been initialized.
*
************************************************************************************/

2
boards/nxp/fmuk66-e/nuttx-config/include/board.h
View File

@ -517,7 +517,7 @@ extern "C"
*
* Description:
* All kinetis architectures must provide the following entry point. This entry point
* is called early in the intitialization -- after all memory has been configured
* is called early in the initialization -- after all memory has been configured
* and mapped but before any devices have been initialized.
*
************************************************************************************/

4
boards/nxp/fmuk66-e/src/board_config.h
View File

@ -120,7 +120,7 @@ __END_DECLS
#define GPIO_SPEKTRUM_P_EN (GPIO_HIGHDRIVE | GPIO_OUTPUT_ONE | PIN_PORTA | PIN7)
/* For binding the Spektrum 3-pin interfaces is used with it TX (output)
* as an input Therefore we drive are UARTx_RX (normaly an input) as an
* as an input Therefore we drive are UARTx_RX (normally an input) as an
* output
*/
@ -289,7 +289,7 @@ __END_DECLS
#define GPIO_USB_VBUS_VALID /* PTE8 */ (GPIO_PULLUP | PIN_PORTE | PIN8)
/* PWM input driver. Use FMU PWM14 pin
* todo:desing this
* todo:design this
*/
#define PWMIN_TIMER 0
#define PWMIN_TIMER_CHANNEL 2

2
boards/nxp/fmuk66-e/src/init.c
View File

@ -171,7 +171,7 @@ __EXPORT void board_peripheral_reset(int ms)
*
* Description:
* All Kinetis architectures must provide the following entry point. This entry point
* is called early in the intitialization -- after all memory has been configured
* is called early in the initialization -- after all memory has been configured
* and mapped but before any devices have been initialized.
*
************************************************************************************/

2
boards/nxp/fmuk66-v3/nuttx-config/include/board.h
View File

@ -513,7 +513,7 @@ extern "C"
*
* Description:
* All kinetis architectures must provide the following entry point. This entry point
* is called early in the intitialization -- after all memory has been configured
* is called early in the initialization -- after all memory has been configured
* and mapped but before any devices have been initialized.
*
************************************************************************************/

4
boards/nxp/fmuk66-v3/src/board_config.h
View File

@ -120,7 +120,7 @@ __END_DECLS
#define GPIO_SPEKTRUM_P_EN (GPIO_HIGHDRIVE | GPIO_OUTPUT_ONE | PIN_PORTA | PIN7)
/* For binding the Spektrum 3-pin interfaces is used with it TX (output)
* as an input Therefore we drive are UARTx_RX (normaly an input) as an
* as an input Therefore we drive are UARTx_RX (normally an input) as an
* output
*/
@ -293,7 +293,7 @@ __END_DECLS
#define GPIO_USB_VBUS_VALID /* PTE8 */ (GPIO_PULLUP | PIN_PORTE | PIN8)
/* PWM input driver. Use FMU PWM14 pin
* todo:desing this
* todo:design this
*/
#define PWMIN_TIMER 0
#define PWMIN_TIMER_CHANNEL 2

2
boards/nxp/fmuk66-v3/src/init.c
View File

@ -171,7 +171,7 @@ __EXPORT void board_peripheral_reset(int ms)
*
* Description:
* All Kinetis architectures must provide the following entry point. This entry point
* is called early in the intitialization -- after all memory has been configured
* is called early in the initialization -- after all memory has been configured
* and mapped but before any devices have been initialized.
*
************************************************************************************/

12
boards/nxp/mr-canhubk3/src/s32k3xx_bringup.c
View File

@ -119,7 +119,7 @@ int s32k3xx_bringup(void)
PX4_ERR("btn_lower_initialize() failed: %d", ret);
} else {
PX4_INFO("btn_lower_initialize() succesful");
PX4_INFO("btn_lower_initialize() successful");
}
#endif
@ -133,7 +133,7 @@ int s32k3xx_bringup(void)
PX4_ERR("userled_lower_initialize() failed: %d", ret);
} else {
PX4_INFO("userled_lower_initialize() succesful");
PX4_INFO("userled_lower_initialize() successful");
}
#endif
@ -224,7 +224,7 @@ int s32k3xx_bringup(void)
PX4_ERR("nxffs_initialize() failed: %d", ret);
} else {
PX4_INFO("nxffs_initialize() succesful");
PX4_INFO("nxffs_initialize() successful");
/* Mount the file system at /mnt/qspi */
@ -234,7 +234,7 @@ int s32k3xx_bringup(void)
PX4_ERR("nx_mount() failed: %d", ret);
} else {
PX4_INFO("nx_mount() succesful");
PX4_INFO("nx_mount() successful");
}
}
@ -250,7 +250,7 @@ int s32k3xx_bringup(void)
# ifdef CONFIG_BCH
else {
PX4_INFO("ftl_initialize() succesful");
PX4_INFO("ftl_initialize() successful");
/* Use the minor number to create device paths */
@ -267,7 +267,7 @@ int s32k3xx_bringup(void)
PX4_ERR("bchdev_register %s failed: %d", chardev, ret);
} else {
PX4_INFO("bchdev_register %s succesful", chardev);
PX4_INFO("bchdev_register %s successful", chardev);
}
}

14
boards/nxp/mr-canhubk3/src/s32k3xx_selftest.c
View File

@ -85,7 +85,7 @@ static int s32k3xx_selftest_se050(void)
lpi2c1 = s32k3xx_i2cbus_initialize(1);
if (lpi2c1 != NULL) {
_info("s32k3xx_i2cbus_initialize() succesful\n");
_info("s32k3xx_i2cbus_initialize() successful\n");
} else {
error = true;
@ -105,7 +105,7 @@ static int s32k3xx_selftest_se050(void)
ret = I2C_TRANSFER(lpi2c1, &se050_msg, 1);
if (ret == 0) {
_info("SE050 ACK succesful\n");
_info("SE050 ACK successful\n");
} else {
error = true;
@ -119,7 +119,7 @@ static int s32k3xx_selftest_se050(void)
ret = s32k3xx_i2cbus_uninitialize(lpi2c1);
if (ret == 0) {
_info("s32k3xx_i2cbus_uninitialize() succesful\n");
_info("s32k3xx_i2cbus_uninitialize() successful\n");
/* Return error if we had any earlier, otherwise return result of
* s32k3xx_i2cbus_uninitialize()
@ -232,7 +232,7 @@ static int s32k3xx_selftest_can(void)
for (i = 0; i < 4; i++) {
if (s32k3xx_gpioread(errn_pins[i])) {
_info("CAN%d flag check succesful\n", i);
_info("CAN%d flag check successful\n", i);
} else {
error = true;
@ -333,7 +333,7 @@ static int s32k3xx_selftest_sct(void)
for (i = 4; i < 6; i++) {
if (s32k3xx_gpioread(rxd_pins[i - 4])) {
_info("CAN%d RXD high check succesful\n", i);
_info("CAN%d RXD high check successful\n", i);
} else {
error = true;
@ -355,7 +355,7 @@ static int s32k3xx_selftest_sct(void)
for (i = 4; i < 6; i++) {
if (!s32k3xx_gpioread(rxd_pins[i - 4])) {
_info("CAN%d RXD low check succesful\n", i);
_info("CAN%d RXD low check successful\n", i);
} else {
error = true;
@ -432,7 +432,7 @@ void s32k3xx_selftest(void)
#endif
if (!error) {
_info("s32k3xx_selftest() succesful\n");
_info("s32k3xx_selftest() successful\n");
}
}

2
boards/nxp/mr-canhubk3/src/s32k3xx_tja1153.c
View File

@ -318,7 +318,7 @@ int s32k3xx_tja1153_initialize(int bus)
}
close(sock);
_info("CAN%d TJA1153 configuration succesful\n", bus);
_info("CAN%d TJA1153 configuration successful\n", bus);
return 0;
}

2
boards/px4/fmu-v2/src/init.c
View File

@ -300,7 +300,7 @@ __EXPORT int board_get_hw_revision()
*
* Description:
* All STM32 architectures must provide the following entry point. This entry point
* is called early in the intitialization -- after all memory has been configured
* is called early in the initialization -- after all memory has been configured
* and mapped but before any devices have been initialized.
*
************************************************************************************/

2
boards/px4/fmu-v2/src/manifest.c
View File

@ -63,7 +63,7 @@
typedef struct {
uint32_t hw_ver_rev; /* the version and revision */
const px4_hw_mft_item_t *mft; /* The first entry */
uint32_t entries; /* the lenght of the list */
uint32_t entries; /* the length of the list */
} px4_hw_mft_list_entry_t;
typedef px4_hw_mft_list_entry_t *px4_hw_mft_list_entry;

2
boards/px4/fmu-v3/src/init.c
View File

@ -300,7 +300,7 @@ __EXPORT int board_get_hw_revision()
*
* Description:
* All STM32 architectures must provide the following entry point. This entry point
* is called early in the intitialization -- after all memory has been configured
* is called early in the initialization -- after all memory has been configured
* and mapped but before any devices have been initialized.
*
************************************************************************************/

2
boards/px4/fmu-v3/src/manifest.c
View File

@ -63,7 +63,7 @@
typedef struct {
uint32_t hw_ver_rev; /* the version and revision */
const px4_hw_mft_item_t *mft; /* The first entry */
uint32_t entries; /* the lenght of the list */
uint32_t entries; /* the length of the list */
} px4_hw_mft_list_entry_t;
typedef px4_hw_mft_list_entry_t *px4_hw_mft_list_entry;

2
boards/px4/fmu-v5/src/manifest.c
View File

@ -62,7 +62,7 @@
typedef struct {
uint32_t hw_ver_rev; /* the version and revision */
const px4_hw_mft_item_t *mft; /* The first entry */
uint32_t entries; /* the lenght of the list */
uint32_t entries; /* the length of the list */
} px4_hw_mft_list_entry_t;
typedef px4_hw_mft_list_entry_t *px4_hw_mft_list_entry;

2
boards/px4/fmu-v6c/src/manifest.c
View File

@ -62,7 +62,7 @@
typedef struct {
uint32_t hw_ver_rev; /* the version and revision */
const px4_hw_mft_item_t *mft; /* The first entry */
uint32_t entries; /* the lenght of the list */
uint32_t entries; /* the length of the list */
} px4_hw_mft_list_entry_t;
typedef px4_hw_mft_list_entry_t *px4_hw_mft_list_entry;

2
boards/px4/fmu-v6u/src/manifest.c
View File

@ -62,7 +62,7 @@
typedef struct {
uint32_t hw_ver_rev; /* the version and revision */
const px4_hw_mft_item_t *mft; /* The first entry */
uint32_t entries; /* the lenght of the list */
uint32_t entries; /* the length of the list */
} px4_hw_mft_list_entry_t;
typedef px4_hw_mft_list_entry_t *px4_hw_mft_list_entry;

2
boards/px4/io-v2/src/init.c
View File

@ -77,7 +77,7 @@
*
* Description:
* All STM32 architectures must provide the following entry point. This entry point
* is called early in the intitialization -- after all memory has been configured
* is called early in the initialization -- after all memory has been configured
* and mapped but before any devices have been initialized.
*
************************************************************************************/

2
boards/siyi/n7/src/manifest.c
View File

@ -62,7 +62,7 @@
typedef struct {
uint32_t hw_ver_rev; /* the version and revision */
const px4_hw_mft_item_t *mft; /* The first entry */
uint32_t entries; /* the lenght of the list */
uint32_t entries; /* the length of the list */
} px4_hw_mft_list_entry_t;
typedef px4_hw_mft_list_entry_t *px4_hw_mft_list_entry;

2
boards/sky-drones/smartap-airlink/src/manifest.c
View File

@ -62,7 +62,7 @@
typedef struct {
uint32_t hw_ver_rev; /* the version and revision */
const px4_hw_mft_item_t *mft; /* The first entry */
uint32_t entries; /* the lenght of the list */
uint32_t entries; /* the length of the list */
} px4_hw_mft_list_entry_t;
typedef px4_hw_mft_list_entry_t *px4_hw_mft_list_entry;

2
boards/spracing/h7extreme/nuttx-config/scripts/script.ld
View File

@ -61,7 +61,7 @@
* 2) BOOT=1: Boot address defined by user option byte BOOT_ADD1[15:0].
* ST programmed value: System bootloader at 0x1FF0:0000
*
* The SP Racing H7 Extreme has a Swtich on board, the BOOT0 pin is at ground so by default,
* The SP Racing H7 Extreme has a Switch on board, the BOOT0 pin is at ground so by default,
* the STM32 will boot to address 0x0800:0000 in FLASH unless the swiutch is
* drepresed, then the boot will be from 0x1FF0:0000
*

2
boards/thepeach/k1/src/init.c
View File

@ -154,7 +154,7 @@ __EXPORT void board_peripheral_reset(int ms)
*
* Description:
* All STM32 architectures must provide the following entry point. This entry point
* is called early in the intitialization -- after all memory has been configured
* is called early in the initialization -- after all memory has been configured
* and mapped but before any devices have been initialized.
*
************************************************************************************/

2
boards/thepeach/r1/src/init.c
View File

@ -154,7 +154,7 @@ __EXPORT void board_peripheral_reset(int ms)
*
* Description:
* All STM32 architectures must provide the following entry point. This entry point
* is called early in the intitialization -- after all memory has been configured
* is called early in the initialization -- after all memory has been configured
* and mapped but before any devices have been initialized.
*
************************************************************************************/

2
boards/x-mav/ap-h743v2/nuttx-config/scripts/bootloader_script.ld
View File

@ -59,7 +59,7 @@
* 2) BOOT=1: Boot address defined by user option byte BOOT_ADD1[15:0].
* ST programmed value: System bootloader at 0x1FF0:0000
*
* The Durandal has a Swtich on board, the BOOT0 pin is at ground so by default,
* The Durandal has a Switch on board, the BOOT0 pin is at ground so by default,
* the STM32 will boot to address 0x0800:0000 in FLASH unless the swiutch is
* drepresed, then the boot will be from 0x1FF0:0000
*

2
boards/x-mav/ap-h743v2/src/manifest.c
View File

@ -62,7 +62,7 @@
typedef struct {
uint32_t hw_ver_rev; /* the version and revision */
const px4_hw_mft_item_t *mft; /* The first entry */
uint32_t entries; /* the lenght of the list */
uint32_t entries; /* the length of the list */
} px4_hw_mft_list_entry_t;
typedef px4_hw_mft_list_entry_t *px4_hw_mft_list_entry;