3829 Commits

Author SHA1 Message Date
David Sidrane
36d4619045 nxphlite-v3:Define RGB LED timer assignments 2017-10-04 04:49:35 -10:00
David Sidrane
9c7fd0ab9c nxphlite-v3:Use LED D9 and D10, remove RGB LEDs (going to PWM) 2017-10-04 04:49:35 -10:00
David Sidrane
f68da76701 kinetis:PWM LED driver 2017-10-04 04:49:35 -10:00
David Sidrane
e11af2bc27 fmu:Add PWM6 mode for nxphlite v3.5 2017-10-04 04:49:35 -10:00
David Sidrane
2eaf0c8c0a fxos8700cq:Drop SCLK to 1 Mhz 2017-10-04 04:49:35 -10:00
David Sidrane
812128d565 nxphlite-v3:V3.5 HW changes 2017-10-04 04:49:35 -10:00
Beat Küng
dd98ed565e protocol_splitter: fix type comparison 2017-10-04 14:13:14 +02:00
José Roberto de Souza
0d5480e540 driver: ll40ls: Correctly instantiate with the right parameters (#8032)
It was setting the rotation value to the I2C slave address
causing it to not be successfully probe.

Changing the constructor paramters order instead of
just fix line instantiating to keep consistency with
the other lidars and sonars.
2017-09-29 20:25:09 -04:00
David Sidrane
a9bd3aeb85 Fixed typo usb_vaild -> usb_valid 2017-09-29 10:46:50 -10:00
Daniel Agar
3ac6d1aa27 px4fmu-v2 and px4fmu-v3 boards cleanup 2017-09-29 10:13:51 -04:00
David Sidrane
7698c08eb7 HW Rev & Ver:0 for no value, -1 for not supported 2017-09-29 10:13:51 -04:00
David Sidrane
7ae999ecb3 HW Rev & Ver:0 for no value, -1 for not supported 2017-09-29 10:13:51 -04:00
David Sidrane
13c4a6cced HW Rev & Ver:0 for no value, -1 for not supported 2017-09-29 10:13:51 -04:00
David Sidrane
0b70a8cc44 px4fmu-v5:Add FMUv5 HW revision and version 2017-09-29 10:13:51 -04:00
David Sidrane
8451cb324e board_common: Add BOARD_HAS_HW_VERSIONING control 2017-09-29 10:13:51 -04:00
David Sidrane
04f7a7a47a stm32:Add board Revision and version API for FMUv5 HW detection 2017-09-29 10:13:51 -04:00
David Sidrane
d4892bf179 stm32 adc:Create board accessible API for using the ADC prior to boot
board_adc_init()    - initalise the ADC HW once.
   board_adc_sample()  - read a given channel dn
2017-09-29 10:13:51 -04:00
David Sidrane
f3e925497d board_common:Break into internal and public api.
Internal functions are public functions that should realy only
   be called by the board config.
2017-09-29 10:13:51 -04:00
David Sidrane
9cc7148211 board_common:Documentation clean up merged 2017-09-29 10:13:51 -04:00
David Sidrane
7dc8f215f6 samv7 board identity:fix sign-compare 2017-09-29 10:13:51 -04:00
David Sidrane
83d870900c kinetis board identity:fix sign-compare 2017-09-29 10:13:51 -04:00
David Sidrane
7c5f3ea623 kinetis io timer:fix sign-compare 2017-09-29 10:13:51 -04:00
David Sidrane
c44cfbf87e nxphlite-v3 spi:fix sign-compare 2017-09-29 10:13:51 -04:00
David Sidrane
d95e985f59 px4fmu-v5:Set non default BOARD_ADC_OPEN_CIRCUIT_V
Due to higher bias, V open circuit on the ADC is high with a 1M
   termination. This override the default connected threshold on
   V5 HW. Revist once lowe termination is chosen.
2017-09-29 10:13:51 -04:00
David Sidrane
ef5d808f6d px4fmu-v4pro:Override default BOARD_VALID_UV
Based on the R values on the LTC4411 the px4fmu-v4pro has a
   UV of 4.01 Volts.
2017-09-29 10:13:51 -04:00
David Sidrane
5018723eb2 board_common:Define defaults for Open circuit max and UV min
BOARD_ADC_OPEN_CIRCUIT_V is the voltage present on an ADC due
   to the bias current on the terminition resistor.

   BOARD_VALID_UV is the under voltage min set by resistors on a
   board's Power selector.

   A battery is considered connected when the Voltage measures is
   greater than BOARD_ADC_OPEN_CIRCUIT_V.

   In the case where BOARD_ADC_OPEN_CIRCUIT_V is greater then
   BOARD_VALID_UV we can use the HW to qualify connected.
2017-09-29 10:13:51 -04:00
David Sidrane
63ac56aeb0 smt32 adc:Ensure the the ADC clock is not out of spec
The data sheet for the F4, F7 indicate a maximum of 36 Mhz
   in the 2.4-3.3 volt Soc operating range. This change sets
   the clock based on the STM32_PCLK2_FREQUENCY.
2017-09-29 10:13:51 -04:00
Daniel Agar
474f216a0a UAVCAN bootloaders split into separate repository (#7878) 2017-09-29 10:13:51 -04:00
David Sidrane
3d6ebc0081 Added NXP fxas21002c 2017-09-29 10:13:51 -04:00
David Sidrane
9bc1884e83 nxphlite-v3:Init and control Sensor reset pins in board init 2017-09-29 10:13:51 -04:00
David Sidrane
32d434fa8f fxos8700cq:Fixed typo 2017-09-29 10:13:51 -04:00
Daniel Agar
01b3e6fd25 NuttX upgrade cmake wrapper (#7873)
* NuttX cmake

* px4_macros:Pass the stringified predicate as second arg to static assert

   CC_ASSERT mapes to the c++ static_assert or provides the same
   funtionality for c via the other macros. The c++ static assert
   takes 2 argumants the prdicate and a message. This fixes the
   lacking second argument.

* Updated nuttx and apps submodule to upstream nuttx 7.21+==master

   This is the latest uptake of upstream nuttx and apps.

* ROMFS generate with xxd instead of objcopy

* delete nuttx-patches

* NuttX update submodules to latest px4_nuttx-master

* fix nuttx apps and board dependency

* docker_run update to latest container 2017-08-29

* cmake ROMFS portable sed usage

* NuttX update submodules to latest px4_nuttx-master
2017-09-29 10:13:51 -04:00
David Sidrane
f7d42a9e41 px4-same70xplained-v1:Moved px4-same70xplained-v1 specific README to board dir 2017-09-29 10:13:51 -04:00
David Sidrane
442f79dac6 same70xplained-v1:use px4_micro_hal PX4_BUS_NUMBER_{TO|FROM}_PX4 mapping 2017-09-29 10:13:51 -04:00
David Sidrane
f04ddf4368 Inital Commit of px4-same70xplained-v1 2017-09-29 10:13:51 -04:00
David Sidrane
69ac5adf89 drv_sensor:Fix merge by adding new NXP sensors after what was on master 2017-09-29 10:13:51 -04:00
David Sidrane
8ac43c9988 nxphlite-v3:use px4_micro_hal PX4_BUS_NUMBER_{TO|FROM}_PX4 mapping 2017-09-29 10:13:51 -04:00
David Sidrane
f5ed7586bf boards common:Fix formating 2017-09-29 10:13:51 -04:00
David Sidrane
c7823ffc58 spi:Print only device index (mask bus in _device
Print only the PX4_SPI_DEV_ID portion of the _device
2017-09-29 10:13:51 -04:00
David Sidrane
c264cb3224 erofc-v1:Updated to new NuttX IRQ API changes 2017-09-29 10:13:51 -04:00
David Sidrane
58a6e57452 nxphlite-v3:Use ADC reading for VBUS
On this HW the VBUS detection is on the ADC. The ADC module
   reads the value and sets a global flag as well as publishing
   the value via uOrb.
2017-09-29 10:13:51 -04:00
David Sidrane
57892805e2 Sensors:add ID for fxos8700c mag and accel 2017-09-29 10:13:51 -04:00
David Sidrane
3b42d30623 fxos8700c:Inital commit mag and accel driver 2017-09-29 10:13:51 -04:00
David Sidrane
a7422dc9b6 nxphlite-v3:Define and use sensor reset pins
Define and use the Sensor reset pins. Added the cide to reset
   the nxphlite-v3 sensors.
2017-09-29 10:13:51 -04:00
David Sidrane
1682101cff mpl3115a2:Rework per data sheet
The driver appeared to not be finished and was a clone
   of another driver that did not work.
2017-09-29 10:13:51 -04:00
David Sidrane
ad5f166c75 nxphlite-v3:Removes spi stubs 2017-09-29 10:13:51 -04:00
David Sidrane
72ea7ae8f6 px4cannode-v1:Updated board_button to match upstream NuttX
upstren widened board_buttons ti 32 bit
2017-09-29 10:13:51 -04:00
David Sidrane
7a0d6174e2 nxphlite-v1:Removed from PX4
Superceeded by nxphlite-v3 before released
2017-09-29 10:13:51 -04:00
David Sidrane
39632a67d9 nxphlite-v3:Removed usb init, there is none needed to be done by board 2017-09-29 10:13:51 -04:00
David Sidrane
1bc760c194 Kinetis:Added PX4 ADC Driver.
PX4 Driver for Kinetis uisng just ADC1.

   On V3 HW RC00 the USB_VBUS_VALID on pin 36 of the MCU
   ADC0_SE16/ADC1_SE22 is bridged to pin 29 ADC1_DP0 and read
   there. But because of missing schottky diodes on V3 HW RC00
   the signal is true (3.3V) when powered by the Power Module.
2017-09-29 10:13:51 -04:00