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24,050 Commits 852 Branches 161 Tags
f641c1e15e5117bbfe83d3cfb193a575a71e237e
Commit Graph
656 Commits
Author SHA1 Message Date
David Sidrane 85fcd55908 auav-x21: Upstream NuttX reloaction of can.h 
can.h was moved in upstream NuttX from nuttx/drivers/can.h
   to nuttx/include/nuttx/can/can.h
 2017-09-29 10:13:51 -04:00
David Sidrane e4583e0ec7 aerocore2: Upstream NuttX reloaction of can.h 
can.h was moved in upstream NuttX from nuttx/drivers/can.h
   to nuttx/include/nuttx/can/can.h
 2017-09-29 10:13:51 -04:00
David Sidrane 5bace5d0fe nxphlite-v3:Configure Tone Alarm 2017-09-29 10:13:51 -04:00
David Sidrane 6e2885cc4e nxphlite-v3:Board mods to support 1 Mhz FTM 2017-09-29 10:13:51 -04:00
David Sidrane 24edfbcbca nxphlite-v3:GPIO_TRI set as output 2017-09-29 10:13:51 -04:00
David Sidrane d8513afcc0 nxphlite-v3:Init TONE ALARM IDLE 2017-09-29 10:13:51 -04:00
David Sidrane e172328f26 nxphlite-v3:Init GPIO_SPEKTRUM_P_EN pin 2017-09-29 10:13:51 -04:00
David Sidrane 9342c81cf2 nxphlite-v3:Using new SPEKTRUM API 2017-09-29 10:13:51 -04:00
David Sidrane eace382da9 nxphlite-v3: Indicate use of TMP for tone alarm 2017-09-29 10:13:51 -04:00
David Sidrane 2b853ea00e nxphlite-v3:Using termios and HW flow control 
Using PX4 contrib of termios and HW flow control in NuttX
   Kinetis.

   Removed stubs and updated defconfig.
 2017-09-29 10:13:51 -04:00
David Sidrane 2f2f1ff8ea nxphlite-v3:Use 8bit io on usart access for inversion 
Fix comment
  Use 8bit io on usart access for inversion, 32 bit
  on odd address was causwing BUS access hard fault.
 2017-09-29 10:13:51 -04:00
David Sidrane 69661df783 tap-v1:spi_dev_e is now uint32_t in NuttX 
Using new type of uint32_t for spi device and macros
   that define a PX4 device on a given BUS and Chip Select
 2017-09-29 10:13:51 -04:00
David Sidrane dad290a8fc px4nucleoF767ZI-v1:spi_dev_e is now uint32_t in NuttX 
Using new type of uint32_t for s
   that define a PX4 device on a given BUS and Chip Select
 2017-09-29 10:13:51 -04:00
David Sidrane 9dbaa001d3 px4fmu-v5:spi_dev_e is now uint32_t in NuttX 
Using new type of uint32_t for spi device and macros
   that define a PX4 device on a given BUS and Chip Select
 2017-09-29 10:13:51 -04:00
David Sidrane e332bfa726 px4fmu-v4pro:spi_dev_e is now uint32_t in NuttX 
Using new type of uint32_t for spi device and
   that define a PX4 device on a given BUS and Chip Select
 2017-09-29 10:13:51 -04:00
David Sidrane 3ade7c303a px4fmu-v4:spi_dev_e is now uint32_t in NuttX 
Using new type of uint32_t for spi device and macr
   that define a PX4 device on a given BUS and Chip Select
 2017-09-29 10:13:51 -04:00
David Sidrane e38d5853ad px4fmu-v2:spi_dev_e is now uint32_t in NuttX 
Using new type of uint32_t for spi device and macros
   that define a PX4 device on a given BUS and Chip Select
 2017-09-29 10:13:51 -04:00
David Sidrane a0b6b90abf px4cannode-v1:spi_dev_e is now uint32_t in NuttX 
Using new type of uint32_t for spi device and macros
   that define a PX4 device on a given BUS and Chip Select
 2017-09-29 10:13:51 -04:00
David Sidrane 6894425fa6 nxphlite-v3:spi_dev_e is now uint32_t in NuttX 
Using new type of uint32_t for spi device and macros
   that define a PX4 device on a given BUS and Chip Select
 2017-09-29 10:13:51 -04:00
David Sidrane a9e58df215 nxphlite-v1:spi_dev_e is now uint32_t in NuttX 
Using new type of uint32_t for spi device and macros
   that define a PX4 device on a given BUS and Chip Select
 2017-09-29 10:13:51 -04:00
David Sidrane bc856df03b mindpx-v2:spi_dev_e is now uint32_t in NuttX 
Using new type of uint32_t for spi device and macros
   that define a PX4 device on a given BUS and Chip Select
 2017-09-29 10:13:51 -04:00
David Sidrane 0232a24ae6 auav-x21:spi_dev_e is now uint32_t in NuttX 
Using new type of uint32_t for spi device and macros
   that define a PX4 device on a given BUS and Chip Select
 2017-09-29 10:13:51 -04:00
David Sidrane 40a6de5821 aerofc-v1:spi_dev_e is now uint32_t in NuttX 
Using new type of uint32_t for spi device and macros
   that define a PX4 device on a given BUS and Chip Select
 2017-09-29 10:13:51 -04:00
David Sidrane 5613a2f4e4 aerocore2:spi_dev_e is now uint32_t in NuttX 
Using new type of uint32_t for spi device and macros
   that define a PX4 device on a given BUS and Chip Select
 2017-09-29 10:13:51 -04:00
David Sidrane c12f9943ab aerocore:spi_dev_e is now uint32_t in NuttX 
Using new type of uint32_t for spi device and macros
   that define a PX4 device on a given BUS and Chip Select
 2017-09-29 10:13:51 -04:00
David Sidrane b4a9c1578b board common:spi_dev_e is now uint32_t in NuttX 
Using new type of uint32_t for spi device and macros
   that define a PX4 device on a given BUS and Chip Select
   Refactored to pack the PX4 format in the new NuttX format
 2017-09-29 10:13:51 -04:00
David Sidrane c977536671 nxphlite-v3:Assign TPM1 CH0 to HRT, CH1 PPM 2017-09-29 10:13:51 -04:00
David Sidrane 9a0fbe5623 Inital commit of nxphlite-v3 per v3 schematic 2017-09-29 10:13:51 -04:00
David Sidrane 5922e08f5e nxphlite-v1:incorperate master's led changes and fit 2017-09-29 10:13:51 -04:00
David Sidrane 7a4c5c3475 Added board_read_VBUS_state to board_common API 2017-09-29 10:13:51 -04:00
David Sidrane 67abeaf182 Fixed PX4_MK_GPIO macro 2017-09-29 10:13:51 -04:00
David Sidrane 3bdbd53441 Update tap-v1 tap_pwr to uses NuttX IRQ API changes 2017-09-29 10:13:51 -04:00
David Sidrane 49ccaa6597 Shrink FLASH to fit with Upstream NuttX 2017-09-29 10:13:51 -04:00
David Sidrane d409ca3e46 Inital commit of nxphlite-v3 2017-09-29 10:13:51 -04:00
David Sidrane addaf84f7f zubaxgnss-v1 bootloader uses upstream NuttX's new struct packing 2017-09-29 10:13:51 -04:00
David Sidrane a47770250e px4flow-v2 bootloader uses upstream NuttX's new struct packing 2017-09-29 10:13:51 -04:00
David Sidrane 69ba0b8925 px4esc-v1 bootloader uses upstream NuttX's new struct packing 2017-09-29 10:13:51 -04:00
David Sidrane 2c9a6eb727 px4cannode-v1 bootloader uses upstream NuttX's new struct packing 2017-09-29 10:13:51 -04:00
David Sidrane 364551b6f5 esc35-v1 bootloader uses upstream NuttX's new struct packing 2017-09-29 10:13:51 -04:00
David Sidrane c168bd248f Use Proper ponter conversion 
When PX4_CPU_UUID_BYTE_FORMAT_ORDER is not defined properly
 cast the arument for calling board_get_uuid_raw
 2017-09-29 10:13:51 -04:00
David Sidrane fcb57afd3d Add Kinetis impelmantation Skeleton for board common SoC version api 2017-09-29 10:13:51 -04:00
David Sidrane da178e8693 Adding Kinetis board common identitiy api 2017-09-29 10:13:51 -04:00
David Sidrane b2b6509ee0 Use micro hal fir px4_savepanic 
To keep board_crashdump.c as common code we create a
  wrapper around the arch depandant call to
  stm32_bbsram_savepanic.
 2017-09-29 10:13:51 -04:00
David Sidrane c1812af45e Inital commit of NXPhlite-v1 2017-09-29 10:13:51 -04:00
Henry Zhang 4778c79201 commander: removed CONFIG_ARCH_BOARD_xxx usage 2017-09-20 18:40:55 -10:00
Daniel Agar 58268c832c drivers remove extra semicolons 2017-09-16 21:29:52 +01:00
David Sidrane 99bce71003 board_common:px4io-v1:Removed px4io-v1 board from PX4 
Only provide paths to px4io-v2 bin files.
 2017-09-10 13:37:23 -04:00
David Sidrane 7123777e0e px4io-v1:Removed px4io-v1 board from PX4 2017-09-10 13:37:23 -04:00
David Sidrane a7ba7af89a FMUv1:Removed FMUv1 board from PX4 2017-09-10 13:37:23 -04:00
Daniel Agar 661b36df6b px4nucleo_spi fix sign compare 2017-09-07 10:27:36 +02:00