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Author SHA1 Message Date
David Sidrane c0a94cda07 px4-same70xplained-v1:Ensure _ebss will be 4 byte aligned 2017-12-03 14:11:35 +00:00
David Sidrane 23cfef5753 px4-same70xplained-v1:Ensure _ebss will be 4 byte aligned 2017-12-03 14:11:35 +00:00
David Sidrane c621965a2b zubaxgnss-v1:Ensure _ebss will be 4 byte aligned 2017-12-03 14:11:35 +00:00
David Sidrane 1812d677c5 tap-v1:Ensure _ebss will be 4 byte aligned 2017-12-03 14:11:35 +00:00
David Sidrane c4b2f39cf4 s2740vc-v1:Ensure _ebss will be 4 byte aligned 2017-12-03 14:11:35 +00:00
David Sidrane 58af82312b px4nucleoF767ZI-v1:Ensure _ebss will be 4 byte aligned 2017-12-03 14:11:35 +00:00
David Sidrane b85fbd496f px4io-v2:Ensure _ebss will be 4 byte aligned 2017-12-03 14:11:35 +00:00
David Sidrane e9a318e4f7 px4fmu-v5:Ensure _ebss will be 4 byte aligned 2017-12-03 14:11:35 +00:00
David Sidrane 093563efb0 px4fmu-v4pro:Ensure _ebss will be 4 byte aligned 2017-12-03 14:11:35 +00:00
David Sidrane c9ed286874 px4fmu-v4:Ensure _ebss will be 4 byte aligned 2017-12-03 14:11:35 +00:00
David Sidrane ad687cde62 px4fmu-v2:Ensure _ebss will be 4 byte aligned 2017-12-03 14:11:35 +00:00
David Sidrane 096b25550d px4fmu-v2:Ensure _ebss will be 4 byte aligned 2017-12-03 14:11:35 +00:00
David Sidrane e4f7b76296 px4flow-v2:Ensure _ebss will be 4 byte aligned 2017-12-03 14:11:35 +00:00
David Sidrane c1ae7c76df px4esc-v1:Ensure _ebss will be 4 byte aligned 2017-12-03 14:11:35 +00:00
David Sidrane 6b30a41da2 px4cannode-v1:Ensure _ebss will be 4 byte aligned 2017-12-03 14:11:35 +00:00
David Sidrane c76f90f078 px4-stm32f4discovery:Ensure _ebss will be 4 byte aligned 2017-12-03 14:11:35 +00:00
David Sidrane e15e9ba5c7 px4-same70xplained-v1:Ensure _ebss will be 4 byte aligned 2017-12-03 14:11:35 +00:00
David Sidrane fea11f1d47 nxphlite-v3:Ensure _ebss will be 4 byte aligned 2017-12-03 14:11:35 +00:00
David Sidrane 9879bea611 mindpx-v2:Ensure _ebss will be 4 byte aligned 2017-12-03 14:11:35 +00:00
David Sidrane 8b6e447875 esc35-v1:Ensure _ebss will be 4 byte aligned 2017-12-03 14:11:35 +00:00
David Sidrane d9cd9183db crazyflie:Ensure _ebss will be 4 byte aligned 2017-12-03 14:11:35 +00:00
David Sidrane 687dbea572 auav-x21:Ensure _ebss will be 4 byte aligned 2017-12-03 14:11:35 +00:00
David Sidrane 66d2509670 aerofc-v1:Ensure _ebss will be 4 byte aligned 2017-12-03 14:11:35 +00:00
David Sidrane db02eac009 aerocore2:Ensure _ebss will be 4 byte aligned 2017-12-03 14:11:35 +00:00
David Sidrane 391d103bfd hardfault_log:Not having a ulog file to append to is not an error 
The hardfault keeps track of the number of reboot without a
   commit to disk. A commit to disk is the act of writing the
   fault data from the bbsram to the hardfault file, not the
   ulog file. The sucessful commit rearms the hardfault system.

   When ulog appending was added it treated the lack of a ulog
   file as an error. This prevented the hardfault_log reset
   from being called because the hardfault_log commit returned
   an error.

   	if hardfault_log check
	then
		if hardfault_log commit
		then
			hardfault_log reset
		fi
	fi

   This change treats the lack a a ulog as a non error.
 2017-10-06 12:16:08 -10:00
David Sidrane bed4714cfe kinetis:adc fix typo vailid->valid (#8054) 
Fix typo on master
 2017-10-04 08:05:18 -10:00
David Sidrane 86389930be drv_sensor:Part number changed to fxos8701cq 2017-10-04 04:49:35 -10:00
David Sidrane b363b794b1 fxos8700cq:Part number change fxos8701cq 2017-10-04 04:49:35 -10:00
David Sidrane 390f93724c nxphlite-v3:Fixed USB PRODUCTSTR. CONFIG_CDCACM_PRODUCTID Still needs update 2017-10-04 04:49:35 -10:00
David Sidrane e1496a6d57 kinetis:io_timer Added SYC on CCR setting 
Fixes error in fmu test "servo 0 readback error, got 900
                          expected 1002"
 2017-10-04 04:49:35 -10:00
David Sidrane 10f418a272 nxphlite-v3:rcS move mavlink to UART4 connector P10 2017-10-04 04:49:35 -10:00
David Sidrane b6c15d7223 nxphlite-v3:Manage Spektrum power & bind 2017-10-04 04:49:35 -10:00
David Sidrane e11b08aa68 nxphlite-v3:ADC 12 use bit 2017-10-04 04:49:35 -10:00
David Sidrane 3e863dff5d nxphlite-v3:ADC digital USB connected 2017-10-04 04:49:35 -10:00
David Sidrane 7a0254d9f3 nxphlite-v3:Use BOARD_HAS_CONTROL_STATUS_LEDS 2017-10-04 04:49:35 -10:00
David Sidrane 1615d5642e kinetis:drv_io_timer ensure the Mod register is updated 2017-10-04 04:49:35 -10:00
David Sidrane ccc83dde33 nxphlite-v3:Build rgbled_pwm driver 2017-10-04 04:49:35 -10:00
David Sidrane 99dc1b17e2 nxphlite-v3:Add PWM RGB LEDs 2017-10-04 04:49:35 -10:00
David Sidrane 36d4619045 nxphlite-v3:Define RGB LED timer assignments 2017-10-04 04:49:35 -10:00
David Sidrane 9c7fd0ab9c nxphlite-v3:Use LED D9 and D10, remove RGB LEDs (going to PWM) 2017-10-04 04:49:35 -10:00
David Sidrane f68da76701 kinetis:PWM LED driver 2017-10-04 04:49:35 -10:00
David Sidrane e11af2bc27 fmu:Add PWM6 mode for nxphlite v3.5 2017-10-04 04:49:35 -10:00
David Sidrane 2eaf0c8c0a fxos8700cq:Drop SCLK to 1 Mhz 2017-10-04 04:49:35 -10:00
David Sidrane b9c13b86cb nxphlite-v3:Refreshed Config 2017-10-04 04:49:35 -10:00
David Sidrane 812128d565 nxphlite-v3:V3.5 HW changes 2017-10-04 04:49:35 -10:00
David Sidrane 9ce3fc6700 nxphlite-v3 cmake:Bring inline with master 2017-10-04 04:49:35 -10:00
David Sidrane a9bd3aeb85 Fixed typo usb_vaild -> usb_valid 2017-09-29 10:46:50 -10:00
David Sidrane 95cea13090 Updated nuttx and apps submodules for 1.7 Release 
Tied to nuttx, apps  px4_firmware_nuttx-master
     rebased on upstream nuttx master @ 3647ace55958c094cfe93f07092d308a768f5ca3
     rebased on upstream apps master @ 21c9b793e2ca6f4e86388c80d7af5c466de5e71c
 2017-09-29 10:13:51 -04:00
David Sidrane bb71e47ddf Updated nuttx submoulde 7.22+ w/i2c fix ==px4_firmware_nuttx-master 
Latest nuttx 7.22+ with PX4 contrib for stm32 f4 I2C hang.
 2017-09-29 10:13:51 -04:00
David Sidrane 0f028fda3b Update nuttx and apps submodule to 7.22+ ==px4_firmware_nuttx-master 
Prep for Nuttx Upgrade - still needs i2c fix
 2017-09-29 10:13:51 -04:00
David Sidrane f79d06dae4 px4-same70xplained-v1:Update to master rename trone to teraranger 2017-09-29 10:13:51 -04:00
David Sidrane 8f78f57f14 nxphlite-v3:Update to master rename trone to teraranger 2017-09-29 10:13:51 -04:00
David Sidrane 986607b37d PX4_SAME70XPLAINED_V1:Remove unnesasary conditional for FMU mode 2017-09-29 10:13:51 -04:00
David Sidrane e967e02c4d HW Rev & Ver:0 for no value, -1 for not supported 2017-09-29 10:13:51 -04:00
David Sidrane 7698c08eb7 HW Rev & Ver:0 for no value, -1 for not supported 2017-09-29 10:13:51 -04:00
David Sidrane 7ae999ecb3 HW Rev & Ver:0 for no value, -1 for not supported 2017-09-29 10:13:51 -04:00
David Sidrane 13c4a6cced HW Rev & Ver:0 for no value, -1 for not supported 2017-09-29 10:13:51 -04:00
David Sidrane 0b70a8cc44 px4fmu-v5:Add FMUv5 HW revision and version 2017-09-29 10:13:51 -04:00
David Sidrane 8451cb324e board_common: Add BOARD_HAS_HW_VERSIONING control 2017-09-29 10:13:51 -04:00
David Sidrane 04f7a7a47a stm32:Add board Revision and version API for FMUv5 HW detection 2017-09-29 10:13:51 -04:00
David Sidrane d4892bf179 stm32 adc:Create board accessible API for using the ADC prior to boot 
board_adc_init()    - initalise the ADC HW once.
   board_adc_sample()  - read a given channel dn
 2017-09-29 10:13:51 -04:00
David Sidrane f3e925497d board_common:Break into internal and public api. 
Internal functions are public functions that should realy only
   be called by the board config.
 2017-09-29 10:13:51 -04:00
David Sidrane 9cc7148211 board_common:Documentation clean up merged 2017-09-29 10:13:51 -04:00
David Sidrane 3c384f1890 Updated nuttx and apps submudule 7.22+ ==px4_firmware_nuttx-master 2017-09-29 10:13:51 -04:00
David Sidrane 7dc8f215f6 samv7 board identity:fix sign-compare 2017-09-29 10:13:51 -04:00
David Sidrane 83d870900c kinetis board identity:fix sign-compare 2017-09-29 10:13:51 -04:00
David Sidrane 7c5f3ea623 kinetis io timer:fix sign-compare 2017-09-29 10:13:51 -04:00
David Sidrane c44cfbf87e nxphlite-v3 spi:fix sign-compare 2017-09-29 10:13:51 -04:00
David Sidrane f83df2a9a6 Updated nuttx submodule 7.22+ 
Updated to latest upstream with PX4 contrib for STM32 I2C that
  fixes an hang in driver.
 2017-09-29 10:13:51 -04:00
David Sidrane 1c6dc4b84c Updated nuttx and apps submodules to Nuttx 7.22+ ==px4_firmware_nuttx-master 2017-09-29 10:13:51 -04:00
David Sidrane c6eec29dec sensors:Rework battery connected logic 
A battery is considered connected when a) V > BOARD_ADC_OPEN_CIRCUIT_V
   and if BOARD_ADC_OPEN_CIRCUIT_V > BOARD_VALID_UV connected
   is further qualifed by the Valid signal.
 2017-09-29 10:13:51 -04:00
David Sidrane d95e985f59 px4fmu-v5:Set non default BOARD_ADC_OPEN_CIRCUIT_V 
Due to higher bias, V open circuit on the ADC is high with a 1M
   termination. This override the default connected threshold on
   V5 HW. Revist once lowe termination is chosen.
 2017-09-29 10:13:51 -04:00
David Sidrane ef5d808f6d px4fmu-v4pro:Override default BOARD_VALID_UV 
Based on the R values on the LTC4411 the px4fmu-v4pro has a
   UV of 4.01 Volts.
 2017-09-29 10:13:51 -04:00
David Sidrane 5018723eb2 board_common:Define defaults for Open circuit max and UV min 
BOARD_ADC_OPEN_CIRCUIT_V is the voltage present on an ADC due
   to the bias current on the terminition resistor.

   BOARD_VALID_UV is the under voltage min set by resistors on a
   board's Power selector.

   A battery is considered connected when the Voltage measures is
   greater than BOARD_ADC_OPEN_CIRCUIT_V.

   In the case where BOARD_ADC_OPEN_CIRCUIT_V is greater then
   BOARD_VALID_UV we can use the HW to qualify connected.
 2017-09-29 10:13:51 -04:00
David Sidrane 25fef84f98 px4fmu-v5:board.h fixed typo in comment 2017-09-29 10:13:51 -04:00
David Sidrane 24eb56aa27 battery:Only change the warning level on a connected battery. 
Connected is assumed when the battery voltages is greater than
   a predefined level.
 2017-09-29 10:13:51 -04:00
David Sidrane 63ac56aeb0 smt32 adc:Ensure the the ADC clock is not out of spec 
The data sheet for the F4, F7 indicate a maximum of 36 Mhz
   in the 2.4-3.3 volt Soc operating range. This change sets
   the clock based on the STM32_PCLK2_FREQUENCY.
 2017-09-29 10:13:51 -04:00
David Sidrane dcf8d82f8c px4fmu-v5:Update to use CONFIG_STM32F7_FLASH_ART_ACCELERATOR 
Upstream change on F7 CONFIG_STM32F7_FLASH_PREFETCH and
   CONFIG_ARMV7M_ITCM are now contorled by
   CONFIG_STM32F7_FLASH_ART_ACCELERATOR
 2017-09-29 10:13:51 -04:00
David Sidrane 822b390420 Update nuttx and apps submodule 7.21+==px4_firmware_nuttx-master 2017-09-29 10:13:51 -04:00
David Sidrane f641c1e15e Updated nuttx submodule 7.21+ ==px4_firmware_nuttx-master 2017-09-29 10:13:51 -04:00
David Sidrane 8b2ee2cb33 Updated nuttx submodule 7.21+ 2017-09-29 10:13:51 -04:00
David Sidrane 8fe1abf8ff nxphlite-v3:Add fxas21002c to rc.sensors 2017-09-29 10:13:51 -04:00
David Sidrane d0853092f5 nxphlite-v3:add fxas21002c driver to board build 2017-09-29 10:13:51 -04:00
David Sidrane 3d6ebc0081 Added NXP fxas21002c 2017-09-29 10:13:51 -04:00
David Sidrane 9bc1884e83 nxphlite-v3:Init and control Sensor reset pins in board init 2017-09-29 10:13:51 -04:00
David Sidrane 929c5d9b5e Updated NuttX submodule with upstream 7.21+ 2017-09-29 10:13:51 -04:00
David Sidrane 32d434fa8f fxos8700cq:Fixed typo 2017-09-29 10:13:51 -04:00
David Sidrane 11e518f494 nxphlite-v3:Schedule work queue with higher priority as on master 
was:CONFIG_SCHED_HPWORKPRIORITY=192
    is:CONFIG_SCHED_HPWORKPRIORITY=249
 2017-09-29 10:13:51 -04:00
David Sidrane bb78e71452 Using master README 2017-09-29 10:13:51 -04:00
David Sidrane f7d42a9e41 px4-same70xplained-v1:Moved px4-same70xplained-v1 specific README to board dir 2017-09-29 10:13:51 -04:00
David Sidrane 7a5f58a607 px4-same70xplained-v1 nsh:Optimize memset for speed 2017-09-29 10:13:51 -04:00
David Sidrane a61b7203bf px4-same70xplained-v1 nsh:Refreshed config 2017-09-29 10:13:51 -04:00
David Sidrane bff33ba9dc px4-same70xplained-v1:Refreshed config 2017-09-29 10:13:51 -04:00
David Sidrane 4fdce9bf21 px4-same70xplained-v1 nsh: increase CONFIG_NFILE_DESCRIPTORS from 53 to 54 
Updated to match master
   This is needed when logger is logging to file and ulog streaming gets
   activated
 2017-09-29 10:13:51 -04:00
David Sidrane 6a4120c44c px4-same70xplained-v1:Schedule work queue with higher priority as on master 
was:CONFIG_SCHED_HPWORKPRIORITY=192
    is:CONFIG_SCHED_HPWORKPRIORITY=249
 2017-09-29 10:13:51 -04:00
David Sidrane 442f79dac6 same70xplained-v1:use px4_micro_hal PX4_BUS_NUMBER_{TO|FROM}_PX4 mapping 2017-09-29 10:13:51 -04:00
David Sidrane 5d33b602f3 px4-same70xplained-v1:Updated to upstream master 
Airspeed changes
   add FastRTPS
 2017-09-29 10:13:51 -04:00
David Sidrane 4b5d585e57 kinetis:Add define for PX4_NUMBER_I2C_BUSES 2017-09-29 10:13:51 -04:00
David Sidrane f56940e654 README for px4-same70xplained-v1 2017-09-29 10:13:51 -04:00
David Sidrane f04ddf4368 Inital Commit of px4-same70xplained-v1 2017-09-29 10:13:51 -04:00