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894 Commits
Author SHA1 Message Date
David Sidrane dad290a8fc px4nucleoF767ZI-v1:spi_dev_e is now uint32_t in NuttX 
Using new type of uint32_t for s
   that define a PX4 device on a given BUS and Chip Select
 2017-09-29 10:13:51 -04:00
David Sidrane 9dbaa001d3 px4fmu-v5:spi_dev_e is now uint32_t in NuttX 
Using new type of uint32_t for spi device and macros
   that define a PX4 device on a given BUS and Chip Select
 2017-09-29 10:13:51 -04:00
David Sidrane e332bfa726 px4fmu-v4pro:spi_dev_e is now uint32_t in NuttX 
Using new type of uint32_t for spi device and
   that define a PX4 device on a given BUS and Chip Select
 2017-09-29 10:13:51 -04:00
David Sidrane 3ade7c303a px4fmu-v4:spi_dev_e is now uint32_t in NuttX 
Using new type of uint32_t for spi device and macr
   that define a PX4 device on a given BUS and Chip Select
 2017-09-29 10:13:51 -04:00
David Sidrane e38d5853ad px4fmu-v2:spi_dev_e is now uint32_t in NuttX 
Using new type of uint32_t for spi device and macros
   that define a PX4 device on a given BUS and Chip Select
 2017-09-29 10:13:51 -04:00
David Sidrane a0b6b90abf px4cannode-v1:spi_dev_e is now uint32_t in NuttX 
Using new type of uint32_t for spi device and macros
   that define a PX4 device on a given BUS and Chip Select
 2017-09-29 10:13:51 -04:00
David Sidrane 6894425fa6 nxphlite-v3:spi_dev_e is now uint32_t in NuttX 
Using new type of uint32_t for spi device and macros
   that define a PX4 device on a given BUS and Chip Select
 2017-09-29 10:13:51 -04:00
David Sidrane a9e58df215 nxphlite-v1:spi_dev_e is now uint32_t in NuttX 
Using new type of uint32_t for spi device and macros
   that define a PX4 device on a given BUS and Chip Select
 2017-09-29 10:13:51 -04:00
David Sidrane bc856df03b mindpx-v2:spi_dev_e is now uint32_t in NuttX 
Using new type of uint32_t for spi device and macros
   that define a PX4 device on a given BUS and Chip Select
 2017-09-29 10:13:51 -04:00
David Sidrane 0232a24ae6 auav-x21:spi_dev_e is now uint32_t in NuttX 
Using new type of uint32_t for spi device and macros
   that define a PX4 device on a given BUS and Chip Select
 2017-09-29 10:13:51 -04:00
David Sidrane 40a6de5821 aerofc-v1:spi_dev_e is now uint32_t in NuttX 
Using new type of uint32_t for spi device and macros
   that define a PX4 device on a given BUS and Chip Select
 2017-09-29 10:13:51 -04:00
David Sidrane 5613a2f4e4 aerocore2:spi_dev_e is now uint32_t in NuttX 
Using new type of uint32_t for spi device and macros
   that define a PX4 device on a given BUS and Chip Select
 2017-09-29 10:13:51 -04:00
David Sidrane c12f9943ab aerocore:spi_dev_e is now uint32_t in NuttX 
Using new type of uint32_t for spi device and macros
   that define a PX4 device on a given BUS and Chip Select
 2017-09-29 10:13:51 -04:00
David Sidrane b4a9c1578b board common:spi_dev_e is now uint32_t in NuttX 
Using new type of uint32_t for spi device and macros
   that define a PX4 device on a given BUS and Chip Select
   Refactored to pack the PX4 format in the new NuttX format
 2017-09-29 10:13:51 -04:00
David Sidrane c977536671 nxphlite-v3:Assign TPM1 CH0 to HRT, CH1 PPM 2017-09-29 10:13:51 -04:00
David Sidrane 9a0fbe5623 Inital commit of nxphlite-v3 per v3 schematic 2017-09-29 10:13:51 -04:00
David Sidrane 5922e08f5e nxphlite-v1:incorperate master's led changes and fit 2017-09-29 10:13:51 -04:00
David Sidrane 7a4c5c3475 Added board_read_VBUS_state to board_common API 2017-09-29 10:13:51 -04:00
David Sidrane 67abeaf182 Fixed PX4_MK_GPIO macro 2017-09-29 10:13:51 -04:00
David Sidrane 3bdbd53441 Update tap-v1 tap_pwr to uses NuttX IRQ API changes 2017-09-29 10:13:51 -04:00
David Sidrane 49ccaa6597 Shrink FLASH to fit with Upstream NuttX 2017-09-29 10:13:51 -04:00
David Sidrane d409ca3e46 Inital commit of nxphlite-v3 2017-09-29 10:13:51 -04:00
David Sidrane addaf84f7f zubaxgnss-v1 bootloader uses upstream NuttX's new struct packing 2017-09-29 10:13:51 -04:00
David Sidrane a47770250e px4flow-v2 bootloader uses upstream NuttX's new struct packing 2017-09-29 10:13:51 -04:00
David Sidrane 69ba0b8925 px4esc-v1 bootloader uses upstream NuttX's new struct packing 2017-09-29 10:13:51 -04:00
David Sidrane 2c9a6eb727 px4cannode-v1 bootloader uses upstream NuttX's new struct packing 2017-09-29 10:13:51 -04:00
David Sidrane 364551b6f5 esc35-v1 bootloader uses upstream NuttX's new struct packing 2017-09-29 10:13:51 -04:00
David Sidrane c168bd248f Use Proper ponter conversion 
When PX4_CPU_UUID_BYTE_FORMAT_ORDER is not defined properly
 cast the arument for calling board_get_uuid_raw
 2017-09-29 10:13:51 -04:00
David Sidrane fcb57afd3d Add Kinetis impelmantation Skeleton for board common SoC version api 2017-09-29 10:13:51 -04:00
David Sidrane da178e8693 Adding Kinetis board common identitiy api 2017-09-29 10:13:51 -04:00
David Sidrane b2b6509ee0 Use micro hal fir px4_savepanic 
To keep board_crashdump.c as common code we create a
  wrapper around the arch depandant call to
  stm32_bbsram_savepanic.
 2017-09-29 10:13:51 -04:00
David Sidrane c1812af45e Inital commit of NXPhlite-v1 2017-09-29 10:13:51 -04:00
Henry Zhang 4778c79201 commander: removed CONFIG_ARCH_BOARD_xxx usage 2017-09-20 18:40:55 -10:00
Daniel Agar 58268c832c drivers remove extra semicolons 2017-09-16 21:29:52 +01:00
David Sidrane 99bce71003 board_common:px4io-v1:Removed px4io-v1 board from PX4 
Only provide paths to px4io-v2 bin files.
 2017-09-10 13:37:23 -04:00
David Sidrane 7123777e0e px4io-v1:Removed px4io-v1 board from PX4 2017-09-10 13:37:23 -04:00
David Sidrane a7ba7af89a FMUv1:Removed FMUv1 board from PX4 2017-09-10 13:37:23 -04:00
Daniel Agar 661b36df6b px4nucleo_spi fix sign compare 2017-09-07 10:27:36 +02:00
Daniel Agar dd6892443c px4fmu-v5 fix sign-compare 2017-09-07 10:27:36 +02:00
Daniel Agar 275d81d4d5 stm32 common fix sign-compare 2017-09-07 10:27:36 +02:00
Daniel Agar 676946c324 eagle add I2C defines 2017-08-31 09:27:36 +02:00
Daniel Agar 3a5ae7d1bb bebop add PX4 I2C defines 2017-08-31 09:27:36 +02:00
Daniel Agar 07619cf723 Make NuttX drivers cross platform (VDev -> CDev) 2017-08-31 09:27:36 +02:00
David Sidrane cde3545560 px4fmu-v5:Configure PWM LED polarity, and swapping 
Test HW has R and G LED swapped and drives the UI LED's active
  high. The changes support all the configuratons of FMUv5 on
  RC00 and RC01 HW for PWM status and UI LEDs.
 2017-08-26 03:44:59 -10:00
David Sidrane 3e46b5d02f px4fmu-v5:Extend PWM LED definitions to suport polarity, drive and swaps 
Added palarity mask to support active low drive on per channel
   bassis.

   Added open drain drive type when the enables are active low to
   ensure the LED are off when supplied form 5 volts.
   For active Push Pull is used. Active low drive is recomended.

   Added support for test HW that had the R and G LED signals
   swapped.
 2017-08-26 03:44:59 -10:00
David Sidrane 9c68783c54 px4fmu-v5:Reorder I2C busses int 1-4 order 
This alows the -b option map 1-to-1 with the 12C bus numbers
 2017-08-26 03:44:59 -10:00
David Sidrane 67e470b0e1 px4fmu-v5:Use arch/polarity agnostic Power control macros 
Use the board supplied Power control macros, in the
   the board_peripheral_reset.

   This abstacts the polarity from the code. Therefore changes
   in signal sense can be made, just in the board config.
 2017-08-12 08:02:41 +02:00
David Sidrane 5506588a31 px4fmu-v5:Add conditional support for Test RC00 HW 
RC00 had an active high VDD_5V_PERIPH_EN
   PC01 has an active low  VDD_5V_PERIPH_EN

   RC00 Test hardware did not use an LTC4417

   While RC00 HW is still in circulation you can build with
   PX4_FMUV5_RC00 defined and BOARD_HAS_LTC4417 undefined.

   The default is PX4_FMUV5_RC01 and BOARD_HAS_LTC4417 defined.
 2017-08-12 08:02:41 +02:00
David Sidrane 1af5ed9024 crazyflie: Use BOARD_NUMBER_I2C_BUSES and BOARD_I2C_BUS_CLOCK_INIT 2017-08-08 21:45:01 +02:00
David Sidrane 8c1f506944 tapv1:Use BOARD_NUMBER_I2C_BUSES and BOARD_I2C_BUS_CLOCK_INIT 2017-08-08 21:45:01 +02:00