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6a8b25a1b9503fbed3047585109c860adfa4e8be
Commit Graph
894 Commits
Author SHA1 Message Date
David Sidrane 365c5d3ea7 crazyflie:use board_hardfault_init API 2018-10-25 07:52:37 +02:00
David Sidrane 082aa81ee9 av-x-v1:use board_hardfault_init API 2018-10-25 07:52:37 +02:00
David Sidrane 1e35fe189a auav-x21:use board_hardfault_init API 2018-10-25 07:52:37 +02:00
David Sidrane 1856c4760d aerocore2:Make sure errors light LED 2018-10-25 07:52:37 +02:00
David Sidrane 68ce4cf11d aerofc-v1:Does not support bbsram no board_hardfault_init 2018-10-25 07:52:37 +02:00
David Sidrane 177251cc21 px4fmu-v5:use common board_hardfault_init 2018-10-25 07:52:37 +02:00
David Sidrane 74695f3cfb stm32:add stm32 and stm32f7 board_hardfault_init 2018-10-25 07:52:37 +02:00
David Sidrane 2f6a297f3d board_common:Add API for hardfault init 2018-10-25 07:52:37 +02:00
CarlOlsson 6499a4ffc7 board_config: fixed typo 2018-10-22 09:26:06 -04:00
Mark Sauder ad8539bd15 Deprecate the tap_common directory, nuttx, driver, and makefile references to tap-v1. (#10629) 2018-10-15 11:53:29 -04:00
Daniel Agar f74b96e918 AV-X DSM RC fixes (disable single wire) 2018-10-09 10:37:12 -04:00
Simone Guscetti 62d71bf36c fmu-v5 manifest: Add some comments 
Clarify which  componets is on which index for the item array
 2018-10-05 07:54:44 -07:00
Simone Guscetti aa3a404fa0 fmu-v5 manifest: remove entry from list 
At the moment it is only declared a component, PX4IO.
 2018-10-05 07:54:44 -07:00
Simone Guscetti 0f47272628 board_common: fix typo 2018-10-05 07:54:44 -07:00
mcsauder 2d208b1524 Edited aerofc-v1 file comments to not reference tap-v1. 2018-10-03 15:47:04 -04:00
Beat Küng 6c34407d57 version: rebase fixes & add bbblue 2018-10-03 10:30:10 +02:00
Beat Küng 703a5376bb bebop board config: add a separate SOC_ARCH_ID 2018-10-03 10:30:10 +02:00
Beat Küng b9a99969a7 board_get_uuid: fix alignment issues 
board_get_px4_guid() called board_get_uuid() with a 2 bytes offset into an
uint8_t array. This gives no guarantees on alignment, and board_get_uuid()
casts it to an uint32_t array, leading to potentially unaligned accesses.
 2018-10-03 10:30:10 +02:00
David Sidrane a934d6e3f2 samv7:Fixed incorrect index populating px4_guid 2018-10-03 10:30:10 +02:00
David Sidrane 03948c1ad3 kinetis:Fixed incorrect index populating px4_guid 2018-10-03 10:30:10 +02:00
Beat Küng daf05b3854 board_common: add PX4_SOC_ARCH_ID_UNUSED = 0 to PX4_SOC_ARCH_ID_t 
Just to make sure we never have an UUID == 0
 2018-10-03 10:30:10 +02:00
David Sidrane 0b17995e81 eagle:revert CMakeLists.txt to wrong sitl, add board identity API 
This file was clearly clearly but built.
 2018-10-03 10:30:10 +02:00
David Sidrane bdaff018b7 samv7:Add PX4 GUID API 2018-10-03 10:30:10 +02:00
David Sidrane 43f6c4df77 kinetis:Add PX4 GUID API 2018-10-03 10:30:10 +02:00
David Sidrane 4e32ca45f1 sitl:Use PX4_SOC_ARCH_ID_t from board common 2018-10-03 10:30:10 +02:00
David Sidrane d85452863d rpi:Use PX4_SOC_ARCH_ID_t from board common 2018-10-03 10:30:10 +02:00
David Sidrane 3d96e2ef60 ocpoc:Use PX4_SOC_ARCH_ID_t from board common 2018-10-03 10:30:10 +02:00
David Sidrane 5fea494a2d eagle:Use PX4_SOC_ARCH_ID_t from board common 2018-10-03 10:30:10 +02:00
David Sidrane dc59e19bbb Moved PX4_SOC_ARCH_ID from px4_micro_hal to board_common 2018-10-03 10:30:10 +02:00
David Sidrane 695a7f6839 board_common:Added missing END_DECLS from rebase 2018-10-03 10:30:10 +02:00
David Sidrane 594da6247b board_common:Make board indenty API required. 2018-10-03 10:30:10 +02:00
David Sidrane 73552bdd64 sim:Use Non Arch specific Board identity API 2018-10-03 10:30:10 +02:00
David Sidrane a96acbb04d ocpoc:Use Non Arch specific Board identity API 2018-10-03 10:30:10 +02:00
David Sidrane 82dcfeb576 eagle:Use Non Arch specific Board identity API 2018-10-03 10:30:10 +02:00
David Sidrane 1c779d58fb bebop:Use Non Arch specific Board identity API 2018-10-03 10:30:10 +02:00
David Sidrane bc075208d5 rpi:Use Non Arch specific Board identity API 2018-10-03 10:30:10 +02:00
David Sidrane a1abd1b632 sitil:Use Non Arch specific Board identity API 2018-10-03 10:30:10 +02:00
David Sidrane ed9223edaf board_identity:Added common no-arch specific board_identity API 
This common code can be used byt posix based boars to provide
   the board_identity API.
 2018-10-03 10:30:10 +02:00
David Sidrane 1ac54f977e board_common:Documentation clean up 2018-10-03 10:30:10 +02:00
David Sidrane a16ca0ccf9 sitl:Added BOARD_OVERRIDE_PX4_GUID 2018-10-03 10:30:10 +02:00
David Sidrane ba336bd19e rpi:Added BOARD_OVERRIDE_PX4_GUID 2018-10-03 10:30:10 +02:00
David Sidrane a1d5cb766a ocpoc:Added BOARD_OVERRIDE_PX4_GUID 2018-10-03 10:30:10 +02:00
David Sidrane cca2fd8471 eagle:Added BOARD_OVERRIDE_PX4_GUID 2018-10-03 10:30:10 +02:00
David Sidrane 7050657a6e board_identity:Add stm32 board_get_px4_guid and board_get_px4_guid_formated API 2018-10-03 10:30:10 +02:00
David Sidrane 1c2f8bd4c4 board_identity:Fix potential buffer over flow 2018-10-03 10:30:10 +02:00
David Sidrane f24a052355 board_common:Add PX4 GUID, deprecate other UUID API 
The form of the PX4  GUID is as follows:
   offset:0         1         2         -           17
      <ARCH MSD><ARCH LSD><MSD CPU UUID>...<LSD CPU UUID>

   Where <ARCH MSD><ARCH LSD> are a monotonic ordinal number assigned by
   PX4 to a chip architecture (PX4_SOC_ARCH_ID). The 2 bytes are used to
   create a globally unique ID when prepended to a padded CPU ID.

   In the case where the CPU's UUID is shorter than 16 bytes it will be
   padded with 0's starting at offset [2] until
   PX4_CPU_MFGUID_BYTE_LENGTH-PX4_CPU_UUID_BYTE_LENGTH -1
   I.E. For the STM32
   offset:0         1     2  3  4  5  6             -            17
     <ARCH MSD><ARCH LSD>[0][0][0][0]<MSD CPU UUID>...<LSD CPU UUID>

   I.E. For as CPU with a 16 byte UUID
   offset:0         1         2         -           17
     <ARCH MSD><ARCH LSD><MSD CPU UUID>...<LSD CPU UUID>
 2018-10-03 10:30:10 +02:00
Beat Küng 546886259f boards: remove GPS_DEFAULT_UART_PORT 
Not required anymore.
 2018-09-25 07:53:29 +02:00
Daniel Agar 73fe4ecd20 AV-X enable GPS for rev C board 2018-09-12 02:39:03 -04:00
David Sidrane 520a81a951 nxphlite-v3:Disable internal mag due to random spikes. 
This will disable the fxos8701cq internal mag on
  the NXPHlite. There are random noise spikes on the
  HIGHRES_IMU.[x|y|x]mag. Even with all other SPI
  devices shut down, the noise is still present.
 2018-09-11 06:58:35 -07:00
mcsauder e7666aa5d8 Added an imu heater driver, formatted whitespace, standardized comments, and added doxy documentation. 2018-09-06 12:03:26 +02:00