- new IMU driver structure with state machine (no sleeps in bus thread)
- verify all configured registers and trigger reset on failure
- detect if DIO1 or DIO2 are actually connected for data ready interrupt usage
- don't use CRC-16 on burst transfers except for verified lots
- track consecutive failures and trigger reset aggressively
- only count missed drdy interrupts, not time
- reset wait times consistent with other drivers
- accel improve FIFO count check if DRDY isn't available
- track consecutive failures and trigger reset aggressively
- only count missed drdy interrupts, not time
- reset wait times consistent with other drivers
- perform reset as per the datasheet (disable I2C immediately, set power mode, wait for appropriate time, etc)
- remove interrupt perf counter and instead only count misses
- minor style changes to stay in sync with the other Invensense drivers
- perform reset as per the datasheet (disable I2C immediately, set power mode, wait for appropriate time, etc)
- only track consecutive errors (not total) to trigger full reset if necessary
- remove interrupt perf counter and instead only count misses
- minor style changes to stay in sync with the other Invensense drivers
- perform reset as per the datasheet (disable I2C immediately, set power mode, wait for appropriate time, etc)
- only track consecutive errors (not total) to trigger full reset if necessary
- remove interrupt perf counter and instead only count misses
- minor style changes to stay in sync with the other Invensense drivers
- perform reset as per the datasheet (wakeup accel/gyro and wait before proceeding)
- add register bank selection (not yet used)
- track consecutive errors to trigger full reset if necessary
- remove interrupt perf counter and instead only count misses
- minor style changes to stay in sync with the other Invensense drivers
- perform reset as per the datasheet (wakeup accel/gyro and wait before proceeding)
- add register bank selection (not yet used)
- track consecutive errors to trigger full reset if necessary
- remove interrupt perf counter and instead only count misses
- minor style changes to stay in sync with the other Invensense drivers
- perform reset as per the datasheet (disable I2C immediately, set power mode, wait for appropriate time, etc)
- remove interrupt perf counter and instead only count misses
- minor style changes to stay in sync with the other Invensense drivers
- perform reset as per the datasheet (disable I2C immediately, set power mode, wait for appropriate time, etc)
- only track consecutive errors (not total) to trigger full reset if necessary
- remove interrupt perf counter and instead only count misses
- minor style changes to stay in sync with the other Invensense drivers
- update copyright year
- perform reset as per the datasheet (disable I2C immediately, set power mode, wait for appropriate time, etc)
- only track consecutive errors (not total) to trigger full reset if necessary
- remove interrupt perf counter and instead only count misses
- minor style changes to stay in sync with the other Invensense drivers
- perform reset as per the datasheet (disable I2C immediately, set power mode, wait for appropriate time, etc)
- track consecutive errors and trigger full reset if necessary
- remove interrupt perf counter and instead only count misses
- minor style changes to stay in sync with the other Invensense drivers
- read FIFO count along with full transfer as a sanity check
- the latch would actually cause more problems if the backup schedule hit
- this reduces the number of cycles where the FIFO is actually empty at max rate (when there's only 1 sample in the FIFO expected)
- remove all remaining IOCTLs for accel and gyro and handle all calibration entirely in sensors module with parameters
- sensor_accel and sensor_gyro are now always raw sensor data
- calibration procedures no longer need to first clear existing values before starting
- temperature calibration (TC) remove all scale (SCL) parameters
- gyro and baro scale are completely unused
- regular accel calibration scale can be used (CAL_ACC*_xSCALE) instead of TC scale
- accel & gyro FIFOs enabled
- FIFO watermark on data ready interrupt
- sensor side filtering completely disabled
- gyro now respects `IMU_GYRO_RATEMAX` (up to 2 kHz)
- saves a few % cpu (at default rate)
- at start perform full sensor signal path reset and wait for max time
- issue full sensor reset on any error
- only allocate DRDY perf counter if GPIO is available
- allow running faster than accel ODR (safe limit of 2 kHz in place)
- perform full sensor signal path reset and wait for max time (100 ms)
- issue full sensor reset on any error
- always read FIFO count before transfersj
- only allocate drdy perf counter if GPIO is available
- perform full sensor signal path reset and wait for max time (100 ms)
- issue full sensor reset on any error
- always read FIFO count before transfersj
- only allocate drdy perf counter if GPIO is available
Daniel Agar