Test HW has R and G LED swapped and drives the UI LED's active
high. The changes support all the configuratons of FMUv5 on
RC00 and RC01 HW for PWM status and UI LEDs.
Added palarity mask to support active low drive on per channel
bassis.
Added open drain drive type when the enables are active low to
ensure the LED are off when supplied form 5 volts.
For active Push Pull is used. Active low drive is recomended.
Added support for test HW that had the R and G LED signals
swapped.
VDev::getDev() is used in px4_access, which is used in orb_exists. And if
the topic does not exist, it iterates over all 500 indexes, which is slow.
It was slow even if the topic existed, the map reduces runtime from linear
to logarithmic (there are around 80 items in the container).
This is only used on posix.
inverted S.bus signal and fetch the data of each channel and publish it
2. Fix the bug of linux_pwm_out, when the protocol is pca9685,
after the init method is executed,the method of determining the return
value of init method is incorrect,this will cause the driver to fail
3. Add linux_sbus driver to other posix prefixes cmake files
Use the board supplied Power control macros, in the
the board_peripheral_reset.
This abstacts the polarity from the code. Therefore changes
in signal sense can be made, just in the board config.
RC00 had an active high VDD_5V_PERIPH_EN
PC01 has an active low VDD_5V_PERIPH_EN
RC00 Test hardware did not use an LTC4417
While RC00 HW is still in circulation you can build with
PX4_FMUV5_RC00 defined and BOARD_HAS_LTC4417 undefined.
The default is PX4_FMUV5_RC01 and BOARD_HAS_LTC4417 defined.
control_data needs to be able to be set to nullptr in case if the input
is already active. Otherwise the output will think there's always new
requests and reset it's state.
This will initialize those structs with zero in all fields not set
and all fields set will only be change once to the final value not
wasting CPU time zeroing it.
This will guarantee that no non-unitialized structs will have
a trash value on from_external causing it to be sent to the
MAVLink channel without need it.
Define the default I2C buss frequncies that are backward compatible
with the existing code. While allowing it the defaults to be overridden
by a board config.
Based on the legacy STM32 code, the I2C buss numbering starts at 1.
The bus frequency is stored in a 0 based array. If px4_i2cbus_initialize
returns a valid device, then the _bus-1 will act as the index to the
busses frequency.
A board may define BOARD_NUMBER_I2C_BUSES - the number of I2C busses
it supports* and BOARD_I2C_BUS_CLOCK_INIT to initalize the bus
clocks for a given busses.
BOARD_NUMBER_I2C_BUSES - the number of busses including the *highest
number bus. If the board has 2 I2C
busses I2C1 and I2C3 BOARD_NUMBER_I2C_BUSES
would be set to 3
BOARD_I2C_BUS_CLOCK_INIT - Initalization for the bus frequencies
by bus. A call init, with a frequency
less then the value used for the
Initalization will result in the device
not starting becuase the buss runs too
fast for it.
jgs2185