Pavel Kirienko
|
5a01135970
|
STM32, LPC11C24: Default min jump set to 10 ms
|
2014-04-24 14:46:37 +04:00 |
|
Pavel Kirienko
|
3acf0be231
|
LPC11C24: Removed compiler-dependent code
|
2014-04-17 12:53:50 +04:00 |
|
Pavel Kirienko
|
32474838c0
|
LPC11C24: Fixed undefined behavior in clock driver
|
2014-04-17 12:50:24 +04:00 |
|
Pavel Kirienko
|
85c176cb60
|
Preprocessor symbol UAVCAN_LPC11C24_NO_WFE to disable WFE in select()
|
2014-04-16 19:20:15 +04:00 |
|
Pavel Kirienko
|
091356c1ba
|
LPC11C24: Reduced RX queue len
|
2014-04-16 19:15:52 +04:00 |
|
Pavel Kirienko
|
5926e3dd45
|
LPC11C24: Fixed TX priority inversion in CAN driver
|
2014-04-16 15:02:45 +04:00 |
|
Pavel Kirienko
|
c114ce8c99
|
LPC11C24: Default RX queue len reduced to 10 items
|
2014-04-16 14:10:19 +04:00 |
|
Pavel Kirienko
|
13e8fdbdc8
|
LPC11C24: Minor fixes in CAN driver
|
2014-04-16 13:59:37 +04:00 |
|
Pavel Kirienko
|
58636c780c
|
LPC11C24: Simple UAVCAN node. Does nothing. There's some problem with TX reordering, it was solved temporarily by setting number of TX slots to one.
|
2014-04-16 13:53:30 +04:00 |
|
Pavel Kirienko
|
60947bc9dc
|
LPC11C24: Removed redundant comments
|
2014-04-16 12:35:50 +04:00 |
|
Pavel Kirienko
|
1e68df6187
|
LPC11C24 clock driver bug fix: SysTick pending bit is checked in SCB.ICSR, which is the only right way according to the Cortex-M0 manual
|
2014-04-16 01:16:10 +04:00 |
|
Pavel Kirienko
|
a1ea05bdea
|
LPC11C24: select()
|
2014-04-16 00:05:25 +04:00 |
|
Pavel Kirienko
|
1c73f4884c
|
LPC11C24 iface activity LED support
|
2014-04-15 23:11:55 +04:00 |
|
Pavel Kirienko
|
e205c2e441
|
LPC11C24 clock driver. Not well tested yet, but generally seems to be OK
|
2014-04-15 22:12:19 +04:00 |
|
Pavel Kirienko
|
841c581991
|
LPC11C24: CAN transmission
|
2014-04-15 17:15:49 +04:00 |
|
Pavel Kirienko
|
03ab77b02f
|
LPC11C24: Building with libuavcan; partially implemented CAN driver (RX only, no timestamping)
|
2014-04-15 16:50:13 +04:00 |
|