fix: remove iostream

fix: format
feat: spacecraft tooling for commander and VehicleStatus
2026-05-23 21:07:35 +08:00 · 2025-04-13 15:14:09 +02:00 · 2025-04-13 15:02:09 +02:00 · 2025-04-13 14:53:16 +02:00 · 2025-04-13 14:51:38 +02:00 · 2025-04-11 23:48:40 +02:00
1135 changed files with 19230 additions and 45141 deletions
@@ -3,3 +3,6 @@ contact_links:
  - name: Support Question
    url: https://docs.px4.io/main/en/contribute/support.html#forums-and-chat
    about: For questions about using PX4 or related components, please use the discuss forum and discord server
+  - name: Documentation Issue
+    url: https://github.com/PX4/PX4-user_guide/issues
+    about: If you found an issue in documentation, please submit it directly to the docs repository issues
@@ -1,33 +0,0 @@
-name: 📑 Documentation Bug report
-description: Create a report to help us improve the docs
-title: "[Docs] [Bug] "
-labels: ["Documentation 📑"]
-body:
-  - type: textarea
-    attributes:
-      label: Describe the bug
-      description: A clear and concise description of the bug.
-      placeholder: |
-          # A PR to fix the bug is often better than adding this issue!
-          #
-          # If you can't create a PR please provide the following:
-          # - What page and/or section has the problem
-          # - What is the problem - missing information, incorrect information?
-          # - Suggested fixes, links to corresponding code PRs
-          # - Any additional context
-    validations:
-      required: true
-
-  - type: input
-    attributes:
-      label: Page URL
-      description: The URL of the problem page.
-    validations:
-      required: false
-
-  - type: textarea
-    attributes:
-      label: Screenshot / Media
-      description: Add screenshot / media if you have them
-    validations:
-      required: false
@@ -16,15 +16,13 @@ on:
      - 'release/**'
    paths-ignore:
      - 'docs/**'
+      - '.github/**'
  pull_request:
    branches:
      - '*'
    paths-ignore:
      - 'docs/**'
-
-concurrency:
-  group: ${{ github.workflow }}-${{ github.ref }}
-  cancel-in-progress: true
+      - '.github/**'

 jobs:
  group_targets:
@@ -34,6 +32,7 @@ jobs:
    outputs:
      matrix: ${{ steps.set-matrix.outputs.matrix }}
      timestamp: ${{ steps.set-timestamp.outputs.timestamp }}
+      tagname: ${{ steps.set-tag.outputs.tagname }}
      branchname: ${{ steps.set-branch.outputs.branchname }}
    steps:
      - uses: actions/checkout@v4
@@ -54,13 +53,7 @@ jobs:
        run: echo "::set-output name=timestamp::$(date +"%Y%m%d%H%M%S")"

      - id: set-branch
-        run: |
-          echo "branchname=${{
-            github.event_name == 'pull_request' &&
-            format('pr-{0}', github.event.pull_request.number) ||
-            github.head_ref ||
-            github.ref_name
-          }}" >> $GITHUB_OUTPUT
+        run: echo "::set-output name=branchname::${GITHUB_HEAD_REF:-${GITHUB_REF#refs/heads/}}"

      - name: Debug Matrix Output
        if: runner.debug == '1'
@@ -70,9 +63,9 @@ jobs:
          echo "$(./Tools/ci/generate_board_targets_json.py --group --verbose)"

  setup:
-    name: Build Group [${{ matrix.group }}][${{ matrix.arch == 'nuttx' && 'x86' || 'arm64' }}]
+    name: Build Group [${{ matrix.group }}]
    # runs-on: ubuntu-latest
-    runs-on: [runs-on,"runner=8cpu-linux-${{ matrix.runner }}","image=ubuntu24-full-${{ matrix.runner }}","run-id=${{ github.run_id }}",spot=false]
+    runs-on: [runs-on,runner=8cpu-linux-x64,image=ubuntu22-full-x64,"run-id=${{ github.run_id }}",spot=false]
    needs: group_targets
    strategy:
      matrix: ${{ fromJson(needs.group_targets.outputs.matrix) }}
@@ -107,7 +100,7 @@ jobs:

      - name: Building [${{ matrix.group }}]
        run: |
-            ./Tools/ci/build_all_runner.sh ${{matrix.targets}} ${{matrix.arch}}
+            ./Tools/ci/build_all_runner.sh ${{matrix.targets}}

      - name: Arrange Build Artifacts
        run: |
@@ -125,7 +118,7 @@ jobs:
  artifacts:
    name: Upload Artifacts to S3
    # runs-on: ubuntu-latest
-    runs-on: [runs-on,runner=1cpu-linux-x64,image=ubuntu24-full-x64,"run-id=${{ github.run_id }}",spot=false]
+    runs-on: [runs-on,runner=1cpu-linux-x64,image=ubuntu22-full-x64,"run-id=${{ github.run_id }}",spot=false]
    needs: [setup, group_targets]
    if: contains(fromJSON('["main", "stable", "beta"]'), needs.group_targets.outputs.branchname)
    steps:
@@ -153,12 +146,10 @@ jobs:

  release:
    name: Create Release and Upload Artifacts
-    permissions:
-      contents: write
    # runs-on: ubuntu-latest
-    runs-on: [runs-on,runner=1cpu-linux-x64,image=ubuntu24-full-x64,"run-id=${{ github.run_id }}",spot=false]
+    runs-on: [runs-on,runner=1cpu-linux-x64,image=ubuntu22-full-x64,"run-id=${{ github.run_id }}",spot=false]
    needs: [setup, group_targets]
-    if: startsWith(github.ref, 'refs/tags/')
+    if: startsWith(github.ref, 'refs/tags/v')
    steps:
      - name: Download Artifacts
        uses: actions/download-artifact@v4
@@ -17,9 +17,6 @@ on:
      - 'docs/**'
      - '.github/**'

-env:
-  RUNS_IN_DOCKER: true
-
 jobs:
  build_and_test:
    name: Build and Test
@@ -1,3 +1,4 @@
+
 name: Container build

 on:
@@ -9,54 +10,45 @@ on:
      - 'release/**'
    tags:
      - 'v*'
+    paths-ignore:
+      - 'docs/**'
+      - '.github/**'
  pull_request:
    branches:
      - '*'
-    paths:
-      - '.github/workflows/dev_container.yml'
-      - 'Tools/setup/ubuntu.sh'
-      - 'Tools/setup/requirements.txt'
-      - 'Tools/setup/Dockerfile'
-      - 'Tools/setup/docker-entrypoint.sh'
-  workflow_dispatch:
-    inputs:
-      px4_version:
-        description: 'Container tag (e.g. v1.16.0)'
-        required: true
-        type: string
-      deploy_to_registry:
-        description: 'Whether to push built images to the registry'
-        required: false
-        type: boolean
-        default: false
+    paths-ignore:
+      - 'docs/**'
+      - '.github/**'

 jobs:
-  setup:
-    name: Set Tags and Variables
-    permissions:
-      contents: read
-    runs-on: [runs-on,"runner=1cpu-linux-x64","image=ubuntu24-full-x64","run-id=${{ github.run_id }}",spot=false,extras=s3-cache]
-    outputs:
-      px4_version: ${{ steps.px4_version.outputs.px4_version }}
-      meta_tags: ${{ steps.meta.outputs.tags }}
-      meta_labels: ${{ steps.meta.outputs.labels }}
+  build:
+    name: Build and Push Container
+    runs-on: [runs-on,runner=8cpu-linux-x64,image=ubuntu24-full-x64,"run-id=${{ github.run_id }}",spot=false]
    steps:
-      - uses: runs-on/action@v1
      - uses: actions/checkout@v4
        with:
          fetch-tags: true
          submodules: false
          fetch-depth: 0

-      # If manual dispatch, take the user‐provided input
-      - name: Set PX4 Tag Version
-        id: px4_version
+      - name: Set PX4 Tag
+        id: px4-tag
        run: |
-          if [[ "${{ github.event_name }}" == "workflow_dispatch" ]]; then
-            echo "px4_version=${{ github.event.inputs.px4_version }}" >> $GITHUB_OUTPUT
-          else
-            echo "px4_version=$(git describe --tags --match 'v[0-9]*')" >> $GITHUB_OUTPUT
-          fi
+          echo "tag=$(git describe --tags --match 'v[0-9]*')" >> $GITHUB_OUTPUT
+
+      - name: Login to Docker Hub
+        uses: docker/login-action@v3
+        if: github.event_name != 'pull_request'
+        with:
+          username: ${{ secrets.DOCKERHUB_USERNAME }}
+          password: ${{ secrets.DOCKERHUB_TOKEN }}
+
+      - name: Login to GitHub Container Registry
+        uses: docker/login-action@v3
+        with:
+          registry: ghcr.io
+          username: ${{ github.actor }}
+          password: ${{ secrets.GITHUB_TOKEN }}

      - name: Extract metadata (tags, labels) for Docker
        id: meta
@@ -64,125 +56,52 @@ jobs:
        with:
          images: |
            ghcr.io/PX4/px4-dev
-            px4io/px4-dev
+            ${{ (github.event_name != 'pull_request') && 'px4io/px4-dev' || '' }}
          tags: |
-            type=raw,enable=true,value=${{ steps.px4_version.outputs.px4_version }},priority=1000
-
-  build:
-    name: Build Container (${{ matrix.arch }})
-    permissions:
-      contents: read
-      packages: write
-    needs: setup
-    strategy:
-      matrix:
-        include:
-          - platform: linux/arm64
-            arch: arm64
-            runner: arm64
-          - platform: linux/amd64
-            arch: amd64
-            runner: x64
-    runs-on: [runs-on,"runner=8cpu-linux-${{ matrix.runner }}","image=ubuntu24-full-${{ matrix.runner }}","run-id=${{ github.run_id }}",spot=false,extras=s3-cache]
-    steps:
-      - uses: runs-on/action@v1
-      - uses: actions/checkout@v4
-        with:
-          fetch-tags: true
-          submodules: false
-          fetch-depth: 0
-
-      - name: Login to Docker Hub
-        uses: docker/login-action@v3
-        if: ${{ startsWith(github.ref, 'refs/tags/') || (github.event_name == 'workflow_dispatch' && github.event.inputs.deploy_to_registry) }}
-        with:
-          username: ${{ secrets.DOCKERHUB_USERNAME }}
-          password: ${{ secrets.DOCKERHUB_TOKEN }}
-
-      - name: Login to GitHub Container Registry
-        uses: docker/login-action@v3
-        if: ${{ startsWith(github.ref, 'refs/tags/') || (github.event_name == 'workflow_dispatch' && github.event.inputs.deploy_to_registry) }}
-        with:
-          registry: ghcr.io
-          username: ${{ github.actor }}
-          password: ${{ secrets.GITHUB_TOKEN }}
+            type=raw,enable=true,value=${{ steps.px4-tag.outputs.tag }},priority=1000

      - name: Set up Docker Buildx
        uses: docker/setup-buildx-action@v3
-        with:
-          driver: docker-container
-          platforms: ${{ matrix.platform }}

-      - name: Build and Load Container Image
+      - name: Build and load container image
        uses: docker/build-push-action@v6
        id: docker
        with:
          context: Tools/setup
-          tags: |
-            ghcr.io/px4/px4-dev:${{ needs.setup.outputs.px4_version }}-${{ matrix.arch }}
-            px4io/px4-dev:${{ needs.setup.outputs.px4_version }}-${{ matrix.arch }}
-          labels: ${{ needs.setup.outputs.meta_labels }}
-          platforms: ${{ matrix.platform }}
-          load: false
-          push: ${{ startsWith(github.ref, 'refs/tags/') || (github.event_name == 'workflow_dispatch' && github.event.inputs.deploy_to_registry) }}
-          provenance: false
-          cache-from: type=gha,version=1
-          cache-to: type=gha,version=1,mode=max
+          tags: ${{ steps.meta.outputs.tags }}
+          labels: ${{ steps.meta.outputs.labels }}
+          platforms: |
+            linux/amd64
+          load: true
+          push: false
+          cache-from: type=s3,blobs_prefix=cache/${{ github.repository }}/,manifests_prefix=cache/${{ github.repository }}/,region=${{ env.RUNS_ON_AWS_REGION }},bucket=${{ env.RUNS_ON_S3_BUCKET_CACHE }}
+          cache-to: type=s3,blobs_prefix=cache/${{ github.repository }}/,manifests_prefix=cache/${{ github.repository }}/,region=${{ env.RUNS_ON_AWS_REGION }},bucket=${{ env.RUNS_ON_S3_BUCKET_CACHE }},mode=max

-  deploy:
-    name: Deploy To Registry
-    permissions:
-      contents: read
-      packages: write
-    runs-on: [runs-on,"runner=8cpu-linux-x64","image=ubuntu24-full-x64","run-id=${{ github.run_id }}",spot=false,extras=s3-cache]
-    needs: [build, setup]
-    if: ${{ startsWith(github.ref, 'refs/tags/') || (github.event_name == 'workflow_dispatch' && github.event.inputs.deploy_to_registry) }}
-    steps:
-      - uses: runs-on/action@v1
-      - uses: actions/checkout@v4
-        with:
-          fetch-tags: true
-          submodules: false
-          fetch-depth: 0
-
-      - name: Login to Docker Hub
-        uses: docker/login-action@v3
-        with:
-          username: ${{ secrets.DOCKERHUB_USERNAME }}
-          password: ${{ secrets.DOCKERHUB_TOKEN }}
-
-      - name: Login to GitHub Container Registry
-        uses: docker/login-action@v3
-        with:
-          registry: ghcr.io
-          username: ${{ github.actor }}
-          password: ${{ secrets.GITHUB_TOKEN }}
-
-      - name: Verify Images Exist Before Creating Manifest
+      - name: Get Tag Name
+        id: tag_name
        run: |
-          docker manifest inspect px4io/px4-dev:${{ needs.setup.outputs.px4_version }}-arm64 || echo "⚠️ Warning: No ARM64 image found!"
-          docker manifest inspect px4io/px4-dev:${{ needs.setup.outputs.px4_version }}-amd64 || echo "⚠️ Warning: No AMD64 image found!"
-          docker manifest inspect ghcr.io/px4/px4-dev:${{ needs.setup.outputs.px4_version }}-arm64 || echo "⚠️ Warning: No ARM64 image found!"
-          docker manifest inspect ghcr.io/px4/px4-dev:${{ needs.setup.outputs.px4_version }}-amd64 || echo "⚠️ Warning: No AMD64 image found!"
+          echo "::set-output name=tag_name::$(echo '${{ fromJSON(steps.docker.outputs.metadata)['image.name'] }}' | sed 's/,.*$//')"

-      - name: Create and Push Multi-Arch Manifest for Docker Hub
-        run: |
-          docker manifest create px4io/px4-dev:${{ needs.setup.outputs.px4_version }} \
-            --amend px4io/px4-dev:${{ needs.setup.outputs.px4_version }}-arm64 \
-            --amend px4io/px4-dev:${{ needs.setup.outputs.px4_version }}-amd64
+      - name: make quick_check
+        uses: addnab/docker-run-action@v3
+        with:
+          image: ${{ steps.tag_name.outputs.tag_name }}
+          options: -v ${{ github.workspace }}:/workspace
+          run: |
+            cd /workspace
+            git config --global --add safe.directory /workspace
+            make px4_sitl_default
+            make px4_fmu-v6x_default

-          docker manifest annotate px4io/px4-dev:${{ needs.setup.outputs.px4_version }} px4io/px4-dev:${{ needs.setup.outputs.px4_version }}-arm64 --arch arm64
-          docker manifest annotate px4io/px4-dev:${{ needs.setup.outputs.px4_version }} px4io/px4-dev:${{ needs.setup.outputs.px4_version }}-amd64 --arch amd64
-
-          docker manifest push px4io/px4-dev:${{ needs.setup.outputs.px4_version }}
-
-      - name: Create and Push Multi-Arch Manifest for GHCR
-        run: |
-          docker manifest create ghcr.io/px4/px4-dev:${{ needs.setup.outputs.px4_version }} \
-            --amend ghcr.io/px4/px4-dev:${{ needs.setup.outputs.px4_version }}-arm64 \
-            --amend ghcr.io/px4/px4-dev:${{ needs.setup.outputs.px4_version }}-amd64
-
-          docker manifest annotate ghcr.io/px4/px4-dev:${{ needs.setup.outputs.px4_version }} ghcr.io/px4/px4-dev:${{ needs.setup.outputs.px4_version }}-arm64 --arch arm64
-          docker manifest annotate ghcr.io/px4/px4-dev:${{ needs.setup.outputs.px4_version }} ghcr.io/px4/px4-dev:${{ needs.setup.outputs.px4_version }}-amd64 --arch amd64
-
-          docker manifest push ghcr.io/px4/px4-dev:${{ needs.setup.outputs.px4_version }}
+      - name: Push container image
+        uses: docker/build-push-action@v6
+        with:
+          context: Tools/setup
+          tags: ${{ steps.meta.outputs.tags }}
+          labels: ${{ steps.meta.outputs.labels }}
+          platforms: |
+            linux/amd64
+          provenance: mode=max
+          push: ${{ github.event_name != 'pull_request' }}
+          cache-from: type=s3,blobs_prefix=cache/${{ github.repository }}/,manifests_prefix=cache/${{ github.repository }}/,region=${{ env.RUNS_ON_AWS_REGION }},bucket=${{ env.RUNS_ON_S3_BUCKET_CACHE }}
+          cache-to: type=s3,blobs_prefix=cache/${{ github.repository }}/,manifests_prefix=cache/${{ github.repository }}/,region=${{ env.RUNS_ON_AWS_REGION }},bucket=${{ env.RUNS_ON_S3_BUCKET_CACHE }},mode=max
@@ -79,21 +79,16 @@ jobs:

      - name: Deploy
        run: |
-          git clone --single-branch --branch main --depth 1 https://${{ secrets.PX4BUILTBOT_PERSONAL_ACCESS_TOKEN }}@github.com/PX4/docs.px4.io.git
-          # make it an orphan branch      
+          git clone --single-branch --branch main https://${{ secrets.PX4BUILTBOT_PERSONAL_ACCESS_TOKEN }}@github.com/PX4/docs.px4.io.git
+          rm -rf docs.px4.io/${BRANCH_NAME}
+          mkdir -p docs.px4.io/${BRANCH_NAME}
+          cp -r ~/_book/* docs.px4.io/${BRANCH_NAME}/
          cd docs.px4.io
-          CURRENT_DATETIME=$(date +'%Y%m%d_%H_%M')
-          git checkout --orphan "${CURRENT_DATETIME}_main"
-          rm -rf ${BRANCH_NAME}
-          mkdir -p ${BRANCH_NAME}
-          cp -r ~/_book/* ${BRANCH_NAME}/
          git config --global user.name "${{ secrets.PX4BUILDBOT_USER }}"
          git config --global user.email "${{ secrets.PX4BUILDBOT_EMAIL }}"
-          git add .
+          git add ${BRANCH_NAME}
          git commit -a -m "PX4 docs build update (vitepress) `date`"
-          # push branch as backup
-          git push origin "${CURRENT_DATETIME}_main"
-          # Now make main from backup and push updated
-          git branch -D main
-          git checkout -b main
+          #git add .
+          #git commit --amend -m "PX4 docs build update (vitepress) `date`"
+          #git commit --allow-empty -m "Empty commit to force rebuild"
          git push origin main -f
@@ -27,7 +27,7 @@ jobs:
          "failsafe_web",
        ]
    container:
-      image: px4io/px4-dev:v1.16.0-ondemand
+      image: px4io/px4-dev-nuttx-focal:2022-08-12
      options: --privileged --ulimit core=-1 --security-opt seccomp=unconfined
    steps:
      - name: Install Node v20.18.0
@@ -39,9 +39,6 @@ jobs:
        with:
          fetch-depth: 0

-      - name: Git ownership workaround
-        run: git config --system --add safe.directory '*'
-
      - name: Install empscripten
        run: |
          git clone https://github.com/emscripten-core/emsdk.git _emscripten_sdk
@@ -28,7 +28,7 @@ jobs:
    name: Analyzing ${{ matrix.target }}
    runs-on: [runs-on,runner=8cpu-linux-x64,image=ubuntu24-full-x64,"run-id=${{ github.run_id }}",spot=false]
    container:
-      image: px4io/px4-dev:v1.16.0-ondemand
+      image: px4io/px4-dev-nuttx-focal
    strategy:
      matrix:
        target: [px4_fmu-v5x, px4_fmu-v6x]
@@ -80,7 +80,7 @@ jobs:
        id: bloaty-step
        with:
          bloaty-file-args: ./with-change.elf -- ./before-change.elf
-          bloaty-additional-args: -d sections,symbols -s vm -n 20
+          bloaty-additional-args: -d sections,compileunits -s vm -n 20
          output-to-summary: true

      - name: Generate output
@@ -1,61 +0,0 @@
-name: ITCM check
-
-permissions:
-  contents: read
-
-on:
-  push:
-    branches:
-      - 'main'
-    paths-ignore:
-      - 'docs/**'
-      - '.github/**'
-  pull_request:
-    branches:
-      - '*'
-    paths-ignore:
-      - 'docs/**'
-      - '.github/**'
-
-jobs:
-  check_itcm:
-    name: Checking ${{ matrix.target }}
-    runs-on: [runs-on,runner=8cpu-linux-x64,image=ubuntu24-full-x64,"run-id=${{ github.run_id }}",spot=false]
-    container:
-      image: px4io/px4-dev:v1.16.0-ondemand
-    strategy:
-      fail-fast: false
-      matrix:
-        include:
-          - target: px4_fmu-v5x
-            scripts: >
-              boards/px4/fmu-v5x/nuttx-config/scripts/itcm_gen_functions.ld
-              boards/px4/fmu-v5x/nuttx-config/scripts/itcm_static_functions.ld
-          - target: px4_fmu-v6xrt
-            scripts: >
-              boards/px4/fmu-v6xrt/nuttx-config/scripts/itcm_functions_includes.ld
-              boards/px4/fmu-v6xrt/nuttx-config/scripts/itcm_static_functions.ld
-          - target: nxp_tropic-community
-            scripts: >
-              boards/nxp/tropic-community/nuttx-config/scripts/itcm_functions_includes.ld
-              boards/nxp/tropic-community/nuttx-config/scripts/itcm_static_functions.ld
-    steps:
-      - uses: actions/checkout@v4
-        with:
-          fetch-depth: 0
-          submodules: recursive
-
-      - name: Git ownership workaround
-        run: git config --system --add safe.directory '*'
-
-      - name: Build Target
-        run: make ${{ matrix.target }}
-
-      - name: Copy built ELF
-        run: cp ./build/**/*.elf ./built.elf
-
-      - name: Install itcm-check dependencies
-        run: pip3 install -r Tools/setup/optional-requirements.txt --break-system-packages
-
-      - name: Execute the itcm-check
-        run: python3 Tools/itcm_check.py --elf-file built.elf --script-files ${{ matrix.scripts }}
@@ -31,7 +31,7 @@ jobs:
    - name: Build PX4 and Run Test [${{ matrix.config }}]
      uses: addnab/docker-run-action@v3
      with:
-        image: px4io/px4-dev:v1.16.0-ondemand
+        image: px4io/px4-dev-nuttx-focal:2022-08-12
        options: -v ${{ github.workspace }}:/workspace
        run: |
          cd /workspace
@@ -301,11 +301,6 @@ CONFIG:
      buildType: MinSizeRel
      settings:
        CONFIG: holybro_durandal-v1_default
-    holybro_kakuteh7dualimu_default:
-      short: holybro_kakuteh7dualimu
-      buildType: MinSizeRel
-      settings:
-        CONFIG: holybro_kakuteh7dualimu_default
    matek_h743-slim_default:
      short: matek_h743-slim
      buildType: MinSizeRel
@@ -7,34 +7,33 @@ See [the documentation on Maintainers](https://docs.px4.io/main/en/contribute/ma

 | Name                    | Sector | GitHub | Chat | email
 |-------------------------|--------|--------|------|----------------
-| Lorenz Meier | Founder | [@LorenzMeier](https://github.com/LorenzMeier) |  | <lorenz@px4.io>
-| Daniel Agar | Architecture | [@dagar](https://github.com/dagar) | daniel_agar | <daniel@agar.ca>
-| Beat Küng | Architecture | [@bkueng](https://github.com/bkueng) | beatkueng | <beat-kueng@gmx.net>
-| Ramón Roche | CI / Testing | [@mrpollo](https://github.com/mrpollo) | rroche | <rroche@linuxfoundation.org>
-| Mathieu Bresciani | State Estimation | [@bresch](https://github.com/bresch) | mbresch |
-| Paul Riseborough | State Estimation | [@priseborough](https://github.com/priseborough) |  |
-| David Sidrane | RTOS / NuttX | [@davids5](https://github.com/davids5) | david_s5 | <David.Sidrane@Nscdg.com>
-| Jayoung Lim | Simulation | [@Jaeyoung-Lim](https://github.com/Jaeyoung-Lim) | jaeyounglim. | <jalim@ethz.ch>
-| Beniamino Pozzan | ROS 2 | [@beniaminopozzan](https://github.com/beniaminopozzan) | beniaminopozzan | <beniamino.pozzan@gmail.com>
-| Matthias Grob | Multirotor | [@MaEtUgR](https://github.com/MaEtUgR) | maetugr |
-| Silvan Fuhrer | Fixed-Wing / VTOL | [@sfuhrer](https://github.com/sfuhrer) | sfuhrer |
-| Christian Friedrich | Rover | [@chfriedrich98](https://github.com/chfriedrich98) | christian982564 |
-| Pedro Roque | Spacecraft | [@Pedro-Roque](https://github.com/Pedro-Roque) | .pedroroque | <padr@kth.se>
-| Jacob Dahl | Simulation | [@dakejahl](https://github.com/dakejahl) | dakejahl | <dahl.jakejacob@gmail.com>
+| Lorenz Meier | Founder | [LorenzMeier][LorenzMeier] |  | <lorenz@px4.io>
+| Daniel Agar | Architecture | [dagar][dagar] | daniel_agar | <daniel@agar.ca>
+| Beat Küng | Architecture | [bkueng][bkueng] | beatkueng | <beat-kueng@gmx.net>
+| Ramón Roche | CI / Testing | [mrpollo][mrpollo] | rroche | <rroche@linuxfoundation.org>
+| Mathieu Bresciani | State Estimation | [bresch][bresch] | mbresch |
+| Paul Riseborough | State Estimation | [priseborough][priseborough] |  |
+| David Sidrane | RTOS / NuttX | [davids5][davids5] | david_s5 | <David.Sidrane@Nscdg.com>
+| Jayoung Lim | Simulation | [Jaeyoung-Lim][Jaeyoung-Lim] | jaeyounglim. | <jalim@ethz.ch>
+| Beniamino Pozzan | ROS 2 | [beniaminopozzan][beniaminopozzan] | beniaminopozzan | <beniamino.pozzan@gmail.com>
+| Matthias Grob | Multirotor | [MaEtUgR][MaEtUgR] | maetugr |
+| Silvan Fuhrer | Fixed-Wing / VTOL | [sfuhrer][sfuhrer] | sfuhrer |
+| Christian Friedrich | Rover | [chfriedrich98][chfriedrich98] | christian982564 |
+| Pedro Roque | Spacecraft | [Pedro-Roque][Pedro-Roque] | .pedroroque | <padr@kth.se>


 **Documentation Maintainers**

 | Name | GitHub | Chat | email
 |------|--------|------|----------------------
-| Hamish Willee  | [@hamishwillee](https://github.com/hamishwillee) | hamishwillee |
+| Hamish Willee  | [hamishwillee][hamishwillee] | hamishwillee |

 **Release Managers**

 | Name | GitHub | Chat | email
 |------|--------|------|----------------------
-| Ramón Roche | [@mrpollo](https://github.com/mrpollo) | rroche | <rroche@linuxfoundation.org>
-| Daniel Agar | [@dagar](https://github.com/dagar) | daniel_agar | <daniel@agar.ca>
+| Ramón Roche | [mrpollo][mrpollo] | rroche | <rroche@linuxfoundation.org>
+| Daniel Agar | [dagar][dagar] | daniel_agar | <daniel@agar.ca>

 **Retired Maintainers**

@@ -300,8 +300,6 @@ uorb_graphs:
 	@$(MAKE) --no-print-directory px4_fmu-v2_default uorb_graph
 	@$(MAKE) --no-print-directory px4_fmu-v4_default uorb_graph
 	@$(MAKE) --no-print-directory px4_fmu-v5_default uorb_graph
-	@$(MAKE) --no-print-directory px4_fmu-v5x_default uorb_graph
-	@$(MAKE) --no-print-directory px4_fmu-v6x_default uorb_graph
 	@$(MAKE) --no-print-directory px4_sitl_default uorb_graph

 px4io_update:
@@ -1,47 +0,0 @@
-#!/bin/sh
-#
-# @name HexarotorX SITL for SIH
-#
-# @type Hexarotor x
-# @class Copter
-#
-# @maintainer Matthias Grob <maetugr@gmail.com>
-#
-
-. ${R}etc/init.d/rc.mc_defaults
-
-PX4_SIMULATOR=${PX4_SIMULATOR:=sihsim}
-PX4_SIM_MODEL=${PX4_SIM_MODEL:=hex}
-
-param set-default SENS_EN_GPSSIM 1
-param set-default SENS_EN_BAROSIM 1
-param set-default SENS_EN_MAGSIM 1
-
-param set SIH_VEHICLE_TYPE 4
-
-# Symmetric hexacopter X clockwise motor numbering
-param set-default CA_ROTOR_COUNT 6
-param set-default CA_ROTOR0_PX 0.866
-param set-default CA_ROTOR0_PY 0.5
-param set-default CA_ROTOR1_PX 0
-param set-default CA_ROTOR1_PY 1
-param set-default CA_ROTOR1_KM -0.05
-param set-default CA_ROTOR2_PX -0.866
-param set-default CA_ROTOR2_PY 0.5
-param set-default CA_ROTOR3_PX -0.866
-param set-default CA_ROTOR3_PY -0.5
-param set-default CA_ROTOR3_KM -0.05
-param set-default CA_ROTOR4_PX 0
-param set-default CA_ROTOR4_PY -1
-param set-default CA_ROTOR5_PX 0.866
-param set-default CA_ROTOR5_PY -0.5
-param set-default CA_ROTOR5_KM -0.05
-
-param set-default PWM_MAIN_FUNC1 101
-param set-default PWM_MAIN_FUNC2 102
-param set-default PWM_MAIN_FUNC3 103
-param set-default PWM_MAIN_FUNC4 104
-param set-default PWM_MAIN_FUNC5 105
-param set-default PWM_MAIN_FUNC6 106
-
-param set-default EKF2_GPS_DELAY 0
@@ -37,8 +37,8 @@ param set-default RO_YAW_P 5

 # Rover Position Control Parameters
 param set-default RO_SPEED_LIM 2
-param set-default RO_SPEED_I 0.01
-param set-default RO_SPEED_P 0.1
+param set-default RO_SPEED_I 0.5
+param set-default RO_SPEED_P 1

 # Pure Pursuit parameters
 param set-default PP_LOOKAHD_GAIN 1
@@ -20,7 +20,7 @@ param set-default COM_ARM_CHK_ESCS 0  # We don't have ESCs
 param set-default FD_ESCS_EN 0 # We don't have ESCs - but maybe we need this later?

 param set-default CA_AIRFRAME 14
-param set-default MAV_TYPE 99
+param set-default MAV_TYPE 7  # Using Airship

 param set-default CA_THRUSTER_CNT 8
 param set-default CA_R_REV 0
@@ -109,7 +109,6 @@ px4_add_romfs_files(
 	10041_sihsim_airplane
 	10042_sihsim_xvert
 	10043_sihsim_standard_vtol
-	10044_sihsim_hex

 	17001_flightgear_tf-g1
 	17002_flightgear_tf-g2
@@ -1,13 +1,15 @@
 #!/bin/sh
 # shellcheck disable=SC2154

+echo "INFO  [init] Gazebo simulator"
+
 # Enforce minimum gz version as Harmonic (gz-sim8)
 MIN_GZ_VERSION="8.0.0"
 GZ_SIM_VERSION=$(gz sim --versions 2>/dev/null | head -n 1 | tr -d ' ')

 if [ -z "$GZ_SIM_VERSION" ]; then
-	echo "ERROR [init] Gazebo gz sim not found. Please install gz-harmonic"
-	exit 1
+    echo "ERROR [init] Gazebo gz sim not found. Please install gz-harmonic"
+    exit 1
 fi

 # Use sort compare, check that MIN_GZ_VERSION is ordered last
@@ -15,8 +17,6 @@ if [ "$(printf '%s\n' "$GZ_SIM_VERSION" "$MIN_GZ_VERSION" | sort -V | head -n1)"
 	gz_command="gz"
 	gz_sub_command="sim"

-	echo "INFO  [init] Gazebo simulator $GZ_SIM_VERSION"
-
 	# Specify render engine if `GZ_SIM_RENDER_ENGINE` is set
 	# (for example, if you want to use Ogre 1.x instead of Ogre 2.x):
 	if [ -n "${PX4_GZ_SIM_RENDER_ENGINE}" ]; then
@@ -24,11 +24,11 @@ if [ "$(printf '%s\n' "$GZ_SIM_VERSION" "$MIN_GZ_VERSION" | sort -V | head -n1)"
 		gz_sub_command="${gz_sub_command} --render-engine ${PX4_GZ_SIM_RENDER_ENGINE}"
 	fi
 else
-	echo "ERROR [init] Gazebo version too hold ($GZ_SIM_VERSION). Minimum required version is $MIN_GZ_VERSION"
-	exit 1
+    echo "ERROR [init] Gazebo gz sim version is too old ($GZ_SIM_VERSION). Minimum required version is $MIN_GZ_VERSION"
+    exit 1
 fi

-# If not standalone launch the world
+# If not standalone
 if [ -z "${PX4_GZ_STANDALONE}" ]; then

 	# Look for an already running world
@@ -89,57 +89,31 @@ while [ $ATTEMPTS -gt 0 ]; do
 	sleep 1
 done

-# World is ready, check if custom location is provided
-if [ -n "${PX4_HOME_LAT}" ] || [ -n "${PX4_HOME_LON}" ] || [ -n "${PX4_HOME_ALT}" ]; then
-	# must have all three
-	if [ -z "${PX4_HOME_LAT}" ] || [ -z "${PX4_HOME_LON}" ] || [ -z "${PX4_HOME_ALT}" ]; then
-		echo "ERROR [init] PX4_HOME_LAT, PX4_HOME_LON and PX4_HOME_ALT must all be set"
-		exit 1
-	fi
-	echo "INFO  [init] Setting world origin to lat: ${PX4_HOME_LAT}, lon: ${PX4_HOME_LON}, alt: ${PX4_HOME_ALT}"
-	${gz_command} service -s "/world/${PX4_GZ_WORLD}/set_spherical_coordinates" \
-		--reqtype gz.msgs.SphericalCoordinates \
-		--reptype gz.msgs.Boolean \
-		--timeout 1000 \
-		--req "surface_model: EARTH_WGS84, latitude_deg: ${PX4_HOME_LAT}, longitude_deg: ${PX4_HOME_LON}, elevation: ${PX4_HOME_ALT}" > /dev/null 2>&1
-fi
-
 # Start gz_bridge - either spawn a model or connect to existing one
 if [ -n "${PX4_SIM_MODEL#*gz_}" ] && [ -z "${PX4_GZ_MODEL_NAME}" ]; then
 	# Spawn a model
 	MODEL_NAME="${PX4_SIM_MODEL#*gz_}"
 	MODEL_NAME_INSTANCE="${MODEL_NAME}_${px4_instance}"

-	sdf_pose_str=""
-
+	POSE_ARG=""
 	if [ -n "${PX4_GZ_MODEL_POSE}" ]; then
-		pose_x=$(echo "${PX4_GZ_MODEL_POSE}" | awk -F',' '{print $1}')
-		pose_y=$(echo "${PX4_GZ_MODEL_POSE}" | awk -F',' '{print $2}')
-		pose_z=$(echo "${PX4_GZ_MODEL_POSE}" | awk -F',' '{print $3}')
-		pose_roll=$(echo "${PX4_GZ_MODEL_POSE}" | awk -F',' '{print $4}')
-		pose_pitch=$(echo "${PX4_GZ_MODEL_POSE}" | awk -F',' '{print $5}')
-		pose_yaw=$(echo "${PX4_GZ_MODEL_POSE}" | awk -F',' '{print $6}')
+		pos_x=$(echo "${PX4_GZ_MODEL_POSE}" | awk -F',' '{print $1}')
+		pos_y=$(echo "${PX4_GZ_MODEL_POSE}" | awk -F',' '{print $2}')
+		pos_z=$(echo "${PX4_GZ_MODEL_POSE}" | awk -F',' '{print $3}')
+		pos_x=${pos_x:-0}
+		pos_y=${pos_y:-0}
+		pos_z=${pos_z:-0}

-		pose_x=${pose_x:-0}
-		pose_y=${pose_y:-0}
-		pose_z=${pose_z:-0}
-		pose_roll=${pose_roll:-0}
-		pose_pitch=${pose_pitch:-0}
-		pose_yaw=${pose_yaw:-0}
-
-		sdf_pose_str="<pose> ${pose_x} ${pose_y} ${pose_z} ${pose_roll} ${pose_pitch} ${pose_yaw} </pose>"
-		echo "INFO  [init] Gazebo model pose: ${pose_x} ${pose_y} ${pose_z} ${pose_roll} ${pose_pitch} ${pose_yaw}"
+		POSE_ARG=", pose: { position: { x: ${pos_x}, y: ${pos_y}, z: ${pos_z} } }"
+		echo "INFO  [init] Spawning model at position: ${pos_x} ${pos_y} ${pos_z}"
 	fi

-	echo "INFO  [init] Spawning Gazebo model"
-
-	# include the actual SDF in this one, containing the pose if given
-	sdf_str="<sdf version=\"1.6\"> <include> <uri>file://${PX4_GZ_MODELS}/${MODEL_NAME}/model.sdf</uri> ${sdf_pose_str} </include> </sdf>"
+	echo "INFO  [init] Spawning model"

 	# Spawn model
 	${gz_command} service -s "/world/${PX4_GZ_WORLD}/create" --reqtype gz.msgs.EntityFactory \
 			--reptype gz.msgs.Boolean --timeout 5000 \
-			--req "name: \"${MODEL_NAME_INSTANCE}\", allow_renaming: false, sdf: '${sdf_str}'" > /dev/null 2>&1
+			--req "sdf_filename: \"${PX4_GZ_MODELS}/${MODEL_NAME}/model.sdf\", name: \"${MODEL_NAME_INSTANCE}\", allow_renaming: false${POSE_ARG}" > /dev/null 2>&1

 	# Wait for model to spawn
 	sleep 1
@@ -295,15 +295,10 @@ then
 	# for multi intances setup, add namespace prefix
 	uxrce_dds_ns="-n px4_$px4_instance"
 fi
-if [ "${PX4_UXRCE_DDS_NS+x}" ]; then
-	# Override, as variable is set (empty or not)
-	if [ -n "$PX4_UXRCE_DDS_NS" ]; then
-		# Override namespace if environment variable is non-empty
-		uxrce_dds_ns="-n $PX4_UXRCE_DDS_NS"
-	else
-		# Clear namespace if variable is empty
-		uxrce_dds_ns=""
-	fi
+if [ -n "$PX4_UXRCE_DDS_NS" ]
+then
+	# Override namespace if environment variable is defined
+	uxrce_dds_ns="-n $PX4_UXRCE_DDS_NS"
 fi
 if [ -n "$ROS_DOMAIN_ID" ]
 then
@@ -7,7 +7,6 @@
 #
 # @board px4_fmu-v2 exclude
 # @board bitcraze_crazyflie exclude
-# @board px4_fmu-v6x exclude
 #

 . ${R}etc/init.d/rc.mc_defaults
@@ -37,14 +37,14 @@ param set-default RO_JERK_LIM 5
 param set-default RO_MAX_THR_SPEED 1.9

 # Rover Rate Control Parameters
-param set-default RO_YAW_RATE_I 0.1
+param set-default RO_YAW_RATE_I 0.01
 param set-default RO_YAW_RATE_P 0.1
 param set-default RO_YAW_RATE_LIM 250
 param set-default RO_YAW_ACCEL_LIM 600
 param set-default RO_YAW_DECEL_LIM 600

 # Rover Attitude Control Parameters
-param set-default RO_YAW_P 2.5
+param set-default RO_YAW_P 5

 # Rover Position Control Parameters
 param set-default RO_SPEED_LIM 1.6
@@ -11,7 +11,7 @@
 . ${R}etc/init.d/rc.sc_defaults

 param set-default CA_AIRFRAME 14
-param set-default MAV_TYPE 99
+param set-default MAV_TYPE 7

 param set-default CA_THRUSTER_CNT 8
 param set-default CA_R_REV 0
@@ -15,8 +15,7 @@ control_allocator start
 #
 fw_rate_control start
 fw_att_control start
-fw_mode_manager start
-fw_lat_lon_control start
+fw_pos_control start
 airspeed_selector start

 #
@@ -13,6 +13,8 @@ param set-default MAV_TYPE 1
 #
 # Default parameters for fixed wing UAVs.
 #
+# there is a 2.5 factor applied on the _FS thresholds if for invalidation
+param set-default COM_POS_FS_EPH 50
 param set-default COM_VEL_FS_EVH 3

 param set-default COM_POS_LOW_EPH 50
@@ -20,5 +20,7 @@ param set-default NAV_ACC_RAD 2
 param set-default RTL_RETURN_ALT 30
 param set-default RTL_DESCEND_ALT 10

+param set-default GPS_UBX_DYNMODEL 6
+
 # lower RNG_FOG since MC are expected to fly closer over obstacles
 param set-default EKF2_RNG_FOG 1.0
@@ -5,8 +5,8 @@

 set VEHICLE_TYPE sc

-# MAV_TYPE_QUADROTOR 2
-#param set-default MAV_TYPE 12
+# MAV_TYPE_SPACECRAFT
+param set-default MAV_TYPE 7

 # Set micro-dds-client to use ethernet and IP-address 192.168.0.1
 param set-default UXRCE_DDS_AG_IP -1062731775
@@ -32,6 +32,15 @@ then
 	. ${R}etc/init.d/rc.rover_apps
 fi

+#
+# Spapcecraft setup.
+#
+if [ $VEHICLE_TYPE = sc ]
+then
+	# Start standard multicopter apps.
+	. ${R}etc/init.d/rc.sc_apps
+fi
+
 #
 # Differential Rover setup.
 #
@@ -27,8 +27,7 @@ fi

 fw_rate_control start vtol
 fw_att_control start vtol
-fw_mode_manager start
-fw_lat_lon_control start vtol
+fw_pos_control start vtol
 fw_autotune_attitude_control start vtol

 # Start Land Detector
@@ -10,6 +10,9 @@ set VEHICLE_TYPE vtol
 # MAV_TYPE_VTOL_FIXEDROTOR 22
 param set-default MAV_TYPE 22

+# there is a 2.5 factor applied on COM_POS_FS_EPH if for invalidation
+param set-default COM_POS_FS_EPH 50
+
 param set-default COM_POS_LOW_EPH 50

 param set-default MIS_TAKEOFF_ALT 20
@@ -39,7 +39,7 @@ set VEHICLE_TYPE none
 # Airframe parameter versioning
 # Value set to 1 by default but can optionally be overridden in the airframe configuration startup script.
 # Airframe maintainers can ensure a reset to the airframe defaults during an update by increasing by one.
-# e.g. add line "set PARAM_DEFAULTS_VER 2" in your airframe file to build the first update that enforces a reset.
+# e.g. add line "set PARAM_DEFAULTS_VER 2" in your airframe file to build the first update that enfoces a reset.
 set PARAM_DEFAULTS_VER 1

 #
@@ -27,9 +27,9 @@ do
    # - An old .msg version exists
    # - A translation header exists and is included

-    # Ignore changes to comments or constants and trim whitespace
-    content_a=$(git show "${BASE_COMMIT}:${file}" | grep -o '^[^#]*' | grep -v = | sed 's/^ *//;s/[ \t]*$//')
-    content_b=$(git show "${HEAD_COMMIT}:${file}" | grep -o '^[^#]*' | grep -v = | sed 's/^ *//;s/[ \t]*$//')
+    # Ignore changes to comments or constants
+    content_a=$(git show "${BASE_COMMIT}:${file}" | grep -o '^[^#]*' | grep -v =)
+    content_b=$(git show "${HEAD_COMMIT}:${file}" | grep -o '^[^#]*' | grep -v =)
    if [ "${content_a}" == "${content_b}" ]; then
      echo "No version update required for ${file}"
      continue
@@ -86,17 +86,21 @@ def process_target(px4board_file, target_name):
    assert platform, f"PLATFORM not found in {px4board_file}"

    if platform not in excluded_platforms:
-        container = 'ghcr.io/px4/px4-dev:v1.16.0-ondemand'
+        # get the container based on the platform and toolchain
        if platform == 'posix':
+            container = 'px4io/px4-dev-base-focal:2021-09-08'
            group = 'base'
            if toolchain:
                if toolchain.startswith('aarch64'):
+                    container = 'px4io/px4-dev-aarch64:2022-08-12'
                    group = 'aarch64'
                elif toolchain == 'arm-linux-gnueabihf':
+                    container = 'px4io/px4-dev-armhf:2023-06-26'
                    group = 'armhf'
                else:
                    if verbose: print(f'unmatched toolchain: {toolchain}')
        elif platform == 'nuttx':
+            container = 'px4io/px4-dev-nuttx-focal:2022-08-12'
            group = 'nuttx'
        else:
            if verbose: print(f'unmatched platform: {platform}')
@@ -120,7 +124,7 @@ if(verbose):
 # - Events
 metadata_targets = ['airframe_metadata', 'parameters_metadata', 'extract_events']
 grouped_targets['base'] = {}
-grouped_targets['base']['container'] = 'ghcr.io/px4/px4-dev:v1.16.0-ondemand'
+grouped_targets['base']['container'] = 'px4io/px4-dev-base-focal:2021-09-08'
 grouped_targets['base']['manufacturers'] = {}
 grouped_targets['base']['manufacturers']['px4'] = []
 grouped_targets['base']['manufacturers']['px4'] += metadata_targets
@@ -202,7 +206,6 @@ if (args.group):
    if(verbose):
        print(f'=:Architectures: [{grouped_targets.keys()}]')
    for arch in grouped_targets:
-        runner = 'x64' if arch == 'nuttx' else 'arm64'
        if(verbose):
            print(f'=:Processing: [{arch}]')
        temp_group = []
@@ -220,7 +223,6 @@ if (args.group):
                    "container": grouped_targets[arch]['container'],
                    "targets": targets,
                    "arch": arch,
-                    "runner": runner,
                    "group": group_name,
                    "len": len(grouped_targets[arch]['manufacturers'][man])
                })
@@ -238,7 +240,6 @@ if (args.group):
                        "container": grouped_targets[arch]['container'],
                        "targets": targets,
                        "arch": arch,
-                        "runner": runner,
                        "group": group_name,
                        "len": len(chunk),
                    })
@@ -259,7 +260,6 @@ if (args.group):
                "container": grouped_targets[arch]['container'],
                "targets": targets,
                "arch": arch,
-                "runner": runner,
                "group": group_name,
                "len": temp_len
            })
@@ -277,7 +277,6 @@ if (args.group):
                    "container": grouped_targets[arch]['container'],
                    "targets": targets,
                    "arch": arch,
-                    "runner": runner,
                    "group": group_name,
                    "len": len(chunk),
                })
@@ -4,8 +4,8 @@ mkdir artifacts
 cp **/**/*.px4 artifacts/
 cp **/**/*.elf artifacts/
 for build_dir_path in build/*/ ; do
-  build_dir_path=${build_dir_path::${#build_dir_path}-1}
  build_dir=${build_dir_path#*/}
+  build_dir=${build_dir::${#build_dir}-1}
  mkdir artifacts/$build_dir
  find artifacts/ -maxdepth 1 -type f -name "*$build_dir*"
  # Airframe
@@ -26,23 +26,21 @@ for build_dir_path in build/*/ ; do
  echo "----------"
 done

-if [ -d artifacts/px4_sitl_default ]; then
-  # general metadata
-  mkdir artifacts/_general/
-  cp artifacts/px4_sitl_default/airframes.xml artifacts/_general/
-  # Airframe
-  cp artifacts/px4_sitl_default/airframes.xml artifacts/_general/
-  # Parameters
-  cp artifacts/px4_sitl_default/parameters.xml artifacts/_general/
-  cp artifacts/px4_sitl_default/parameters.json artifacts/_general/
-  cp artifacts/px4_sitl_default/parameters.json.xz artifacts/_general/
-  # Actuators
-  cp artifacts/px4_sitl_default/actuators.json artifacts/_general/
-  cp artifacts/px4_sitl_default/actuators.json.xz artifacts/_general/
-  # Events
-  cp artifacts/px4_sitl_default/events/all_events.json.xz artifacts/_general/
-  # ROS 2 msgs
-  cp artifacts/px4_sitl_default/events/all_events.json.xz artifacts/_general/
-  # Module Docs
-  ls -la artifacts/_general/
-fi
+# general metadata
+mkdir artifacts/_general/
+cp artifacts/px4_sitl_default/airframes.xml artifacts/_general/
+# Airframe
+cp artifacts/px4_sitl_default/airframes.xml artifacts/_general/
+# Parameters
+cp artifacts/px4_sitl_default/parameters.xml artifacts/_general/
+cp artifacts/px4_sitl_default/parameters.json artifacts/_general/
+cp artifacts/px4_sitl_default/parameters.json.xz artifacts/_general/
+# Actuators
+cp artifacts/px4_sitl_default/actuators.json artifacts/_general/
+cp artifacts/px4_sitl_default/actuators.json.xz artifacts/_general/
+# Events
+cp artifacts/px4_sitl_default/events/all_events.json.xz artifacts/_general/
+# ROS 2 msgs
+cp artifacts/px4_sitl_default/events/all_events.json.xz artifacts/_general/
+# Module Docs
+ls -la artifacts/_general/
@@ -2,7 +2,19 @@

 if [ -z ${PX4_DOCKER_REPO+x} ]; then
 	echo "guessing PX4_DOCKER_REPO based on input";
-	if [[ $@ =~ .*clang.* ]] || [[ $@ =~ .*scan-build.* ]]; then
+	if [[ $@ =~ .*px4_fmu.* ]]; then
+		# nuttx-px4fmu-v{1,2,3,4,5}
+		PX4_DOCKER_REPO="px4io/px4-dev-nuttx-focal:2022-08-12"
+	elif [[ $@ =~ .*navio2.* ]] || [[ $@ =~ .*raspberry.* ]] || [[ $@ =~ .*beaglebone.* ]] || [[ $@ =~ .*pilotpi.default ]] || [[ $@ =~ .*navigator.* ]]; then
+		# beaglebone_blue_default, emlid_navio2_default, px4_raspberrypi_default, scumaker_pilotpi_default, bluerobotics_navigator_default
+		PX4_DOCKER_REPO="px4io/px4-dev-armhf:2023-06-26"
+	elif [[ $@ =~ .*pilotpi.arm64 ]]; then
+		# scumaker_pilotpi_arm64
+		PX4_DOCKER_REPO="px4io/px4-dev-aarch64:2022-08-12"
+	elif [[ $@ =~ .*navio2.* ]] || [[ $@ =~ .*raspberry.* ]] || [[ $@ =~ .*bebop.* ]]; then
+		# posix_rpi_cross, posix_bebop_default
+		PX4_DOCKER_REPO="px4io/px4-dev-armhf:2023-06-26"
+	elif [[ $@ =~ .*clang.* ]] || [[ $@ =~ .*scan-build.* ]]; then
 		# clang tools
 		PX4_DOCKER_REPO="px4io/px4-dev-clang:2021-02-04"
 	elif [[ $@ =~ .*tests* ]]; then
@@ -15,9 +27,17 @@ fi

 # otherwise default to nuttx
 if [ -z ${PX4_DOCKER_REPO+x} ]; then
-	PX4_DOCKER_REPO="px4io/px4-dev:v1.16.0-ondemand"
+	PX4_DOCKER_REPO="px4io/px4-dev-nuttx-focal:2022-08-12"
 fi

+# docker hygiene
+
+#Delete all stopped containers (including data-only containers)
+#docker rm $(docker ps -a -q)
+
+#Delete all 'untagged/dangling' (<none>) images
+#docker rmi $(docker images -q -f dangling=true)
+
 echo "PX4_DOCKER_REPO: $PX4_DOCKER_REPO";

 PWD=$( cd "$( dirname "${BASH_SOURCE[0]}" )" && pwd )
@@ -1,185 +0,0 @@
-#! /usr/bin/env python3
-
-"""
-Checks if the functions that should be mapped to ITCM are contained in the built ELF file.
-
-This helps against linker scripts that "rot" as the linker does not warn in case of a function
-not existing. Thus, it is possible to forget to update the linker script after a code update.
-
-The tool uses the DWARF debug info and the ELF symbol table section to identify which functions
-exist in the built ELF file.
-
-It is expected that the linker scripts that are analyzed by the tool are linker script include
-files that only contain the name of the sections (functions) that should be mapped to ITCM in
-the following format:
-```
-*(.text.arm_ack_irq)
-*(.text.arm_doirq)
-*(.text._ZN4uORB12DeviceMaster19getDeviceNodeLockedEPK12orb_metadatah)
-*(.text._ZN3Ekf20controlGravityFusionERKN9estimator9imuSampleE)
-[...]
-```
-
-A specific entry in the linker script file can be ignored by adding a comment, as shown in the following example:
-```
-*(.text.arm_ack_irq) /* itcm-check-ignore */
-```
-"""
-
-import argparse
-import re
-from elftools.elf.elffile import ELFFile
-from elftools.elf.sections import SymbolTableSection
-from elftools.dwarf.die import DIE
-from pathlib import Path
-from typing import List, Set
-
-
-def die_get_funcs_rec(die: DIE, ret: Set[str]):
-    """
-    Recursively gets the mangled and demangled name of all functions in the given `die`.
-
-    :param die: DIE to be processed. Is gathered recursively after passing a top DIE.
-    :param ret: Output set where all function names are added to.
-    """
-    if die.tag in ("DW_TAG_subprogram", "DW_TAG_inlined_subroutine"):
-        link_name_att = die.attributes.get("DW_AT_linkage_name")
-        name_att = die.attributes.get("DW_AT_name")
-        if link_name_att:
-            ret.add(link_name_att.value.decode("utf-8"))
-        if name_att:
-            ret.add(name_att.value.decode("utf-8"))
-
-    # Recurse into the DIE children
-    for child in die.iter_children():
-        die_get_funcs_rec(child, ret)
-
-
-def get_elf_symbols_from_debug(elf_path: Path) -> Set[str]:
-    """
-    Gets all functions contained in the built ELF file using the DWARF debug info.
-
-    :param elf_path: Path to the ELF file.
-
-    :return: The names of the contained functions.
-    """
-    ret = set()
-    with open(elf_path, 'rb') as f:
-        elf = ELFFile(f)
-        if not elf.has_dwarf_info():
-            print("ELF does not have debug info. Compile with debug info.")
-            exit(1)
-        dwarf_info = elf.get_dwarf_info()
-        for CU in dwarf_info.iter_CUs():
-            top_die = CU.get_top_DIE()
-            die_get_funcs_rec(top_die, ret)
-
-    return ret
-
-
-def get_elf_symbols_from_sections(elf_path: Path) -> Set[str]:
-    """
-    Gets all functions contained in the built ELF file using the symbol table section.
-
-    :param elf_path: Path to the ELF file.
-
-    :return: The names of the contained functions.
-    """
-    ret = set()
-    with open(elf_path, 'rb') as f:
-        elf = ELFFile(f)
-        for section in elf.iter_sections():
-            if isinstance(section, SymbolTableSection):
-                for sym in section.iter_symbols():
-                    ret.add(sym.name)
-    return ret
-
-
-def is_section_supported(section: str) -> bool:
-    """
-    Returns whether this type of section can be checked.
-
-    :param section: Name of the section that should be checked for support.
-
-    :return: Whether the type of section is supported.
-    """
-    not_supported_sections = [".isra", ".part", ".constprop"]
-    return not any(not_supported in section for not_supported in not_supported_sections)
-
-
-def get_input_sections(script_path: Path) -> List[str]:
-    """
-    Gets all sections (named after the functions) that should be mapped to ITCM according
-    to the linker script.
-
-    :param script_path: Path of the linker script.
-
-    :return: The names of the sections
-    """
-    ret = []
-    section_pattern = re.compile(r"^\*\(\.([a-zA-Z0-9_\.]+)\)$")
-    ignored_marker = "itcm-check-ignore"
-    with open(script_path, 'r') as f:
-        for line in f:
-            match = section_pattern.match(line)
-            if match and ignored_marker not in line:
-                section_name = match.group(1).replace("text.", "")
-                if is_section_supported(section_name):
-                    ret.append(section_name)
-    return ret
-
-
-def check_itcm(elf_path: Path, script_paths: List[Path]):
-    """
-    Checks if all the functions that should be mapped to ITCM are contained in the built ELF file.
-
-    :param elf_path: Path of the ELF file.
-    :param script_paths: Path of all linker scripts that should be checked.
-    """
-    elf_symbols_from_debug = get_elf_symbols_from_debug(elf_path)
-    elf_symbols_from_sections = get_elf_symbols_from_sections(elf_path)
-    elf_symbols = elf_symbols_from_debug.union(elf_symbols_from_sections)
-    input_sections = []
-    for script_path in script_paths:
-        script_input_sections = get_input_sections(script_path)
-        if script_input_sections:
-            input_sections.extend(script_input_sections)
-        else:
-            print(f"No input sections found in {script_path}, please check if the path is correct.")
-
-    check_passed = True
-    for input_section in input_sections:
-        if input_section not in elf_symbols:
-            check_passed = False
-            print(f"Section: {input_section} not found in the ELF file!")
-
-    if check_passed:
-        print("ITCM check passed!")
-        exit(0)
-    else:
-        print("ITCM check failed!")
-        exit(1)
-
-
-def main():
-    parser = argparse.ArgumentParser(description="Checks if functions marked for ITCM mapping exist in the ELF file.")
-    parser.add_argument(
-        "--elf-file",
-        help="Path of the compiled ELF file",
-        type=Path,
-        required=True
-    )
-    parser.add_argument(
-        "--script-files",
-        help="Paths of the linker script files",
-        nargs="+",
-        type=Path,
-        required=True
-    )
-
-    args = parser.parse_args()
-    check_itcm(args.elf_file, args.script_files)
-
-
-if __name__ == '__main__':
-    main()
@@ -2,7 +2,6 @@

 """
 Generate docs from .msg files
-Also generates docs/en/middleware/dds_topics.md from dds_topics.yaml
 """

 import os
@@ -10,99 +9,6 @@ import argparse
 import sys


-import yaml
-
-def generate_dds_yaml_doc(allMessageFiles, output_file = 'dds_topics.md'):
-    """
-    Generates human readable version of dds_topics.yaml.
-    Default output is to docs/en/middleware/dds_topics.md
-    """
-
-    dds_file_path = os.path.join(os.path.dirname(os.path.realpath(__file__)),"../../src/modules/uxrce_dds_client/dds_topics.yaml")
-    output_file_path = os.path.join(os.path.dirname(os.path.realpath(__file__)),f"../../docs/en/middleware/{output_file}")
-
-    try:
-        with open(dds_file_path, 'r') as file:
-            data = yaml.safe_load(file)
-
-        # Get messages and topics that are not published by default
-        # Start by getting all that are published.
-        all_messages_in_source = set()
-        all_message_types =set()
-        all_topics =set()
-        for message in data["publications"]:
-            all_message_types.add(message['type'].split("::")[-1])
-            all_topics.add(message['topic'].split('/')[-1])
-        for message in data["subscriptions"]:
-            all_message_types.add(message['type'].split("::")[-1])
-            all_topics.add(message['topic'].split('/')[-1])
-        if data["subscriptions_multi"]: # There is none now
-            dds_markdown += "None\n"
-            for message in data["subscriptions_multi"]:
-                all_message_types.add(message['type'].split("::")[-1])
-                all_topics.add(message['topic'].split('/')[-1])
-        for message in allMessageFiles:
-            all_messages_in_source.add(message.split('/')[-1].split('.')[0])
-        messagesNotExported = all_messages_in_source - all_message_types
-
-        # write out the dds file
-        dds_markdown="""# dds_topics.yaml — PX4 Topics Exposed to ROS 2
-
-::: info
-This document is [auto-generated](https://github.com/PX4/PX4-Autopilot/blob/main/Tools/msg/generate_msg_docs.py) from the source code.
-:::
-
-
-The [dds_topics.yaml](https://github.com/PX4/PX4-Autopilot/blob/main/src/modules/uxrce_dds_client/dds_topics.yaml) file specifies which uORB message definitions are compiled into the [uxrce_dds_client](../modules/modules_system.md#uxrce-dds-client) module when [PX4 is built](../middleware/uxrce_dds.md#code-generation), and hence which topics are available for ROS 2 applications to subscribe or publish (by default).
-
-This document shows a markdown-rendered version of [dds_topics.yaml](https://github.com/PX4/PX4-Autopilot/blob/main/src/modules/uxrce_dds_client/dds_topics.yaml), listing the publications, subscriptions, and so on.
-
-## Publications
-
-Topic | Type| Rate Limit
--- | --- | ---
-"""
-
-        for message in data["publications"]:
-            type = message['type']
-            px4Type=type.split("::")[-1]
-            dds_markdown += f"`{message['topic']}` | [{type}](../msg_docs/{px4Type}.md) | {message.get('rate_limit','')}\n"
-
-        dds_markdown += "\n## Subscriptions\n\nTopic | Type\n--- | ---\n"
-
-        for message in data["subscriptions"]:
-            type = message['type']
-            px4Type=type.split("::")[-1]
-            dds_markdown += f"{message['topic']} | [{type}](../msg_docs/{px4Type}.md)\n"
-
-        dds_markdown += "\n## Subscriptions Multi\n\n"
-
-        if not data["subscriptions_multi"]: # There is none now
-            dds_markdown += "None\n"
-        else:
-            print("Warning - we now have subscription_multi data - check format")
-            dds_markdown += "Topic | Type\n--- | ---\n"
-            for message in data["subscriptions_multi"]:
-                dds_markdown += f"{message['topic']} | {message['type']}\n"
-
-        if messagesNotExported:
-            # Print the topics that are not exported to DDS
-            dds_markdown += "\n## Not Exported\n\nThese messages are not listed in the yaml file.\nThey are not build into the module, and hence are neither published or subscribed."
-            dds_markdown += "\n\n::: details See messages\n"
-            for item in  messagesNotExported:
-                dds_markdown += f"\n- [{item}](../msg_docs/{item}.md)"
-            dds_markdown += "\n:::\n" # End of details block
-
-        #print(dds_markdown)
-        with open(output_file_path, 'w') as content_file:
-                content_file.write(dds_markdown)
-
-    except yaml.YAMLError as exc:
-        print(f"Error parsing YAML: {exc}")
-    except FileNotFoundError:
-        print(f"Error: {dds_file_path} not found.")
-
-
 def get_msgs_list(msgdir):
    """
    Makes a list of relative paths of .msg files in the given directory
@@ -124,7 +30,6 @@ def get_msgs_list(msgdir):


 if __name__ == "__main__":
-
    parser = argparse.ArgumentParser(description='Generate docs from .msg files')
    parser.add_argument('-d', dest='dir', help='output directory', required=True)
    args = parser.parse_args()
@@ -227,5 +132,3 @@ Graphs showing how these are used [can be found here](../middleware/uorb_graph.m
    index_file = os.path.join(output_dir, 'index.md')
    with open(index_file, 'w') as content_file:
            content_file.write(index_text)
-
-    generate_dds_yaml_doc(msg_files)
@@ -40,25 +40,25 @@ The generated files will be written to the `modules` directory.
 ## Categories
 """
        for category in sorted(module_groups):
-            result += f"- [{category.capitalize()}](modules_{category}.md)\n"
+            result += "- [%s](modules_%s.md)\n" % (category.capitalize(), category)

        self._outputs['main'] = result

        for category in sorted(module_groups):
-            result = f"# Modules Reference: {category.capitalize()}\n\n"
+            result = "# Modules Reference: %s\n" % category.capitalize()
            subcategories = module_groups[category]
-
            if len(subcategories) > 1:
-                result += 'Subcategories:\n\n'
-                for subcategory in sorted(subcategories): 
+                result += 'Subcategories:\n'
+                for subcategory in subcategories:
                    if subcategory == '':
                        continue
                    subcategory_label = subcategory.replace('_', ' ').title()
                    subcategory_file_name = category+'_'+subcategory
-                    result += f'- [{subcategory_label}](modules_{subcategory_file_name}.md)\n'
+                    result += '- [%s](modules_%s.md)\n' % (subcategory_label, subcategory_file_name)

                    # add a sub-page for the subcategory
-                    result_subpage = f'# Modules Reference: {subcategory_label} ({category.capitalize()})\n'
+                    result_subpage = '# Modules Reference: %s (%s)\n' % \
+                        (subcategory_label, category.capitalize())
                    result_subpage += self._ProcessModules(subcategories[subcategory])
                    self._outputs[subcategory_file_name] = result_subpage

@@ -68,14 +68,14 @@ The generated files will be written to the `modules` directory.
    def _ProcessModules(self, module_list):
        result = ''
        for module in module_list:
-            result += f"\n## {module.name()}\n\n"
-            result += f"Source: [{module.scope()}](https://github.com/PX4/PX4-Autopilot/tree/main/src/{module.scope()})\n\n"
+            result += "## %s\n" % module.name()
+            result += "Source: [%s](https://github.com/PX4/PX4-Autopilot/tree/main/src/%s)\n\n" % (module.scope(), module.scope())
            doc = module.documentation()
            if len(doc) > 0:
-                result += f"{doc}\n"
+                result += "%s\n" % doc
            usage_string = module.usage_string()
            if len(usage_string) > 0:
-                result += f'### Usage {{#{module.name()}_usage}}\n\n```\n{usage_string}\n```\n'
+                result += '<a id="%s_usage"></a>\n### Usage\n```\n%s\n```\n' % (module.name(), usage_string)
        return result

    def Save(self, dirname):
@@ -12,11 +12,11 @@ class ModuleDocumentation(object):
    """

    # If you add categories or subcategories, they also need to be added to the
-    # TOC in https://github.com/PX4/PX4-Autopilot/blob/main/docs/en/SUMMARY.md
+    # TOC in https://github.com/PX4/PX4-user_guide/blob/main/en/SUMMARY.md
    valid_categories = ['driver', 'estimator', 'controller', 'system',
                        'communication', 'command', 'template', 'simulation', 'autotune']
    valid_subcategories = ['', 'camera', 'distance_sensor', 'imu', 'ins', 'airspeed_sensor',
-                           'magnetometer', 'baro', 'optical_flow', 'radio_control','rpm_sensor', 'transponder']
+                           'magnetometer', 'baro', 'optical_flow', 'rpm_sensor', 'transponder']

    max_line_length = 80 # wrap lines that are longer than this

@@ -8,25 +8,22 @@ ENV LC_ALL=C.UTF-8
 ENV DISPLAY=:99
 ENV TERM=xterm
 ENV TZ=UTC
-ENV RUNS_IN_DOCKER=true

 # SITL UDP PORTS
 EXPOSE 14556/udp
 EXPOSE 14557/udp

-# Install Shell Script Entrypoint
 COPY docker-entrypoint.sh /usr/local/bin/docker-entrypoint.sh

 # Install PX4 Requirements
 COPY requirements.txt /tmp/requirements.txt
 COPY ubuntu.sh /tmp/ubuntu.sh
-
+RUN touch /.dockerenv
 RUN bash /tmp/ubuntu.sh --no-sim-tools

-# Make sure git is ok with your local copy
 RUN git config --global --add safe.directory '*'

-# Create user with id 1001 (jenkins docker workflow default)
+# create user with id 1001 (jenkins docker workflow default)
 RUN useradd --shell /bin/bash -u 1001 -c "" -m user && usermod -a -G dialout user

 ENTRYPOINT ["/usr/local/bin/docker-entrypoint.sh"]
@@ -1,27 +1,19 @@
 #!/bin/bash

-GREEN='\033[0;32m'
-NO_COLOR='\033[0m' # No Color
-SCRIPTID="${GREEN}[docker-entrypoint.sh]${NO_COLOR}"
-
-echo -e "$SCRIPTID Starting"
-
 # Start virtual X server in the background
 # - DISPLAY default is :99, set in dockerfile
 # - Users can override with `-e DISPLAY=` in `docker run` command to avoid
 #   running Xvfb and attach their screen
 if [[ -x "$(command -v Xvfb)" && "$DISPLAY" == ":99" ]]; then
-	echo -e "$SCRIPTID Starting Xvfb"
+	echo "[docker-entrypoint.sh] Starting Xvfb"
 	Xvfb :99 -screen 0 1600x1200x24+32 &
 fi

 # Check if the ROS_DISTRO is passed and use it
 # to source the ROS environment
 if [ -n "${ROS_DISTRO}" ]; then
-	echo -e "$SCRIPTID ROS: ${ROS_DISTRO}"
+	echo "[docker-entrypoint.sh] ROS: ${ROS_DISTRO}"
 	source "/opt/ros/$ROS_DISTRO/setup.bash"
 fi

-echo -e "$SCRIPTID ($( uname -m ))"
-
 exec "$@"
@@ -1,2 +1 @@
-pyelftools>=0.32,<1
 symforce>=0.9.0
@@ -27,12 +27,9 @@ do
 	fi
 done

-echo "[ubuntu.sh] Starting..."
-echo "[ubuntu.sh] arch: $INSTALL_ARCH"
-
 # detect if running in docker
-if [ "$RUNS_IN_DOCKER" = "true" ]; then
-	echo "[ubuntu.sh] Running within docker, installing initial dependencies";
+if [ -f /.dockerenv ]; then
+	echo "Running within docker, installing initial dependencies";
 	apt-get --quiet -y update && DEBIAN_FRONTEND=noninteractive apt-get --quiet -y install \
 		ca-certificates \
 		gnupg \
@@ -50,7 +47,7 @@ DIR=$( cd "$( dirname "${BASH_SOURCE[0]}" )" && pwd )
 # check requirements.txt exists (script not run in source tree)
 REQUIREMENTS_FILE="requirements.txt"
 if [[ ! -f "${DIR}/${REQUIREMENTS_FILE}" ]]; then
-	echo "[ubuntu.sh] FAILED: ${REQUIREMENTS_FILE} needed in same directory as ubuntu.sh (${DIR})."
+	echo "FAILED: ${REQUIREMENTS_FILE} needed in same directory as ubuntu.sh (${DIR})."
 	return 1
 fi

@@ -58,8 +55,10 @@ fi
 # check ubuntu version
 # otherwise warn and point to docker?
 UBUNTU_RELEASE="`lsb_release -rs`"
-echo "[ubuntu.sh] Ubuntu ${UBUNTU_RELEASE}"
-echo "[ubuntu.sh] Installing PX4 general dependencies"
+echo "Ubuntu ${UBUNTU_RELEASE}"
+
+echo
+echo "Installing PX4 general dependencies"

 sudo apt-get update -y --quiet
 sudo DEBIAN_FRONTEND=noninteractive apt-get -y --quiet --no-install-recommends install \
@@ -92,7 +91,7 @@ sudo DEBIAN_FRONTEND=noninteractive apt-get -y --quiet --no-install-recommends i

 # Python3 dependencies
 echo
-echo "[ubuntu.sh] Installing PX4 Python3 dependencies"
+echo "Installing PX4 Python3 dependencies"
 PYTHON_VERSION=$(python3 --version 2>&1 | awk '{print $2}')
 REQUIRED_VERSION="3.11"
 if [[ "$(printf '%s\n' "$REQUIRED_VERSION" "$PYTHON_VERSION" | sort -V | head -n1)" == "$REQUIRED_VERSION" ]]; then
@@ -110,18 +109,18 @@ fi
 if [[ $INSTALL_NUTTX == "true" ]]; then

 	echo
-	echo "[ubuntu.sh] NuttX Installing Dependencies ($INSTALL_ARCH)"
-	sudo apt-get update -y --quiet
+	echo "Installing NuttX dependencies"
+
 	sudo DEBIAN_FRONTEND=noninteractive apt-get -y --quiet --no-install-recommends install \
 		automake \
 		binutils-dev \
 		bison \
 		build-essential \
 		curl \
-		clang \
-		clang-tidy \
-		clang-format \
 		flex \
+		g++-multilib \
+		gcc-arm-none-eabi \
+		gcc-multilib \
 		gdb-multiarch \
 		genromfs \
 		gettext \
@@ -140,8 +139,6 @@ if [[ $INSTALL_NUTTX == "true" ]]; then
 		libstdc++-arm-none-eabi-newlib \
 		libtool \
 		libunwind-dev \
-		lldb \
-		lld \
 		pkg-config \
 		screen \
 		texinfo \
@@ -150,21 +147,6 @@ if [[ $INSTALL_NUTTX == "true" ]]; then
 		vim-common \
 		;

-	if [[ "${INSTALL_ARCH}" == "x86_64" ]]; then
-		sudo DEBIAN_FRONTEND=noninteractive apt-get -y --quiet --no-install-recommends install \
-			g++-multilib \
-			gcc-arm-none-eabi \
-			gcc-multilib \
-			;
-	fi
-
-	if [[ "${INSTALL_ARCH}" == "aarch64" ]]; then
-		sudo DEBIAN_FRONTEND=noninteractive apt-get -y --quiet --no-install-recommends install \
-			g++-aarch64-linux-gnu \
-			g++-arm-linux-gnueabihf \
-			;
-	fi
-
 	if [ -n "$USER" ]; then
 		# add user to dialout group (serial port access)
 		sudo usermod -aG dialout $USER
@@ -175,7 +157,7 @@ fi
 if [[ $INSTALL_SIM == "true" ]]; then

 	echo
-	echo "[ubuntu.sh] Installing PX4 simulation dependencies"
+	echo "Installing PX4 simulation dependencies"

 	# General simulation dependencies
 	sudo DEBIAN_FRONTEND=noninteractive apt-get -y --quiet --no-install-recommends install \
@@ -200,8 +182,8 @@ if [[ $INSTALL_SIM == "true" ]]; then
 		fi
 	else
 		# Expects Ubuntu 22.04 > by default
-		echo "[ubuntu.sh] Gazebo (Harmonic) will be installed"
-		echo "[ubuntu.sh] Earlier versions will be removed"
+		echo "Gazebo (Harmonic) will be installed"
+		echo "Earlier versions will be removed"
 		# Add Gazebo binary repository
 		sudo wget https://packages.osrfoundation.org/gazebo.gpg -O /usr/share/keyrings/pkgs-osrf-archive-keyring.gpg
 		echo "deb [arch=$(dpkg --print-architecture) signed-by=/usr/share/keyrings/pkgs-osrf-archive-keyring.gpg] http://packages.osrfoundation.org/gazebo/ubuntu-stable $(lsb_release -cs) main" | sudo tee /etc/apt/sources.list.d/gazebo-stable.list > /dev/null
@@ -10,7 +10,6 @@ CONFIG_DRIVERS_BAROMETER_DPS310=y
 CONFIG_DRIVERS_BATT_SMBUS=y
 CONFIG_DRIVERS_CAMERA_CAPTURE=y
 CONFIG_DRIVERS_CAMERA_TRIGGER=y
-CONFIG_DRIVERS_CDCACM_AUTOSTART=y
 CONFIG_COMMON_DIFFERENTIAL_PRESSURE=y
 CONFIG_COMMON_DISTANCE_SENSOR=y
 CONFIG_DRIVERS_DSHOT=y
@@ -42,8 +41,7 @@ CONFIG_MODULES_EVENTS=y
 CONFIG_MODULES_FLIGHT_MODE_MANAGER=y
 CONFIG_MODULES_FW_ATT_CONTROL=y
 CONFIG_MODULES_FW_AUTOTUNE_ATTITUDE_CONTROL=y
-CONFIG_MODULES_FW_MODE_MANAGER=y
-CONFIG_MODULES_FW_LATERAL_LONGITUDINAL_CONTROL=y
+CONFIG_MODULES_FW_POS_CONTROL=y
 CONFIG_MODULES_FW_RATE_CONTROL=y
 CONFIG_MODULES_GIMBAL=y
 CONFIG_MODULES_GYRO_CALIBRATION=y
@@ -132,7 +132,6 @@ ENTRY(_stext)
 */
 EXTERN(abort)
 EXTERN(_bootdelay_signature)
-EXTERN(board_get_manifest)

 SECTIONS
 {
@@ -48,7 +48,6 @@ else()
 		i2c.cpp
 		init.c
 		led.c
-		mtd.cpp
 		spi.cpp
 		timer_config.cpp
 		usb.c
@@ -1,76 +0,0 @@
-/****************************************************************************
- *
- *   Copyright (C) 2025 PX4 Development Team. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- * 3. Neither the name PX4 nor the names of its contributors may be
- *    used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- ****************************************************************************/
-
-#include <nuttx/spi/spi.h>
-#include <px4_platform_common/px4_manifest.h>
-//                                                              KiB BS    nB
-static const px4_mft_device_t spi2 = {             // FM25V01A on FMUM native: 32K X 8, emulated as (1024 Blocks of 32)
-	.bus_type = px4_mft_device_t::SPI,
-	.devid    = SPIDEV_FLASH(0)
-};
-
-static const px4_mtd_entry_t fmum_fram = {
-	.device = &spi2,
-	.npart = 1,
-	.partd = {
-		{
-			.type = MTD_PARAMETERS,
-			.path = "/fs/mtd_params",
-			.nblocks = (32768 / (1 << CONFIG_RAMTRON_EMULATE_PAGE_SHIFT))
-		},
-	},
-};
-
-static const px4_mtd_manifest_t board_mtd_config = {
-	.nconfigs = 1,
-	.entries  = {
-		&fmum_fram
-	}
-};
-
-static const px4_mft_entry_s mtd_mft = {
-	.type = MTD,
-	.pmft = (void *) &board_mtd_config,
-};
-
-static const px4_mft_s mft = {
-	.nmft = 1,
-	.mfts = {
-		&mtd_mft
-	}
-};
-
-const px4_mft_s *board_get_manifest(void)
-{
-	return &mft;
-}
@@ -46,8 +46,7 @@ CONFIG_MODULES_EVENTS=y
 CONFIG_MODULES_FLIGHT_MODE_MANAGER=y
 CONFIG_MODULES_FW_ATT_CONTROL=y
 CONFIG_MODULES_FW_AUTOTUNE_ATTITUDE_CONTROL=y
-CONFIG_MODULES_FW_MODE_MANAGER=y
-CONFIG_MODULES_FW_LATERAL_LONGITUDINAL_CONTROL=y
+CONFIG_MODULES_FW_POS_CONTROL=y
 CONFIG_MODULES_FW_RATE_CONTROL=y
 CONFIG_MODULES_GIMBAL=y
 CONFIG_MODULES_GYRO_CALIBRATION=y
@@ -56,8 +56,7 @@ CONFIG_MODULES_EVENTS=y
 CONFIG_MODULES_FLIGHT_MODE_MANAGER=y
 CONFIG_MODULES_FW_ATT_CONTROL=y
 CONFIG_MODULES_FW_AUTOTUNE_ATTITUDE_CONTROL=y
-CONFIG_MODULES_FW_MODE_MANAGER=y
-CONFIG_MODULES_FW_LATERAL_LONGITUDINAL_CONTROL=y
+CONFIG_MODULES_FW_POS_CONTROL=y
 CONFIG_MODULES_FW_RATE_CONTROL=y
 CONFIG_MODULES_GIMBAL=y
 CONFIG_MODULES_GYRO_CALIBRATION=y
@@ -127,9 +127,6 @@
 #define SPI6_nRESET_EXTERNAL1       /* PF10 */ (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTF|GPIO_PIN10)
 #define SPI6_RESET(on_true)          px4_arch_gpiowrite(SPI6_nRESET_EXTERNAL1, !(on_true))

-// ADIS16507 hardware reset
-#define GPIO_ADIS16507_RESET(reset) SPI6_RESET(reset)
-
 /* I2C busses */

 /* Devices on the onboard buses.
@@ -37,8 +37,7 @@ CONFIG_MODULES_EVENTS=y
 CONFIG_MODULES_FLIGHT_MODE_MANAGER=y
 CONFIG_MODULES_FW_ATT_CONTROL=y
 CONFIG_MODULES_FW_AUTOTUNE_ATTITUDE_CONTROL=y
-CONFIG_MODULES_FW_MODE_MANAGER=y
-CONFIG_MODULES_FW_LATERAL_LONGITUDINAL_CONTROL=y
+CONFIG_MODULES_FW_POS_CONTROL=y
 CONFIG_MODULES_FW_RATE_CONTROL=y
 CONFIG_MODULES_GIMBAL=y
 CONFIG_MODULES_GYRO_CALIBRATION=y
@@ -57,11 +56,9 @@ CONFIG_MODULES_MC_HOVER_THRUST_ESTIMATOR=y
 CONFIG_MODULES_MC_POS_CONTROL=y
 CONFIG_MODULES_MC_RATE_CONTROL=y
 CONFIG_MODULES_NAVIGATOR=y
-CONFIG_NUM_MISSION_ITMES_SUPPORTED=1000
 CONFIG_MODULES_RC_UPDATE=y
 CONFIG_MODULES_SENSORS=y
 CONFIG_MODULES_UXRCE_DDS_CLIENT=y
-CONFIG_MODULES_VTOL_ATT_CONTROL=y
 CONFIG_SYSTEMCMDS_ACTUATOR_TEST=y
 CONFIG_SYSTEMCMDS_BSONDUMP=y
 CONFIG_SYSTEMCMDS_DMESG=y
@@ -34,25 +34,75 @@
 #pragma once

 // DMAMUX1 Using at most 8 Channels on DMA1 --------   Assigned
-#define DMAMAP_SPI1_RX    DMAMAP_DMA12_SPI1RX_0     // 1 DMA1:37 IIM-42653
-#define DMAMAP_SPI1_TX    DMAMAP_DMA12_SPI1TX_0     // 2 DMA1:38 IIM-42653
-#define DMAMAP_USART1_RX  DMAMAP_DMA12_USART1RX_0   // 3 DMA1:41 GPS1
-#define DMAMAP_USART1_TX  DMAMAP_DMA12_USART1TX_0   // 4 DMA1:42 GPS1
-#define DMAMAP_USART6_RX  DMAMAP_DMA12_USART6RX_0   // 5 DMA1:71 RC
-#define DMAMAP_USART6_TX  DMAMAP_DMA12_USART6TX_0   // 6 DMA1:72 RC
-// Timer 4 (DMAMAP_DMA12_TIM4UP_0)                  // 7 DMA1:32 TIM4UP/TIM4CH1-4
-// Timer 5 (DMAMAP_DMA12_TIM5UP_0)                  // 8 DMA1:50 TIM5UP/TIM5CH1-4
+//                                                     V
+
+// Timer 4 Channel 1                               /* DMA1:29 TIM4CH1 */
+
+#define DMAMAP_SPI1_RX    DMAMAP_DMA12_SPI1RX_0   /* 1 DMA1:37 IIM-42653 */
+#define DMAMAP_SPI1_TX    DMAMAP_DMA12_SPI1TX_0   /* 2 DMA1:38 IIM-42653 */
+
+//#define DMAMAP_SPI2_RX    DMAMAP_DMA12_SPI2RX_0  /* 3 DMA1:39 ICM-42688-P */
+//#define DMAMAP_SPI2_TX    DMAMAP_DMA12_SPI2TX_0  /* 4 DMA1:40 ICM-42688-P */
+
+#define DMAMAP_USART1_RX  DMAMAP_DMA12_USART1RX_0 /*  DMA1:41  GPS1 */
+#define DMAMAP_USART1_TX  DMAMAP_DMA12_USART1TX_0 /*  DMA1:42  GPS1 */
+
+//#define DMAMAP_USART3_RX  DMAMAP_DMA12_USART3RX_0 /*  DMA1:45 DEBUG */
+//#define DMAMAP_USART3_TX  DMAMAP_DMA12_USART3TX_0 /*  DMA1:46 DEBUG */
+
+// Timer 8 Channel 1                               /* DMA1:47 TIM8CH1 */
+// Timer 8 Channel 2                               /* DMA1:48 TIM8CH2 */
+// Timer 8 Channel 3                               /* DMA1:49 TIM8CH3 */
+// Timer 8 Channel 4                               /* DMA1:50 TIM8CH4 */
+
+// Timer 5 Channel 1                               /* DMA1:55 TIM5CH1 */
+// Timer 5 Channel 2                               /* DMA1:56 TIM5CH2 */
+// Timer 5 Channel 3                               /* DMA1:57 TIM5CH3 */
+// Timer 5 Channel 4                               /* DMA1:58 TIM5CH4 */
+
+// #define DMAMAP_UART4_RX   DMAMAP_DMA12_UART4RX_0  /*  DMA1:63 UART4 */
+// #define DMAMAP_UART4_TX   DMAMAP_DMA12_UART4TX_0  /*  DMA1:64 UART4 */
+
+#define DMAMAP_USART6_RX  DMAMAP_DMA12_USART6RX_0 /* 5 DMA1:71 RC */
+// #define DMAMAP_USART6_TX  DMAMAP_DMA12_USART6TX_0 /* 6 DMA1:72 RC */
+
+// Assigned in timer_config.cpp
+
+// Timer 4                                          /* 7 DMA1:32 TIM4UP */
+// Timer 5                                          /* 8 DMA1:50 TIM5UP */

 // DMAMUX2 Using at most 8 Channels on DMA2 --------   Assigned
-#define DMAMAP_USART2_RX  DMAMAP_DMA12_USART2RX_1   // 1 DMA2:43 VTX
-#define DMAMAP_UART5_RX   DMAMAP_DMA12_UART5RX_1    // 2 DMA2:65 VTX
-#define DMAMAP_UART5_TX   DMAMAP_DMA12_UART5TX_1    // 3 DMA2:66 VTX
-#define DMAMAP_UART7_RX   DMAMAP_DMA12_UART7RX_1    // 4 DMA2:79 TELEM1
-#define DMAMAP_UART7_TX   DMAMAP_DMA12_UART7TX_1    // 5 DMA2:80 TELEM1
-#define DMAMAP_USART3_RX  DMAMAP_DMA12_USART3RX_1   // 6 DMA2:45 DEBUG
-#define DMAMAP_USART3_TX  DMAMAP_DMA12_USART3TX_1   // 7 DMA2:46 DEBUG
-// available
+//                                                     V
+
+// Timer 4 Channel 1                               /* DMA2:29 TIM4CH1 */
+
+#define DMAMAP_USART2_RX  DMAMAP_DMA12_USART2RX_1   /* 3 DMA2:43 TELEM3 */
+#define DMAMAP_USART2_TX  DMAMAP_DMA12_USART2TX_1   /* 4 DMA2:44 TELEM3 */
+
+#define DMAMAP_USART3_RX  DMAMAP_DMA12_USART3RX_1   /* 3 DMA2:45 DEBUG */
+#define DMAMAP_USART3_TX  DMAMAP_DMA12_USART3TX_1   /* 4 DMA2:46 DEBUG */
+
+// Timer 8 Channel 1                                 /* DMA2:47 TIM8CH1 */
+// Timer 8 Channel 2                                 /* DMA2:48 TIM8CH2 */
+// Timer 8 Channel 3                                 /* DMA2:49 TIM8CH3 */
+// Timer 8 Channel 4                                 /* DMA2:50 TIM8CH4 */
+
+// Timer 5 Channel 1                                 /* DMA2:55 TIM5CH1 */
+// Timer 5 Channel 2                                 /* DMA2:56 TIM5CH2 */
+// Timer 5 Channel 3                                 /* DMA2:57 TIM5CH3 */
+// Timer 5 Channel 4                                 /* DMA2:58 TIM5CH4 */
+
+//#define DMAMAP_SPI3_RX    DMAMAP_DMA12_SPI3RX_1     /* 1 DMA2:61 BMI088 */
+//#define DMAMAP_SPI3_TX    DMAMAP_DMA12_SPI3TX_1     /* 2 DMA2:62 BMI088 */
+
+#define DMAMAP_UART5_RX   DMAMAP_DMA12_UART5RX_1    /* 5 DMA2:65 TELEM2 */
+#define DMAMAP_UART5_TX   DMAMAP_DMA12_UART5TX_1    /* 6 DMA2:66 TELEM2 */
+
+#define DMAMAP_UART7_RX   DMAMAP_DMA12_UART7RX_1    /* 7 DMA1:79 TELEM1 */
+#define DMAMAP_UART7_TX   DMAMAP_DMA12_UART7TX_1    /* 8 DMA1:80 TELEM1 */

 // DMAMUX2 Using at most 8 Channels on BDMA --------   Assigned
-#define DMAMAP_SPI6_RX    DMAMAP_BDMA_SPI6_RX       // 1 BDMA:11 SPI J11
-#define DMAMAP_SPI6_TX    DMAMAP_BDMA_SPI6_TX       // 2 BDMA:12 SPI J11
+//                                                     V
+
+#define DMAMAP_SPI6_RX    DMAMAP_BDMA_SPI6_RX       /* 1 BDMA:11 SPI J11 */
+#define DMAMAP_SPI6_TX    DMAMAP_BDMA_SPI6_TX       /* 2 BDMA:12 SPI J11 */
@@ -260,6 +260,8 @@ CONFIG_USART1_TXDMA=y
 CONFIG_USART2_BAUD=57600
 CONFIG_USART2_RXBUFSIZE=600
 CONFIG_USART2_RXDMA=y
+CONFIG_USART2_TXBUFSIZE=1500
+CONFIG_USART2_TXDMA=y
 CONFIG_USART3_BAUD=57600
 CONFIG_USART3_RXBUFSIZE=180
 CONFIG_USART3_RXDMA=y
@@ -270,7 +272,6 @@ CONFIG_USART6_BAUD=57600
 CONFIG_USART6_RXBUFSIZE=600
 CONFIG_USART6_RXDMA=y
 CONFIG_USART6_TXBUFSIZE=1500
-CONFIG_USART6_TXDMA=y
 CONFIG_USBDEV=y
 CONFIG_USBDEV_BUSPOWERED=y
 CONFIG_USBDEV_MAXPOWER=500
@@ -1,3 +0,0 @@
-CONFIG_BOARD_TOOLCHAIN="arm-none-eabi"
-CONFIG_BOARD_ARCHITECTURE="cortex-m7"
-CONFIG_BOARD_ROMFSROOT=""
@@ -1,49 +0,0 @@
-############################################################################
-#
-#   Copyright (c) 2023 PX4 Development Team. All rights reserved.
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions
-# are met:
-#
-# 1. Redistributions of source code must retain the above copyright
-#    notice, this list of conditions and the following disclaimer.
-# 2. Redistributions in binary form must reproduce the above copyright
-#    notice, this list of conditions and the following disclaimer in
-#    the documentation and/or other materials provided with the
-#    distribution.
-# 3. Neither the name PX4 nor the names of its contributors may be
-#    used to endorse or promote products derived from this software
-#    without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
-# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
-# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
-# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-# POSSIBILITY OF SUCH DAMAGE.
-#
-############################################################################
-
-
-set(PX4_FW_NAME ${PX4_BINARY_DIR}/${PX4_BOARD_VENDOR}_${PX4_BOARD_MODEL}_${PX4_BOARD_LABEL}.px4)
-
-add_custom_target(upload_skynode_usb
-	COMMAND ${PX4_SOURCE_DIR}/Tools/auterion/upload_skynode.sh --file=${PX4_FW_NAME}
-	DEPENDS ${PX4_FW_NAME}
-	COMMENT "Uploading PX4"
-	USES_TERMINAL
-)
-
-add_custom_target(upload_skynode_wifi
-	COMMAND ${PX4_SOURCE_DIR}/Tools/auterion/upload_skynode.sh --file=${PX4_FW_NAME} --wifi
-	DEPENDS ${PX4_FW_NAME}
-	COMMENT "Uploading PX4"
-	USES_TERMINAL
-)
@@ -1,95 +0,0 @@
-CONFIG_BOARD_TOOLCHAIN="arm-none-eabi"
-CONFIG_BOARD_ARCHITECTURE="cortex-m7"
-CONFIG_BOARD_ETHERNET=y
-CONFIG_BOARD_SERIAL_GPS1="/dev/ttyS6"
-CONFIG_BOARD_SERIAL_TEL1="/dev/ttyS0"
-CONFIG_BOARD_SERIAL_TEL2="/dev/ttyS2"
-CONFIG_BOARD_PARAM_FILE="/fs/microsd/params"
-CONFIG_DRIVERS_ADC_BOARD_ADC=y
-CONFIG_DRIVERS_BAROMETER_BMP388=y
-CONFIG_COMMON_DIFFERENTIAL_PRESSURE=y
-CONFIG_COMMON_DISTANCE_SENSOR=y
-CONFIG_DRIVERS_DSHOT=y
-CONFIG_DRIVERS_GNSS_SEPTENTRIO=y
-CONFIG_DRIVERS_GPS=y
-CONFIG_DRIVERS_IMU_BOSCH_BMI088=y
-CONFIG_BMI088_ACCELEROMETER_INT2=y
-CONFIG_COMMON_INS=y
-CONFIG_COMMON_LIGHT=y
-CONFIG_COMMON_MAGNETOMETER=y
-CONFIG_DATAMAN_PERSISTENT_STORAGE=n
-CONFIG_DRIVERS_MAGNETOMETER_BOSCH_BMM350=y
-CONFIG_DRIVERS_PWM_OUT=y
-CONFIG_DRIVERS_RC_INPUT=y
-CONFIG_DRIVERS_ROBOCLAW=y
-CONFIG_DRIVERS_UAVCAN=y
-CONFIG_BOARD_UAVCAN_INTERFACES=1
-CONFIG_BOARD_UAVCAN_TIMER_OVERRIDE=2
-CONFIG_MODULES_AIRSPEED_SELECTOR=y
-CONFIG_MODULES_BATTERY_STATUS=y
-CONFIG_MODULES_CAMERA_FEEDBACK=y
-CONFIG_MODULES_COMMANDER=y
-CONFIG_MODULES_CONTROL_ALLOCATOR=y
-CONFIG_MODULES_DATAMAN=y
-CONFIG_MODULES_EKF2=y
-CONFIG_MODULES_ESC_BATTERY=y
-CONFIG_MODULES_EVENTS=y
-CONFIG_MODULES_FLIGHT_MODE_MANAGER=y
-CONFIG_MODULES_FW_ATT_CONTROL=y
-CONFIG_MODULES_FW_AUTOTUNE_ATTITUDE_CONTROL=y
-CONFIG_MODULES_FW_MODE_MANAGER=y
-CONFIG_MODULES_FW_LATERAL_LONGITUDINAL_CONTROL=y
-CONFIG_FIGURE_OF_EIGHT=y
-CONFIG_MODULES_FW_RATE_CONTROL=y
-CONFIG_MODULES_GIMBAL=y
-CONFIG_MODULES_GYRO_CALIBRATION=y
-CONFIG_MODULES_LAND_DETECTOR=y
-CONFIG_MODULES_LANDING_TARGET_ESTIMATOR=y
-CONFIG_MODULES_LOAD_MON=y
-CONFIG_MODULES_LOGGER=y
-CONFIG_LOGGER_STACK_SIZE=4100
-CONFIG_MODULES_MAG_BIAS_ESTIMATOR=y
-CONFIG_MODULES_MANUAL_CONTROL=y
-CONFIG_MODULES_MAVLINK=y
-CONFIG_MAVLINK_DIALECT="development"
-CONFIG_MODULES_MC_ATT_CONTROL=y
-CONFIG_MODULES_MC_AUTOTUNE_ATTITUDE_CONTROL=y
-CONFIG_MODULES_MC_HOVER_THRUST_ESTIMATOR=y
-CONFIG_MODULES_MC_POS_CONTROL=y
-CONFIG_MODULES_MC_RATE_CONTROL=y
-CONFIG_MODULES_NAVIGATOR=y
-CONFIG_MODE_NAVIGATOR_VTOL_TAKEOFF=y
-CONFIG_MODULES_RC_UPDATE=y
-CONFIG_MODULES_ROVER_ACKERMANN=y
-CONFIG_MODULES_ROVER_DIFFERENTIAL=y
-CONFIG_MODULES_ROVER_MECANUM=y
-CONFIG_MODULES_SENSORS=y
-CONFIG_MODULES_SIMULATION_SIMULATOR_SIH=y
-CONFIG_MODULES_TIME_PERSISTOR=y
-CONFIG_MODULES_UXRCE_DDS_CLIENT=y
-CONFIG_MODULES_VTOL_ATT_CONTROL=y
-CONFIG_SYSTEMCMDS_ACTUATOR_TEST=y
-CONFIG_SYSTEMCMDS_BSONDUMP=y
-CONFIG_SYSTEMCMDS_DMESG=y
-CONFIG_SYSTEMCMDS_GPIO=y
-CONFIG_SYSTEMCMDS_HARDFAULT_LOG=y
-CONFIG_SYSTEMCMDS_I2C_LAUNCHER=y
-CONFIG_SYSTEMCMDS_I2CDETECT=y
-CONFIG_SYSTEMCMDS_LED_CONTROL=y
-CONFIG_SYSTEMCMDS_MFT=y
-CONFIG_SYSTEMCMDS_MFT_CFG=y
-CONFIG_SYSTEMCMDS_MTD=y
-CONFIG_SYSTEMCMDS_NETMAN=y
-CONFIG_SYSTEMCMDS_NSHTERM=y
-CONFIG_SYSTEMCMDS_PARAM=y
-CONFIG_SYSTEMCMDS_PERF=y
-CONFIG_SYSTEMCMDS_REBOOT=y
-CONFIG_SYSTEMCMDS_SD_BENCH=y
-CONFIG_SYSTEMCMDS_SD_STRESS=y
-CONFIG_SYSTEMCMDS_SERIAL_TEST=y
-CONFIG_SYSTEMCMDS_SYSTEM_TIME=y
-CONFIG_SYSTEMCMDS_TOP=y
-CONFIG_SYSTEMCMDS_TOPIC_LISTENER=y
-CONFIG_SYSTEMCMDS_UORB=y
-CONFIG_SYSTEMCMDS_VER=y
-CONFIG_SYSTEMCMDS_WORK_QUEUE=y
@@ -1,13 +0,0 @@
-{
-    "board_id": 60,
-    "magic": "AutFWv1",
-    "description": "Firmware for the AutFMUv6S board",
-    "image": "",
-    "build_time": 0,
-    "summary": "AutFMUv6S",
-    "version": "0.1",
-    "image_size": 0,
-    "image_maxsize": 1966080,
-    "git_identity": "",
-    "board_revision": 0
-}
@@ -1,31 +0,0 @@
-#!/bin/sh
-#
-# board specific defaults
-#------------------------------------------------------------------------------
-
-# Set the backend of the dataman to SRAM
-param set-default SYS_DM_BACKEND 1
-# Set TELEM1 as default mavlink connection
-param set-default MAV_0_CONFIG 0
-# Disable logger writing to FRAM, only stream over MAVLINK
-set LOGGER_ARGS "-m mavlink"
-
-# 200kOhm/10kOhm voltage divider on V_BAT
-param set-default BAT1_V_DIV 21
-
-# Skynode: use the "custom participant", IP=10.41.10.1 config for uxrce_dds_client
-param set-default UXRCE_DDS_PTCFG 2
-param set-default UXRCE_DDS_AG_IP 170461697
-param set-default UXRCE_DDS_CFG 1000
-
-# Update default IP config if needed
-netman update_default -i eth0
-
-# Start a second NSH connected to the debug port
-nshterm /dev/ttyS3 &
-
-# Start the time_persistor to cyclically store the RTC in FRAM
-time_persistor start
-
-# Start the ESC telemetry
-dshot telemetry -d /dev/ttyS5 -x
@@ -1,19 +0,0 @@
-#!/bin/sh
-#
-# Auterion FMUv6s specific board MAVLink startup script.
-#------------------------------------------------------------------------------
-
-if param compare MAV_S_FORWARD 1
-then
-	set S_FORWARD "-f"
-else
-	set S_FORWARD ""
-fi
-
-# TELEM1 is mapped to USART1 with flow control
-mavlink start -d /dev/ttyS0 -b 3000000 -r 290000 -m onboard_low_bandwidth -x -z $S_FORWARD
-
-# Ensure nothing else starts on TEL1
-set PRT_TEL1_ 1
-
-unset S_FORWARD
@@ -1,30 +0,0 @@
-#!/bin/sh
-#
-# Forward is where the MIPI and ESC connectors are
-#
-# Auterion FMUv6S specific board sensors init
-#------------------------------------------------------------------------------
-
-# For system_power and battery_status
-board_adc start
-
-# IMU3 on SPI3, ROTATION_NONE=0
-bmi088 -A -R 0 -s start
-bmi088 -G -R 0 -s start
-
-if ver hwtypecmp V6S013 V6S015
-then
-	# Revision(s) with BMM150
-	# MAG on I2C4, ROTATION_ROLL_180=8
-	bmm150 -I -R 8 start
-else
-	# Revision(s) with BMM350
-	# MAG on I2C4, ROTATION_ROLL_180=8
-	bmm350 -I -R 8 start
-fi
-
-# External compass on GPS1/I2C1 (the 3rd external bus): standard Holybro Pixhawk 4 or CUAV V5 GPS/compass puck (with lights, safety button, and buzzer)
-ist8310 -X -b 1 -R 10 start
-
-# BARO on I2C4
-bmp388 -I -b 4 -a 0x77 start
@@ -1,13 +0,0 @@
-CONFIG_COMMON_DIFFERENTIAL_PRESSURE=n
-CONFIG_MODE_NAVIGATOR_VTOL_TAKEOFF=n
-CONFIG_MODULES_AIRSPEED_SELECTOR=n
-CONFIG_MODULES_FW_ATT_CONTROL=n
-CONFIG_MODULES_FW_AUTOTUNE_ATTITUDE_CONTROL=n
-CONFIG_MODULES_FW_MODE_MANAGER=n
-CONFIG_MODULES_FW_LATERAL_LONGITUDINAL_CONTROL=n
-CONFIG_MODULES_FW_RATE_CONTROL=n
-CONFIG_MODULES_VTOL_ATT_CONTROL=n
-CONFIG_COMMON_RC=y
-CONFIG_EKF2_AUX_GLOBAL_POSITION=y
-# CONFIG_EKF2_SIDESLIP is not set
-# CONFIG_SENSORS_VEHICLE_AIRSPEED is not set
@@ -1,17 +0,0 @@
-#
-# For a description of the syntax of this configuration file,
-# see misc/tools/kconfig-language.txt.
-#
-config BOARD_HAS_PROBES
-	bool "Board provides GPIO or other Hardware for signaling to timing analyze."
-	default y
-	---help---
-		This board provides GPIO FMU-CH1-5, CAP1-6 as PROBE_1-11 to provide timing signals from selected drivers.
-
-config BOARD_USE_PROBES
-	bool "Enable the use the board provided FMU-CH1-5, CAP1-6 as PROBE_1-11"
-	default n
-	depends on BOARD_HAS_PROBES
-
-	---help---
-		Select to use GPIO FMU-CH1-5, CAP1-6  to provide timing signals from selected drivers.
@@ -1,79 +0,0 @@
-#
-# This file is autogenerated: PLEASE DO NOT EDIT IT.
-#
-# You can use "make menuconfig" to make any modifications to the installed .config file.
-# You can then do "make savedefconfig" to generate a new defconfig file that includes your
-# modifications.
-#
-# CONFIG_DEV_CONSOLE is not set
-# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set
-# CONFIG_DISABLE_PTHREAD is not set
-# CONFIG_SPI_EXCHANGE is not set
-# CONFIG_STM32H7_SYSCFG is not set
-# CONFIG_STM32H7_USE_LEGACY_PINMAP is not set
-CONFIG_ARCH="arm"
-CONFIG_ARCH_BOARD_CUSTOM=y
-CONFIG_ARCH_BOARD_CUSTOM_DIR="../../../../boards/auterion/fmu-v6s/nuttx-config"
-CONFIG_ARCH_BOARD_CUSTOM_DIR_RELPATH=y
-CONFIG_ARCH_BOARD_CUSTOM_NAME="auterion"
-CONFIG_ARCH_CHIP="stm32h7"
-CONFIG_ARCH_CHIP_STM32H743VI=y
-CONFIG_ARCH_CHIP_STM32H7=y
-CONFIG_ARCH_INTERRUPTSTACK=768
-CONFIG_ARMV7M_BASEPRI_WAR=y
-CONFIG_ARMV7M_ICACHE=y
-CONFIG_ARMV7M_MEMCPY=y
-CONFIG_ARMV7M_USEBASEPRI=y
-CONFIG_BOARDCTL=y
-CONFIG_BOARDCTL_RESET=y
-CONFIG_BOARD_ASSERT_RESET_VALUE=0
-CONFIG_BOARD_INITTHREAD_PRIORITY=254
-CONFIG_BOARD_LATE_INITIALIZE=y
-CONFIG_BOARD_LOOPSPERMSEC=95150
-CONFIG_BOARD_RESET_ON_ASSERT=2
-CONFIG_DEBUG_FULLOPT=y
-CONFIG_DEBUG_SYMBOLS=y
-CONFIG_DEBUG_TCBINFO=y
-CONFIG_DEFAULT_SMALL=y
-CONFIG_EXPERIMENTAL=y
-CONFIG_FDCLONE_DISABLE=y
-CONFIG_FDCLONE_STDIO=y
-CONFIG_HAVE_CXX=y
-CONFIG_HAVE_CXXINITIALIZE=y
-CONFIG_IDLETHREAD_STACKSIZE=750
-CONFIG_INIT_ENTRYPOINT="bootloader_main"
-CONFIG_INIT_STACKSIZE=3194
-CONFIG_LIBC_FLOATINGPOINT=y
-CONFIG_LIBC_LONG_LONG=y
-CONFIG_LIBC_STRERROR=y
-CONFIG_MEMSET_64BIT=y
-CONFIG_MEMSET_OPTSPEED=y
-CONFIG_PREALLOC_TIMERS=50
-CONFIG_PTHREAD_MUTEX_ROBUST=y
-CONFIG_PTHREAD_STACK_MIN=512
-CONFIG_RAM_SIZE=245760
-CONFIG_RAM_START=0x20010000
-CONFIG_RAW_BINARY=y
-CONFIG_SERIAL_TERMIOS=y
-CONFIG_SIG_DEFAULT=y
-CONFIG_SIG_SIGALRM_ACTION=y
-CONFIG_SIG_SIGUSR1_ACTION=y
-CONFIG_SIG_SIGUSR2_ACTION=y
-CONFIG_SPI=y
-CONFIG_STACK_COLORATION=y
-CONFIG_START_DAY=30
-CONFIG_START_MONTH=11
-CONFIG_STDIO_BUFFER_SIZE=32
-CONFIG_STM32H7_BKPSRAM=y
-CONFIG_STM32H7_DMA1=y
-CONFIG_STM32H7_DMA2=y
-CONFIG_STM32H7_PROGMEM=y
-CONFIG_STM32H7_SERIAL_DISABLE_REORDERING=y
-CONFIG_STM32H7_TIM1=y
-CONFIG_STM32H7_USART1=y
-CONFIG_SYSTEMTICK_HOOK=y
-CONFIG_TASK_NAME_SIZE=24
-CONFIG_TTY_SIGINT=y
-CONFIG_TTY_SIGINT_CHAR=0x03
-CONFIG_TTY_SIGTSTP=y
-CONFIG_USEC_PER_TICK=1000
@@ -1,494 +0,0 @@
-/************************************************************************************
- * nuttx-configs/auterion_fmu-v6s/include/board.h
- *
- *   Copyright (C) 2016-2024 Gregory Nutt. All rights reserved.
- *   Authors: David Sidrane <david.sidrane@nscdg.com>
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- *    used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- ************************************************************************************/
-#ifndef __NUTTX_CONFIG_PX4_FMU_V6S_INCLUDE_BOARD_H
-#define __NUTTX_CONFIG_PX4_FMU_V6S_INCLUDE_BOARD_H
-
-/************************************************************************************
- * Included Files
- ************************************************************************************/
-
-#include "board_dma_map.h"
-
-#include <nuttx/config.h>
-
-#ifndef __ASSEMBLY__
-# include <stdint.h>
-#endif
-
-#include "stm32_rcc.h"
-
-/************************************************************************************
- * Pre-processor Definitions
- ************************************************************************************/
-
-/* Clocking *************************************************************************/
-/* The auterion_fmu-v6s  board provides the following clock sources:
- *
- *   XTAL4: 24 MHz crystal for HSE
- *
- * So we have these clock source available within the STM32
- *
- *   HSI: 16 MHz RC factory-trimmed
- *   HSE: 24 MHz crystal for HSE
- */
-
-#define STM32_BOARD_XTAL        24000000ul
-
-#define STM32_HSI_FREQUENCY     16000000ul
-#define STM32_LSI_FREQUENCY     32000
-#define STM32_HSE_FREQUENCY     STM32_BOARD_XTAL
-#define STM32_LSE_FREQUENCY     32768
-
-/* Main PLL Configuration.
- *
- * PLL source is HSE = 24,000,000
- *
- * PLL_VCOx = (STM32_HSE_FREQUENCY / PLLM) * PLLN
- * Subject to:
- *
- *     1 <= PLLM <= 63
- *     4 <= PLLN <= 512
- *   150 MHz <= PLL_VCOL <= 420MHz
- *   192 MHz <= PLL_VCOH <= 836MHz
- *
- * SYSCLK  = PLL_VCO / PLLP
- * CPUCLK  = SYSCLK / D1CPRE
- * Subject to
- *
- *   PLLP1   = {2, 4, 6, 8, ..., 128}
- *   PLLP2,3 = {2, 3, 4, ..., 128}
- *   CPUCLK <= 480 MHz
- */
-
-#define STM32_BOARD_USEHSE
-
-#define STM32_PLLCFG_PLLSRC      RCC_PLLCKSELR_PLLSRC_HSE
-
-/* PLL1, wide 2 - 4 MHz input, enable DIVP, DIVQ, DIVR
- *
- *   PLL1_VCO = (24,000,000 / 12) * 450 = 900 MHz
- *
- *   PLL1P = PLL1_VCO/2  = 900 MHz /  2  = 450   MHz
- *   PLL1Q = PLL1_VCO/9  = 900 MHz /  9  = 100   MHz **used for ETH REF CLK via MCO1/2**
- *   PLL1R = PLL1_VCO/8  = 900 MHz /  8  = 112.5 MHz
- */
-
-#define STM32_PLLCFG_PLL1CFG    (RCC_PLLCFGR_PLL1VCOSEL_WIDE | \
-				 RCC_PLLCFGR_PLL1RGE_2_4_MHZ | \
-				 RCC_PLLCFGR_DIVP1EN | \
-				 RCC_PLLCFGR_DIVQ1EN | \
-				 RCC_PLLCFGR_DIVR1EN)
-#define STM32_PLLCFG_PLL1M       RCC_PLLCKSELR_DIVM1(12)
-#define STM32_PLLCFG_PLL1N       RCC_PLL1DIVR_N1(450)
-#define STM32_PLLCFG_PLL1P       RCC_PLL1DIVR_P1(2)
-#define STM32_PLLCFG_PLL1Q       RCC_PLL1DIVR_Q1(9)
-#define STM32_PLLCFG_PLL1R       RCC_PLL1DIVR_R1(8)
-
-#define STM32_VCO1_FREQUENCY     ((STM32_HSE_FREQUENCY / 12) * 450)
-#define STM32_PLL1P_FREQUENCY    (STM32_VCO1_FREQUENCY / 2)
-#define STM32_PLL1Q_FREQUENCY    (STM32_VCO1_FREQUENCY / 9)
-#define STM32_PLL1R_FREQUENCY    (STM32_VCO1_FREQUENCY / 8)
-
-/* PLL2 */
-
-#define STM32_PLLCFG_PLL2CFG     (RCC_PLLCFGR_PLL2VCOSEL_WIDE | \
-				  RCC_PLLCFGR_PLL2RGE_4_8_MHZ | \
-				  RCC_PLLCFGR_DIVP2EN | \
-				  RCC_PLLCFGR_DIVQ2EN | \
-				  RCC_PLLCFGR_DIVR2EN)
-#define STM32_PLLCFG_PLL2M       RCC_PLLCKSELR_DIVM2(6)
-#define STM32_PLLCFG_PLL2N       RCC_PLL2DIVR_N2(48)
-#define STM32_PLLCFG_PLL2P       RCC_PLL2DIVR_P2(2)
-#define STM32_PLLCFG_PLL2Q       RCC_PLL2DIVR_Q2(2)
-#define STM32_PLLCFG_PLL2R       RCC_PLL2DIVR_R2(2)
-
-#define STM32_VCO2_FREQUENCY     ((STM32_HSE_FREQUENCY / 6) * 48)
-#define STM32_PLL2P_FREQUENCY    (STM32_VCO2_FREQUENCY / 2)
-#define STM32_PLL2Q_FREQUENCY    (STM32_VCO2_FREQUENCY / 2)
-#define STM32_PLL2R_FREQUENCY    (STM32_VCO2_FREQUENCY / 2)
-
-/* PLL3 */
-
-#define STM32_PLLCFG_PLL3CFG    (RCC_PLLCFGR_PLL3VCOSEL_WIDE | \
-				 RCC_PLLCFGR_PLL3RGE_4_8_MHZ | \
-				 RCC_PLLCFGR_DIVQ3EN)
-#define STM32_PLLCFG_PLL3M      RCC_PLLCKSELR_DIVM3(6)
-#define STM32_PLLCFG_PLL3N      RCC_PLL3DIVR_N3(48)
-#define STM32_PLLCFG_PLL3P      RCC_PLL3DIVR_P3(2)
-#define STM32_PLLCFG_PLL3Q      RCC_PLL3DIVR_Q3(4)
-#define STM32_PLLCFG_PLL3R      RCC_PLL3DIVR_R3(2)
-
-#define STM32_VCO3_FREQUENCY    ((STM32_HSE_FREQUENCY / 6) * 48)
-#define STM32_PLL3P_FREQUENCY   (STM32_VCO3_FREQUENCY / 2)
-#define STM32_PLL3Q_FREQUENCY   (STM32_VCO3_FREQUENCY / 4)
-#define STM32_PLL3R_FREQUENCY   (STM32_VCO3_FREQUENCY / 2)
-
-/* SYSCLK = PLL1P = 450MHz
- * CPUCLK = SYSCLK / 1 = 450 MHz
- */
-
-#define STM32_RCC_D1CFGR_D1CPRE  (RCC_D1CFGR_D1CPRE_SYSCLK)
-#define STM32_SYSCLK_FREQUENCY   (STM32_PLL1P_FREQUENCY)
-#define STM32_CPUCLK_FREQUENCY   (STM32_SYSCLK_FREQUENCY / 1)
-
-/* Configure Clock Assignments */
-
-/* AHB clock (HCLK) is SYSCLK/2 (240 MHz max)
- * HCLK1 = HCLK2 = HCLK3 = HCLK4 = 225
- */
-
-#define STM32_RCC_D1CFGR_HPRE   RCC_D1CFGR_HPRE_SYSCLKd2        /* HCLK  = SYSCLK / 2 */
-#define STM32_ACLK_FREQUENCY    (STM32_CPUCLK_FREQUENCY / 2)    /* ACLK in D1, HCLK3 in D1 */
-#define STM32_HCLK_FREQUENCY    (STM32_CPUCLK_FREQUENCY / 2)    /* HCLK in D2, HCLK4 in D3 */
-#define STM32_BOARD_HCLK        STM32_HCLK_FREQUENCY            /* same as above, to satisfy compiler */
-
-/* APB1 clock (PCLK1) is HCLK/2 (112.5 MHz) */
-
-#define STM32_RCC_D2CFGR_D2PPRE1  RCC_D2CFGR_D2PPRE1_HCLKd2       /* PCLK1 = HCLK / 2 */
-#define STM32_PCLK1_FREQUENCY     (STM32_HCLK_FREQUENCY/2)
-
-/* APB2 clock (PCLK2) is HCLK/2 (112.5 MHz) */
-
-#define STM32_RCC_D2CFGR_D2PPRE2  RCC_D2CFGR_D2PPRE2_HCLKd2       /* PCLK2 = HCLK / 2 */
-#define STM32_PCLK2_FREQUENCY     (STM32_HCLK_FREQUENCY/2)
-
-/* APB3 clock (PCLK3) is HCLK/2 (112.5 MHz) */
-
-#define STM32_RCC_D1CFGR_D1PPRE   RCC_D1CFGR_D1PPRE_HCLKd2        /* PCLK3 = HCLK / 2 */
-#define STM32_PCLK3_FREQUENCY     (STM32_HCLK_FREQUENCY/2)
-
-/* APB4 clock (PCLK4) is HCLK/4 (112.5 MHz) */
-
-#define STM32_RCC_D3CFGR_D3PPRE   RCC_D3CFGR_D3PPRE_HCLKd2       /* PCLK4 = HCLK / 2 */
-#define STM32_PCLK4_FREQUENCY     (STM32_HCLK_FREQUENCY/2)
-
-/* Timer clock frequencies */
-
-/* Timers driven from APB1 will be twice PCLK1 */
-
-#define STM32_APB1_TIM2_CLKIN   (2*STM32_PCLK1_FREQUENCY)
-#define STM32_APB1_TIM3_CLKIN   (2*STM32_PCLK1_FREQUENCY)
-#define STM32_APB1_TIM4_CLKIN   (2*STM32_PCLK1_FREQUENCY)
-#define STM32_APB1_TIM5_CLKIN   (2*STM32_PCLK1_FREQUENCY)
-#define STM32_APB1_TIM6_CLKIN   (2*STM32_PCLK1_FREQUENCY)
-#define STM32_APB1_TIM7_CLKIN   (2*STM32_PCLK1_FREQUENCY)
-#define STM32_APB1_TIM12_CLKIN  (2*STM32_PCLK1_FREQUENCY)
-#define STM32_APB1_TIM13_CLKIN  (2*STM32_PCLK1_FREQUENCY)
-#define STM32_APB1_TIM14_CLKIN  (2*STM32_PCLK1_FREQUENCY)
-
-/* Timers driven from APB2 will be twice PCLK2 */
-
-#define STM32_APB2_TIM1_CLKIN   (2*STM32_PCLK2_FREQUENCY)
-#define STM32_APB2_TIM8_CLKIN   (2*STM32_PCLK2_FREQUENCY)
-#define STM32_APB2_TIM15_CLKIN  (2*STM32_PCLK2_FREQUENCY)
-#define STM32_APB2_TIM16_CLKIN  (2*STM32_PCLK2_FREQUENCY)
-#define STM32_APB2_TIM17_CLKIN  (2*STM32_PCLK2_FREQUENCY)
-
-/* Kernel Clock Configuration
- *
- * Note: look at Table 54 in ST Manual
- */
-
-/* I2C123 clock source */
-
-#define STM32_RCC_D2CCIP2R_I2C123SRC RCC_D2CCIP2R_I2C123SEL_HSI
-
-/* I2C4 clock source */
-
-#define STM32_RCC_D3CCIPR_I2C4SRC    RCC_D3CCIPR_I2C4SEL_HSI
-
-/* SPI123 clock source */
-
-#define STM32_RCC_D2CCIP1R_SPI123SRC RCC_D2CCIP1R_SPI123SEL_PLL2
-
-/* SPI45 clock source */
-
-#define STM32_RCC_D2CCIP1R_SPI45SRC  RCC_D2CCIP1R_SPI45SEL_PLL2
-
-/* SPI6 clock source */
-
-#define STM32_RCC_D3CCIPR_SPI6SRC    RCC_D3CCIPR_SPI6SEL_PLL2
-
-/* USB 1 and 2 clock source */
-
-#define STM32_RCC_D2CCIP2R_USBSRC    RCC_D2CCIP2R_USBSEL_PLL3
-
-/* ADC 1 2 3 clock source */
-
-#define STM32_RCC_D3CCIPR_ADCSRC     RCC_D3CCIPR_ADCSEL_PLL2
-
-/* FDCAN 1 2 clock source */
-
-#define STM32_RCC_D2CCIP1R_FDCANSEL  RCC_D2CCIP1R_FDCANSEL_HSE   /* FDCAN 1 2 clock source */
-
-#define STM32_FDCANCLK               STM32_HSE_FREQUENCY
-
-/* FLASH wait states
- *
- *  ------------ ---------- -----------
- *  Vcore        MAX ACLK   WAIT STATES
- *  ------------ ---------- -----------
- *  1.15-1.26 V     70 MHz    0
- *  (VOS1 level)   140 MHz    1
- *                 210 MHz    2
- *  1.05-1.15 V     55 MHz    0
- *  (VOS2 level)   110 MHz    1
- *                 165 MHz    2
- *                 220 MHz    3
- *  0.95-1.05 V     45 MHz    0
- *  (VOS3 level)    90 MHz    1
- *                 135 MHz    2
- *                 180 MHz    3
- *                 225 MHz    4
- *  ------------ ---------- -----------
- */
-
-#define BOARD_FLASH_WAITSTATES 2
-
-
-/* LED definitions ******************************************************************/
-/* The Auterion FMUV6S board has three, LED_GREEN a Green LED, LED_BLUE a Blue LED and
- * LED_RED a Red LED, that can be controlled by software.
- *
- * If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs in any way.
- * The following definitions are used to access individual LEDs.
- */
-
-/* LED index values for use with board_userled() */
-
-#define BOARD_LED1        0
-#define BOARD_LED2        1
-#define BOARD_LED3        2
-#define BOARD_NLEDS       3
-
-#define BOARD_LED_RED     BOARD_LED1
-#define BOARD_LED_GREEN   BOARD_LED2
-#define BOARD_LED_BLUE    BOARD_LED3
-
-/* LED bits for use with board_userled_all() */
-
-#define BOARD_LED1_BIT    (1 << BOARD_LED1)
-#define BOARD_LED2_BIT    (1 << BOARD_LED2)
-#define BOARD_LED3_BIT    (1 << BOARD_LED3)
-
-/* If CONFIG_ARCH_LEDS is defined, the usage by the board port is defined in
- * include/board.h and src/stm32_leds.c. The LEDs are used to encode OS-related
- * events as follows:
- *
- *
- *   SYMBOL                     Meaning                      LED state
- *                                                        Red   Green  Blue
- *   ----------------------  --------------------------  ------ ------ ----*/
-
-#define LED_STARTED        0 /* NuttX has been started   OFF    OFF   OFF  */
-#define LED_HEAPALLOCATE   1 /* Heap has been allocated  OFF    OFF   ON   */
-#define LED_IRQSENABLED    2 /* Interrupts enabled       OFF    ON    OFF  */
-#define LED_STACKCREATED   3 /* Idle stack created       OFF    ON    ON   */
-#define LED_INIRQ          4 /* In an interrupt          N/C    N/C   GLOW */
-#define LED_SIGNAL         5 /* In a signal handler      N/C    GLOW  N/C  */
-#define LED_ASSERTION      6 /* An assertion failed      GLOW   N/C   GLOW */
-#define LED_PANIC          7 /* The system has crashed   Blink  OFF   N/C  */
-#define LED_IDLE           8 /* MCU is is sleep mode     ON     OFF   OFF  */
-
-/* Thus if the Green LED is statically on, NuttX has successfully booted and
- * is, apparently, running normally.  If the Red LED is flashing at
- * approximately 2Hz, then a fatal error has been detected and the system
- * has halted.
- */
-
-/* Alternate function pin selections ************************************************/
-
-/* ADC1 */
-
-#define GPIO_ADC1_INP16      GPIO_ADC1_INP16_0                     /* PA0 */
-#define GPIO_ADC123_INP10    GPIO_ADC123_INP10_0                   /* PC0 */
-#define GPIO_ADC12_INP15     GPIO_ADC12_INP15_0                    /* PA3 */
-#define GPIO_ADC12_INP13     GPIO_ADC12_INP13_0                    /* PC3 */
-#define GPIO_ADC12_INP5      GPIO_ADC12_INP5_0                     /* PB1 */
-#define GPIO_ADC12_INP18     GPIO_ADC12_INP18_0                    /* PA4 */
-
-/* Trace */
-
-#define GPIO_TRACESWO GPIO_TRACESWO_0
-
-/* U[S]ARTs */
-
-
-#define GPIO_USART1_RX   GPIO_USART1_RX_2                          /* PA10 */
-#define GPIO_USART1_TX  (GPIO_USART1_TX_2 | GPIO_SPEED_25MHz)      /* PA9 */
-#define GPIO_USART1_RTS  GPIO_USART1_RTS_0                         /* PA12 */
-#define GPIO_USART1_CTS  GPIO_USART1_CTS_NSS_0                     /* PA11 */
-
-#define GPIO_USART2_RX   GPIO_USART2_RX_2                          /* PD6 */
-#define GPIO_USART2_TX  (GPIO_USART2_TX_2 | GPIO_SPEED_25MHz)      /* PD5 */
-#define GPIO_USART2_RTS  0                                         /* PD4 */
-#define GPIO_USART2_CTS  0                                         /* PD3 */
-
-#define GPIO_USART3_RX   GPIO_USART3_RX_3                          /* PD9 */
-#define GPIO_USART3_TX  (GPIO_USART3_TX_3 | GPIO_SPEED_2MHz)       /* PD8 */
-
-#define GPIO_UART4_RX    GPIO_UART4_RX_5                           /* PD0 */
-#define GPIO_UART4_TX   (GPIO_UART4_TX_5 | GPIO_SPEED_2MHz)        /* PD1 */
-
-#define GPIO_UART5_RX   (GPIO_UART5_RX_3 | GPIO_SPEED_2MHz)        /* PD2 */
-#define GPIO_UART5_TX    0    /* We did not route out the TX pin of UART5 */
-
-#define GPIO_UART7_RX    0    /* We did not route out the RX pin of UART7 */
-#define GPIO_UART7_TX   (GPIO_UART7_TX_3 | GPIO_SPEED_2MHz)        /* PE8 */
-
-#define GPIO_UART8_RX    GPIO_UART8_RX_1                           /* PE0 */
-#define GPIO_UART8_TX   (GPIO_UART8_TX_1 | GPIO_SPEED_2MHz)        /* PE1 */
-
-
-/* CAN
- *
- * CAN1 is routed to transceiver.
- */
-#define GPIO_CAN1_RX     (GPIO_CAN1_RX_2 | GPIO_SPEED_50MHz)       /* PB8 */
-#define GPIO_CAN1_TX     (GPIO_CAN1_TX_2 | GPIO_SPEED_50MHz)       /* PB9 */
-
-/* SPI
- * SPI1 is sensors1
- * SPI2 is sensors2
- * SPI3 is sensors3
- * SPI4 is FRAM
- *
- */
-
-#define GPIO_SPI1_MISO      (GPIO_SPI1_MISO_1 | GPIO_SPEED_50MHz)  /* PA6 */
-#define GPIO_SPI1_MOSI      (GPIO_SPI1_MOSI_3 | GPIO_SPEED_50MHz)  /* PD7 */
-#define GPIO_SPI1_SCK       (GPIO_SPI1_SCK_1  | GPIO_SPEED_50MHz)  /* PA5 */
-
-#define GPIO_SPI2_MISO      (GPIO_SPI2_MISO_2 | GPIO_SPEED_50MHz)  /* PC2 */
-#define GPIO_SPI2_MOSI      (GPIO_SPI2_MOSI_1 | GPIO_SPEED_50MHz)  /* PB15 */
-#define GPIO_SPI2_SCK       (GPIO_SPI2_SCK_3  | GPIO_SPEED_50MHz)  /* PB10 */
-
-
-#define GPIO_SPI3_MISO      (GPIO_SPI3_MISO_2 | GPIO_SPEED_50MHz)  /* PC11 */
-#define GPIO_SPI3_MOSI      (GPIO_SPI3_MOSI_3 | GPIO_SPEED_50MHz)  /* PB2 */
-#define GPIO_SPI3_SCK       (GPIO_SPI3_SCK_2  | GPIO_SPEED_50MHz)  /* PC10 */
-
-
-#define GPIO_SPI4_MISO     (GPIO_SPI4_MISO_2 | GPIO_SPEED_50MHz)  /* PE5 */
-#define GPIO_SPI4_MOSI     (GPIO_SPI4_MOSI_2 | GPIO_SPEED_50MHz)  /* PE6 */
-#define GPIO_SPI4_SCK      (GPIO_SPI4_SCK_2  | GPIO_SPEED_50MHz)  /* PE2 */
-
-/* I2C
- *
- *   The optional _GPIO configurations allow the I2C driver to manually
- *   reset the bus to clear stuck slaves.  They match the pin configuration,
- *   but are normally-high GPIOs.
- *
- */
-
-#define GPIO_I2C1_SCL        (GPIO_I2C1_SCL_1 | GPIO_SPEED_2MHz)         /* PB6 */
-#define GPIO_I2C1_SDA        (GPIO_I2C1_SDA_1 | GPIO_SPEED_2MHz)         /* PB7 */
-#define GPIO_I2C1_SCL_GPIO   (GPIO_OUTPUT | GPIO_OPENDRAIN |GPIO_SPEED_2MHz | GPIO_OUTPUT_SET | GPIO_PORTB | GPIO_PIN6)
-#define GPIO_I2C1_SDA_GPIO   (GPIO_OUTPUT | GPIO_OPENDRAIN |GPIO_SPEED_2MHz | GPIO_OUTPUT_SET | GPIO_PORTB | GPIO_PIN7)
-
-#define GPIO_I2C4_SCL        (GPIO_I2C4_SCL_1 | GPIO_SPEED_2MHz)         /* PD12 */
-#define GPIO_I2C4_SDA        (GPIO_I2C4_SDA_1 | GPIO_SPEED_2MHz)         /* PD13 */
-#define GPIO_I2C4_SCL_GPIO   (GPIO_OUTPUT | GPIO_OPENDRAIN | GPIO_SPEED_2MHz | GPIO_OUTPUT_SET | GPIO_PORTD | GPIO_PIN12)
-#define GPIO_I2C4_SDA_GPIO   (GPIO_OUTPUT | GPIO_OPENDRAIN | GPIO_SPEED_2MHz | GPIO_OUTPUT_SET | GPIO_PORTD | GPIO_PIN13)
-
-
-/* The STM32H7 connects MAC-to-MAC to iMX8MP
- *
- *   STM32H7  BOARD
- *   GPIO     SIGNAL       PIN NAME
- *   -------- ------------ -------------
- *   PA7     ETH_CRS_DV    CRS_DV
- *   PC1     ETH_MDC       MDC
- *   PA2     ETH_MDIO      MDIO
- *   PA1     ETH_REF_CL    X1
- *   PC4     ETH_RXD0      RX_D0
- *   PC5     ETH_RXD1      RX_D1
- *   PB11    ETH_TX_EN     TX_EN
- *   PB12    ETH_TXD0      TX_D0
- *   PB13    ETH_TXD1      TX_D1
- *
- * The PHY address is 1, since COL/PHYAD0 features a pull up.
- */
-
-#define GPIO_ETH_MDC              GPIO_ETH_MDC_0                              /* PC1 */
-#define GPIO_ETH_MDIO             GPIO_ETH_MDIO_0                             /* PA2 */
-#define GPIO_ETH_RMII_CRS_DV      GPIO_ETH_RMII_CRS_DV_0                      /* PA7 */
-#define GPIO_ETH_RMII_REF_CLK     GPIO_ETH_RMII_REF_CLK_0                     /* PA1 */
-
-#define GPIO_ETH_RMII_RXD0        GPIO_ETH_RMII_RXD0_0                        /* PC4 */
-#define GPIO_ETH_RMII_RXD1        GPIO_ETH_RMII_RXD1_0                        /* PC5 */
-
-#define GPIO_ETH_RMII_TX_EN      (GPIO_ETH_RMII_TX_EN_1 | GPIO_SPEED_100MHz)  /* PB11 */
-#define GPIO_ETH_RMII_TXD0       (GPIO_ETH_RMII_TXD0_1 | GPIO_SPEED_100MHz)   /* PB12 */
-#define GPIO_ETH_RMII_TXD1       (GPIO_ETH_RMII_TXD1_1 | GPIO_SPEED_100MHz)   /* PB13 */
-
-
-/* Board provides GPIO or other Hardware for signaling to timing analyzer */
-
-#if defined(CONFIG_BOARD_USE_PROBES)
-# include "stm32_gpio.h"
-# define PROBE_N(n) (1<<((n)-1))
-# define PROBE_1    (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTE|GPIO_PIN9)   /* PE9  AUX1 */
-# define PROBE_2    (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTE|GPIO_PIN11)  /* PE11 AUX2 */
-# define PROBE_3    (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTE|GPIO_PIN13)  /* PE13 AUX3 */
-# define PROBE_4    (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTE|GPIO_PIN14)  /* PE14 AUX4 */
-# define PROBE_5    (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTC|GPIO_PIN6)   /* PC6  AUX5 */
-# define PROBE_6    (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTB|GPIO_PIN5)   /* PB5  AUX6 */
-# define PROBE_7    (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTB|GPIO_PIN0)   /* PB0  AUX7 */
-# define PROBE_8    (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTC|GPIO_PIN9)   /* PC9  AUX8 */
-# define PROBE_9    (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTC|GPIO_PIN7)   /* PC7  CAP1 */
-
-# define PROBE_INIT(mask) \
-	do { \
-		if ((mask)& PROBE_N(1)) { stm32_configgpio(PROBE_1); } \
-		if ((mask)& PROBE_N(2)) { stm32_configgpio(PROBE_2); } \
-		if ((mask)& PROBE_N(3)) { stm32_configgpio(PROBE_3); } \
-		if ((mask)& PROBE_N(4)) { stm32_configgpio(PROBE_4); } \
-		if ((mask)& PROBE_N(5)) { stm32_configgpio(PROBE_5); } \
-		if ((mask)& PROBE_N(6)) { stm32_configgpio(PROBE_6); } \
-		if ((mask)& PROBE_N(7)) { stm32_configgpio(PROBE_7); } \
-		if ((mask)& PROBE_N(8)) { stm32_configgpio(PROBE_8); } \
-		if ((mask)& PROBE_N(9)) { stm32_configgpio(PROBE_9); } \
-	} while(0)
-
-# define PROBE(n,s)  do {stm32_gpiowrite(PROBE_##n,(s));}while(0)
-# define PROBE_MARK(n) PROBE(n,false);PROBE(n,true)
-#else
-# define PROBE_INIT(mask)
-# define PROBE(n,s)
-# define PROBE_MARK(n)
-#endif
-
-#endif  /*__NUTTX_CONFIG_PX4_FMU_V6S_INCLUDE_BOARD_H  */
@@ -1,126 +0,0 @@
-/****************************************************************************
- *
- *   Copyright (c) 2020 PX4 Development Team. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- * 3. Neither the name PX4 nor the names of its contributors may be
- *    used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- ****************************************************************************/
-
-#pragma once
-
-/*
-FDCAN2 => no DMA, but dedicated message RAM
-ETH => has its own DMA engine
-I2C => has its own DMA engine
-
-The rest are general DMA engines:
-
-MDMA (D1): not supported by NuttX
-
-DMA1 (D2): 8 streams, mapped to DMAMUX1 requests 0-7
-
-DMA2 (D2): 8 streams, mapped to DMAMUX1 requests 8-15
-
-BDMA (D3): 8 streams, mapped to DMAMUX2 requests 0-7
-
-I2C1_RX => DMAMUX1:33 (EXT)
-I2C1_TX => DMAMUX1:34 (EXT)
-I2C4_RX => DMAMUX2:29 (BARO + MAG + EEPROM)
-I2C4_TX => DMAMUX2:30 (BARO + MAG + EEPROM)
-
-SPI3_RX => DMAMUX1:61 (IMU3 BMI088)
-SPI3_TX => DMAMUX1:62 (IMU3 BMI088)
-SPI4_RX => DMAMUX1:83 (FRAM)
-SPI4_TX => DMAMUX1:84 (FRAM)
-
-UART4_RX => DMAMUX1:63 (NSH DEBUG)
-UART4_TX => DMAMUX1:64 (NSH DEBUG)
-UART7_RX => DMAMUX1:79 (SBUS INPUT)
-UART7_RX => DMAMUX1:79 (ESC RX)
-UART8_RX => DMAMUX1:81 (GPS)
-UART8_TX => DMAMUX1:82 (GPS)
-USART3_RX => DMAMUX1:45 (EXTRAS)
-USART3_TX => DMAMUX1:46 (EXTRAS)
-
-USART1_RX => DMAMUX1:41 (MAVLINK)
-USART1_TX => DMAMUX1:42 (MAVLINK)
-USART2_RX => DMAMUX1:43 (NSH IMX)
-USART2_TX => DMAMUX1:44 (NSH IMX)
-
-(TIM1_CH1 => DMAMUX1:11)
-(TIM1_CH2 => DMAMUX1:12)
-(TIM1_CH3 => DMAMUX1:13)
-(TIM1_CH4 => DMAMUX1:14)
-TIM1_UP => DMAMUX1:15 (PWM)
-
-(TIM3_CH1 => DMAMUX1:23)
-(TIM3_CH2 => DMAMUX1:24)
-(TIM3_CH3 => DMAMUX1:25)
-(TIM3_CH4 => DMAMUX1:26)
-TIM3_UP => DMAMUX1:27 (PWM)
-
-TIM8_CH2 => DMAMUX1:48 (PPM INPUT)
-(TIM8_UP => DMAMUX1:51)
-
-*/
-
-
-
-// DMAMUX1 Using at most 8 Channels on DMA1 --------   Assigned
-//                                                     V
-
-#define DMAMAP_USART1_RX  DMAMAP_DMA12_USART1RX_0   /* 1 TELEM1 (MAVLINK) */
-#define DMAMAP_USART1_TX  DMAMAP_DMA12_USART1TX_0   /* 2 TELEM1 (MAVLINK) */
-
-#define DMAMAP_UART8_RX   DMAMAP_DMA12_UART8RX_0    /* 3 GPS1 */
-#define DMAMAP_UART8_TX   DMAMAP_DMA12_UART8TX_0    /* 4 GPS1 */
-
-#define DMAMAP_USART2_TX  DMAMAP_DMA12_USART2TX_0   /* 5 NSH IMX TX */
-#define DMAMAP_UART4_TX   DMAMAP_DMA12_UART4TX_0    /* 6 NSH DBG TX */
-
-// Assigned in timer_config.cpp
-
-// Timer 1                                          /* 7 TIM1UP */
-// Timer 3                                          /* 8 TIM3UP */
-
-
-
-// DMAMUX2 Using at most 8 Channels on DMA2 --------   Assigned
-//                                                     V
-
-#define DMAMAP_SPI3_RX    DMAMAP_DMA12_SPI3RX_1     /* 1 BMI088 */
-#define DMAMAP_SPI3_TX    DMAMAP_DMA12_SPI3TX_1     /* 2 BMI088 */
-
-#define DMAMAP_SPI4_RX    DMAMAP_DMA12_SPI4RX_1     /* 3 FRAM */
-#define DMAMAP_SPI4_TX    DMAMAP_DMA12_SPI4TX_1     /* 4 FRAM */
-
-#define DMAMAP_USART3_RX  DMAMAP_DMA12_USART3RX_1   /* 5 TELEM2 */
-#define DMAMAP_USART3_TX  DMAMAP_DMA12_USART3TX_1   /* 6 TELEM2 */
-
-#define DMAMAP_UART5_RX   DMAMAP_DMA12_UART5RX_1    /* 7 SBUS IN */
-#define DMAMAP_UART7_RX   DMAMAP_DMA12_UART7RX_1    /* 8 ESC IN */
@@ -1,301 +0,0 @@
-#
-# This file is autogenerated: PLEASE DO NOT EDIT IT.
-#
-# You can use "make menuconfig" to make any modifications to the installed .config file.
-# You can then do "make savedefconfig" to generate a new defconfig file that includes your
-# modifications.
-#
-# CONFIG_DISABLE_ENVIRON is not set
-# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set
-# CONFIG_DISABLE_PTHREAD is not set
-# CONFIG_NSH_DISABLEBG is not set
-# CONFIG_NSH_DISABLESCRIPT is not set
-# CONFIG_NSH_DISABLE_ARP is not set
-# CONFIG_NSH_DISABLE_CAT is not set
-# CONFIG_NSH_DISABLE_CD is not set
-# CONFIG_NSH_DISABLE_CP is not set
-# CONFIG_NSH_DISABLE_DATE is not set
-# CONFIG_NSH_DISABLE_DF is not set
-# CONFIG_NSH_DISABLE_ECHO is not set
-# CONFIG_NSH_DISABLE_ENV is not set
-# CONFIG_NSH_DISABLE_EXEC is not set
-# CONFIG_NSH_DISABLE_EXPORT is not set
-# CONFIG_NSH_DISABLE_FREE is not set
-# CONFIG_NSH_DISABLE_GET is not set
-# CONFIG_NSH_DISABLE_HELP is not set
-# CONFIG_NSH_DISABLE_IFCONFIG is not set
-# CONFIG_NSH_DISABLE_IFUPDOWN is not set
-# CONFIG_NSH_DISABLE_ITEF is not set
-# CONFIG_NSH_DISABLE_KILL is not set
-# CONFIG_NSH_DISABLE_LOOPS is not set
-# CONFIG_NSH_DISABLE_LS is not set
-# CONFIG_NSH_DISABLE_MKDIR is not set
-# CONFIG_NSH_DISABLE_MKFATFS is not set
-# CONFIG_NSH_DISABLE_MOUNT is not set
-# CONFIG_NSH_DISABLE_MV is not set
-# CONFIG_NSH_DISABLE_NSLOOKUP is not set
-# CONFIG_NSH_DISABLE_PS is not set
-# CONFIG_NSH_DISABLE_PSSTACKUSAGE is not set
-# CONFIG_NSH_DISABLE_PWD is not set
-# CONFIG_NSH_DISABLE_RM is not set
-# CONFIG_NSH_DISABLE_RMDIR is not set
-# CONFIG_NSH_DISABLE_SEMICOLON is not set
-# CONFIG_NSH_DISABLE_SET is not set
-# CONFIG_NSH_DISABLE_SLEEP is not set
-# CONFIG_NSH_DISABLE_SOURCE is not set
-# CONFIG_NSH_DISABLE_TELNETD is not set
-# CONFIG_NSH_DISABLE_TEST is not set
-# CONFIG_NSH_DISABLE_TIME is not set
-# CONFIG_NSH_DISABLE_UMOUNT is not set
-# CONFIG_NSH_DISABLE_UNSET is not set
-# CONFIG_NSH_DISABLE_USLEEP is not set
-# CONFIG_STM32H7_USE_LEGACY_PINMAP is not set
-CONFIG_ARCH="arm"
-CONFIG_ARCH_BOARD_CUSTOM=y
-CONFIG_ARCH_BOARD_CUSTOM_DIR="../../../../boards/auterion/fmu-v6s/nuttx-config"
-CONFIG_ARCH_BOARD_CUSTOM_DIR_RELPATH=y
-CONFIG_ARCH_BOARD_CUSTOM_NAME="auterion"
-CONFIG_ARCH_CHIP="stm32h7"
-CONFIG_ARCH_CHIP_STM32H743VI=y
-CONFIG_ARCH_CHIP_STM32H7=y
-CONFIG_ARCH_INTERRUPTSTACK=768
-CONFIG_ARCH_STACKDUMP=y
-CONFIG_ARMV7M_BASEPRI_WAR=y
-CONFIG_ARMV7M_DCACHE=y
-CONFIG_ARMV7M_DTCM=y
-CONFIG_ARMV7M_ICACHE=y
-CONFIG_ARMV7M_MEMCPY=y
-CONFIG_ARMV7M_USEBASEPRI=y
-CONFIG_ARM_MPU_EARLY_RESET=y
-CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=4096
-CONFIG_BOARDCTL_RESET=y
-CONFIG_BOARD_ASSERT_RESET_VALUE=0
-CONFIG_BOARD_CRASHDUMP=y
-CONFIG_BOARD_LOOPSPERMSEC=95751
-CONFIG_BOARD_RESET_ON_ASSERT=2
-CONFIG_BUILTIN=y
-CONFIG_DEBUG_FULLOPT=y
-CONFIG_DEBUG_HARDFAULT_ALERT=y
-CONFIG_DEBUG_MEMFAULT=y
-CONFIG_DEBUG_SYMBOLS=y
-CONFIG_DEBUG_TCBINFO=y
-CONFIG_DEFAULT_SMALL=y
-CONFIG_DEV_FIFO_SIZE=0
-CONFIG_DEV_PIPE_MAXSIZE=1024
-CONFIG_DEV_PIPE_SIZE=70
-CONFIG_ETH0_PHY_LAN8742A=y
-CONFIG_EXPERIMENTAL=y
-CONFIG_FAT_DMAMEMORY=y
-CONFIG_FAT_LCNAMES=y
-CONFIG_FAT_LFN=y
-CONFIG_FAT_LFN_ALIAS_HASH=y
-CONFIG_FDCLONE_STDIO=y
-CONFIG_FSUTILS_IPCFG=y
-CONFIG_FS_BINFS=y
-CONFIG_FS_CROMFS=y
-CONFIG_FS_FAT=y
-CONFIG_FS_FATTIME=y
-CONFIG_FS_LITTLEFS=y
-CONFIG_FS_LITTLEFS_BLOCK_CYCLE=-1
-CONFIG_FS_LITTLEFS_BLOCK_SIZE_FACTOR=4
-CONFIG_FS_LITTLEFS_LOOKAHEAD_SIZE=64
-CONFIG_FS_LITTLEFS_PROGRAM_SIZE_FACTOR=1
-CONFIG_FS_PROCFS=y
-CONFIG_FS_PROCFS_INCLUDE_PROGMEM=y
-CONFIG_FS_PROCFS_MAX_TASKS=64
-CONFIG_FS_PROCFS_REGISTER=y
-CONFIG_FS_ROMFS=y
-CONFIG_GRAN=y
-CONFIG_GRAN_INTR=y
-CONFIG_HAVE_CXX=y
-CONFIG_HAVE_CXXINITIALIZE=y
-CONFIG_I2C=y
-CONFIG_I2C_RESET=y
-CONFIG_IDLETHREAD_STACKSIZE=750
-CONFIG_INIT_ENTRYPOINT="nsh_main"
-CONFIG_INIT_STACKSIZE=4000
-CONFIG_IOB_NBUFFERS=24
-CONFIG_IOB_THROTTLE=0
-CONFIG_IPCFG_BINARY=y
-CONFIG_IPCFG_CHARDEV=y
-CONFIG_IPCFG_PATH="/fs/mtd_net"
-CONFIG_LIBC_FLOATINGPOINT=y
-CONFIG_LIBC_LONG_LONG=y
-CONFIG_LIBC_MAX_EXITFUNS=1
-CONFIG_LIBC_STRERROR=y
-CONFIG_MEMSET_64BIT=y
-CONFIG_MEMSET_OPTSPEED=y
-CONFIG_MM_REGIONS=4
-CONFIG_MTD=y
-CONFIG_MTD_BYTE_WRITE=y
-CONFIG_MTD_PARTITION=y
-CONFIG_MTD_PROGMEM=y
-CONFIG_MTD_RAMTRON=y
-CONFIG_NAME_MAX=40
-CONFIG_NET=y
-CONFIG_NETDB_DNSCLIENT=y
-CONFIG_NETDB_DNSCLIENT_ENTRIES=8
-CONFIG_NETDB_DNSSERVER_NOADDR=y
-CONFIG_NETDEV_PHY_IOCTL=y
-CONFIG_NETINIT_DNS=y
-CONFIG_NETINIT_DNSIPADDR=0xA290AFE
-CONFIG_NETINIT_DRIPADDR=0xA290AFE
-CONFIG_NETINIT_IPADDR=0xA290A02
-CONFIG_NETINIT_MONITOR=n
-CONFIG_NETINIT_THREAD=y
-CONFIG_NETINIT_THREAD_PRIORITY=49
-CONFIG_NET_ARP_IPIN=y
-CONFIG_NET_ARP_SEND=y
-CONFIG_NET_BROADCAST=y
-CONFIG_NET_ETH_PKTSIZE=1518
-CONFIG_NET_ICMP=y
-CONFIG_NET_ICMP_SOCKET=y
-CONFIG_NET_NACTIVESOCKETS=16
-CONFIG_NET_SOLINGER=y
-CONFIG_NET_UDP=y
-CONFIG_NET_UDP_CHECKSUMS=y
-CONFIG_NET_UDP_WRITE_BUFFERS=y
-CONFIG_NSH_ARCHINIT=y
-CONFIG_NSH_ARGCAT=y
-CONFIG_NSH_BUILTIN_APPS=y
-CONFIG_NSH_CMDPARMS=y
-CONFIG_NSH_CROMFSETC=y
-CONFIG_NSH_LINELEN=128
-CONFIG_NSH_MAXARGUMENTS=15
-CONFIG_NSH_NESTDEPTH=8
-CONFIG_NSH_QUOTE=y
-CONFIG_NSH_ROMFSETC=y
-CONFIG_NSH_ROMFSSECTSIZE=128
-CONFIG_NSH_STRERROR=y
-CONFIG_NSH_VARS=y
-CONFIG_PIPES=y
-CONFIG_PREALLOC_TIMERS=50
-CONFIG_PRIORITY_INHERITANCE=y
-CONFIG_PTHREAD_MUTEX_ROBUST=y
-CONFIG_PTHREAD_STACK_MIN=512
-CONFIG_RAMTRON_EMULATE_PAGE_SHIFT=5
-CONFIG_RAMTRON_EMULATE_SECTOR_SHIFT=5
-CONFIG_RAMTRON_SETSPEED=y
-CONFIG_RAM_SIZE=245760
-CONFIG_RAM_START=0x20010000
-CONFIG_RAW_BINARY=y
-CONFIG_READLINE_CMD_HISTORY=y
-CONFIG_READLINE_TABCOMPLETION=y
-CONFIG_RTC_DATETIME=y
-CONFIG_SCHED_HPWORK=y
-CONFIG_SCHED_HPWORKPRIORITY=249
-CONFIG_SCHED_HPWORKSTACKSIZE=1280
-CONFIG_SCHED_INSTRUMENTATION=y
-CONFIG_SCHED_INSTRUMENTATION_EXTERNAL=y
-CONFIG_SCHED_INSTRUMENTATION_SWITCH=y
-CONFIG_SCHED_LPWORK=y
-CONFIG_SCHED_LPWORKPRIORITY=50
-CONFIG_SCHED_LPWORKSTACKSIZE=1632
-CONFIG_SEM_PREALLOCHOLDERS=32
-CONFIG_SERIAL_IFLOWCONTROL_WATERMARKS=y
-CONFIG_SERIAL_TERMIOS=y
-CONFIG_SIG_DEFAULT=y
-CONFIG_SIG_SIGALRM_ACTION=y
-CONFIG_SIG_SIGUSR1_ACTION=y
-CONFIG_SIG_SIGUSR2_ACTION=y
-CONFIG_SIG_SIGWORK=4
-CONFIG_STACK_COLORATION=y
-CONFIG_START_DAY=30
-CONFIG_START_MONTH=11
-CONFIG_STDIO_BUFFER_SIZE=256
-CONFIG_STM32H7_ADC1=y
-CONFIG_STM32H7_ADC3=y
-CONFIG_STM32H7_BBSRAM=y
-CONFIG_STM32H7_BBSRAM_FILES=5
-CONFIG_STM32H7_BDMA=y
-CONFIG_STM32H7_BKPSRAM=y
-CONFIG_STM32H7_DMA1=y
-CONFIG_STM32H7_DMA2=y
-CONFIG_STM32H7_DMACAPABLE=y
-CONFIG_STM32H7_ETHMAC=y
-CONFIG_STM32H7_FLASH_OVERRIDE_I=y
-CONFIG_STM32H7_FLOWCONTROL_BROKEN=y
-CONFIG_STM32H7_I2C1=y
-CONFIG_STM32H7_I2C4=y
-CONFIG_STM32H7_I2C_DYNTIMEO=y
-CONFIG_STM32H7_I2C_DYNTIMEO_STARTSTOP=10
-CONFIG_STM32H7_PHY_POLLING=y
-CONFIG_STM32H7_NO_PHY=y
-CONFIG_STM32H7_AUTONEG=n
-CONFIG_STM32H7_ETHFD=y
-CONFIG_STM32H7_ETH100MBPS=y
-CONFIG_STM32H7_RMII_EXTCLK=y
-CONFIG_STM32H7_PROGMEM=y
-CONFIG_STM32H7_RTC=y
-CONFIG_STM32H7_RTC_AUTO_LSECLOCK_START_DRV_CAPABILITY=y
-CONFIG_STM32H7_RTC_MAGIC_REG=1
-CONFIG_STM32H7_SAVE_CRASHDUMP=y
-CONFIG_STM32H7_SERIALBRK_BSDCOMPAT=y
-CONFIG_STM32H7_SERIAL_DISABLE_REORDERING=y
-CONFIG_STM32H7_SPI3=y
-CONFIG_STM32H7_SPI3_DMA=y
-CONFIG_STM32H7_SPI3_DMA_BUFFER=1024
-CONFIG_STM32H7_SPI4=y
-CONFIG_STM32H7_SPI4_DMA=y
-CONFIG_STM32H7_SPI4_DMA_BUFFER=4096
-CONFIG_STM32H7_TIM12=y
-CONFIG_STM32H7_TIM1=y
-CONFIG_STM32H7_TIM3=y
-CONFIG_STM32H7_UART4=y
-CONFIG_STM32H7_UART5=y
-CONFIG_STM32H7_UART7=y
-CONFIG_STM32H7_UART8=y
-CONFIG_STM32H7_USART1=y
-CONFIG_STM32H7_USART2=y
-CONFIG_STM32H7_USART3=y
-CONFIG_STM32H7_USART_BREAKS=y
-CONFIG_STM32H7_USART_INVERT=y
-CONFIG_STM32H7_USART_SINGLEWIRE=y
-CONFIG_STM32H7_USART_SWAP=y
-CONFIG_SYSTEM_DHCPC_RENEW=y
-CONFIG_SYSTEM_NSH=y
-CONFIG_SYSTEM_PING=y
-CONFIG_SYSTEM_SYSTEM=y
-CONFIG_TASK_NAME_SIZE=24
-
-CONFIG_USART1_BAUD=3000000
-CONFIG_USART1_IFLOWCONTROL=y
-CONFIG_USART1_OFLOWCONTROL=y
-CONFIG_USART1_RXBUFSIZE=1500
-CONFIG_USART1_TXBUFSIZE=10000
-CONFIG_USART1_RXDMA=y
-CONFIG_USART1_TXDMA=y
-
-CONFIG_USART2_BAUD=57600
-CONFIG_USART2_RXBUFSIZE=500
-CONFIG_USART2_TXBUFSIZE=1500
-CONFIG_USART2_TXDMA=y
-CONFIG_USART2_SERIAL_CONSOLE=y
-
-CONFIG_USART3_BAUD=57600
-CONFIG_USART3_RXBUFSIZE=600
-CONFIG_USART3_TXBUFSIZE=3000
-CONFIG_USART3_RXDMA=y
-CONFIG_USART3_TXDMA=y
-
-CONFIG_UART4_BAUD=57600
-CONFIG_UART4_RXBUFSIZE=500
-CONFIG_UART4_TXBUFSIZE=1500
-CONFIG_UART4_TXDMA=y
-
-CONFIG_UART5_BAUD=100000
-CONFIG_UART5_RXBUFSIZE=600
-CONFIG_UART5_RXDMA=y
-
-CONFIG_UART7_BAUD=115200
-CONFIG_UART7_RXBUFSIZE=600
-CONFIG_UART7_RXDMA=y
-
-CONFIG_UART8_BAUD=57600
-CONFIG_UART8_RXBUFSIZE=600
-CONFIG_UART8_TXBUFSIZE=1500
-CONFIG_UART8_RXDMA=y
-CONFIG_UART8_TXDMA=y
-
-CONFIG_USEC_PER_TICK=1000
-CONFIG_WATCHDOG=y
@@ -1,215 +0,0 @@
-/****************************************************************************
- * scripts/script.ld
- *
- *   Copyright (C) 2016, 2019 Gregory Nutt. All rights reserved.
- *   Author: Gregory Nutt <gnutt@nuttx.org>
- *
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- *    used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- ****************************************************************************/
-
-/* The Auterion FMUV6S uses an STM32H743VI has 2048Kb of main FLASH memory.
- * The flash memory is partitioned into a User Flash memory and a System
- * Flash memory. Each of these memories has two banks:
- *
- *   1) User Flash memory:
- *
- *      Bank 1: Start address 0x0800:0000 to 0x080F:FFFF with 8 sectors, 128Kb each
- *      Bank 2: Start address 0x0810:0000 to 0x081F:FFFF with 8 sectors, 128Kb each
- *
- *   2) System Flash memory:
- *
- *      Bank 1: Start address 0x1FF0:0000 to 0x1FF1:FFFF with 1 x 128Kb sector
- *      Bank 1: Start address 0x1FF4:0000 to 0x1FF5:FFFF with 1 x 128Kb sector
- *
- *   3) User option bytes for user configuration, only in Bank 1.
- *
- * In the STM32H743VI, two different boot spaces can be selected through
- * the BOOT pin and the boot base address programmed in the BOOT_ADD0 and
- * BOOT_ADD1 option bytes:
- *
- *   1) BOOT=0: Boot address defined by user option byte BOOT_ADD0[15:0].
- *      ST programmed value: Flash memory at 0x0800:0000
- *   2) BOOT=1: Boot address defined by user option byte BOOT_ADD1[15:0].
- *      ST programmed value: System bootloader at 0x1FF0:0000
- *
- * The Auterion FMUV6S has a test point on board, the BOOT0 pin is at ground so by
- * default, the STM32 will boot to address 0x0800:0000 in FLASH unless the test
- * point is pulled to 3.3V.then the boot will be from 0x1FF0:0000
- *
- * The STM32H743VI also has 1024Kb of data SRAM.
- * SRAM is split up into several blocks and into three power domains:
- *
- *   1) TCM SRAMs are dedicated to the Cortex-M7 and are accessible with
- *      0 wait states by the Cortex-M7 and by MDMA through AHBS slave bus
- *
- *      1.1) 128Kb of DTCM-RAM beginning at address 0x2000:0000
- *
- *           The DTCM-RAM is organized as 2 x 64Kb DTCM-RAMs on 2 x 32 bit
- *           DTCM ports. The DTCM-RAM could be used for critical real-time
- *           data, such as interrupt service routines or stack / heap memory.
- *           Both DTCM-RAMs can be used in parallel (for load/store operations)
- *           thanks to the Cortex-M7 dual issue capability.
- *
- *      1.2)  64Kb of ITCM-RAM beginning at address 0x0000:0000
- *
- *           This RAM is connected to ITCM 64-bit interface designed for
- *           execution of critical real-times routines by the CPU.
- *
- *   2) AXI SRAM (D1 domain) accessible by all system masters except BDMA
- *      through D1 domain AXI bus matrix
- *
- *      2.1) 512Kb of SRAM beginning at address 0x2400:0000
- *
- *   3) AHB SRAM (D2 domain) accessible by all system masters except BDMA
- *      through D2 domain AHB bus matrix
- *
- *      3.1) 128Kb of SRAM1 beginning at address 0x3000:0000
- *      3.2) 128Kb of SRAM2 beginning at address 0x3002:0000
- *      3.3)  32Kb of SRAM3 beginning at address 0x3004:0000
- *
- *      SRAM1 - SRAM3 are one contiguous block: 288Kb at address 0x3000:0000
- *
- *   4) AHB SRAM (D3 domain) accessible by most of system masters
- *      through D3 domain AHB bus matrix
- *
- *      4.1)  64Kb of SRAM4 beginning at address 0x3800:0000
- *      4.1)   4Kb of backup RAM beginning at address 0x3880:0000
- *
- * When booting from FLASH, FLASH memory is aliased to address 0x0000:0000
- * where the code expects to begin execution by jumping to the entry point in
- * the 0x0800:0000 address range.
- *
- * The bootloader uses the first sector of the flash, which is 128K in length.
- */
-
-MEMORY
-{
-	itcm  (rwx) : ORIGIN = 0x00000000, LENGTH =   64K
-	flash (rx)  : ORIGIN = 0x08000000, LENGTH =  128K
-	dtcm1 (rwx) : ORIGIN = 0x20000000, LENGTH =   64K
-	dtcm2 (rwx) : ORIGIN = 0x20010000, LENGTH =   64K
-	sram  (rwx) : ORIGIN = 0x24000000, LENGTH =  512K
-	sram1 (rwx) : ORIGIN = 0x30000000, LENGTH =  128K
-	sram2 (rwx) : ORIGIN = 0x30020000, LENGTH =  128K
-	sram3 (rwx) : ORIGIN = 0x30040000, LENGTH =   32K
-	sram4 (rwx) : ORIGIN = 0x38000000, LENGTH =   64K
-	bbram (rwx) : ORIGIN = 0x38800000, LENGTH =    4K
-}
-
-OUTPUT_ARCH(arm)
-EXTERN(_vectors)
-ENTRY(_stext)
-
-/*
- * Ensure that abort() is present in the final object.  The exception handling
- * code pulled in by libgcc.a requires it (and that code cannot be easily avoided).
- */
-EXTERN(abort)
-EXTERN(_bootdelay_signature)
-
-SECTIONS
-{
-	.text : {
-		_stext = ABSOLUTE(.);
-		*(.vectors)
-		. = ALIGN(32);
-		/*
-		This signature provides the bootloader with a way to delay booting
-		*/
-		_bootdelay_signature = ABSOLUTE(.);
-		FILL(0xffecc2925d7d05c5)
-		. += 8;
-		*(.text .text.*)
-		*(.fixup)
-		*(.gnu.warning)
-		*(.rodata .rodata.*)
-		*(.gnu.linkonce.t.*)
-		*(.glue_7)
-		*(.glue_7t)
-		*(.got)
-		*(.gcc_except_table)
-		*(.gnu.linkonce.r.*)
-		_etext = ABSOLUTE(.);
-
-	} > flash
-
-	/*
-	 * Init functions (static constructors and the like)
-	 */
-	.init_section : {
-		_sinit = ABSOLUTE(.);
-		KEEP(*(.init_array .init_array.*))
-		_einit = ABSOLUTE(.);
-	} > flash
-
-
-	.ARM.extab : {
-		*(.ARM.extab*)
-	} > flash
-
-	__exidx_start = ABSOLUTE(.);
-	.ARM.exidx : {
-		*(.ARM.exidx*)
-	} > flash
-	__exidx_end = ABSOLUTE(.);
-
-	_eronly = ABSOLUTE(.);
-
-	.data : {
-		_sdata = ABSOLUTE(.);
-		*(.data .data.*)
-		*(.gnu.linkonce.d.*)
-		CONSTRUCTORS
-		_edata = ABSOLUTE(.);
-	} > sram AT > flash
-
-	.bss : {
-		_sbss = ABSOLUTE(.);
-		*(.bss .bss.*)
-		*(.gnu.linkonce.b.*)
-		*(COMMON)
-		. = ALIGN(4);
-		_ebss = ABSOLUTE(.);
-	} > sram
-
-	/* Stabs debugging sections. */
-	.stab 0 : { *(.stab) }
-	.stabstr 0 : { *(.stabstr) }
-	.stab.excl 0 : { *(.stab.excl) }
-	.stab.exclstr 0 : { *(.stab.exclstr) }
-	.stab.index 0 : { *(.stab.index) }
-	.stab.indexstr 0 : { *(.stab.indexstr) }
-	.comment 0 : { *(.comment) }
-	.debug_abbrev 0 : { *(.debug_abbrev) }
-	.debug_info 0 : { *(.debug_info) }
-	.debug_line 0 : { *(.debug_line) }
-	.debug_pubnames 0 : { *(.debug_pubnames) }
-	.debug_aranges 0 : { *(.debug_aranges) }
-}
@@ -1,229 +0,0 @@
-/****************************************************************************
- * scripts/script.ld
- *
- *   Copyright (C) 2016, 2019 Gregory Nutt. All rights reserved.
- *   Author: Gregory Nutt <gnutt@nuttx.org>
- *
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- *    used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- ****************************************************************************/
-
-/* The Auterion FMUV6S uses an STM32H743VI has 2048Kb of main FLASH memory.
- * The flash memory is partitioned into a User Flash memory and a System
- * Flash memory. Each of these memories has two banks:
- *
- *   1) User Flash memory:
- *
- *      Bank 1: Start address 0x0800:0000 to 0x080F:FFFF with 8 sectors, 128Kb each
- *      Bank 2: Start address 0x0810:0000 to 0x081F:FFFF with 8 sectors, 128Kb each
- *
- *   2) System Flash memory:
- *
- *      Bank 1: Start address 0x1FF0:0000 to 0x1FF1:FFFF with 1 x 128Kb sector
- *      Bank 1: Start address 0x1FF4:0000 to 0x1FF5:FFFF with 1 x 128Kb sector
- *
- *   3) User option bytes for user configuration, only in Bank 1.
- *
- * In the STM32H743VI, two different boot spaces can be selected through
- * the BOOT pin and the boot base address programmed in the BOOT_ADD0 and
- * BOOT_ADD1 option bytes:
- *
- *   1) BOOT=0: Boot address defined by user option byte BOOT_ADD0[15:0].
- *      ST programmed value: Flash memory at 0x0800:0000
- *   2) BOOT=1: Boot address defined by user option byte BOOT_ADD1[15:0].
- *      ST programmed value: System bootloader at 0x1FF0:0000
- *
- * The Auterion FMUV6S has a test point on board, the BOOT0 pin is at ground so by
- * default, the STM32 will boot to address 0x0800:0000 in FLASH unless the test
- * point is pulled to 3.3V.then the boot will be from 0x1FF0:0000
- *
- * The STM32H743VI also has 1024Kb of data SRAM.
- * SRAM is split up into several blocks and into three power domains:
- *
- *   1) TCM SRAMs are dedicated to the Cortex-M7 and are accessible with
- *      0 wait states by the Cortex-M7 and by MDMA through AHBS slave bus
- *
- *      1.1) 128Kb of DTCM-RAM beginning at address 0x2000:0000
- *
- *           The DTCM-RAM is organized as 2 x 64Kb DTCM-RAMs on 2 x 32 bit
- *           DTCM ports. The DTCM-RAM could be used for critical real-time
- *           data, such as interrupt service routines or stack / heap memory.
- *           Both DTCM-RAMs can be used in parallel (for load/store operations)
- *           thanks to the Cortex-M7 dual issue capability.
- *
- *      1.2)  64Kb of ITCM-RAM beginning at address 0x0000:0000
- *
- *           This RAM is connected to ITCM 64-bit interface designed for
- *           execution of critical real-times routines by the CPU.
- *
- *   2) AXI SRAM (D1 domain) accessible by all system masters except BDMA
- *      through D1 domain AXI bus matrix
- *
- *      2.1) 512Kb of SRAM beginning at address 0x2400:0000
- *
- *   3) AHB SRAM (D2 domain) accessible by all system masters except BDMA
- *      through D2 domain AHB bus matrix
- *
- *      3.1) 128Kb of SRAM1 beginning at address 0x3000:0000
- *      3.2) 128Kb of SRAM2 beginning at address 0x3002:0000
- *      3.3)  32Kb of SRAM3 beginning at address 0x3004:0000
- *
- *      SRAM1 - SRAM3 are one contiguous block: 288Kb at address 0x3000:0000
- *
- *   4) AHB SRAM (D3 domain) accessible by most of system masters
- *      through D3 domain AHB bus matrix
- *
- *      4.1)  64Kb of SRAM4 beginning at address 0x3800:0000
- *      4.1)   4Kb of backup RAM beginning at address 0x3880:0000
- *
- * When booting from FLASH, FLASH memory is aliased to address 0x0000:0000
- * where the code expects to begin execution by jumping to the entry point in
- * the 0x0800:0000 address range.
- */
-
-MEMORY
-{
-	ITCM_RAM  (rwx) : ORIGIN = 0x00000000, LENGTH =   64K
-	FLASH      (rx) : ORIGIN = 0x08020000, LENGTH = 1920K
-
-	DTCM1_RAM (rwx) : ORIGIN = 0x20000000, LENGTH =   64K
-	DTCM2_RAM (rwx) : ORIGIN = 0x20010000, LENGTH =   64K
-	AXI_SRAM  (rwx) : ORIGIN = 0x24000000, LENGTH =  512K /* D1 domain AXI bus */
-	SRAM1     (rwx) : ORIGIN = 0x30000000, LENGTH =  128K /* D2 domain AHB bus */
-	SRAM2     (rwx) : ORIGIN = 0x30020000, LENGTH =  128K /* D2 domain AHB bus */
-	SRAM3     (rwx) : ORIGIN = 0x30040000, LENGTH =   32K /* D2 domain AHB bus */
-	SRAM4     (rwx) : ORIGIN = 0x38000000, LENGTH =   64K /* D3 domain */
-	BKPRAM    (rwx) : ORIGIN = 0x38800000, LENGTH =    4K
-}
-
-OUTPUT_ARCH(arm)
-EXTERN(_vectors)
-ENTRY(_stext)
-
-/*
- * Ensure that abort() is present in the final object.  The exception handling
- * code pulled in by libgcc.a requires it (and that code cannot be easily avoided).
- */
-EXTERN(abort)
-EXTERN(_bootdelay_signature)
-EXTERN(board_get_manifest)
-
-SECTIONS
-{
-	.text : {
-		_stext = ABSOLUTE(.);
-		*(.vectors)
-		. = ALIGN(32);
-		/*
-		This signature provides the bootloader with a way to delay booting
-		*/
-		_bootdelay_signature = ABSOLUTE(.);
-		FILL(0xffecc2925d7d05c5)
-		. += 8;
-		*(.text .text.*)
-		*(.fixup)
-		*(.gnu.warning)
-		*(.rodata .rodata.*)
-		*(.gnu.linkonce.t.*)
-		*(.glue_7)
-		*(.glue_7t)
-		*(.got)
-		*(.gcc_except_table)
-		*(.gnu.linkonce.r.*)
-		_etext = ABSOLUTE(.);
-
-	} > FLASH
-
-	/*
-	 * Init functions (static constructors and the like)
-	 */
-	.init_section : {
-		_sinit = ABSOLUTE(.);
-		KEEP(*(.init_array .init_array.*))
-		_einit = ABSOLUTE(.);
-	} > FLASH
-
-
-	.ARM.extab : {
-		*(.ARM.extab*)
-	} > FLASH
-
-	__exidx_start = ABSOLUTE(.);
-	.ARM.exidx : {
-		*(.ARM.exidx*)
-	} > FLASH
-	__exidx_end = ABSOLUTE(.);
-
-	_eronly = ABSOLUTE(.);
-
-	.data : {
-		_sdata = ABSOLUTE(.);
-		*(.data .data.*)
-		*(.gnu.linkonce.d.*)
-		CONSTRUCTORS
-		_edata = ABSOLUTE(.);
-
-		/* Pad out last section as the STM32H7 Flash write size is 256 bits. 32 bytes */
-		. = ALIGN(16);
-		FILL(0xffff)
-		. += 16;
-	} > AXI_SRAM AT > FLASH  = 0xffff
-
-	.bss : {
-		_sbss = ABSOLUTE(.);
-		*(.bss .bss.*)
-		*(.gnu.linkonce.b.*)
-		*(COMMON)
-		. = ALIGN(4);
-		_ebss = ABSOLUTE(.);
-	} > AXI_SRAM
-
-	/* Emit the the D3 power domain section for locating BDMA data */
-
-	.sram4_reserve (NOLOAD) :
-	{
-		*(.sram4)
-		. = ALIGN(4);
-		_sram4_heap_start = ABSOLUTE(.);
-	} > SRAM4
-
-	/* Stabs debugging sections. */
-	.stab 0 : { *(.stab) }
-	.stabstr 0 : { *(.stabstr) }
-	.stab.excl 0 : { *(.stab.excl) }
-	.stab.exclstr 0 : { *(.stab.exclstr) }
-	.stab.index 0 : { *(.stab.index) }
-	.stab.indexstr 0 : { *(.stab.indexstr) }
-	.comment 0 : { *(.comment) }
-	.debug_abbrev 0 : { *(.debug_abbrev) }
-	.debug_info 0 : { *(.debug_info) }
-	.debug_line 0 : { *(.debug_line) }
-	.debug_pubnames 0 : { *(.debug_pubnames) }
-	.debug_aranges 0 : { *(.debug_aranges) }
-}
@@ -1,29 +0,0 @@
-CONFIG_BOARD_TOOLCHAIN="arm-none-eabi"
-CONFIG_BOARD_ARCHITECTURE="cortex-m7"
-CONFIG_BOARD_ETHERNET=y
-CONFIG_BOARD_SERIAL_GPS1="/dev/ttyS5"
-CONFIG_BOARD_SERIAL_TEL1="/dev/ttyS0"
-CONFIG_BOARD_SERIAL_TEL2="/dev/ttyS1"
-CONFIG_BOARD_SERIAL_TEL3="/dev/ttyS2"
-CONFIG_BOARD_ROMFSROOT="performance-test"
-CONFIG_DRIVERS_ADC_BOARD_ADC=y
-CONFIG_SYSTEMCMDS_DMESG=y
-CONFIG_SYSTEMCMDS_GPIO=y
-CONFIG_SYSTEMCMDS_HARDFAULT_LOG=y
-CONFIG_SYSTEMCMDS_I2CDETECT=y
-CONFIG_SYSTEMCMDS_LED_CONTROL=y
-CONFIG_SYSTEMCMDS_MFT=y
-CONFIG_SYSTEMCMDS_MTD=y
-CONFIG_SYSTEMCMDS_MFT_CFG=y
-CONFIG_SYSTEMCMDS_PARAM=y
-CONFIG_SYSTEMCMDS_PERF=y
-CONFIG_SYSTEMCMDS_REBOOT=y
-CONFIG_SYSTEMCMDS_SD_BENCH=y
-CONFIG_SYSTEMCMDS_SD_STRESS=y
-CONFIG_SYSTEMCMDS_SERIAL_TEST=y
-CONFIG_SYSTEMCMDS_SYSTEM_TIME=y
-CONFIG_SYSTEMCMDS_TOP=y
-CONFIG_SYSTEMCMDS_TOPIC_LISTENER=y
-CONFIG_SYSTEMCMDS_UORB=y
-CONFIG_SYSTEMCMDS_VER=y
-CONFIG_SYSTEMCMDS_WORK_QUEUE=y
@@ -1,17 +0,0 @@
-CONFIG_MODULES_AIRSPEED_SELECTOR=n
-CONFIG_MODULES_FLIGHT_MODE_MANAGER=n
-CONFIG_MODULES_FW_ATT_CONTROL=n
-CONFIG_MODULES_FW_AUTOTUNE_ATTITUDE_CONTROL=n
-CONFIG_MODULES_FW_MODE_MANAGER=n
-CONFIG_MODULES_FW_LATERAL_LONGITUDINAL_CONTROL=n
-CONFIG_MODULES_FW_RATE_CONTROL=n
-CONFIG_MODULES_LANDING_TARGET_ESTIMATOR=n
-CONFIG_MODULES_MC_ATT_CONTROL=n
-CONFIG_MODULES_MC_AUTOTUNE_ATTITUDE_CONTROL=n
-CONFIG_MODULES_MC_HOVER_THRUST_ESTIMATOR=n
-CONFIG_MODULES_MC_POS_CONTROL=n
-CONFIG_MODULES_MC_RATE_CONTROL=n
-CONFIG_MODULES_VTOL_ATT_CONTROL=n
-CONFIG_EKF2_AUX_GLOBAL_POSITION=y
-# CONFIG_EKF2_WIND is not set
-CONFIG_MODULES_DIFFERENTIAL_DRIVE=y
@@ -1,72 +0,0 @@
-############################################################################
-#
-#   Copyright (c) 2016 PX4 Development Team. All rights reserved.
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions
-# are met:
-#
-# 1. Redistributions of source code must retain the above copyright
-#    notice, this list of conditions and the following disclaimer.
-# 2. Redistributions in binary form must reproduce the above copyright
-#    notice, this list of conditions and the following disclaimer in
-#    the documentation and/or other materials provided with the
-#    distribution.
-# 3. Neither the name PX4 nor the names of its contributors may be
-#    used to endorse or promote products derived from this software
-#    without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
-# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
-# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
-# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-# POSSIBILITY OF SUCH DAMAGE.
-#
-############################################################################
-if("${PX4_BOARD_LABEL}" STREQUAL  "bootloader")
-	add_compile_definitions(BOOTLOADER)
-	add_library(drivers_board
-		bootloader_main.c
-		init.c
-		timer_config.cpp
-	)
-	target_link_libraries(drivers_board
-		PRIVATE
-			nuttx_arch # sdio
-			nuttx_drivers # sdio
-			px4_layer #gpio
-			arch_io_pins # iotimer
-			bootloader
-	)
-	target_include_directories(drivers_board PRIVATE ${PX4_SOURCE_DIR}/platforms/nuttx/src/bootloader/common)
-
-else()
-	add_library(drivers_board
-		can.c
-		i2c.cpp
-		init.c
-		led.c
-		mtd.cpp
-		spi.cpp
-		timer_config.cpp
-	)
-	add_dependencies(drivers_board arch_board_hw_info)
-
-	target_link_libraries(drivers_board
-		PRIVATE
-			arch_io_pins
-			arch_spi
-			arch_board_hw_info
-			drivers__led # drv_led_start
-			nuttx_arch # sdio
-			nuttx_drivers # sdio
-			px4_layer
-	)
-endif()
@@ -1,209 +0,0 @@
-/****************************************************************************
- *
- *   Copyright (c) 2016-2022 PX4 Development Team. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- * 3. Neither the name PX4 nor the names of its contributors may be
- *    used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- ****************************************************************************/
-
-/**
- * @file board_config.h
- *
- * Auterion FMU-v6s internal definitions
- */
-
-#pragma once
-
-/****************************************************************************************************
- * Included Files
- ****************************************************************************************************/
-
-#include <px4_platform_common/px4_config.h>
-#include <nuttx/compiler.h>
-#include <stdint.h>
-
-
-#include <stm32_gpio.h>
-
-/****************************************************************************************************
- * Definitions
- ****************************************************************************************************/
-
-/* Configuration ************************************************************************************/
-
-/* FIXME: remove with BOARD_HAS_SIMPLE_HW_VERSIONING */
-#define BOARD_HAS_HW_SPLIT_VERSIONING
-#define BOARD_HAS_ONLY_EEPROM_VERSIONING
-
-#define HW_INFO_INIT_PREFIX    "V6S"
-
-
-/* Auterion FMU GPIOs ***********************************************************************************/
-/* LEDs are driven with push pull */
-#define GPIO_nLED_RED        /* PB14 */  (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTB|GPIO_PIN14)
-#define GPIO_nLED_BLUE       /* PC13 */  (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTC|GPIO_PIN13)
-#define GPIO_nLED_GREEN      /* PE3  */  (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTE|GPIO_PIN3)
-
-#define BOARD_HAS_CONTROL_STATUS_LEDS 1
-#define BOARD_OVERLOAD_LED     LED_RED
-#define BOARD_ARMED_STATE_LED  LED_BLUE
-
-
-/* SPI */
-#define BOARD_NUM_SPI_CFG_HW_VERSIONS 1
-
-
-/* I2C busses
- * Devices on the onboard buses.
- *
- * Note that these are unshifted addresses.
- */
-#define BOARD_MTD_NUM_EEPROM 1 /* MTD: imu_eeprom */
-#define PX4_I2C_BUS_MTD      4
-
-
-/* CAN */
-#define UAVCAN_NUM_IFACES_RUNTIME  1
-
-
-/*
- * ADC channels
- *
- * These are the channel numbers of the ADCs of the microcontroller that
- * can be used by the Px4 Firmware in the adc driver
- */
-#define ADC1_CH(n)                  (n)
-#define SYSTEM_ADC_BASE STM32_ADC1_BASE
-
-/* Define GPIO pins used as ADC N.B. Channel numbers must match below  */
-/* PC3_C connected to PC3 internally, which connects to GPIO_ADC12_INP13 */
-
-#define PX4_ADC_GPIO \
-	/* PB1 */ GPIO_ADC12_INP5, \
-	/* PC0 */ GPIO_ADC123_INP10, \
-	/* PC3 */ GPIO_ADC12_INP13, \
-	/* PA3 */ GPIO_ADC12_INP15, \
-	/* PA0 */ GPIO_ADC1_INP16, \
-	/* PA4 */ GPIO_ADC12_INP18
-
-/* Define Channel numbers must match above GPIO pin IN(n)
- * Note: These channel names are special, see board_common.h */
-#define ADC_BATTERY_CURRENT_CHANNEL             /* PB1 = 0 */  ADC1_CH(5)
-#define ADC_SCALED_V5_EXTERNAL_CHANNEL          /* PC0 = 1 */  ADC1_CH(10)
-#define ADC_BATTERY_VOLTAGE_CHANNEL             /* PC3 = 2 */  ADC1_CH(13)
-#define ADC_SCALED_V5_CHANNEL                   /* PA3 = 3 */  ADC1_CH(15)
-#define ADC_EXTRAS_CHANNEL                      /* PA0 = 4 */  ADC1_CH(16)
-#define ADC_SCALED_VDD_3V3_SENSORS1_CHANNEL     /* PA4 = 5 */  ADC1_CH(18)
-
-#define ADC_CHANNELS \
-	((1 << ADC_EXTRAS_CHANNEL) | \
-	 (1 << ADC_SCALED_V5_EXTERNAL_CHANNEL) | \
-	 (1 << ADC_SCALED_V5_CHANNEL) | \
-	 (1 << ADC_BATTERY_VOLTAGE_CHANNEL) | \
-	 (1 << ADC_BATTERY_CURRENT_CHANNEL) | \
-	 (1 << ADC_SCALED_VDD_3V3_SENSORS1_CHANNEL))
-
-// Definitions for drivers/adc/board_adc
-#define BOARD_ADC_USB_CONNECTED 0
-// a hack to also measure the external 5V rail
-#define ADC_SCALED_VDD_3V3_SENSORS2_CHANNEL ADC_SCALED_V5_EXTERNAL_CHANNEL
-
-
-/* PWM Timers */
-#define BOARD_NUM_IO_TIMERS 2
-#define DIRECT_PWM_OUTPUT_CHANNELS   8
-
-/* High-resolution timer */
-#define HRT_TIMER               8  /* use timer8 for the HRT */
-#define HRT_TIMER_CHANNEL       3  /* use capture/compare channel 3 */
-
-#define HRT_PPM_CHANNEL         /* T8C2 */  2  /* use capture/compare channel 1 */
-#define GPIO_PPM_IN             /* PC7  */ GPIO_TIM8_CH2IN_1
-
-/* RC Serial port (input only) */
-#define RC_SERIAL_PORT          "/dev/ttyS4"
-
-/* This board provides a DMA pool and APIs */
-#define BOARD_DMA_ALLOC_POOL_SIZE 5120
-
-/* This board provides the board_on_reset interface */
-#define BOARD_HAS_ON_RESET 1
-
-/* PD4 is ARMED
- * The GPIO will be set as input while not armed with internal pull DOWN.
- * While armed it shall be configured at a GPIO OUT set HIGH
- */
-#define GPIO_ARMED_INIT  (GPIO_INPUT|GPIO_PULLDOWN|GPIO_PORTD|GPIO_PIN4)
-#define GPIO_ARMED       (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_SET|GPIO_PORTD|GPIO_PIN4)
-#define BOARD_INDICATE_EXTERNAL_LOCKOUT_STATE(enabled)  px4_arch_configgpio((enabled) ? GPIO_ARMED : GPIO_ARMED_INIT)
-#define BOARD_GET_EXTERNAL_LOCKOUT_STATE() px4_arch_gpioread(GPIO_ARMED)
-
-/* All pins to initialize on boot */
-#define PX4_GPIO_INIT_LIST { \
-		GPIO_ARMED_INIT, \
-		PX4_ADC_GPIO,    \
-		GPIO_CAN1_TX,    \
-		GPIO_CAN1_RX,    \
-	}
-
-/* Enable the buffer for the dmesg command */
-#define BOARD_ENABLE_CONSOLE_BUFFER
-
-__BEGIN_DECLS
-
-/****************************************************************************************************
- * Public Types
- ****************************************************************************************************/
-
-/****************************************************************************************************
- * Public data
- ****************************************************************************************************/
-
-#ifndef __ASSEMBLY__
-
-/****************************************************************************************************
- * Public Functions
- ****************************************************************************************************/
-
-/****************************************************************************************************
- * Name: stm32_spiinitialize
- *
- * Description:
- *   Called to configure SPI chip select GPIO pins for the Auterion FMU board.
- *
- ****************************************************************************************************/
-
-extern void stm32_spiinitialize(void);
-
-extern void board_peripheral_reset(int ms);
-
-#include <px4_platform_common/board_common.h>
-
-#endif /* __ASSEMBLY__ */
-
-__END_DECLS
@@ -1,59 +0,0 @@
-/****************************************************************************
- *
- *   Copyright (c) 2019-2021 PX4 Development Team. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- * 3. Neither the name PX4 nor the names of its contributors may be
- *    used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- ****************************************************************************/
-
-/**
- * @file bootloader_main.c
- *
- * FMU-specific early startup code for bootloader
-*/
-
-#include "board_config.h"
-#include "bl.h"
-
-#include <nuttx/config.h>
-#include <nuttx/board.h>
-#include <chip.h>
-#include <stm32_uart.h>
-#include <arch/board/board.h>
-#include "arm_internal.h"
-#include <px4_platform_common/init.h>
-
-void board_late_initialize(void)
-{
-}
-
-extern void sys_tick_handler(void);
-void board_timerhook(void)
-{
-	sys_tick_handler();
-}
@@ -1,136 +0,0 @@
-/****************************************************************************
- *
- *   Copyright (C) 2012 PX4 Development Team. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- * 3. Neither the name PX4 nor the names of its contributors may be
- *    used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- ****************************************************************************/
-
-/**
- * @file px4fmu_can.c
- *
- * Board-specific CAN functions.
- */
-
-#if !defined(CONFIG_CAN)
-
-#include <stdint.h>
-
-#include "board_config.h"
-
-
-__EXPORT
-uint16_t board_get_can_interfaces(void)
-{
-	return 0b01;
-}
-
-#else
-
-#include <errno.h>
-#include <debug.h>
-
-#include <nuttx/can/can.h>
-#include <arch/board/board.h>
-
-#include "chip.h"
-#include "arm_internal.h"
-
-#include "chip.h"
-#include "stm32_can.h"
-#include "board_config.h"
-
-/************************************************************************************
- * Pre-processor Definitions
- ************************************************************************************/
-/* Configuration ********************************************************************/
-
-#if defined(CONFIG_STM32_CAN1) && defined(CONFIG_STM32_CAN2)
-#  warning "Both CAN1 and CAN2 are enabled.  Assuming only CAN1."
-#  undef CONFIG_STM32_CAN2
-#endif
-
-#ifdef CONFIG_STM32_CAN1
-#  define CAN_PORT 1
-#else
-#  define CAN_PORT 2
-#endif
-
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
-
-/************************************************************************************
- * Public Functions
- ************************************************************************************/
-int can_devinit(void);
-
-/************************************************************************************
- * Name: can_devinit
- *
- * Description:
- *   All STM32 architectures must provide the following interface to work with
- *   examples/can.
- *
- ************************************************************************************/
-
-int can_devinit(void)
-{
-	static bool initialized = false;
-	struct can_dev_s *can;
-	int ret;
-
-	/* Check if we have already initialized */
-
-	if (!initialized) {
-		/* Call stm32_caninitialize() to get an instance of the CAN interface */
-
-		can = stm32_caninitialize(CAN_PORT);
-
-		if (can == NULL) {
-			canerr("ERROR:  Failed to get CAN interface\n");
-			return -ENODEV;
-		}
-
-		/* Register the CAN driver at "/dev/can0" */
-
-		ret = can_register("/dev/can0", can);
-
-		if (ret < 0) {
-			canerr("ERROR: can_register failed: %d\n", ret);
-			return ret;
-		}
-
-		/* Now we are initialized */
-
-		initialized = true;
-	}
-
-	return OK;
-}
-#endif /* CONFIG_CAN */
@@ -1,126 +0,0 @@
-/*
- * hw_config.h
- *
- *  Created on: May 17, 2015
- *      Author: david_s5
- */
-
-#ifndef HW_CONFIG_H_
-#define HW_CONFIG_H_
-
-/****************************************************************************
- * 10-8--2016:
- *  To simplify the ripple effect on the tools, we will be using
- *  /dev/serial/by-id/<asterisk>PX4<asterisk> to locate PX4 devices. Therefore
- *  moving forward all Bootloaders must contain the prefix "PX4 BL "
- *  in the USBDEVICESTRING
- *  This Change will be made in an upcoming BL release
- ****************************************************************************/
-/*
- * Define usage to configure a bootloader
- *
- *
- * Constant                example          Usage
- * APP_LOAD_ADDRESS     0x08004000            - The address in Linker Script, where the app fw is org-ed
- * BOOTLOADER_DELAY     5000                  - Ms to wait while under USB pwr or bootloader request
- * BOARD_FMUV2
- * INTERFACE_USB        1                     - (Optional) Scan and use the USB interface for bootloading
- * INTERFACE_USART      1                     - (Optional) Scan and use the Serial interface for bootloading
- * USBDEVICESTRING      "PX4 BL FMU v2.x"     - USB id string
- * USBPRODUCTID         0x0011                - PID Should match defconfig
- * BOOT_DELAY_ADDRESS   0x000001a0            - (Optional) From the linker script from Linker Script to get a custom
- *                                               delay provided by an APP FW
- * BOARD_TYPE           9                     - Must match .prototype boad_id
- * _FLASH_KBYTES        (*(uint16_t *)0x1fff7a22) - Run time flash size detection
- * BOARD_FLASH_SECTORS  ((_FLASH_KBYTES == 0x400) ? 11 : 23) - Run time determine the physical last sector
- * BOARD_FLASH_SECTORS   11                   - Hard coded zero based last sector
- * BOARD_FLASH_SIZE     (_FLASH_KBYTES*1024)-   Total Flash size of device, determined at run time.
- *                         (1024 * 1024)      - Hard coded Total Flash of device - The bootloader and app reserved will be deducted
- *                                              programmatically
- *
- * BOARD_FIRST_FLASH_SECTOR_TO_ERASE  2        - Optional sectors index in the flash_sectors table  (F4 only), to begin erasing.
- *                                               This is to allow sectors to be reserved for app fw usage. That will NOT be erased
- *                                               during a FW upgrade.
- *                                               The default is 0, and selects the first sector to be erased, as the 0th entry in the
- *                                               flash_sectors table. Which is the second physical sector of FLASH in the device.
- *                                               The first physical sector of FLASH is used by the bootloader, and is not defined
- *                                               in the table.
- *
- * APP_RESERVATION_SIZE (BOARD_FIRST_FLASH_SECTOR_TO_ERASE * 16 * 1024) - Number of bytes reserved by the APP FW. This number plus
- *                                                                        BOOTLOADER_RESERVATION_SIZE  will be deducted from
- *                                                                        BOARD_FLASH_SIZE to determine the size of the App FW
- *                                                                        and hence the address space of FLASH to erase and program.
- * USBMFGSTRING            "PX4 AP"            - Optional USB MFG string (default is '3D Robotics' if not defined.)
- * SERIAL_BREAK_DETECT_DISABLED                -  Optional prevent break selection on Serial port from entering or staying in BL
- *
- * * Other defines are somewhat self explanatory.
- */
-
-/* Boot device selection list*/
-#define SERIAL0_DEV    0x01
-
-#define APP_LOAD_ADDRESS               0x08020000
-#define BOOTLOADER_DELAY               5000
-#define INTERFACE_USB                  0
-#define INTERFACE_USART                1
-#define INTERFACE_USART_CONFIG         "/dev/ttyS0,1500000"
-#define BOOT_DELAY_ADDRESS             0x000001a0
-#define BOARD_TYPE                     60
-#define _FLASH_KBYTES                  (*(uint32_t *)0x1FF1E880)
-#define BOARD_FLASH_SECTORS            (15)
-#define BOARD_FLASH_SIZE               (_FLASH_KBYTES * 1024)
-
-#define OSC_FREQ                       24
-
-#define BOARD_PIN_LED_ACTIVITY         GPIO_nLED_BLUE  // BLUE
-#define BOARD_PIN_LED_BOOTLOADER       GPIO_nLED_GREEN // GREEN
-#define BOARD_LED_ON                   1
-#define BOARD_LED_OFF                  0
-
-#define SERIAL_BREAK_DETECT_DISABLED   1
-
-// Connected to SAI3_RXC on i.MX8MP side, has a pulldown by default
-#define BOARD_FORCE_BL_PIN             (GPIO_INPUT|GPIO_PULLDOWN|GPIO_PORTD|GPIO_PIN3)
-#define BOARD_FORCE_BL_STATE           1
-
-/*
- * Uncommenting this allows to force the bootloader through
- * a PWM output pin. As this can accidentally initialize
- * an ESC prematurely, it is not recommended. This feature
- * has not been used and hence defaults now to off.
- *
- * # define BOARD_FORCE_BL_PIN_OUT         (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_SET|GPIO_PORTE|GPIO_PIN14)
- * # define BOARD_FORCE_BL_PIN_IN          (GPIO_INPUT|GPIO_PULLUP|GPIO_PORTE|GPIO_PIN11)
- *
- * # define BOARD_POWER_PIN_OUT           (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_SET|GPIO_PORTA|GPIO_PIN4)
- * # define BOARD_POWER_ON                 1
- * # define BOARD_POWER_OFF                0
- * # undef  BOARD_POWER_PIN_RELEASE        // Leave pin enabling Power - un comment to release (disable power)
- *
-*/
-
-#if !defined(ARCH_SN_MAX_LENGTH)
-# define ARCH_SN_MAX_LENGTH 12
-#endif
-
-#if !defined(APP_RESERVATION_SIZE)
-#  define APP_RESERVATION_SIZE 0
-#endif
-
-#if !defined(BOARD_FIRST_FLASH_SECTOR_TO_ERASE)
-#  define BOARD_FIRST_FLASH_SECTOR_TO_ERASE 1
-#endif
-
-#if !defined(USB_DATA_ALIGN)
-# define USB_DATA_ALIGN
-#endif
-
-#ifndef BOOT_DEVICES_SELECTION
-#  define BOOT_DEVICES_SELECTION SERIAL0_DEV
-#endif
-
-#ifndef BOOT_DEVICES_FILTER_ONUSB
-#  define BOOT_DEVICES_FILTER_ONUSB SERIAL0_DEV
-#endif
-
-#endif /* HW_CONFIG_H_ */
@@ -1,39 +0,0 @@
-/****************************************************************************
- *
- *   Copyright (C) 2020 PX4 Development Team. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- * 3. Neither the name PX4 nor the names of its contributors may be
- *    used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- ****************************************************************************/
-
-#include <px4_arch/i2c_hw_description.h>
-
-constexpr px4_i2c_bus_t px4_i2c_buses[I2C_BUS_MAX_BUS_ITEMS] = {
-	initI2CBusExternal(1),
-	initI2CBusInternal(4),
-};
@@ -1,244 +0,0 @@
-/****************************************************************************
- *
- *   Copyright (c) 2012-2022 PX4 Development Team. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- * 3. Neither the name PX4 nor the names of its contributors may be
- *    used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- ****************************************************************************/
-
-/**
- * @file init.c
- *
- * Auterion FMU-specific early startup code.  This file implements the
- * board_app_initialize() function that is called early by nsh during startup.
- *
- * Code here is run before the rcS script is invoked; it should start required
- * subsystems and perform board-specific initialization.
- */
-
-/****************************************************************************
- * Included Files
- ****************************************************************************/
-
-#include "board_config.h"
-
-#include <stdbool.h>
-#include <stdio.h>
-#include <string.h>
-#include <debug.h>
-#include <errno.h>
-
-#include <nuttx/config.h>
-#include <nuttx/board.h>
-#include <nuttx/spi/spi.h>
-#include <nuttx/sdio.h>
-#include <nuttx/mmcsd.h>
-#include <nuttx/analog/adc.h>
-#include <nuttx/mm/gran.h>
-#include <chip.h>
-#include <stm32_uart.h>
-#include <arch/board/board.h>
-#include "arm_internal.h"
-
-#include <drivers/drv_hrt.h>
-#include <drivers/drv_board_led.h>
-#include <systemlib/px4_macros.h>
-#include <px4_arch/io_timer.h>
-#include <px4_platform_common/init.h>
-#include <px4_platform_common/px4_manifest.h>
-#include <px4_platform/gpio.h>
-#include <px4_platform/board_determine_hw_info.h>
-#include <px4_platform/board_dma_alloc.h>
-
-/****************************************************************************
- * Pre-Processor Definitions
- ****************************************************************************/
-
-/* Configuration ************************************************************/
-
-/*
- * Ideally we'd be able to get these from arm_internal.h,
- * but since we want to be able to disable the NuttX use
- * of leds for system indication at will and there is no
- * separate switch, we need to build independent of the
- * CONFIG_ARCH_LEDS configuration switch.
- */
-__BEGIN_DECLS
-extern void led_init(void);
-extern void led_on(int led);
-extern void led_off(int led);
-__END_DECLS
-
-
-/************************************************************************************
- * Name: board_peripheral_reset
- *
- * Description:
- *
- ************************************************************************************/
-__EXPORT void board_peripheral_reset(int ms)
-{
-	usleep(ms * 1000);
-	syslog(LOG_DEBUG, "reset done, %d ms\n", ms);
-}
-
-/************************************************************************************
- * Name: board_on_reset
- *
- * Description:
- * Optionally provided function called on entry to board_system_reset
- * It should perform any house keeping prior to the rest.
- *
- * status - 1 if resetting to boot loader
- *          0 if just resetting
- *
- ************************************************************************************/
-__EXPORT void board_on_reset(int status)
-{
-	for (int i = 0; i < DIRECT_PWM_OUTPUT_CHANNELS; ++i) {
-		px4_arch_configgpio(io_timer_channel_get_gpio_output(i));
-	}
-
-	if (status >= 0) {
-		up_mdelay(6);
-	}
-}
-
-/************************************************************************************
- * Name: stm32_boardinitialize
- *
- * Description:
- *   All STM32 architectures must provide the following entry point.  This entry point
- *   is called early in the initialization -- after all memory has been configured
- *   and mapped but before any devices have been initialized.
- *
- ************************************************************************************/
-
-__EXPORT void
-stm32_boardinitialize(void)
-{
-	board_on_reset(-1); /* Reset PWM first thing */
-
-	/* configure LEDs */
-
-	board_autoled_initialize();
-
-	/* configure Ethernet Reference Clock */
-	/* PLLQ1 is 100MHz, we need 50MHz on MCO1 => /2 */
-	/* stm32_mco1config(RCC_CFGR_MCO1_PLL1Q, RCC_CFGR_MCO1PRE(2)); */
-
-	/* configure pins */
-
-	const uint32_t gpio[] = PX4_GPIO_INIT_LIST;
-	px4_gpio_init(gpio, arraySize(gpio));
-}
-
-/****************************************************************************
- * Name: board_app_initialize
- *
- * Description:
- *   Perform application specific initialization.  This function is never
- *   called directly from application code, but only indirectly via the
- *   (non-standard) boardctl() interface using the command BOARDIOC_INIT.
- *
- * Input Parameters:
- *   arg - The boardctl() argument is passed to the board_app_initialize()
- *         implementation without modification.  The argument has no
- *         meaning to NuttX; the meaning of the argument is a contract
- *         between the board-specific initalization logic and the the
- *         matching application logic.  The value cold be such things as a
- *         mode enumeration value, a set of DIP switch switch settings, a
- *         pointer to configuration data read from a file or serial FLASH,
- *         or whatever you would like to do with it.  Every implementation
- *         should accept zero/NULL as a default configuration.
- *
- * Returned Value:
- *   Zero (OK) is returned on success; a negated errno value is returned on
- *   any failure to indicate the nature of the failure.
- *
- ****************************************************************************/
-
-__EXPORT int board_app_initialize(uintptr_t arg)
-{
-#if !defined(BOOTLOADER)
-	/* Need hrt running before using the ADC */
-
-	px4_platform_init();
-
-	// Use the default HW_VER_REV(0x0,0x0) for Ramtron
-
-	stm32_spiinitialize();
-
-	/* Configure the HW based on the manifest */
-
-	px4_platform_configure();
-
-	if (OK == board_determine_hw_info()) {
-		syslog(LOG_INFO, "[boot] Rev 0x%1x : Ver 0x%1x %s\n", board_get_hw_revision(), board_get_hw_version(),
-		       board_get_hw_type_name());
-
-	} else {
-		syslog(LOG_ERR, "[boot] Failed to read HW revision and version\n");
-	}
-
-	/* Configure the Actual SPI interfaces (after we determined the HW version)  */
-
-	stm32_spiinitialize();
-
-	board_spi_reset(10, 0xffff);
-
-	/* Configure the DMA allocator */
-
-	if (board_dma_alloc_init() < 0) {
-		syslog(LOG_ERR, "[boot] DMA alloc FAILED\n");
-	}
-
-#  if defined(SERIAL_HAVE_RXDMA)
-	// set up the serial DMA polling at 1ms intervals for received bytes that have not triggered a DMA event.
-	static struct hrt_call serial_dma_call;
-	hrt_call_every(&serial_dma_call, 1000, 1000, (hrt_callout)stm32_serial_dma_poll, NULL);
-#  endif
-
-	/* initial LED state */
-	drv_led_start();
-	led_off(LED_RED);
-	led_on(LED_GREEN); // Indicate Power.
-	led_off(LED_BLUE);
-
-	if (board_hardfault_init(2, true) != 0) {
-		led_on(LED_RED);
-	}
-
-	if (nx_mount("/dev/mtdblock0", "/fs/microsd", "littlefs", 0, "autoformat") != 0) {
-		led_on(LED_RED);
-	}
-
-#endif /* !defined(BOOTLOADER) */
-
-	return OK;
-}
@@ -1,235 +0,0 @@
-/****************************************************************************
- *
- *   Copyright (c) 2013 PX4 Development Team. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- * 3. Neither the name PX4 nor the names of its contributors may be
- *    used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- ****************************************************************************/
-
-/**
- * @file led.c
- *
- * PX4FMU LED backend.
- */
-
-#include <px4_platform_common/px4_config.h>
-
-#include <stdbool.h>
-
-#include "chip.h"
-#include "stm32_gpio.h"
-#include "board_config.h"
-
-#include <nuttx/board.h>
-#include <arch/board/board.h>
-
-/*
- * Ideally we'd be able to get these from arm_internal.h,
- * but since we want to be able to disable the NuttX use
- * of leds for system indication at will and there is no
- * separate switch, we need to build independent of the
- * CONFIG_ARCH_LEDS configuration switch.
- */
-__BEGIN_DECLS
-extern void led_init(void);
-extern void led_on(int led);
-extern void led_off(int led);
-extern void led_toggle(int led);
-__END_DECLS
-
-#ifdef CONFIG_ARCH_LEDS
-static bool nuttx_owns_leds = true;
-//                                B  R  S  G
-//                                0  1  2  3
-static const uint8_t xlatpx4[] = {1, 2, 4, 0};
-#  define xlat(p) xlatpx4[(p)]
-static uint32_t g_ledmap[] = {
-	GPIO_nLED_GREEN,   // Indexed by BOARD_LED_GREEN
-	GPIO_nLED_BLUE,    // Indexed by BOARD_LED_BLUE
-	GPIO_nLED_RED,     // Indexed by BOARD_LED_RED
-	GPIO_nSAFETY_SWITCH_LED_OUT,  // Indexed by LED_SAFETY by xlatpx4
-};
-
-#else
-
-#  define xlat(p) (p)
-static uint32_t g_ledmap[] = {
-	GPIO_nLED_BLUE,                     // Indexed by LED_BLUE
-	GPIO_nLED_RED,                      // Indexed by LED_RED, LED_AMBER
-	0,                                  // Indexed by LED_SAFETY (defaulted to an input)
-	GPIO_nLED_GREEN,                    // Indexed by LED_GREEN
-};
-
-#endif
-
-__EXPORT void led_init(void)
-{
-	for (size_t l = 0; l < (sizeof(g_ledmap) / sizeof(g_ledmap[0])); l++) {
-		if (g_ledmap[l] != 0) {
-			stm32_configgpio(g_ledmap[l]);
-		}
-	}
-}
-
-static void phy_set_led(int led, bool state)
-{
-	/* Drive High to switch on */
-
-	if (g_ledmap[led] != 0) {
-		stm32_gpiowrite(g_ledmap[led], state);
-	}
-}
-
-static bool phy_get_led(int led)
-{
-	/* If High it is on */
-	if (g_ledmap[led] != 0) {
-		return stm32_gpioread(g_ledmap[led]);
-	}
-
-	return false;
-}
-
-__EXPORT void led_on(int led)
-{
-	phy_set_led(xlat(led), true);
-}
-
-__EXPORT void led_off(int led)
-{
-	phy_set_led(xlat(led), false);
-}
-
-__EXPORT void led_toggle(int led)
-{
-	phy_set_led(xlat(led), !phy_get_led(xlat(led)));
-}
-
-#ifdef CONFIG_ARCH_LEDS
-/****************************************************************************
- * Public Functions
- ****************************************************************************/
-
-/****************************************************************************
- * Name: board_autoled_initialize
- ****************************************************************************/
-
-void board_autoled_initialize(void)
-{
-	led_init();
-}
-
-/****************************************************************************
- * Name: board_autoled_on
- ****************************************************************************/
-
-void board_autoled_on(int led)
-{
-	if (!nuttx_owns_leds) {
-		return;
-	}
-
-	switch (led) {
-	default:
-		break;
-
-	case LED_HEAPALLOCATE:
-		phy_set_led(BOARD_LED_BLUE, true);
-		break;
-
-	case LED_IRQSENABLED:
-		phy_set_led(BOARD_LED_BLUE, false);
-		phy_set_led(BOARD_LED_GREEN, true);
-		break;
-
-	case LED_STACKCREATED:
-		phy_set_led(BOARD_LED_GREEN, true);
-		phy_set_led(BOARD_LED_BLUE, true);
-		break;
-
-	case LED_INIRQ:
-		phy_set_led(BOARD_LED_BLUE, true);
-		break;
-
-	case LED_SIGNAL:
-		phy_set_led(BOARD_LED_GREEN, true);
-		break;
-
-	case LED_ASSERTION:
-		phy_set_led(BOARD_LED_RED, true);
-		phy_set_led(BOARD_LED_BLUE, true);
-		break;
-
-	case LED_PANIC:
-		phy_set_led(BOARD_LED_RED, true);
-		break;
-
-	case LED_IDLE : /* IDLE */
-		phy_set_led(BOARD_LED_RED, true);
-		break;
-	}
-}
-
-/****************************************************************************
- * Name: board_autoled_off
- ****************************************************************************/
-
-void board_autoled_off(int led)
-{
-	if (!nuttx_owns_leds) {
-		return;
-	}
-
-	switch (led) {
-	default:
-		break;
-
-	case LED_SIGNAL:
-		phy_set_led(BOARD_LED_GREEN, false);
-		break;
-
-	case LED_INIRQ:
-		phy_set_led(BOARD_LED_BLUE, false);
-		break;
-
-	case LED_ASSERTION:
-		phy_set_led(BOARD_LED_RED, false);
-		phy_set_led(BOARD_LED_BLUE, false);
-		break;
-
-	case LED_PANIC:
-		phy_set_led(BOARD_LED_RED, false);
-		break;
-
-	case LED_IDLE : /* IDLE */
-		phy_set_led(BOARD_LED_RED, false);
-		break;
-	}
-}
-
-#endif /* CONFIG_ARCH_LEDS */
@@ -1,123 +0,0 @@
-/****************************************************************************
- *
- *   Copyright (C) 2020 PX4 Development Team. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- * 3. Neither the name PX4 nor the names of its contributors may be
- *    used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- ****************************************************************************/
-
-#include <nuttx/config.h>
-#include <board_config.h>
-
-#include <nuttx/spi/spi.h>
-#include <px4_platform_common/px4_manifest.h>
-
-static const px4_mft_device_t spi4 = {             // FM25V02A on FMUM native: 128K X 8, emulated as (1024 Blocks of 32)
-	.bus_type = px4_mft_device_t::SPI,
-	.devid    = SPIDEV_FLASH(0)
-};
-static const px4_mft_device_t i2c4 = {             // 24LC64T   8K 32 X 256
-	.bus_type =  px4_mft_device_t::I2C,
-	.devid    =  PX4_MK_I2C_DEVID(4, 0x50)
-};
-
-
-static const px4_mtd_entry_t fmum_fram = {
-	.device = &spi4,
-	.npart = 1,
-	.partd = {
-		{
-			.type = MTD_PARAMETERS,
-			.path = "/mnt/microsd",
-			.nblocks = (131072 / (1 << CONFIG_RAMTRON_EMULATE_SECTOR_SHIFT))
-		}
-	},
-};
-
-static const px4_mtd_entry_t fmum_eeprom = {
-	.device = &i2c4,
-	.npart = 5,
-	.partd = {
-		{
-			.type = MTD_CALDATA,
-			.path = "/fs/mtd_caldata",
-			.nblocks = 224
-		},
-		{
-			.type = MTD_MFT_VER,
-			.path = "/fs/mtd_mft_ver",
-			.nblocks = 8
-		},
-		{
-			.type = MTD_MFT_REV,
-			.path = "/fs/mtd_mft_rev",
-			.nblocks = 8
-		},
-		{
-			.type = MTD_ID,
-			.path = "/fs/mtd_id",
-			.nblocks = 8 // 256 = 32 * 8
-		},
-		{
-			.type = MTD_NET,
-			.path = "/fs/mtd_net",
-			.nblocks = 8 // 256 = 32 * 8
-		}
-	},
-};
-
-static const px4_mtd_manifest_t board_mtd_config = {
-	.nconfigs   = 2,
-	.entries = {
-		&fmum_fram,
-		&fmum_eeprom
-	}
-};
-
-static const px4_mft_entry_s mtd_mft = {
-	.type = MTD,
-	.pmft = (void *) &board_mtd_config,
-};
-
-static const px4_mft_entry_s mft_mft = {
-	.type = MFT,
-	.pmft = (void *) system_query_manifest,
-};
-
-static const px4_mft_s mft = {
-	.nmft = 2,
-	.mfts = {
-		&mtd_mft,
-		&mft_mft,
-	}
-};
-
-const px4_mft_s *board_get_manifest(void)
-{
-	return &mft;
-}
@@ -1,48 +0,0 @@
-/****************************************************************************
- *
- *   Copyright (C) 2020, 2022 PX4 Development Team. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- * 3. Neither the name PX4 nor the names of its contributors may be
- *    used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- ****************************************************************************/
-
-#include <px4_arch/spi_hw_description.h>
-#include <drivers/drv_sensor.h>
-#include <nuttx/spi/spi.h>
-
-constexpr px4_spi_bus_t px4_spi_buses[SPI_BUS_MAX_BUS_ITEMS] = {
-	initSPIBus(SPI::Bus::SPI3, {
-		initSPIDevice(DRV_GYR_DEVTYPE_BMI088, SPI::CS{GPIO::PortC, GPIO::Pin12}, SPI::DRDY{GPIO::PortD, GPIO::Pin14}),
-		initSPIDevice(DRV_ACC_DEVTYPE_BMI088, SPI::CS{GPIO::PortE, GPIO::Pin10}, SPI::DRDY{GPIO::PortD, GPIO::Pin10}),
-	}),
-	initSPIBus(SPI::Bus::SPI4, {
-		initSPIDevice(SPIDEV_FLASH(0), SPI::CS{GPIO::PortE, GPIO::Pin4})
-	}),
-};
-
-static constexpr bool unused = validateSPIConfig(px4_spi_buses);
@@ -1,66 +0,0 @@
-/****************************************************************************
- *
- *   Copyright (C) 2012 PX4 Development Team. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- * 3. Neither the name PX4 nor the names of its contributors may be
- *    used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- ****************************************************************************/
-
-#include <px4_arch/io_timer_hw_description.h>
-
-/* Timer allocation
- *
- * TIM1_CH1  T FMU_CH1
- * TIM1_CH2  T FMU_CH2
- * TIM1_CH3  T FMU_CH3
- * TIM1_CH4  T FMU_CH4
- *
- * TIM3_CH1  T FMU_CH5
- * TIM3_CH2  T FMU_CH6
- * TIM3_CH3  T FMU_CH7
- * TIM3_CH4  T FMU_CH8
- */
-
-constexpr io_timers_t io_timers[MAX_IO_TIMERS] = {
-	initIOTimer(Timer::Timer1, DMA{DMA::Index1}),
-	initIOTimer(Timer::Timer3, DMA{DMA::Index1}),
-};
-
-constexpr timer_io_channels_t timer_io_channels[MAX_TIMER_IO_CHANNELS] = {
-	initIOTimerChannel(io_timers, {Timer::Timer1, Timer::Channel1}, {GPIO::PortE, GPIO::Pin9}),
-	initIOTimerChannel(io_timers, {Timer::Timer1, Timer::Channel2}, {GPIO::PortE, GPIO::Pin11}),
-	initIOTimerChannel(io_timers, {Timer::Timer1, Timer::Channel3}, {GPIO::PortE, GPIO::Pin13}),
-	initIOTimerChannel(io_timers, {Timer::Timer1, Timer::Channel4}, {GPIO::PortE, GPIO::Pin14}),
-	initIOTimerChannel(io_timers, {Timer::Timer3, Timer::Channel1}, {GPIO::PortC, GPIO::Pin6}),
-	initIOTimerChannel(io_timers, {Timer::Timer3, Timer::Channel2}, {GPIO::PortB, GPIO::Pin5}),
-	initIOTimerChannel(io_timers, {Timer::Timer3, Timer::Channel3}, {GPIO::PortB, GPIO::Pin0}),
-	initIOTimerChannel(io_timers, {Timer::Timer3, Timer::Channel4}, {GPIO::PortC, GPIO::Pin9}),
-};
-
-constexpr io_timers_channel_mapping_t io_timers_channel_mapping =
-	initIOTimerChannelMapping(io_timers, timer_io_channels);
@@ -1,4 +0,0 @@
-# CONFIG_BOARD_UAVCAN_TIMER_OVERRIDE is not set
-CONFIG_DRIVERS_UAVCAN=n
-CONFIG_MODULES_UXRCE_DDS_CLIENT=n
-CONFIG_MODULES_ZENOH=y
@@ -42,8 +42,7 @@ CONFIG_MODULES_EVENTS=y
 CONFIG_MODULES_FLIGHT_MODE_MANAGER=y
 CONFIG_MODULES_FW_ATT_CONTROL=y
 CONFIG_MODULES_FW_AUTOTUNE_ATTITUDE_CONTROL=y
-CONFIG_MODULES_FW_MODE_MANAGER=y
-CONFIG_MODULES_FW_LATERAL_LONGITUDINAL_CONTROL=y
+CONFIG_MODULES_FW_POS_CONTROL=y
 CONFIG_MODULES_FW_RATE_CONTROL=y
 CONFIG_MODULES_GIMBAL=y
 CONFIG_MODULES_GYRO_CALIBRATION=y
@@ -30,8 +30,7 @@ CONFIG_MODULES_EVENTS=y
 CONFIG_MODULES_FLIGHT_MODE_MANAGER=y
 CONFIG_MODULES_FW_ATT_CONTROL=y
 CONFIG_MODULES_FW_AUTOTUNE_ATTITUDE_CONTROL=y
-CONFIG_MODULES_FW_MODE_MANAGER=y
-CONFIG_MODULES_FW_LATERAL_LONGITUDINAL_CONTROL=y
+CONFIG_MODULES_FW_POS_CONTROL=y
 CONFIG_MODULES_FW_RATE_CONTROL=y
 CONFIG_MODULES_GIMBAL=y
 CONFIG_MODULES_GYRO_CALIBRATION=y
@@ -49,8 +49,7 @@ CONFIG_MODULES_UUV_ATT_CONTROL=y
 CONFIG_MODULES_UUV_POS_CONTROL=y
 CONFIG_MODULES_FW_ATT_CONTROL=y
 CONFIG_MODULES_FW_AUTOTUNE_ATTITUDE_CONTROL=y
-CONFIG_MODULES_FW_MODE_MANAGER=y
-CONFIG_MODULES_FW_LATERAL_LONGITUDINAL_CONTROL=y
+CONFIG_MODULES_FW_POS_CONTROL=y
 CONFIG_MODULES_FW_RATE_CONTROL=y
 CONFIG_MODULES_MANUAL_CONTROL=y
 CONFIG_MODULES_MC_ATT_CONTROL=y
@@ -1,3 +0,0 @@
-CONFIG_BOARD_TOOLCHAIN="arm-none-eabi"
-CONFIG_BOARD_ARCHITECTURE="cortex-m7"
-CONFIG_BOARD_ROMFSROOT=""
@@ -1,86 +0,0 @@
-CONFIG_BOARD_TOOLCHAIN="arm-none-eabi"
-CONFIG_BOARD_ARCHITECTURE="cortex-m7"
-CONFIG_BOARD_SERIAL_URT6="/dev/ttyS5"
-CONFIG_BOARD_SERIAL_GPS1="/dev/ttyS2"
-CONFIG_BOARD_SERIAL_TEL1="/dev/ttyS0"
-CONFIG_BOARD_SERIAL_TEL2="/dev/ttyS1"
-CONFIG_BOARD_SERIAL_TEL3="/dev/ttyS3"
-CONFIG_BOARD_SERIAL_TEL4="/dev/ttyS6"
-CONFIG_BOARD_SERIAL_RC="/dev/ttyS4"
-CONFIG_DRIVERS_ADC_BOARD_ADC=y
-CONFIG_DRIVERS_BAROMETER_DPS310=y
-CONFIG_DRIVERS_CDCACM_AUTOSTART=y
-CONFIG_COMMON_DIFFERENTIAL_PRESSURE=y
-CONFIG_DRIVERS_DIFFERENTIAL_PRESSURE_ASP5033=y
-CONFIG_DRIVERS_DIFFERENTIAL_PRESSURE_AUAV=y
-CONFIG_DRIVERS_DIFFERENTIAL_PRESSURE_ETS=y
-CONFIG_DRIVERS_DIFFERENTIAL_PRESSURE_MS4515=y
-CONFIG_DRIVERS_DSHOT=y
-CONFIG_DRIVERS_GPS=y
-CONFIG_DRIVERS_IMU_BOSCH_BMI088=y
-CONFIG_DRIVERS_IMU_BOSCH_BMI270=y
-CONFIG_COMMON_MAGNETOMETER=y
-CONFIG_DRIVERS_PPS_CAPTURE=y
-CONFIG_DRIVERS_PWM_OUT=y
-CONFIG_COMMON_RC=y
-CONFIG_DRIVERS_RC_INPUT=y
-CONFIG_DRIVERS_TAP_ESC=y
-CONFIG_COMMON_TELEMETRY=y
-CONFIG_DRIVERS_UAVCAN=y
-CONFIG_BOARD_UAVCAN_INTERFACES=1
-CONFIG_MODULES_BATTERY_STATUS=y
-CONFIG_MODULES_COMMANDER=y
-CONFIG_MODULES_CONTROL_ALLOCATOR=y
-CONFIG_MODULES_DATAMAN=y
-CONFIG_MODULES_EKF2=y
-CONFIG_MODULES_ESC_BATTERY=y
-CONFIG_MODULES_EVENTS=y
-CONFIG_MODULES_FLIGHT_MODE_MANAGER=y
-CONFIG_MODULES_FW_ATT_CONTROL=y
-CONFIG_MODULES_FW_AUTOTUNE_ATTITUDE_CONTROL=y
-CONFIG_MODULES_FW_MODE_MANAGER=y
-CONFIG_MODULES_FW_LATERAL_LONGITUDINAL_CONTROL=y
-CONFIG_MODULES_FW_RATE_CONTROL=y
-CONFIG_MODULES_GYRO_CALIBRATION=y
-CONFIG_MODULES_GYRO_FFT=y
-CONFIG_MODULES_LAND_DETECTOR=y
-CONFIG_MODULES_LANDING_TARGET_ESTIMATOR=y
-CONFIG_MODULES_LOAD_MON=y
-CONFIG_MODULES_LOCAL_POSITION_ESTIMATOR=y
-CONFIG_MODULES_LOGGER=y
-CONFIG_MODULES_MAG_BIAS_ESTIMATOR=y
-CONFIG_MODULES_MANUAL_CONTROL=y
-CONFIG_MODULES_MAVLINK=y
-CONFIG_MODULES_MC_ATT_CONTROL=y
-CONFIG_MODULES_MC_AUTOTUNE_ATTITUDE_CONTROL=y
-CONFIG_MODULES_MC_HOVER_THRUST_ESTIMATOR=y
-CONFIG_MODULES_MC_POS_CONTROL=y
-CONFIG_MODULES_MC_RATE_CONTROL=y
-CONFIG_MODULES_NAVIGATOR=y
-CONFIG_MODULES_PAYLOAD_DELIVERER=y
-CONFIG_MODULES_RC_UPDATE=y
-CONFIG_MODULES_SENSORS=y
-CONFIG_MODULES_TEMPERATURE_COMPENSATION=y
-CONFIG_MODULES_UXRCE_DDS_CLIENT=y
-CONFIG_MODULES_VTOL_ATT_CONTROL=y
-CONFIG_SYSTEMCMDS_ACTUATOR_TEST=y
-CONFIG_SYSTEMCMDS_DMESG=y
-CONFIG_SYSTEMCMDS_DUMPFILE=y
-CONFIG_SYSTEMCMDS_FAILURE=y
-CONFIG_SYSTEMCMDS_GPIO=y
-CONFIG_SYSTEMCMDS_HARDFAULT_LOG=y
-CONFIG_SYSTEMCMDS_I2CDETECT=y
-CONFIG_SYSTEMCMDS_NSHTERM=y
-CONFIG_SYSTEMCMDS_PARAM=y
-CONFIG_SYSTEMCMDS_PERF=y
-CONFIG_SYSTEMCMDS_REBOOT=y
-CONFIG_SYSTEMCMDS_SD_BENCH=y
-CONFIG_SYSTEMCMDS_SD_STRESS=y
-CONFIG_SYSTEMCMDS_SYSTEM_TIME=y
-CONFIG_SYSTEMCMDS_TOP=y
-CONFIG_SYSTEMCMDS_TOPIC_LISTENER=y
-CONFIG_SYSTEMCMDS_TUNE_CONTROL=y
-CONFIG_SYSTEMCMDS_UORB=y
-CONFIG_SYSTEMCMDS_USB_CONNECTED=y
-CONFIG_SYSTEMCMDS_VER=y
-CONFIG_SYSTEMCMDS_WORK_QUEUE=y
@@ -1,13 +0,0 @@
-{
-    "board_id": 1188,
-    "magic": "PX4FWv1",
-    "description": "Firmware for the CORVON743v1 board",
-    "image": "",
-    "build_time": 0,
-    "summary": "CORVON743v1",
-    "version": "0.1",
-    "image_size": 0,
-    "image_maxsize": 1835008,
-    "git_identity": "",
-    "board_revision": 0
-}
@@ -1,24 +0,0 @@
-#!/bin/sh
-#
-# board specific defaults
-#------------------------------------------------------------------------------
-param set-default BAT1_A_PER_V 40
-param set-default BAT1_N_CELLS 4
-param set-default BAT1_V_CHARGED 4.2
-param set-default BAT1_V_DIV 21.2
-param set-default BAT1_V_EMPTY 3.2
-
-param set-default SYS_HAS_MAG 1
-param set-default PWM_MAIN_TIM0 -4
-param set-default RC_INPUT_PROTO -1
-
-param set-default IMU_GYRO_CUTOFF 80
-param set-default SYS_AUTOSTART 4001
-param set-default MC_PITCHRATE_K 0.4
-param set-default MC_ROLLRATE_K 0.35
-param set-default MC_YAWRATE_K 1.2
-param set-default MC_YAWRATE_MAX 360
-param set-default MAV_TYPE 2
-param set-default CA_AIRFRAME 0
-param set-default CA_ROTOR_COUNT 4
-param set-default CBRK_SUPPLY_CHK 894281
@@ -1,7 +0,0 @@
-#!/bin/sh
-#
-# board specific extras init
-#------------------------------------------------------------------------------
-
-# enable onboard OSD chip
-# atxxxx start -s
@@ -1,18 +0,0 @@
-#!/bin/sh
-#
-# board specific sensors init
-#------------------------------------------------------------------------------
-
-board_adc start
-
-# # Internal SPI bus BMI088 accel/gyro
-bmi088 -s -b 2 -A -R 6 start
-bmi088 -s -b 2 -G -R 6 start
-
-# # Internal SPI bus BMI270 accel/gyro
-bmi270 -s -b 2 -R 0 start
-
-# Internal baro
-dps310 -I start -a 118
-
-ist8310 -I -R 2 start
@@ -1,85 +0,0 @@
-#
-# This file is autogenerated: PLEASE DO NOT EDIT IT.
-#
-# You can use "make menuconfig" to make any modifications to the installed .config file.
-# You can then do "make savedefconfig" to generate a new defconfig file that includes your
-# modifications.
-#
-# CONFIG_DEV_CONSOLE is not set
-# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set
-# CONFIG_SPI_EXCHANGE is not set
-# CONFIG_STM32H7_SYSCFG is not set
-CONFIG_ARCH="arm"
-CONFIG_ARCH_BOARD_CUSTOM=y
-CONFIG_ARCH_BOARD_CUSTOM_DIR="../../../../boards/corvon/743v1/nuttx-config"
-CONFIG_ARCH_BOARD_CUSTOM_DIR_RELPATH=y
-CONFIG_ARCH_BOARD_CUSTOM_NAME="px4"
-CONFIG_ARCH_CHIP="stm32h7"
-CONFIG_ARCH_CHIP_STM32H743VI=y
-CONFIG_ARCH_CHIP_STM32H7=y
-CONFIG_ARCH_INTERRUPTSTACK=768
-CONFIG_ARMV7M_BASEPRI_WAR=y
-CONFIG_ARMV7M_ICACHE=y
-CONFIG_ARMV7M_MEMCPY=y
-CONFIG_ARMV7M_USEBASEPRI=y
-CONFIG_BOARDCTL=y
-CONFIG_BOARDCTL_RESET=y
-CONFIG_BOARD_ASSERT_RESET_VALUE=0
-CONFIG_BOARD_INITTHREAD_PRIORITY=254
-CONFIG_BOARD_LATE_INITIALIZE=y
-CONFIG_BOARD_LOOPSPERMSEC=95150
-CONFIG_BOARD_RESET_ON_ASSERT=2
-CONFIG_CDCACM=y
-CONFIG_CDCACM_IFLOWCONTROL=y
-CONFIG_CDCACM_PRODUCTID=0x004b
-CONFIG_CDCACM_PRODUCTSTR="CORVON743v1"
-CONFIG_CDCACM_RXBUFSIZE=600
-CONFIG_CDCACM_TXBUFSIZE=12000
-CONFIG_CDCACM_VENDORID=0x3162
-CONFIG_CDCACM_VENDORSTR="CORVON"
-CONFIG_DEBUG_FULLOPT=y
-CONFIG_DEBUG_SYMBOLS=y
-CONFIG_DEBUG_TCBINFO=y
-CONFIG_DEFAULT_SMALL=y
-CONFIG_EXPERIMENTAL=y
-CONFIG_FDCLONE_DISABLE=y
-CONFIG_FDCLONE_STDIO=y
-CONFIG_HAVE_CXX=y
-CONFIG_HAVE_CXXINITIALIZE=y
-CONFIG_IDLETHREAD_STACKSIZE=750
-CONFIG_INIT_ENTRYPOINT="bootloader_main"
-CONFIG_INIT_STACKSIZE=3194
-CONFIG_LIBC_FLOATINGPOINT=y
-CONFIG_LIBC_LONG_LONG=y
-CONFIG_LIBC_STRERROR=y
-CONFIG_MEMSET_64BIT=y
-CONFIG_MEMSET_OPTSPEED=y
-CONFIG_PREALLOC_TIMERS=50
-CONFIG_PTHREAD_STACK_MIN=512
-CONFIG_RAM_SIZE=245760
-CONFIG_RAM_START=0x20010000
-CONFIG_RAW_BINARY=y
-CONFIG_SIG_DEFAULT=y
-CONFIG_SIG_SIGALRM_ACTION=y
-CONFIG_SIG_SIGUSR1_ACTION=y
-CONFIG_SIG_SIGUSR2_ACTION=y
-CONFIG_SPI=y
-CONFIG_STACK_COLORATION=y
-CONFIG_START_DAY=30
-CONFIG_START_MONTH=11
-CONFIG_STDIO_BUFFER_SIZE=32
-CONFIG_STM32H7_BKPSRAM=y
-CONFIG_STM32H7_DMA1=y
-CONFIG_STM32H7_OTGFS=y
-CONFIG_STM32H7_PROGMEM=y
-CONFIG_STM32H7_TIM1=y
-CONFIG_SYSTEMTICK_HOOK=y
-CONFIG_SYSTEM_CDCACM=y
-CONFIG_TASK_NAME_SIZE=24
-CONFIG_TTY_SIGINT=y
-CONFIG_TTY_SIGINT_CHAR=0x03
-CONFIG_TTY_SIGTSTP=y
-CONFIG_USBDEV=y
-CONFIG_USBDEV_BUSPOWERED=y
-CONFIG_USBDEV_MAXPOWER=500
-CONFIG_USEC_PER_TICK=1000
@@ -1,426 +0,0 @@
-/************************************************************************************
- * nuttx-configs/px4_fmu-v6u/include/board.h
- *
- *   Copyright (C) 2016-2019 Gregory Nutt. All rights reserved.
- *   Authors: David Sidrane <david.sidrane@nscdg.com>
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- *    used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- ************************************************************************************/
-#ifndef __NUTTX_CONFIG_CORVON743V1_INCLUDE_BOARD_H
-#define __NUTTX_CONFIG_CORVON743V1_INCLUDE_BOARD_H
-
-/************************************************************************************
- * Included Files
- ************************************************************************************/
-
-#include "board_dma_map.h"
-
-#include <nuttx/config.h>
-
-#ifndef __ASSEMBLY__
-# include <stdint.h>
-#endif
-
-#include "stm32_rcc.h"
-#include "stm32_sdmmc.h"
-
-/************************************************************************************
- * Pre-processor Definitions
- ************************************************************************************/
-
-/* Clocking *************************************************************************/
-/* The CORVON743V1  board provides the following clock sources:
- *
- *   X1: 8 MHz crystal for HSE
- *
- * So we have these clock source available within the STM32
- *
- *   HSI: 64 MHz RC factory-trimmed
- *   HSE:  8 MHz crystal for HSE
- */
-
-#define STM32_BOARD_XTAL        8000000ul
-
-#define STM32_HSI_FREQUENCY     16000000ul
-#define STM32_LSI_FREQUENCY     32000
-#define STM32_HSE_FREQUENCY     STM32_BOARD_XTAL
-#define STM32_LSE_FREQUENCY     32768
-
-/* Main PLL Configuration.
- *
- * PLL source is HSE = 8,000,000
- *
- * PLL_VCOx = (STM32_HSE_FREQUENCY / PLLM) * PLLN
- * Subject to:
- *
- *     1 <= PLLM <= 63
- *     4 <= PLLN <= 512
- *   150 MHz <= PLL_VCOL <= 420MHz
- *   192 MHz <= PLL_VCOH <= 836MHz
- *
- * SYSCLK  = PLL_VCO / PLLP
- * CPUCLK  = SYSCLK / D1CPRE
- * Subject to
- *
- *   PLLP1   = {2, 4, 6, 8, ..., 128}
- *   PLLP2,3 = {2, 3, 4, ..., 128}
- *   CPUCLK <= 480 MHz
- */
-
-#define STM32_BOARD_USEHSE
-
-#define STM32_PLLCFG_PLLSRC      RCC_PLLCKSELR_PLLSRC_HSE
-
-/* PLL1, wide 4 - 8 MHz input, enable DIVP, DIVQ, DIVR
- *
- *   PLL1_VCO = (8,000,000 / 1) * 120 = 960 MHz
- *
- *   PLL1P = PLL1_VCO/2  = 960 MHz / 2   = 480 MHz
- *   PLL1Q = PLL1_VCO/4  = 960 MHz / 4   = 240 MHz
- *   PLL1R = PLL1_VCO/8  = 960 MHz / 8   = 120 MHz
- */
-
-#define STM32_PLLCFG_PLL1CFG    (RCC_PLLCFGR_PLL1VCOSEL_WIDE | \
-				 RCC_PLLCFGR_PLL1RGE_4_8_MHZ | \
-				 RCC_PLLCFGR_DIVP1EN | \
-				 RCC_PLLCFGR_DIVQ1EN | \
-				 RCC_PLLCFGR_DIVR1EN)
-#define STM32_PLLCFG_PLL1M       RCC_PLLCKSELR_DIVM1(1)
-#define STM32_PLLCFG_PLL1N       RCC_PLL1DIVR_N1(120)
-#define STM32_PLLCFG_PLL1P       RCC_PLL1DIVR_P1(2)
-#define STM32_PLLCFG_PLL1Q       RCC_PLL1DIVR_Q1(4)
-#define STM32_PLLCFG_PLL1R       RCC_PLL1DIVR_R1(8)
-
-#define STM32_VCO1_FREQUENCY     ((STM32_HSE_FREQUENCY / 1) * 120)
-#define STM32_PLL1P_FREQUENCY    (STM32_VCO1_FREQUENCY / 2)
-#define STM32_PLL1Q_FREQUENCY    (STM32_VCO1_FREQUENCY / 4)
-#define STM32_PLL1R_FREQUENCY    (STM32_VCO1_FREQUENCY / 8)
-
-/* PLL2 */
-
-#define STM32_PLLCFG_PLL2CFG     (RCC_PLLCFGR_PLL2VCOSEL_WIDE | \
-				  RCC_PLLCFGR_PLL2RGE_4_8_MHZ | \
-				  RCC_PLLCFGR_DIVP2EN | \
-				  RCC_PLLCFGR_DIVQ2EN | \
-				  RCC_PLLCFGR_DIVR2EN)
-#define STM32_PLLCFG_PLL2M       RCC_PLLCKSELR_DIVM2(2)
-#define STM32_PLLCFG_PLL2N       RCC_PLL2DIVR_N2(48)
-#define STM32_PLLCFG_PLL2P       RCC_PLL2DIVR_P2(2)
-#define STM32_PLLCFG_PLL2Q       RCC_PLL2DIVR_Q2(2)
-#define STM32_PLLCFG_PLL2R       RCC_PLL2DIVR_R2(2)
-
-#define STM32_VCO2_FREQUENCY     ((STM32_HSE_FREQUENCY / 2) * 48)
-#define STM32_PLL2P_FREQUENCY    (STM32_VCO2_FREQUENCY / 2)
-#define STM32_PLL2Q_FREQUENCY    (STM32_VCO2_FREQUENCY / 2)
-#define STM32_PLL2R_FREQUENCY    (STM32_VCO2_FREQUENCY / 2)
-
-/* PLL3 */
-
-#define STM32_PLLCFG_PLL3CFG    (RCC_PLLCFGR_PLL3VCOSEL_WIDE | \
-				 RCC_PLLCFGR_PLL3RGE_4_8_MHZ | \
-				 RCC_PLLCFGR_DIVQ3EN)
-#define STM32_PLLCFG_PLL3M      RCC_PLLCKSELR_DIVM3(2)
-#define STM32_PLLCFG_PLL3N      RCC_PLL3DIVR_N3(48)
-#define STM32_PLLCFG_PLL3P      RCC_PLL3DIVR_P3(2)
-#define STM32_PLLCFG_PLL3Q      RCC_PLL3DIVR_Q3(4)
-#define STM32_PLLCFG_PLL3R      RCC_PLL3DIVR_R3(2)
-
-#define STM32_VCO3_FREQUENCY    ((STM32_HSE_FREQUENCY / 2) * 48)
-#define STM32_PLL3P_FREQUENCY   (STM32_VCO3_FREQUENCY / 2)
-#define STM32_PLL3Q_FREQUENCY   (STM32_VCO3_FREQUENCY / 4)
-#define STM32_PLL3R_FREQUENCY   (STM32_VCO3_FREQUENCY / 2)
-
-/* SYSCLK = PLL1P = 480MHz
- * CPUCLK = SYSCLK / 1 = 480 MHz
- */
-
-#define STM32_RCC_D1CFGR_D1CPRE  (RCC_D1CFGR_D1CPRE_SYSCLK)
-#define STM32_SYSCLK_FREQUENCY   (STM32_PLL1P_FREQUENCY)
-#define STM32_CPUCLK_FREQUENCY   (STM32_SYSCLK_FREQUENCY / 1)
-
-/* Configure Clock Assignments */
-
-/* AHB clock (HCLK) is SYSCLK/2 (240 MHz max)
- * HCLK1 = HCLK2 = HCLK3 = HCLK4 = 240
- */
-
-#define STM32_RCC_D1CFGR_HPRE   RCC_D1CFGR_HPRE_SYSCLKd2        /* HCLK  = SYSCLK / 2 */
-#define STM32_ACLK_FREQUENCY    (STM32_CPUCLK_FREQUENCY / 2)    /* ACLK in D1, HCLK3 in D1 */
-#define STM32_HCLK_FREQUENCY    (STM32_CPUCLK_FREQUENCY / 2)    /* HCLK in D2, HCLK4 in D3 */
-#define STM32_BOARD_HCLK        STM32_HCLK_FREQUENCY            /* same as above, to satisfy compiler */
-
-/* APB1 clock (PCLK1) is HCLK/2 (120 MHz) */
-
-#define STM32_RCC_D2CFGR_D2PPRE1  RCC_D2CFGR_D2PPRE1_HCLKd2       /* PCLK1 = HCLK / 2 */
-#define STM32_PCLK1_FREQUENCY     (STM32_HCLK_FREQUENCY/2)
-
-/* APB2 clock (PCLK2) is HCLK/2 (120 MHz) */
-
-#define STM32_RCC_D2CFGR_D2PPRE2  RCC_D2CFGR_D2PPRE2_HCLKd2       /* PCLK2 = HCLK / 2 */
-#define STM32_PCLK2_FREQUENCY     (STM32_HCLK_FREQUENCY/2)
-
-/* APB3 clock (PCLK3) is HCLK/2 (120 MHz) */
-
-#define STM32_RCC_D1CFGR_D1PPRE   RCC_D1CFGR_D1PPRE_HCLKd2        /* PCLK3 = HCLK / 2 */
-#define STM32_PCLK3_FREQUENCY     (STM32_HCLK_FREQUENCY/2)
-
-/* APB4 clock (PCLK4) is HCLK/4 (120 MHz) */
-
-#define STM32_RCC_D3CFGR_D3PPRE   RCC_D3CFGR_D3PPRE_HCLKd2       /* PCLK4 = HCLK / 2 */
-#define STM32_PCLK4_FREQUENCY     (STM32_HCLK_FREQUENCY/2)
-
-/* Timer clock frequencies */
-
-/* Timers driven from APB1 will be twice PCLK1 */
-
-#define STM32_APB1_TIM2_CLKIN   (2*STM32_PCLK1_FREQUENCY)
-#define STM32_APB1_TIM3_CLKIN   (2*STM32_PCLK1_FREQUENCY)
-#define STM32_APB1_TIM4_CLKIN   (2*STM32_PCLK1_FREQUENCY)
-#define STM32_APB1_TIM5_CLKIN   (2*STM32_PCLK1_FREQUENCY)
-#define STM32_APB1_TIM6_CLKIN   (2*STM32_PCLK1_FREQUENCY)
-#define STM32_APB1_TIM7_CLKIN   (2*STM32_PCLK1_FREQUENCY)
-#define STM32_APB1_TIM12_CLKIN  (2*STM32_PCLK1_FREQUENCY)
-#define STM32_APB1_TIM13_CLKIN  (2*STM32_PCLK1_FREQUENCY)
-#define STM32_APB1_TIM14_CLKIN  (2*STM32_PCLK1_FREQUENCY)
-
-/* Timers driven from APB2 will be twice PCLK2 */
-
-#define STM32_APB2_TIM1_CLKIN   (2*STM32_PCLK2_FREQUENCY)
-#define STM32_APB2_TIM8_CLKIN   (2*STM32_PCLK2_FREQUENCY)
-#define STM32_APB2_TIM15_CLKIN  (2*STM32_PCLK2_FREQUENCY)
-#define STM32_APB2_TIM16_CLKIN  (2*STM32_PCLK2_FREQUENCY)
-#define STM32_APB2_TIM17_CLKIN  (2*STM32_PCLK2_FREQUENCY)
-
-/* Kernel Clock Configuration
- *
- * Note: look at Table 54 in ST Manual
- */
-
-/* I2C123 clock source */
-
-#define STM32_RCC_D2CCIP2R_I2C123SRC RCC_D2CCIP2R_I2C123SEL_HSI
-
-/* I2C4 clock source */
-
-#define STM32_RCC_D3CCIPR_I2C4SRC    RCC_D3CCIPR_I2C4SEL_HSI
-
-/* SPI123 clock source */
-
-#define STM32_RCC_D2CCIP1R_SPI123SRC RCC_D2CCIP1R_SPI123SEL_PLL2
-
-/* SPI45 clock source */
-
-#define STM32_RCC_D2CCIP1R_SPI45SRC  RCC_D2CCIP1R_SPI45SEL_PLL2
-
-/* SPI6 clock source */
-
-#define STM32_RCC_D3CCIPR_SPI6SRC    RCC_D3CCIPR_SPI6SEL_PLL2
-
-/* USB 1 and 2 clock source */
-
-#define STM32_RCC_D2CCIP2R_USBSRC    RCC_D2CCIP2R_USBSEL_PLL3
-
-/* ADC 1 2 3 clock source */
-
-#define STM32_RCC_D3CCIPR_ADCSEL     RCC_D3CCIPR_ADCSEL_PLL2
-
-/* FDCAN 1 clock source */
-
-#define STM32_RCC_D2CCIP1R_FDCANSEL  RCC_D2CCIP1R_FDCANSEL_HSE   /* FDCAN 1 2 clock source */
-
-#define STM32_FDCANCLK               STM32_HSE_FREQUENCY
-
-/* FLASH wait states
- *
- *  ------------ ---------- -----------
- *  Vcore        MAX ACLK   WAIT STATES
- *  ------------ ---------- -----------
- *  1.15-1.26 V     70 MHz    0
- *  (VOS1 level)   140 MHz    1
- *                 210 MHz    2
- *  1.05-1.15 V     55 MHz    0
- *  (VOS2 level)   110 MHz    1
- *                 165 MHz    2
- *                 220 MHz    3
- *  0.95-1.05 V     45 MHz    0
- *  (VOS3 level)    90 MHz    1
- *                 135 MHz    2
- *                 180 MHz    3
- *                 225 MHz    4
- *  ------------ ---------- -----------
- */
-
-#define BOARD_FLASH_WAITSTATES 2
-
-/* SDMMC definitions ********************************************************/
-
-/* Init 480kHz, freq = PLL1Q/(2*div)  div =  PLL1Q/(2*freq) */
-
-#define STM32_SDMMC_INIT_CLKDIV     (300 << STM32_SDMMC_CLKCR_CLKDIV_SHIFT)
-
-/* 20 MHz Max for now - more reliable on some boards than 25 MHz
- * 20 MHz = PLL1Q/(2*div), div =  PLL1Q/(2*freq), div = 6 = 240 / 40
- */
-
-#if defined(CONFIG_STM32H7_SDMMC_XDMA) || defined(CONFIG_STM32H7_SDMMC_IDMA)
-#  define STM32_SDMMC_MMCXFR_CLKDIV   (6 << STM32_SDMMC_CLKCR_CLKDIV_SHIFT)
-#else
-#  define STM32_SDMMC_MMCXFR_CLKDIV   (100 << STM32_SDMMC_CLKCR_CLKDIV_SHIFT)
-#endif
-#if defined(CONFIG_STM32H7_SDMMC_XDMA) || defined(CONFIG_STM32H7_SDMMC_IDMA)
-#  define STM32_SDMMC_SDXFR_CLKDIV    (6 << STM32_SDMMC_CLKCR_CLKDIV_SHIFT)
-#else
-#  define STM32_SDMMC_SDXFR_CLKDIV    (100 << STM32_SDMMC_CLKCR_CLKDIV_SHIFT)
-#endif
-
-#define STM32_SDMMC_CLKCR_EDGE      STM32_SDMMC_CLKCR_NEGEDGE
-
-/* LED definitions ******************************************************************/
-/* The board has two, LED_GREEN a Green LED and LED_BLUE a Blue LED,
- * that can be controlled by software.
- *
- * If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs in any way.
- * The following definitions are used to access individual LEDs.
- */
-
-/* LED index values for use with board_userled() */
-
-#define BOARD_LED1        0
-#define BOARD_LED2        1
-#define BOARD_LED3        2
-#define BOARD_NLEDS       3
-
-#define BOARD_LED_RED     BOARD_LED1
-#define BOARD_LED_GREEN   BOARD_LED2
-#define BOARD_LED_BLUE    BOARD_LED3
-
-/* LED bits for use with board_userled_all() */
-
-#define BOARD_LED1_BIT    (1 << BOARD_LED1)
-#define BOARD_LED2_BIT    (1 << BOARD_LED2)
-#define BOARD_LED3_BIT    (1 << BOARD_LED3)
-
-/* If CONFIG_ARCH_LEDS is defined, the usage by the board port is defined in
- * include/board.h and src/stm32_leds.c. The LEDs are used to encode OS-related
- * events as follows:
- *
- *
- *   SYMBOL                     Meaning                      LED state
- *                                                        Red   Green Blue
- *   ----------------------  --------------------------  ------ ------ ----*/
-
-#define LED_STARTED        0 /* NuttX has been started   OFF    OFF   OFF  */
-#define LED_HEAPALLOCATE   1 /* Heap has been allocated  OFF    OFF   ON   */
-#define LED_IRQSENABLED    2 /* Interrupts enabled       OFF    ON    OFF  */
-#define LED_STACKCREATED   3 /* Idle stack created       OFF    ON    ON   */
-#define LED_INIRQ          4 /* In an interrupt          N/C    N/C   GLOW */
-#define LED_SIGNAL         5 /* In a signal handler      N/C    GLOW  N/C  */
-#define LED_ASSERTION      6 /* An assertion failed      GLOW   N/C   GLOW */
-#define LED_PANIC          7 /* The system has crashed   Blink  OFF   N/C  */
-#define LED_IDLE           8 /* MCU is is sleep mode     ON     OFF   OFF  */
-
-/* Thus if the Green LED is statically on, NuttX has successfully booted and
- * is, apparently, running normally.  If the Red LED is flashing at
- * approximately 2Hz, then a fatal error has been detected and the system
- * has halted.
- */
-
-/* Alternate function pin selections ************************************************/
-
-#define GPIO_USART1_RX   GPIO_USART1_RX_2   /* PA10 */
-#define GPIO_USART1_TX   GPIO_USART1_TX_2   /* PA9  */
-
-#define GPIO_USART2_RX   GPIO_USART2_RX_1   /* PA3  */
-#define GPIO_USART2_TX   GPIO_USART2_TX_1   /* PA2  */
-
-#define GPIO_USART3_RX   GPIO_USART3_RX_3   /* PD9  */
-#define GPIO_USART3_TX   GPIO_USART3_TX_3   /* PD8  */
-
-#define GPIO_UART4_RX    GPIO_UART4_RX_2    /* PA1  */
-#define GPIO_UART4_TX    GPIO_UART4_TX_2    /* PA0  */
-
-#define GPIO_USART6_RX   GPIO_USART6_RX_1   /* PC7  */
-#define GPIO_USART6_TX   GPIO_USART6_TX_1   /* PC6  */
-
-#define GPIO_UART7_RX    GPIO_UART7_RX_3    /* PE7  */
-#define GPIO_UART7_TX    GPIO_UART7_TX_3    /* PE8  */
-
-
-#define GPIO_UART8_RX    GPIO_UART8_RX_1    /* PE0  */
-#define GPIO_UART8_TX    GPIO_UART8_TX_1    /* PE1  */
-
-
-/* CAN
- *
- * CAN1 is routed to transceiver.
- */
-
-#define GPIO_CAN1_RX     GPIO_CAN1_RX_2      /* PB8  */
-#define GPIO_CAN1_TX     GPIO_CAN1_TX_2      /* PB9  */
-
-/* SPI
- *
-
- */
-
-#define ADJ_SLEW_RATE(p) (((p) & ~GPIO_SPEED_MASK) | (GPIO_SPEED_2MHz))
-
-//#define GPIO_SPI1_MISO   GPIO_SPI1_MISO_1               /* PA6  */
-//#define GPIO_SPI1_MOSI   GPIO_SPI1_MOSI_1               /* PA7  */
-//#define GPIO_SPI1_SCK    ADJ_SLEW_RATE(GPIO_SPI1_SCK_1) /* PA5 */
-
-#define GPIO_SPI2_MISO   GPIO_SPI2_MISO_2               /* PC2  */
-#define GPIO_SPI2_MOSI   GPIO_SPI2_MOSI_3               /* PC3 */
-#define GPIO_SPI2_SCK    ADJ_SLEW_RATE(GPIO_SPI2_SCK_5) /* PD3  */
-
-
-
-/* I2C
- *
-
- *
- */
-
-#define GPIO_I2C1_SCL GPIO_I2C1_SCL_1       /* PB6  */
-#define GPIO_I2C1_SDA GPIO_I2C1_SDA_1       /* PB7  */
-
-#define GPIO_I2C1_SCL_GPIO                  (GPIO_OUTPUT | GPIO_OPENDRAIN | GPIO_SPEED_50MHz | GPIO_OUTPUT_SET | GPIO_PORTB | GPIO_PIN6)
-#define GPIO_I2C1_SDA_GPIO                  (GPIO_OUTPUT | GPIO_OPENDRAIN | GPIO_SPEED_50MHz | GPIO_OUTPUT_SET | GPIO_PORTB | GPIO_PIN7)
-
-#define GPIO_I2C2_SCL GPIO_I2C2_SCL_1       /* PB10 */
-#define GPIO_I2C2_SDA GPIO_I2C2_SDA_1       /* PB11 */
-
-#define GPIO_I2C2_SCL_GPIO                  (GPIO_OUTPUT | GPIO_OPENDRAIN | GPIO_SPEED_50MHz | GPIO_OUTPUT_SET | GPIO_PORTB | GPIO_PIN10)
-#define GPIO_I2C2_SDA_GPIO                  (GPIO_OUTPUT | GPIO_OPENDRAIN | GPIO_SPEED_50MHz | GPIO_OUTPUT_SET | GPIO_PORTB | GPIO_PIN11)
-
-# define PROBE_INIT(mask)
-# define PROBE(n,s)
-# define PROBE_MARK(n)
-
-#endif  /*__NUTTX_CONFIG_CORVON743V1_INCLUDE_BOARD_H  */
@@ -1,36 +0,0 @@
-/****************************************************************************
- *
- *   Copyright (c) 2021 PX4 Development Team. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- * 3. Neither the name PX4 nor the names of its contributors may be
- *    used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- ****************************************************************************/
-
-#pragma once
-#define DMAMAP_SPI2_RX    DMAMAP_DMA12_SPI2RX_0 /* DMA1:39 */
-#define DMAMAP_SPI2_TX    DMAMAP_DMA12_SPI2TX_0 /* DMA1:40 */
@@ -1,245 +0,0 @@
-#
-# This file is autogenerated: PLEASE DO NOT EDIT IT.
-#
-# You can use "make menuconfig" to make any modifications to the installed .config file.
-# You can then do "make savedefconfig" to generate a new defconfig file that includes your
-# modifications.
-#
-# CONFIG_DEV_CONSOLE is not set
-# CONFIG_DISABLE_ENVIRON is not set
-# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set
-# CONFIG_DISABLE_PTHREAD is not set
-# CONFIG_MMCSD_HAVE_CARDDETECT is not set
-# CONFIG_MMCSD_HAVE_WRITEPROTECT is not set
-# CONFIG_MMCSD_MMCSUPPORT is not set
-# CONFIG_MMCSD_SPI is not set
-# CONFIG_NSH_DISABLEBG is not set
-# CONFIG_NSH_DISABLESCRIPT is not set
-# CONFIG_NSH_DISABLE_CAT is not set
-# CONFIG_NSH_DISABLE_CD is not set
-# CONFIG_NSH_DISABLE_CP is not set
-# CONFIG_NSH_DISABLE_DATE is not set
-# CONFIG_NSH_DISABLE_DF is not set
-# CONFIG_NSH_DISABLE_ECHO is not set
-# CONFIG_NSH_DISABLE_ENV is not set
-# CONFIG_NSH_DISABLE_EXEC is not set
-# CONFIG_NSH_DISABLE_EXIT is not set
-# CONFIG_NSH_DISABLE_EXPORT is not set
-# CONFIG_NSH_DISABLE_FREE is not set
-# CONFIG_NSH_DISABLE_GET is not set
-# CONFIG_NSH_DISABLE_HELP is not set
-# CONFIG_NSH_DISABLE_ITEF is not set
-# CONFIG_NSH_DISABLE_KILL is not set
-# CONFIG_NSH_DISABLE_LOOPS is not set
-# CONFIG_NSH_DISABLE_LS is not set
-# CONFIG_NSH_DISABLE_MKDIR is not set
-# CONFIG_NSH_DISABLE_MKFATFS is not set
-# CONFIG_NSH_DISABLE_MOUNT is not set
-# CONFIG_NSH_DISABLE_MV is not set
-# CONFIG_NSH_DISABLE_PRINTF is not set
-# CONFIG_NSH_DISABLE_PS is not set
-# CONFIG_NSH_DISABLE_PSSTACKUSAGE is not set
-# CONFIG_NSH_DISABLE_PWD is not set
-# CONFIG_NSH_DISABLE_RM is not set
-# CONFIG_NSH_DISABLE_RMDIR is not set
-# CONFIG_NSH_DISABLE_SEMICOLON is not set
-# CONFIG_NSH_DISABLE_SET is not set
-# CONFIG_NSH_DISABLE_SLEEP is not set
-# CONFIG_NSH_DISABLE_SOURCE is not set
-# CONFIG_NSH_DISABLE_TEST is not set
-# CONFIG_NSH_DISABLE_TIME is not set
-# CONFIG_NSH_DISABLE_UMOUNT is not set
-# CONFIG_NSH_DISABLE_UNSET is not set
-# CONFIG_NSH_DISABLE_USLEEP is not set
-CONFIG_ARCH="arm"
-CONFIG_ARCH_BOARD_CUSTOM=y
-CONFIG_ARCH_BOARD_CUSTOM_DIR="../../../../boards/corvon/743v1/nuttx-config"
-CONFIG_ARCH_BOARD_CUSTOM_DIR_RELPATH=y
-CONFIG_ARCH_BOARD_CUSTOM_NAME="px4"
-CONFIG_ARCH_CHIP="stm32h7"
-CONFIG_ARCH_CHIP_STM32H743VI=y
-CONFIG_ARCH_CHIP_STM32H7=y
-CONFIG_ARCH_INTERRUPTSTACK=768
-CONFIG_ARCH_STACKDUMP=y
-CONFIG_ARMV7M_BASEPRI_WAR=y
-CONFIG_ARMV7M_DCACHE=y
-CONFIG_ARMV7M_DTCM=y
-CONFIG_ARMV7M_ICACHE=y
-CONFIG_ARMV7M_MEMCPY=y
-CONFIG_ARMV7M_USEBASEPRI=y
-CONFIG_BOARDCTL_RESET=y
-CONFIG_BOARD_ASSERT_RESET_VALUE=0
-CONFIG_BOARD_CRASHDUMP=y
-CONFIG_BOARD_LOOPSPERMSEC=95150
-CONFIG_BOARD_RESET_ON_ASSERT=2
-CONFIG_BUILTIN=y
-CONFIG_CDCACM=y
-CONFIG_CDCACM_IFLOWCONTROL=y
-CONFIG_CDCACM_PRODUCTID=0x0036
-CONFIG_CDCACM_PRODUCTSTR="CORVON743v1"
-CONFIG_CDCACM_RXBUFSIZE=6000
-CONFIG_CDCACM_TXBUFSIZE=12000
-CONFIG_CDCACM_VENDORID=0x1B8C
-CONFIG_CDCACM_VENDORSTR="CORVON"
-CONFIG_DEBUG_FULLOPT=y
-CONFIG_DEBUG_HARDFAULT_ALERT=y
-CONFIG_DEBUG_MEMFAULT=y
-CONFIG_DEBUG_SYMBOLS=y
-CONFIG_DEFAULT_SMALL=y
-CONFIG_DEV_FIFO_SIZE=0
-CONFIG_DEV_PIPE_MAXSIZE=1024
-CONFIG_DEV_PIPE_SIZE=70
-CONFIG_EXPERIMENTAL=y
-CONFIG_FAT_DMAMEMORY=y
-CONFIG_FAT_LCNAMES=y
-CONFIG_FAT_LFN=y
-CONFIG_FAT_LFN_ALIAS_HASH=y
-CONFIG_FDCLONE_STDIO=y
-CONFIG_FS_BINFS=y
-CONFIG_FS_CROMFS=y
-CONFIG_FS_FAT=y
-CONFIG_FS_FATTIME=y
-CONFIG_FS_PROCFS=y
-CONFIG_FS_PROCFS_INCLUDE_PROGMEM=y
-CONFIG_FS_PROCFS_MAX_TASKS=64
-CONFIG_FS_PROCFS_REGISTER=y
-CONFIG_FS_ROMFS=y
-CONFIG_GRAN=y
-CONFIG_GRAN_INTR=y
-CONFIG_HAVE_CXX=y
-CONFIG_HAVE_CXXINITIALIZE=y
-CONFIG_I2C=y
-CONFIG_I2C_RESET=y
-CONFIG_IDLETHREAD_STACKSIZE=750
-CONFIG_INIT_ENTRYPOINT="nsh_main"
-CONFIG_INIT_STACKSIZE=3194
-CONFIG_IOB_NBUFFERS=24
-CONFIG_IOB_NCHAINS=24
-CONFIG_LIBC_FLOATINGPOINT=y
-CONFIG_LIBC_LONG_LONG=y
-CONFIG_LIBC_MAX_EXITFUNS=1
-CONFIG_LIBC_STRERROR=y
-CONFIG_MEMSET_64BIT=y
-CONFIG_MEMSET_OPTSPEED=y
-CONFIG_MMCSD=y
-CONFIG_MMCSD_SDIO=y
-CONFIG_MMCSD_SDIOWAIT_WRCOMPLETE=y
-CONFIG_MM_IOB=y
-CONFIG_MM_REGIONS=4
-CONFIG_NAME_MAX=40
-CONFIG_NSH_ARCHINIT=y
-CONFIG_NSH_ARGCAT=y
-CONFIG_NSH_BUILTIN_APPS=y
-CONFIG_NSH_CMDPARMS=y
-CONFIG_NSH_CROMFSETC=y
-CONFIG_NSH_LINELEN=128
-CONFIG_NSH_MAXARGUMENTS=15
-CONFIG_NSH_NESTDEPTH=8
-CONFIG_NSH_QUOTE=y
-CONFIG_NSH_ROMFSETC=y
-CONFIG_NSH_ROMFSSECTSIZE=128
-CONFIG_NSH_STRERROR=y
-CONFIG_NSH_VARS=y
-CONFIG_OTG_ID_GPIO_DISABLE=y
-CONFIG_PIPES=y
-CONFIG_PREALLOC_TIMERS=50
-CONFIG_PRIORITY_INHERITANCE=y
-CONFIG_PTHREAD_MUTEX_ROBUST=y
-CONFIG_PTHREAD_STACK_MIN=512
-CONFIG_RAM_SIZE=245760
-CONFIG_RAM_START=0x20010000
-CONFIG_RAW_BINARY=y
-CONFIG_RTC_DATETIME=y
-CONFIG_SCHED_HPWORK=y
-CONFIG_SCHED_HPWORKPRIORITY=249
-CONFIG_SCHED_HPWORKSTACKSIZE=1280
-CONFIG_SCHED_INSTRUMENTATION=y
-CONFIG_SCHED_INSTRUMENTATION_EXTERNAL=y
-CONFIG_SCHED_INSTRUMENTATION_SWITCH=y
-CONFIG_SCHED_LPWORK=y
-CONFIG_SCHED_LPWORKPRIORITY=50
-CONFIG_SCHED_LPWORKSTACKSIZE=1632
-CONFIG_SCHED_WAITPID=y
-CONFIG_SDMMC1_SDIO_PULLUP=y
-CONFIG_SEM_PREALLOCHOLDERS=32
-CONFIG_SERIAL_TERMIOS=y
-CONFIG_SIG_DEFAULT=y
-CONFIG_SIG_SIGALRM_ACTION=y
-CONFIG_SIG_SIGUSR1_ACTION=y
-CONFIG_SIG_SIGUSR2_ACTION=y
-CONFIG_SIG_SIGWORK=4
-CONFIG_STACK_COLORATION=y
-CONFIG_START_DAY=30
-CONFIG_START_MONTH=11
-CONFIG_STDIO_BUFFER_SIZE=256
-CONFIG_STM32H7_ADC1=y
-CONFIG_STM32H7_ADC3=y
-CONFIG_STM32H7_BBSRAM=y
-CONFIG_STM32H7_BBSRAM_FILES=5
-CONFIG_STM32H7_BDMA=y
-CONFIG_STM32H7_BKPSRAM=y
-CONFIG_STM32H7_DMA1=y
-CONFIG_STM32H7_DMA2=y
-CONFIG_STM32H7_DMACAPABLE=y
-CONFIG_STM32H7_FLASH_OVERRIDE_I=y
-CONFIG_STM32H7_I2C1=y
-CONFIG_STM32H7_I2C2=y
-CONFIG_STM32H7_I2C_DYNTIMEO=y
-CONFIG_STM32H7_I2C_DYNTIMEO_STARTSTOP=10
-CONFIG_STM32H7_OTGFS=y
-CONFIG_STM32H7_PROGMEM=y
-CONFIG_STM32H7_RTC=y
-CONFIG_STM32H7_RTC_HSECLOCK=y
-CONFIG_STM32H7_RTC_MAGIC_REG=1
-CONFIG_STM32H7_SAVE_CRASHDUMP=y
-CONFIG_STM32H7_SDMMC1=y
-CONFIG_STM32H7_SERIALBRK_BSDCOMPAT=y
-CONFIG_STM32H7_SERIAL_DISABLE_REORDERING=y
-CONFIG_STM32H7_SPI2=y
-CONFIG_STM32H7_SPI2_DMA=y
-CONFIG_STM32H7_SPI2_DMA_BUFFER=4096
-CONFIG_STM32H7_SPI_DMATHRESHOLD=8
-CONFIG_STM32H7_TIM1=y
-CONFIG_STM32H7_TIM3=y
-CONFIG_STM32H7_TIM4=y
-CONFIG_STM32H7_TIM8=y
-CONFIG_STM32H7_UART4=y
-CONFIG_STM32H7_UART7=y
-CONFIG_STM32H7_UART8=y
-CONFIG_STM32H7_USART1=y
-CONFIG_STM32H7_USART2=y
-CONFIG_STM32H7_USART3=y
-CONFIG_STM32H7_USART6=y
-CONFIG_STM32H7_USART_BREAKS=y
-CONFIG_STM32H7_USART_INVERT=y
-CONFIG_STM32H7_USART_SINGLEWIRE=y
-CONFIG_STM32H7_USART_SWAP=y
-CONFIG_SYSTEM_CDCACM=y
-CONFIG_SYSTEM_NSH=y
-CONFIG_TASK_NAME_SIZE=24
-CONFIG_UART4_BAUD=57600
-CONFIG_UART4_RXBUFSIZE=600
-CONFIG_UART4_TXBUFSIZE=1500
-CONFIG_UART7_BAUD=57600
-CONFIG_UART7_RXBUFSIZE=600
-CONFIG_UART7_TXBUFSIZE=1500
-CONFIG_UART8_BAUD=57600
-CONFIG_UART8_RXBUFSIZE=600
-CONFIG_UART8_TXBUFSIZE=1500
-CONFIG_USART1_BAUD=57600
-CONFIG_USART1_RXBUFSIZE=600
-CONFIG_USART1_TXBUFSIZE=1500
-CONFIG_USART2_BAUD=57600
-CONFIG_USART2_RXBUFSIZE=600
-CONFIG_USART2_TXBUFSIZE=1500
-CONFIG_USART3_BAUD=57600
-CONFIG_USART3_RXBUFSIZE=600
-CONFIG_USART3_TXBUFSIZE=1500
-CONFIG_USART6_BAUD=57600
-CONFIG_USART6_RXBUFSIZE=600
-CONFIG_USART6_TXBUFSIZE=1500
-CONFIG_USBDEV=y
-CONFIG_USBDEV_BUSPOWERED=y
-CONFIG_USBDEV_MAXPOWER=500
-CONFIG_USEC_PER_TICK=1000
-CONFIG_WATCHDOG=y
@@ -1,213 +0,0 @@
-/****************************************************************************
- * scripts/script.ld
- *
- *   Copyright (C) 2016, 2019 Gregory Nutt. All rights reserved.
- *   Author: Gregory Nutt <gnutt@nuttx.org>
- *
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- *    used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- ****************************************************************************/
-
-/* The Durandal-v1 uses an STM32H743II has 2048Kb of main FLASH memory.
- * The flash memory is partitioned into a User Flash memory and a System
- * Flash memory. Each of these memories has two banks:
- *
- *   1) User Flash memory:
- *
- *      Bank 1: Start address 0x0800:0000 to 0x080F:FFFF with 8 sectors, 128Kb each
- *      Bank 2: Start address 0x0810:0000 to 0x081F:FFFF with 8 sectors, 128Kb each
- *
- *   2) System Flash memory:
- *
- *      Bank 1: Start address 0x1FF0:0000 to 0x1FF1:FFFF with 1 x 128Kb sector
- *      Bank 1: Start address 0x1FF4:0000 to 0x1FF5:FFFF with 1 x 128Kb sector
- *
- *   3) User option bytes for user configuration, only in Bank 1.
- *
- * In the STM32H743II, two different boot spaces can be selected through
- * the BOOT pin and the boot base address programmed in the BOOT_ADD0 and
- * BOOT_ADD1 option bytes:
- *
- *   1) BOOT=0: Boot address defined by user option byte BOOT_ADD0[15:0].
- *      ST programmed value: Flash memory at 0x0800:0000
- *   2) BOOT=1: Boot address defined by user option byte BOOT_ADD1[15:0].
- *      ST programmed value: System bootloader at 0x1FF0:0000
- *
- * The Durandal has a Switch on board, the BOOT0 pin is at ground so by default,
- * the STM32 will boot to address 0x0800:0000 in FLASH unless the swiutch is
- * drepresed, then the boot will be from 0x1FF0:0000
- *
- * The STM32H743ZI also has 1024Kb of data SRAM.
- * SRAM is split up into several blocks and into three power domains:
- *
- *   1) TCM SRAMs are dedicated to the Cortex-M7 and are accessible with
- *      0 wait states by the Cortex-M7 and by MDMA through AHBS slave bus
- *
- *      1.1) 128Kb of DTCM-RAM beginning at address 0x2000:0000
- *
- *           The DTCM-RAM is organized as 2 x 64Kb DTCM-RAMs on 2 x 32 bit
- *           DTCM ports. The DTCM-RAM could be used for critical real-time
- *           data, such as interrupt service routines or stack / heap memory.
- *           Both DTCM-RAMs can be used in parallel (for load/store operations)
- *           thanks to the Cortex-M7 dual issue capability.
- *
- *      1.2)  64Kb of ITCM-RAM beginning at address 0x0000:0000
- *
- *           This RAM is connected to ITCM 64-bit interface designed for
- *           execution of critical real-times routines by the CPU.
- *
- *   2) AXI SRAM (D1 domain) accessible by all system masters except BDMA
- *      through D1 domain AXI bus matrix
- *
- *      2.1) 512Kb of SRAM beginning at address 0x2400:0000
- *
- *   3) AHB SRAM (D2 domain) accessible by all system masters except BDMA
- *      through D2 domain AHB bus matrix
- *
- *      3.1) 128Kb of SRAM1 beginning at address 0x3000:0000
- *      3.2) 128Kb of SRAM2 beginning at address 0x3002:0000
- *      3.3)  32Kb of SRAM3 beginning at address 0x3004:0000
- *
- *      SRAM1 - SRAM3 are one contiguous block: 288Kb at address 0x3000:0000
- *
- *   4) AHB SRAM (D3 domain) accessible by most of system masters
- *      through D3 domain AHB bus matrix
- *
- *      4.1)  64Kb of SRAM4 beginning at address 0x3800:0000
- *      4.1)   4Kb of backup RAM beginning at address 0x3880:0000
- *
- * When booting from FLASH, FLASH memory is aliased to address 0x0000:0000
- * where the code expects to begin execution by jumping to the entry point in
- * the 0x0800:0000 address range.
- */
-
-MEMORY
-{
-	itcm  (rwx) : ORIGIN = 0x00000000, LENGTH =   64K
-	flash (rx)  : ORIGIN = 0x08000000, LENGTH = 2048K
-	dtcm1 (rwx) : ORIGIN = 0x20000000, LENGTH =   64K
-	dtcm2 (rwx) : ORIGIN = 0x20010000, LENGTH =   64K
-	sram  (rwx) : ORIGIN = 0x24000000, LENGTH =  512K
-	sram1 (rwx) : ORIGIN = 0x30000000, LENGTH =  128K
-	sram2 (rwx) : ORIGIN = 0x30020000, LENGTH =  128K
-	sram3 (rwx) : ORIGIN = 0x30040000, LENGTH =   32K
-	sram4 (rwx) : ORIGIN = 0x38000000, LENGTH =   64K
-	bbram (rwx) : ORIGIN = 0x38800000, LENGTH =    4K
-}
-
-OUTPUT_ARCH(arm)
-EXTERN(_vectors)
-ENTRY(_stext)
-
-/*
- * Ensure that abort() is present in the final object.  The exception handling
- * code pulled in by libgcc.a requires it (and that code cannot be easily avoided).
- */
-EXTERN(abort)
-EXTERN(_bootdelay_signature)
-
-SECTIONS
-{
-	.text : {
-		_stext = ABSOLUTE(.);
-		*(.vectors)
-		. = ALIGN(32);
-		/*
-		This signature provides the bootloader with a way to delay booting
-		*/
-		_bootdelay_signature = ABSOLUTE(.);
-		FILL(0xffecc2925d7d05c5)
-		. += 8;
-		*(.text .text.*)
-		*(.fixup)
-		*(.gnu.warning)
-		*(.rodata .rodata.*)
-		*(.gnu.linkonce.t.*)
-		*(.glue_7)
-		*(.glue_7t)
-		*(.got)
-		*(.gcc_except_table)
-		*(.gnu.linkonce.r.*)
-		_etext = ABSOLUTE(.);
-
-	} > flash
-
-	/*
-	 * Init functions (static constructors and the like)
-	 */
-	.init_section : {
-		_sinit = ABSOLUTE(.);
-		KEEP(*(.init_array .init_array.*))
-		_einit = ABSOLUTE(.);
-	} > flash
-
-
-	.ARM.extab : {
-		*(.ARM.extab*)
-	} > flash
-
-	__exidx_start = ABSOLUTE(.);
-	.ARM.exidx : {
-		*(.ARM.exidx*)
-	} > flash
-	__exidx_end = ABSOLUTE(.);
-
-	_eronly = ABSOLUTE(.);
-
-	.data : {
-		_sdata = ABSOLUTE(.);
-		*(.data .data.*)
-		*(.gnu.linkonce.d.*)
-		CONSTRUCTORS
-		_edata = ABSOLUTE(.);
-	} > sram AT > flash
-
-	.bss : {
-		_sbss = ABSOLUTE(.);
-		*(.bss .bss.*)
-		*(.gnu.linkonce.b.*)
-		*(COMMON)
-		. = ALIGN(4);
-		_ebss = ABSOLUTE(.);
-	} > sram
-
-	/* Stabs debugging sections. */
-	.stab 0 : { *(.stab) }
-	.stabstr 0 : { *(.stabstr) }
-	.stab.excl 0 : { *(.stab.excl) }
-	.stab.exclstr 0 : { *(.stab.exclstr) }
-	.stab.index 0 : { *(.stab.index) }
-	.stab.indexstr 0 : { *(.stab.indexstr) }
-	.comment 0 : { *(.comment) }
-	.debug_abbrev 0 : { *(.debug_abbrev) }
-	.debug_info 0 : { *(.debug_info) }
-	.debug_line 0 : { *(.debug_line) }
-	.debug_pubnames 0 : { *(.debug_pubnames) }
-	.debug_aranges 0 : { *(.debug_aranges) }
-}
@@ -1,228 +0,0 @@
-/****************************************************************************
- * scripts/script.ld
- *
- *   Copyright (C) 2020 Gregory Nutt. All rights reserved.
- *   Author: Gregory Nutt <gnutt@nuttx.org>
- *
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- *    used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- ****************************************************************************/
-
-/* The board uses an STM32H743II and has 2048Kb of main FLASH memory.
- * The flash memory is partitioned into a User Flash memory and a System
- * Flash memory. Each of these memories has two banks:
- *
- *   1) User Flash memory:
- *
- *      Bank 1: Start address 0x0800:0000 to 0x080F:FFFF with 8 sectors, 128Kb each
- *      Bank 2: Start address 0x0810:0000 to 0x081F:FFFF with 8 sectors, 128Kb each
- *
- *   2) System Flash memory:
- *
- *      Bank 1: Start address 0x1FF0:0000 to 0x1FF1:FFFF with 1 x 128Kb sector
- *      Bank 1: Start address 0x1FF4:0000 to 0x1FF5:FFFF with 1 x 128Kb sector
- *
- *   3) User option bytes for user configuration, only in Bank 1.
- *
- * In the STM32H743II, two different boot spaces can be selected through
- * the BOOT pin and the boot base address programmed in the BOOT_ADD0 and
- * BOOT_ADD1 option bytes:
- *
- *   1) BOOT=0: Boot address defined by user option byte BOOT_ADD0[15:0].
- *      ST programmed value: Flash memory at 0x0800:0000
- *   2) BOOT=1: Boot address defined by user option byte BOOT_ADD1[15:0].
- *      ST programmed value: System bootloader at 0x1FF0:0000
- *
- * There's a switch on board, the BOOT0 pin is at ground so by default,
- * the STM32 will boot to address 0x0800:0000 in FLASH unless the switch is
- * drepresed, then the boot will be from 0x1FF0:0000
- *
- * The STM32H743ZI also has 1024Kb of data SRAM.
- * SRAM is split up into several blocks and into three power domains:
- *
- *   1) TCM SRAMs are dedicated to the Cortex-M7 and are accessible with
- *      0 wait states by the Cortex-M7 and by MDMA through AHBS slave bus
- *
- *      1.1) 128Kb of DTCM-RAM beginning at address 0x2000:0000
- *
- *           The DTCM-RAM is organized as 2 x 64Kb DTCM-RAMs on 2 x 32 bit
- *           DTCM ports. The DTCM-RAM could be used for critical real-time
- *           data, such as interrupt service routines or stack / heap memory.
- *           Both DTCM-RAMs can be used in parallel (for load/store operations)
- *           thanks to the Cortex-M7 dual issue capability.
- *
- *      1.2)  64Kb of ITCM-RAM beginning at address 0x0000:0000
- *
- *           This RAM is connected to ITCM 64-bit interface designed for
- *           execution of critical real-times routines by the CPU.
- *
- *   2) AXI SRAM (D1 domain) accessible by all system masters except BDMA
- *      through D1 domain AXI bus matrix
- *
- *      2.1) 512Kb of SRAM beginning at address 0x2400:0000
- *
- *   3) AHB SRAM (D2 domain) accessible by all system masters except BDMA
- *      through D2 domain AHB bus matrix
- *
- *      3.1) 128Kb of SRAM1 beginning at address 0x3000:0000
- *      3.2) 128Kb of SRAM2 beginning at address 0x3002:0000
- *      3.3)  32Kb of SRAM3 beginning at address 0x3004:0000
- *
- *      SRAM1 - SRAM3 are one contiguous block: 288Kb at address 0x3000:0000
- *
- *   4) AHB SRAM (D3 domain) accessible by most of system masters
- *      through D3 domain AHB bus matrix
- *
- *      4.1)  64Kb of SRAM4 beginning at address 0x3800:0000
- *      4.1)   4Kb of backup RAM beginning at address 0x3880:0000
- *
- * When booting from FLASH, FLASH memory is aliased to address 0x0000:0000
- * where the code expects to begin execution by jumping to the entry point in
- * the 0x0800:0000 address range.
- */
-
-MEMORY
-{
-	ITCM_RAM  (rwx) : ORIGIN = 0x00000000, LENGTH =   64K
-	FLASH      (rx) : ORIGIN = 0x08020000, LENGTH = 1792K
-
-	DTCM1_RAM (rwx) : ORIGIN = 0x20000000, LENGTH =   64K
-	DTCM2_RAM (rwx) : ORIGIN = 0x20010000, LENGTH =   64K
-	AXI_SRAM  (rwx) : ORIGIN = 0x24000000, LENGTH =  512K /* D1 domain AXI bus */
-	SRAM1     (rwx) : ORIGIN = 0x30000000, LENGTH =  128K /* D2 domain AHB bus */
-	SRAM2     (rwx) : ORIGIN = 0x30020000, LENGTH =  128K /* D2 domain AHB bus */
-	SRAM3     (rwx) : ORIGIN = 0x30040000, LENGTH =   32K /* D2 domain AHB bus */
-	SRAM4     (rwx) : ORIGIN = 0x38000000, LENGTH =   64K /* D3 domain */
-	BKPRAM    (rwx) : ORIGIN = 0x38800000, LENGTH =    4K
-}
-
-OUTPUT_ARCH(arm)
-EXTERN(_vectors)
-ENTRY(_stext)
-
-/*
- * Ensure that abort() is present in the final object.  The exception handling
- * code pulled in by libgcc.a requires it (and that code cannot be easily avoided).
- */
-EXTERN(abort)
-EXTERN(_bootdelay_signature)
-
-SECTIONS
-{
-	.text : {
-		_stext = ABSOLUTE(.);
-		*(.vectors)
-		. = ALIGN(32);
-		/*
-		This signature provides the bootloader with a way to delay booting
-		*/
-		_bootdelay_signature = ABSOLUTE(.);
-		FILL(0xffecc2925d7d05c5)
-		. += 8;
-		*(.text .text.*)
-		*(.fixup)
-		*(.gnu.warning)
-		*(.rodata .rodata.*)
-		*(.gnu.linkonce.t.*)
-		*(.glue_7)
-		*(.glue_7t)
-		*(.got)
-		*(.gcc_except_table)
-		*(.gnu.linkonce.r.*)
-		_etext = ABSOLUTE(.);
-
-	} > FLASH
-
-	/*
-	 * Init functions (static constructors and the like)
-	 */
-	.init_section : {
-		_sinit = ABSOLUTE(.);
-		KEEP(*(.init_array .init_array.*))
-		_einit = ABSOLUTE(.);
-	} > FLASH
-
-
-	.ARM.extab : {
-		*(.ARM.extab*)
-	} > FLASH
-
-	__exidx_start = ABSOLUTE(.);
-	.ARM.exidx : {
-		*(.ARM.exidx*)
-	} > FLASH
-	__exidx_end = ABSOLUTE(.);
-
-	_eronly = ABSOLUTE(.);
-
-	.data : {
-		_sdata = ABSOLUTE(.);
-		*(.data .data.*)
-		*(.gnu.linkonce.d.*)
-		CONSTRUCTORS
-		_edata = ABSOLUTE(.);
-
-		/* Pad out last section as the STM32H7 Flash write size is 256 bits. 32 bytes */
-		. = ALIGN(16);
-		FILL(0xffff)
-		. += 16;
-	} > AXI_SRAM AT > FLASH  = 0xffff
-
-	.bss : {
-		_sbss = ABSOLUTE(.);
-		*(.bss .bss.*)
-		*(.gnu.linkonce.b.*)
-		*(COMMON)
-		. = ALIGN(4);
-		_ebss = ABSOLUTE(.);
-	} > AXI_SRAM
-
-	/* Emit the the D3 power domain section for locating BDMA data */
-
-	.sram4_reserve (NOLOAD) :
-	{
-		*(.sram4)
-		. = ALIGN(4);
-		_sram4_heap_start = ABSOLUTE(.);
-	} > SRAM4
-
-	/* Stabs debugging sections. */
-	.stab 0 : { *(.stab) }
-	.stabstr 0 : { *(.stabstr) }
-	.stab.excl 0 : { *(.stab.excl) }
-	.stab.exclstr 0 : { *(.stab.exclstr) }
-	.stab.index 0 : { *(.stab.index) }
-	.stab.indexstr 0 : { *(.stab.indexstr) }
-	.comment 0 : { *(.comment) }
-	.debug_abbrev 0 : { *(.debug_abbrev) }
-	.debug_info 0 : { *(.debug_info) }
-	.debug_line 0 : { *(.debug_line) }
-	.debug_pubnames 0 : { *(.debug_pubnames) }
-	.debug_aranges 0 : { *(.debug_aranges) }
-}
@@ -1,68 +0,0 @@
-############################################################################
-#
-#   Copyright (c) 2021 PX4 Development Team. All rights reserved.
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions
-# are met:
-#
-# 1. Redistributions of source code must retain the above copyright
-#    notice, this list of conditions and the following disclaimer.
-# 2. Redistributions in binary form must reproduce the above copyright
-#    notice, this list of conditions and the following disclaimer in
-#    the documentation and/or other materials provided with the
-#    distribution.
-# 3. Neither the name PX4 nor the names of its contributors may be
-#    used to endorse or promote products derived from this software
-#    without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
-# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
-# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
-# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-# POSSIBILITY OF SUCH DAMAGE.
-#
-############################################################################
-if("${PX4_BOARD_LABEL}" STREQUAL  "bootloader")
-	add_library(drivers_board
-		bootloader_main.c
-		usb.c
-	)
-	target_link_libraries(drivers_board
-		PRIVATE
-			nuttx_arch
-			nuttx_drivers
-			bootloader
-	)
-	target_include_directories(drivers_board PRIVATE ${PX4_SOURCE_DIR}/platforms/nuttx/src/bootloader/common)
-
-else()
-	add_library(drivers_board
-		i2c.cpp
-		init.c
-		led.c
-		sdio.c
-		spi.cpp
-		timer_config.cpp
-		usb.c
-	)
-	add_dependencies(drivers_board arch_board_hw_info)
-
-	target_link_libraries(drivers_board
-		PRIVATE
-			arch_io_pins
-			arch_spi
-			arch_board_hw_info
-			drivers__led
-			nuttx_arch
-			nuttx_drivers
-			px4_layer
-	)
-endif()
@@ -1,197 +0,0 @@
-/****************************************************************************
- *
- *   Copyright (c) 2021 PX4 Development Team. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- * 3. Neither the name PX4 nor the names of its contributors may be
- *    used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- ****************************************************************************/
-
-/**
- * @file board_config.h
- *
- * Board internal definitions
- */
-
-#pragma once
-
-/****************************************************************************************************
- * Included Files
- ****************************************************************************************************/
-
-#include <px4_platform_common/px4_config.h>
-#include <nuttx/compiler.h>
-#include <stdint.h>
-
-#include <stm32_gpio.h>
-
-/****************************************************************************************************
- * Definitions
- ****************************************************************************************************/
-
-// #define FLASH_BASED_PARAMS
-
-
-/* LEDs are driven with push open drain to support Anode to 5V or 3.3V */
-
-#  define GPIO_nLED_RED         /* PE5   */  (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET|GPIO_PORTE|GPIO_PIN5)
-#  define GPIO_nLED_GREEN       /* PE6   */  (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET|GPIO_PORTE|GPIO_PIN6)
-#  define GPIO_nLED_BLUE        /* PE4   */  (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET|GPIO_PORTE|GPIO_PIN4)
-
-#  define BOARD_HAS_CONTROL_STATUS_LEDS      1
-#  define BOARD_OVERLOAD_LED     LED_RED
-#  define BOARD_ARMED_STATE_LED  LED_BLUE
-
-
-/*
- * ADC channels
- *
- * These are the channel numbers of the ADCs of the microcontroller that
- * can be used by the Px4 Firmware in the adc driver
- */
-
-/* ADC defines to be used in sensors.cpp to read from a particular channel */
-#define SYSTEM_ADC_BASE STM32_ADC1_BASE
-#define ADC1_CH(n)                  (n)
-
-/* Define GPIO pins used as ADC N.B. Channel numbers must match below  */
-#define PX4_ADC_GPIO  \
-	/* PC0  */  GPIO_ADC123_INP10, \
-	/* PC1  */  GPIO_ADC123_INP11
-
-
-/* Define Channel numbers must match above GPIO pin IN(n)*/
-#define ADC_BATTERY_VOLTAGE_CHANNEL     /* PC0  */  ADC1_CH(10)
-#define ADC_BATTERY_CURRENT_CHANNEL     /* PC1  */  ADC1_CH(11)
-
-
-#define ADC_CHANNELS \
-	((1 << ADC_BATTERY_VOLTAGE_CHANNEL) | \
-	 (1 << ADC_BATTERY_CURRENT_CHANNEL))
-
-
-/* Define Battery 1 Voltage Divider and A per V
- */
-
-// #define BOARD_BATTERY1_V_DIV         (11.0f)     /* measured with the provided PM board */
-// #define BOARD_BATTERY1_A_PER_V       (40.0f)
-// #define BOARD_BATTERY2_V_DIV         (11.0f)     /* measured with the provided PM board */
-
-
-/* PWM
- */
-#define DIRECT_PWM_OUTPUT_CHANNELS   10
-#define DIRECT_INPUT_TIMER_CHANNELS  10
-
-#define BOARD_HAS_PWM  DIRECT_PWM_OUTPUT_CHANNELS
-
-
-/* USB OTG FS
- *
- * PA8  OTG_FS_VBUS VBUS sensing
- */
-
-#define GPIO_OTGFS_VBUS         /* PA8 */ (GPIO_INPUT|GPIO_PULLDOWN|GPIO_SPEED_100MHz|GPIO_PORTA|GPIO_PIN8)
-
-
-/* High-resolution timer */
-#define HRT_TIMER               2  /* use timer8 for the HRT */
-#define HRT_TIMER_CHANNEL       1  /* use capture/compare channel 3 */
-
-
-/* RC Serial port */
-#define RC_SERIAL_PORT          "/dev/ttyS4"
-#define BOARD_SUPPORTS_RC_SERIAL_PORT_OUTPUT
-
-/* SD Card */
-#define SDIO_SLOTNO             0  /* Only one slot */
-#define SDIO_MINOR              0
-
-/* This board provides a DMA pool and APIs */
-#define BOARD_DMA_ALLOC_POOL_SIZE 5120
-
-/* This board provides the board_on_reset interface */
-#define BOARD_HAS_ON_RESET 1
-
-#define PX4_GPIO_INIT_LIST { \
-		PX4_ADC_GPIO, \
-		GPIO_CAN1_TX, \
-		GPIO_CAN1_RX, \
-	}
-
-#define BOARD_ENABLE_CONSOLE_BUFFER
-
-#define FLASH_BASED_PARAMS
-
-#define BOARD_NUM_IO_TIMERS 4
-
-
-__BEGIN_DECLS
-
-/****************************************************************************************************
- * Public Types
- ****************************************************************************************************/
-
-/****************************************************************************************************
- * Public data
- ****************************************************************************************************/
-
-#ifndef __ASSEMBLY__
-
-/****************************************************************************************************
- * Public Functions
- ****************************************************************************************************/
-
-/****************************************************************************
- * Name: stm32_sdio_initialize
- *
- * Description:
- *   Initialize SDIO-based MMC/SD card support
- *
- ****************************************************************************/
-
-int stm32_sdio_initialize(void);
-
-/****************************************************************************************************
- * Name: stm32_spiinitialize
- *
- * Description:
- *   Called to configure SPI chip select GPIO pins for the board.
- *
- ****************************************************************************************************/
-
-extern void stm32_spiinitialize(void);
-
-extern void stm32_usbinitialize(void);
-
-extern void board_peripheral_reset(int ms);
-
-#include <px4_platform_common/board_common.h>
-
-#endif /* __ASSEMBLY__ */
-
-__END_DECLS
--- a/Show More
+++ b/Show More
Author	SHA1	Message	Date
Pedro-Roque	a6643d85cf	fix: remove iostream	2025-04-13 15:14:09 +02:00
Pedro-Roque	4593471ebe	fix: format	2025-04-13 15:02:09 +02:00
Pedro-Roque	4eb3a238a5	feat: spacecraft tooling for commander and VehicleStatus	2025-04-13 14:53:16 +02:00
Pedro-Roque	de9755b33b	feat: rate controller nominal	2025-04-13 14:51:38 +02:00
Pedro-Roque	95123b88f6	rft: initial merging of controllers for spacecraft vehicles	2025-04-11 23:48:40 +02:00