Commit Graph
8 Commits
Author SHA1 Message Date
David Sidrane 6e2885cc4e nxphlite-v3:Board mods to support 1 Mhz FTM 2017-09-29 10:13:51 -04:00
David Sidrane 2f2f1ff8ea nxphlite-v3:Use 8bit io on usart access for inversion
Fix comment
  Use 8bit io on usart access for inversion, 32 bit
  on odd address was causwing BUS access hard fault.
2017-09-29 10:13:51 -04:00
David Sidrane ebaf8479c5 nxphlite-v3:Clock configuration for TPM 2017-09-29 10:13:51 -04:00
David Sidrane 8fd5fb00a3 nxphlite-v1:Add Debug probes 2017-09-29 10:13:51 -04:00
David Sidrane 5aa449f226 nxphlite-v3:Set FRDIV to 512 to keep clock in spec 2017-09-29 10:13:51 -04:00
David Sidrane 9a0fbe5623 Inital commit of nxphlite-v3 per v3 schematic 2017-09-29 10:13:51 -04:00
David Sidrane 7cde985e27 WIP nxphlite-v3
Configure Clocking, USB and Console on LPUART
2017-09-29 10:13:51 -04:00
David Sidrane d409ca3e46 Inital commit of nxphlite-v3 2017-09-29 10:13:51 -04:00