It appear that QGC is now resyncing between operation.
This was causing the bl_state to be reset to STATE_PROTO_GET_SYNC
and loosing the state of (STATE_PROTO_GET_SYNC|STATE_PROTO_GET_DEVICE)
Adds a compatible gpiosetevent interface. The helper call the
low level functions while providing a consistent API with
xxxx_ gpiosetevent(uint32_t pinset, bool risingedge,
bool fallingedge, bool event, xcpt_t func,
void *arg);
This wrapper was rjected upstream.
- accel & gyro FIFOs enabled
- FIFO watermark on data ready interrupt
- sensor side filtering completely disabled
- gyro now respects `IMU_GYRO_RATEMAX` (up to 2 kHz)
- saves a few % cpu (at default rate)
Todate I have not fould a way to differentiate a 74 from a 75.
as all parts map to Device ID 0x450: STM32H742, STM32H743/753
and STM32H750.
One the CPU is fully differentiate in Nuttx, this can be a
#ifdef.
- always check with state machine before reboot/shutdown
- respect BOARD_HAS_POWER_CONTROL (shutdown from command, low battery, power button)
- px4_shutdown_request add optional delay and always execute from HPWORK
- px4_shutdown_request split out px4_reboot_request
Chip-select and SPI initialization uses the new config, whereas the drivers
still use the existing defines.
The configuration in board_config.h can be removed after all drivers are
updated.
* Introduce "px4_arch_adc_reference_v"
* Revert "Introduce "px4_arch_adc_reference_v""
This reverts commit 93691fbbd55a1b8da8c190e225b318067d90399b.
* use structure to return sample count and vref at the same time
* Revert "use structure to return sample count and vref at the same time"
This reverts commit 9cfd1c173cda51495f766a3f678c2202d67725fd.
* Revert "Revert "Introduce "px4_arch_adc_reference_v"""
This reverts commit edb7f7603e4471163ffb0fc6fc62ad2e30336e91.
* fix missed reference
* remove unecessary channel specific vref
* Update src/drivers/drv_adc.h
Co-Authored-By: David Sidrane <David.Sidrane@Nscdg.com>
* Update src/drivers/drv_adc.h
Co-Authored-By: David Sidrane <David.Sidrane@Nscdg.com>
* Introduce BOARD_ADC_POS_REF_V
Co-authored-by: David Sidrane <David.Sidrane@Nscdg.com>
- reduces amount of board configuration required
- removes the cyclic dependency between io_timers_t and timer_io_channels_t
Fixes a bug in the fmuk66-v3 config: the 2. timer has 3 channels associated
not 2.
Fixes a bug in the modelai config: the 2. timer has 4 channels associated.
The bulk of this change was tightly coupled and needed to be deleted in one pass. Some of the smaller changes were things that broke as a result of the initial purge and subsequently fixed by further eradicating unnecessary platform differences. Finally, I deleted any dead code I came across in the related files I touched while going through everything.
- DriverFramework (src/lib/DriverFramework submodule) completely removed
- added dspal submodule in qurt platform (was brought in via DriverFramework)
- all df wrapper drivers removed
- all boards using df wrapper drivers updated to use in tree equivalents
- unused empty arch/board.h on posix and qurt removed
- unused IOCTLs removed (pub block, priv, etc)
- Integrator delete methods only used from df wrapper drivers
- commander: sensor calibration use "NuttX version" everywhere for now
- sensors: update to px4_{open, read, close} instead of DevMgr wrapper (adc open for analog differential pressure)
- battery_status: update to px4_{open, read, close} instead of DevMgr wrapper (adc open for analog differential pressure)
- cdev cleanup conflicting typedefs and names with actual OS (pollevent_t, etc)
- load_mon and top remove from linux boards (unused)
- delete unused PX4_MAIN_FUNCTION
- delete unused getreg32 macro
- delete unused SIOCDEVPRIVATE define
- named each platform tasks consistently
- posix list_devices and list_topics removed (list_files now shows all virtual files)
Change PID to 0x4b:
Holybro obtained their own PID and VID but APM did not follow
the PX4 convention of makeing the board_id (0x8b) match the PID)
Incorporated the Upstream Bootloader state sequencing checking change.
Change the usb cout to send all chars in 1 write.
David Sidrane