This ensures that FMU-side power controls are not interfering with IO-side power controls of DSM receivers if they happen to be OR-ed in the schematics
BOARD_INDICATE_ARMED_STATE was only set during arming, so an external
component might have reset the board during param save, leading to param
loss.
This extends the API to trigger the arming state also while the shutdown
lock is taken.
- update to NuttX with stm32f4 and stm32f7 SPI DMA internal buffers
- remove explicit DMA buffer allocations from new IMU drivers
- restore original BOARD_DMA_ALLOC_POOL_SIZE
- decrease SPI DMA thresholds based on fmu-v2/v3/v4/v5 bench testing
Chip-select and SPI initialization uses the new config, whereas the drivers
still use the existing defines.
The configuration in board_config.h can be removed after all drivers are
updated.
- reduces amount of board configuration required
- removes the cyclic dependency between io_timers_t and timer_io_channels_t
Fixes a bug in the fmuk66-v3 config: the 2. timer has 3 channels associated
not 2.
Fixes a bug in the modelai config: the 2. timer has 4 channels associated.
and remove the px4_ prefix, except for px4_config.h.
command to update includes:
for k in app.h atomic.h cli.h console_buffer.h defines.h getopt.h i2c.h init.h log.h micro_hal.h module.h module_params.h param.h param_macros.h posix.h sem.h sem.hpp shmem.h shutdown.h tasks.h time.h workqueue.h; do for i in $(grep -rl 'include <px4_'$k src platforms boards); do sed -i 's/#include <px4_'$k'/#include <px4_platform_common\/'$k/ $i; done; done
for in $(grep -rl 'include <px4_config.h' src platforms boards); do sed -i 's/#include <px4_config.h/#include <px4_platform_common\/px4_config.h'/ $i; done
Transitional headers for submodules are added (px4_{defines,log,time}.h)
But only on the first 4 FMU outputs, as the next ones conflict with px4io
serial dma (UART8_RX)
RX DMA is disabled on the GPS port as well (conflicts with TIM1).
A board only needs to define:
#define RC_SERIAL_PORT "/dev/ttyS4"
Then it can optionally define one or more of the following:
#define RC_SERIAL_SWAP_RXTX
#define RC_SERIAL_SINGLEWIRE
#define RC_INVERT_INPUT(_invert_true) px4_arch_gpiowrite(GPIO_SBUS_INV, _invert_true)
* Support for armv7-m_dcache control via parameter
The FORCE_F7_DCACHE parameter can be set to
0 - (default) if Eratta exits turn dcache off else leave it on
1 - Force it off
2 - Force it on
At boot the system will disable the d-cache if the silicon
has the 1259864 Data corruption in a sequence of Write-Through
stores and loads eratta.
Post nsh script execution the FORCE_F7_DCACHE paramater
will be used to set the d-cache to the state indicated
above.
Beat Küng