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ca42483794
update msgs fields from camelCase to snake_case so rosidl_generate_interfaces() is able to generate code for ROS IDL files
2018-07-30 21:40:28 +02:00
mcsauder
cf7dd383b1
Update ADC voltage calculation instances to avoid divide by integer.
2018-07-09 07:51:15 +02:00
Daniel Agar
ea3acb7121
cmake remove circular linking and reorganize
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- px4_add_module now requires MAIN
- px4_add_library doesn't automatically link
2018-04-29 21:48:54 -04:00
David Sidrane
bed4714cfe
kinetis:adc fix typo vailid->valid ( #8054 )
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Fix typo on master
2017-10-04 08:05:18 -10:00
David Sidrane
e11b08aa68
nxphlite-v3:ADC 12 use bit
2017-10-04 04:49:35 -10:00
David Sidrane
3e863dff5d
nxphlite-v3:ADC digital USB connected
2017-10-04 04:49:35 -10:00
David Sidrane
58a6e57452
nxphlite-v3:Use ADC reading for VBUS
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On this HW the VBUS detection is on the ADC. The ADC module
reads the value and sets a global flag as well as publishing
the value via uOrb.
2017-09-29 10:13:51 -04:00
David Sidrane
1bc760c194
Kinetis:Added PX4 ADC Driver.
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PX4 Driver for Kinetis uisng just ADC1.
On V3 HW RC00 the USB_VBUS_VALID on pin 36 of the MCU
ADC0_SE16/ADC1_SE22 is bridged to pin 29 ADC1_DP0 and read
there. But because of missing schottky diodes on V3 HW RC00
the signal is true (3.3V) when powered by the Power Module.
2017-09-29 10:13:51 -04:00
David Sidrane
f1e8b532d9
ADC hack to get comd prompt
2017-09-29 10:13:51 -04:00
David Sidrane
7ab29a38bf
Kinetins ADC wip just to built and boot. Still Stubs
2017-09-29 10:13:51 -04:00
David Sidrane
c1812af45e
Inital commit of NXPhlite-v1
2017-09-29 10:13:51 -04:00
TSC21