Commit Graph
35 Commits
Author SHA1 Message Date
Daniel Agar c60743b306 boards: NuttX increase file name max 32 -> 40 2020-11-08 12:51:59 -05:00
Daniel Agar 233949a377 NuttX upgrade to 10.0.0+ defconfig changes 2020-10-28 14:25:25 -04:00
David Sidrane 075690af9d px4_fmu-v5: Updates for NuttX 9.1.0+ External schedule_note 2020-09-16 21:32:04 -04:00
David Sidrane b52e10720e px4_fmu-v5 Updates for NuttX 9.1.0-
px4_fmu-v5: defconfig MMCSD enable multiblock
2020-09-16 21:32:04 -04:00
Daniel Agar 2c3441aa90 boards: reduce CONFIG_NFILE_DESCRIPTORS 15 -> 12
- reduced now that calibration uses uORB::Subscription
 - can likely be reduced further (perhaps < 8) with additional testing
2020-08-21 10:12:13 -04:00
David Sidrane 329ed6e273 px4_fmu-v5/v5x: Re-enable TXDMA 2020-08-11 12:27:28 -04:00
Daniel Agar e3d31a881e boards: NuttX disable posix message queues 2020-07-17 17:00:21 -04:00
Daniel Agar 28d2aca699 boards: include all procfs entries on boards that aren't flash constrained 2020-05-01 20:59:57 -04:00
Daniel Agar 8d0c92003a boards: remove all CONFIG_NXFONTS_DISABLE* 2020-05-01 20:59:57 -04:00
Beat Küng 34c75f2d36 boards: temporarily disable UART TX DMA
work-around for https://github.com/PX4/Firmware/issues/14659.
This can be reverted when fixed properly.
2020-04-27 08:47:46 -04:00
Daniel Agar 66eacd24bc px4_fmu-v5_stackcheck: update stack sizes and add to Jenkins
- increase stack sizes to run cleanly under stackcheck
     - this is likely overkill for most boards, but using stackcheck to set our minimum ensures we have a very safe margin on regular builds and it's something we can currently afford
 - remove holybro_durandal-v1_stackcheck from test rack (there's only one unit)
2020-04-11 21:16:10 -04:00
Daniel Agar 40b1043e12 NuttX boards minor lpwork and init stack increases 2020-04-02 23:39:17 -04:00
Daniel Agar 15332a7e56 boards: reduce CONFIG_NFILE_DESCRIPTORS 20 -> 15 2020-04-01 16:17:14 -04:00
Daniel Agar 44bec269b0 boards: update all NuttX configs CONFIG_NSH_MAXARGUMENTS 12 -> 15 2020-03-25 17:59:22 -04:00
Daniel Agar 8738c26426 boards: enable NuttX SPI DMA buffers
- update to NuttX with stm32f4 and stm32f7 SPI DMA internal buffers
 - remove explicit DMA buffer allocations from new IMU drivers
 - restore original BOARD_DMA_ALLOC_POOL_SIZE
 - decrease SPI DMA thresholds based on fmu-v2/v3/v4/v5 bench testing
2020-03-22 19:24:26 -04:00
Daniel Agar 0ce9e113ff boards: stm32f4/f7 enable SPI_DMATHRESHOLD=32 2020-03-11 22:08:37 -04:00
Daniel Agar 46a09b711f boards: increase STDIO buffer size where we can afford it 2020-03-11 17:19:44 -04:00
Daniel Agar 505afc6063 boards: increase LPWORKSTACKSIZE 1536 -> 1600 2020-03-10 12:53:01 -04:00
Beat Küng d74d094940 nuttx configs: disable nuttx timers which are used for PWM output
These are not required, and to be consistent we enforce disabling them now.
2020-02-13 03:49:16 -08:00
Daniel Agar 8c38176d77 boards: alphabetize and sync common drivers and modules 2019-11-21 18:56:24 -05:00
Daniel Agar 99aae8b891 NuttX use toolchain math.h and avoid empty drivers/Kconfig 2019-11-16 11:43:42 +01:00
David Sidrane 0ebe285201 px4:fmu-v5 BSP Updated to NuttX 8.1+ 2019-11-16 11:43:42 +01:00
Daniel Agar e2cf501f9d boards: increase CONFIG_MAX_TASKS 32->64 on all F7s (#13285)
On more complicated setups it's still possible to exceed 32 tasks. For example fmu-v5 with mavlink on every telem (+ USB), external spi usage (pmw3901), gimbal (vmount), multiple i2c sensors, and camera feedback is 35 tasks (with top running). This is a fairly extreme case, so I'm only going to increase CONFIG_MAX_TASKS on newer F7 boards.
2019-10-27 12:37:01 -04:00
Beat Küng 67500123e3 fmu-v5: add dshot support
But only on the first 4 FMU outputs, as the next ones conflict with px4io
serial dma (UART8_RX)

RX DMA is disabled on the GPS port as well (conflicts with TIM1).
2019-10-11 08:14:17 +02:00
Daniel Agar 315141873e NuttX boards reduce CONFIG_MAX_TASKS 64 -> 32 (default) 2019-10-02 19:44:46 -04:00
Daniel Agar 0955fd2d58 NuttX boards reduce CONFIG_NFILE_DESCRIPTORS 54 -> 20 2019-08-07 21:23:27 -04:00
Daniel Agar 5421ef5535 NuttX increase HPWORK and LPWORK stack by 256 bytes 2019-08-06 23:15:07 -04:00
Daniel Agar 9d701a077d NuttX reduce stack for interrupts, HPWORK, LPWORK 2019-08-06 11:00:55 -04:00
Daniel Agar d4cd1d0d2e NuttX stm32f7 fully re-enable dcache with write back (#12435)
- fixes https://github.com/PX4/Firmware/issues/12216
 - includes latest PX4/NuttX and apps update 7.29+
2019-07-10 19:08:12 -04:00
Daniel Agar bef7a9ba8e NuttX boards increase task limit 32 -> 64 (#12230) 2019-06-10 09:42:36 -04:00
Daniel Agar 3f890b6ab1 px4_fmu-v5 stackcheck compress defconfig 2019-03-21 08:41:01 -04:00
David Sidrane 12d442e8dd px4_fmuv5:Stack Check build Increase to 2624
The cause of the stack detection fault is because of the
   level of nesting in the start up script. We need to
   determine the worst case configuration and set the
   bar there.

   This fault occurred some 42 calls deep due to script
   calling script (repeat).

   The HW stack check requires as a margin of 204 bytes. That is
   ISR HW stacking of CPU(8) FPU(18) registers and SW stacking of
   CPU(11) and FPU(16) registers. Total CPU(19) registers is
   68 bytes and the total FPU(34) registers is 136 bytes.  On
   a system with a separate ISR stack This only needs to be 104
   so there is 100 bytes of headroom. But as coded the detection
   will give a false positive detection and fault. This does not
   mean that the stack will be corrupted.

   Adjustments to that stack can have no effect due to rounding.
   A stack size of 2608 and 2616 can yield the exact same size stack.
   So even when the failure is due to a 4 byte overflow, it can take
   greater than a 16 bytes increase to fix it. Because the final
   stack size is calculated with an 8 byte alignment after a 4 byte
   decrease. So 2624 becomes 2620 at runtime and will boot
   with SYS_AUTOSTART=4001.
2019-03-01 23:45:48 -05:00
David Sidrane 0f5f4814bb px4_fmu-v5: Inital commit NuttX 7.27+ 2019-01-25 06:32:37 -08:00
Daniel Agar abb3817d31 boards new split VENDOR_MODEL naming convention 2018-11-26 14:40:14 -08:00
Daniel Agar f692ad04d0 boards organization 2018-11-26 14:40:14 -08:00