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Initial storage driver
This commit is contained in:
committed by
Peter van der Perk
parent
03fcc3301c
commit
b84cb854bb
@@ -80,6 +80,7 @@ CONFIG_IMXRT_ENET_NTXBUFFERS=8
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CONFIG_IMXRT_ENET_PHYINIT=y
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CONFIG_IMXRT_FLEXCAN3=y
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CONFIG_IMXRT_FLEXCAN_TXMB=1
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CONFIG_IMXRT_FLEXSPI2=y
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CONFIG_IMXRT_GPIO1_0_15_IRQ=y
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CONFIG_IMXRT_GPIO1_16_31_IRQ=y
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CONFIG_IMXRT_GPIO2_0_15_IRQ=y
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@@ -41,6 +41,7 @@ px4_add_library(drivers_board
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usb.c
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imxrt_flexspi_nor_boot.c
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imxrt_flexspi_nor_flash.c
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imxrt_flexspi_storage.c
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)
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@@ -330,6 +330,8 @@ extern void fmurt1062_timer_initialize(void);
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#include <px4_platform_common/board_common.h>
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int imxrt_flexspi_storage_initialize(void);
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#endif /* __ASSEMBLY__ */
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__END_DECLS
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@@ -0,0 +1,616 @@
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/****************************************************************************
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* boards/px4/fmu-v6xrt/src/imxrt_flexspi_storage.c
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <stdbool.h>
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#include <errno.h>
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#include <debug.h>
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#include <nuttx/kmalloc.h>
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#include <nuttx/signal.h>
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#include <nuttx/fs/fs.h>
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#include <nuttx/mtd/mtd.h>
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#include <px4_platform_common/px4_mtd.h>
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#include "px4_log.h"
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#include "imxrt_flexspi.h"
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#include "board_config.h"
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#include "hardware/imxrt_pinmux.h"
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#ifdef CONFIG_IMXRT_FLEXSPI
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#define NOR_USED_SECTORS 0x0040U /* 64 * 4KB = 256KB */
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#define NOR_TOTAL_SECTORS 0x0400U
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#define NOR_START_SECTOR (NOR_TOTAL_SECTORS - NOR_USED_SECTORS)
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#define NOR_PAGE_SIZE 0x0100U /* 256 bytes */
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#define NOR_SECTOR_SIZE 0x1000U /* 4KB */
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#define MIN(a, b) (((a) < (b)) ? (a) : (b))
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enum {
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/* SPI instructions */
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READ_FAST = 0,
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READ_STATUS_REG = 1,
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WRITE_STATUS_REG = 3,
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SECTOR_ERASE_4K = 5,
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SECTOR_ERASE_64K = 8,
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PAGE_PROGRAM = 9,
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CHIP_ERASE = 11,
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};
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/****************************************************************************
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* Private Types
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****************************************************************************/
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/* FlexSPI NOR device private data */
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struct imxrt_flexspi_storage_dev_s {
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struct mtd_dev_s mtd;
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struct flexspi_dev_s *flexspi; /* Saved FlexSPI interface instance */
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uint8_t *ahb_base;
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enum flexspi_port_e port;
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struct flexspi_device_config_s *config;
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};
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/****************************************************************************
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* Private Functions Prototypes
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****************************************************************************/
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/* MTD driver methods */
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static int imxrt_flexspi_storage_erase(struct mtd_dev_s *dev,
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off_t startblock,
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size_t nblocks);
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static ssize_t imxrt_flexspi_storage_read(struct mtd_dev_s *dev,
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off_t offset,
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size_t nbytes,
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uint8_t *buffer);
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static ssize_t imxrt_flexspi_storage_bread(struct mtd_dev_s *dev,
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off_t startblock,
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size_t nblocks,
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uint8_t *buffer);
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static ssize_t imxrt_flexspi_storage_bwrite(struct mtd_dev_s *dev,
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off_t startblock,
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size_t nblocks,
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const uint8_t *buffer);
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static int imxrt_flexspi_storage_ioctl(struct mtd_dev_s *dev,
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int cmd,
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unsigned long arg);
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/****************************************************************************
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* Private Data
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****************************************************************************/
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static struct flexspi_device_config_s g_flexspi_device_config = {
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.flexspi_root_clk = 4000000,
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.is_sck2_enabled = 0,
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.flash_size = NOR_USED_SECTORS * NOR_SECTOR_SIZE / 4,
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.cs_interval_unit = FLEXSPI_CS_INTERVAL_UNIT1_SCK_CYCLE,
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.cs_interval = 0,
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.cs_hold_time = 3,
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.cs_setup_time = 3,
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.data_valid_time = 0,
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.columnspace = 0,
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.enable_word_address = 0,
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.awr_seq_index = 0,
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.awr_seq_number = 0,
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.ard_seq_index = READ_FAST,
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.ard_seq_number = 1,
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.ahb_write_wait_unit = FLEXSPI_AHB_WRITE_WAIT_UNIT2_AHB_CYCLE,
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.ahb_write_wait_interval = 0,
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.rx_sample_clock = FLEXSPI_READ_SAMPLE_CLK_LOOPBACK_FROM_DQS_PAD,
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};
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static struct imxrt_flexspi_storage_dev_s g_flexspi_nor = {
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.mtd =
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{
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.erase = imxrt_flexspi_storage_erase,
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.bread = imxrt_flexspi_storage_bread,
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.bwrite = imxrt_flexspi_storage_bwrite,
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.read = imxrt_flexspi_storage_read,
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.ioctl = imxrt_flexspi_storage_ioctl,
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#ifdef CONFIG_MTD_BYTE_WRITE
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.write = NULL,
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#endif
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.name = "imxrt_flexspi_storage"
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},
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.flexspi = (void *)0,
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.ahb_base = (uint8_t *) IMXRT_FLEX2CIPHER_BASE,
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.port = FLEXSPI_PORT_A1,
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.config = &g_flexspi_device_config
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};
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/****************************************************************************
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* Private Functions
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****************************************************************************/
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static int imxrt_flexspi_storage_read_status(
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const struct imxrt_flexspi_storage_dev_s *dev,
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uint32_t *status)
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{
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int stat;
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struct flexspi_transfer_s transfer = {
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.device_address = 0,
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.port = dev->port,
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.cmd_type = FLEXSPI_READ,
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.seq_number = 1,
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.seq_index = READ_STATUS_REG,
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.data = status,
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.data_size = 1,
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};
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stat = FLEXSPI_TRANSFER(dev->flexspi, &transfer);
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if (stat != 0) {
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return -EIO;
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}
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return 0;
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}
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#if 0
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static int imxrt_flexspi_nor_write_status(
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const struct imxrt_flexspi_storage_dev_s *dev,
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uint32_t *status)
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{
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int stat;
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struct flexspi_transfer_s transfer = {
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.device_address = 0,
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.port = dev->port,
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.cmd_type = FLEXSPI_WRITE,
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.seq_number = 1,
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.seq_index = WRITE_STATUS_REG,
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.data = status,
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.data_size = 1,
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};
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stat = FLEXSPI_TRANSFER(dev->flexspi, &transfer);
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if (stat != 0) {
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return -EIO;
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}
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return 0;
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}
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#endif
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static int imxrt_flexspi_storage_write_enable(
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const struct imxrt_flexspi_storage_dev_s *dev)
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{
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#if 0
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int stat;
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struct flexspi_transfer_s transfer = {
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.device_address = 0,
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.port = dev->port,
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.cmd_type = FLEXSPI_COMMAND,
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.seq_number = 1,
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.seq_index = WRITE_ENABLE,
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.data = NULL,
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.data_size = 0,
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};
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stat = FLEXSPI_TRANSFER(dev->flexspi, &transfer);
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if (stat != 0) {
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return -EIO;
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}
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#endif
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return 0;
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}
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static int imxrt_flexspi_storage_erase_sector(
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const struct imxrt_flexspi_storage_dev_s *dev,
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off_t offset)
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{
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int stat;
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struct flexspi_transfer_s transfer = {
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.device_address = offset,
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.port = dev->port,
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.cmd_type = FLEXSPI_COMMAND,
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.seq_number = 1,
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.seq_index = SECTOR_ERASE_4K,
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.data = NULL,
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.data_size = 0,
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};
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stat = FLEXSPI_TRANSFER(dev->flexspi, &transfer);
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if (stat != 0) {
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return -EIO;
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}
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return 0;
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}
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static int imxrt_flexspi_storage_erase_chip(
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const struct imxrt_flexspi_storage_dev_s *dev)
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{
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#if 0
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int stat;
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struct flexspi_transfer_s transfer = {
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.device_address = 0,
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.port = dev->port,
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.cmd_type = FLEXSPI_COMMAND,
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.seq_number = 1,
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.seq_index = CHIP_ERASE,
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.data = NULL,
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.data_size = 0,
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};
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stat = FLEXSPI_TRANSFER(dev->flexspi, &transfer);
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if (stat != 0) {
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return -EIO;
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}
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#endif
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printf("WARNING TRYING TO ERASE THE WHOLE CHIP!!!!\n");
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return 0;
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}
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static int imxrt_flexspi_storage_page_program(
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const struct imxrt_flexspi_storage_dev_s *dev,
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off_t offset,
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const void *buffer,
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size_t len)
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{
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int stat;
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struct flexspi_transfer_s transfer = {
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.device_address = offset,
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.port = dev->port,
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.cmd_type = FLEXSPI_WRITE,
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.seq_number = 1,
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.seq_index = PAGE_PROGRAM,
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.data = (uint32_t *) buffer,
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.data_size = len,
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};
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stat = FLEXSPI_TRANSFER(dev->flexspi, &transfer);
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if (stat != 0) {
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return -EIO;
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}
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return 0;
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}
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static int imxrt_flexspi_storage_wait_bus_busy(
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const struct imxrt_flexspi_storage_dev_s *dev)
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{
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uint32_t status = 0;
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int ret;
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do {
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ret = imxrt_flexspi_storage_read_status(dev, &status);
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if (ret) {
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return ret;
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}
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} while (status & 1);
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return 0;
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}
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static ssize_t imxrt_flexspi_storage_read(struct mtd_dev_s *dev,
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off_t offset,
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size_t nbytes,
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uint8_t *buffer)
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{
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#ifdef IP_READ
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struct imxrt_flexspi_storage_dev_s *priv =
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(struct imxrt_flexspi_storage_dev_s *)dev;
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int stat;
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size_t remaining = nbytes;
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struct flexspi_transfer_s transfer = {
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.port = priv->port,
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.cmd_type = FLEXSPI_READ,
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.seq_number = 1,
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.seq_index = READ_FAST,
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};
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while (remaining > 0) {
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transfer.device_address = offset;
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transfer.data = buffer;
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transfer.data_size = MIN(128, remaining);
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stat = FLEXSPI_TRANSFER(priv->flexspi, &transfer);
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if (stat != 0) {
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return -EIO;
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}
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remaining -= transfer.data_size;
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buffer += transfer.data_size;
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offset += transfer.data_size;
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}
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return 0;
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#else
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struct imxrt_flexspi_storage_dev_s *priv =
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(struct imxrt_flexspi_storage_dev_s *)dev;
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uint8_t *src;
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finfo("offset: %08lx nbytes: %d\n", (long)offset, (int)nbytes);
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if (priv->port >= FLEXSPI_PORT_COUNT) {
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return -EIO;
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}
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src = priv->ahb_base + offset;
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memcpy(buffer, src, nbytes);
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finfo("return nbytes: %d\n", (int)nbytes);
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return (ssize_t)nbytes;
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#endif
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}
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static ssize_t imxrt_flexspi_storage_bread(struct mtd_dev_s *dev,
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off_t startblock,
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size_t nblocks,
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uint8_t *buffer)
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{
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ssize_t nbytes;
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finfo("startblock: %08lx nblocks: %d\n", (long)startblock, (int)nblocks);
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/* On this device, we can handle the block read just like the byte-oriented
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* read
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*/
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nbytes = imxrt_flexspi_storage_read(dev, startblock * NOR_PAGE_SIZE,
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nblocks * NOR_PAGE_SIZE, buffer);
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if (nbytes > 0) {
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nbytes /= NOR_PAGE_SIZE;
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}
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return nbytes;
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}
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static ssize_t imxrt_flexspi_storage_bwrite(struct mtd_dev_s *dev,
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off_t startblock,
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size_t nblocks,
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const uint8_t *buffer)
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{
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struct imxrt_flexspi_storage_dev_s *priv =
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(struct imxrt_flexspi_storage_dev_s *)dev;
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size_t len = nblocks * NOR_PAGE_SIZE;
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off_t offset = startblock * NOR_PAGE_SIZE;
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uint8_t *src = (uint8_t *) buffer;
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#ifdef CONFIG_ARMV7M_DCACHE
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uint8_t *dst = priv->ahb_base + startblock * NOR_PAGE_SIZE;
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#endif
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int i;
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finfo("startblock: %08lx nblocks: %d\n", (long)startblock, (int)nblocks);
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while (len) {
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i = MIN(NOR_PAGE_SIZE, len);
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imxrt_flexspi_storage_write_enable(priv);
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imxrt_flexspi_storage_page_program(priv, offset, src, i);
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imxrt_flexspi_storage_wait_bus_busy(priv);
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FLEXSPI_SOFTWARE_RESET(priv->flexspi);
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offset += i;
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len -= i;
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}
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#ifdef CONFIG_ARMV7M_DCACHE
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up_invalidate_dcache((uintptr_t)dst,
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(uintptr_t)dst + nblocks * NOR_PAGE_SIZE);
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#endif
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return nblocks;
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}
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static int imxrt_flexspi_storage_erase(struct mtd_dev_s *dev,
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off_t startblock,
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size_t nblocks)
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{
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struct imxrt_flexspi_storage_dev_s *priv =
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(struct imxrt_flexspi_storage_dev_s *)dev;
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size_t blocksleft = nblocks;
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#ifdef CONFIG_ARMV7M_DCACHE
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uint8_t *dst = priv->ahb_base + startblock * NOR_SECTOR_SIZE;
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#endif
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finfo("startblock: %08lx nblocks: %d\n", (long)startblock, (int)nblocks);
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while (blocksleft-- > 0) {
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/* Erase each sector */
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imxrt_flexspi_storage_write_enable(priv);
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imxrt_flexspi_storage_erase_sector(priv, startblock * NOR_SECTOR_SIZE);
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imxrt_flexspi_storage_wait_bus_busy(priv);
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FLEXSPI_SOFTWARE_RESET(priv->flexspi);
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startblock++;
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}
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#ifdef CONFIG_ARMV7M_DCACHE
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up_invalidate_dcache((uintptr_t)dst,
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(uintptr_t)dst + nblocks * NOR_SECTOR_SIZE);
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#endif
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return (int)nblocks;
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}
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static int imxrt_flexspi_storage_ioctl(struct mtd_dev_s *dev,
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int cmd,
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unsigned long arg)
|
||||
{
|
||||
struct imxrt_flexspi_storage_dev_s *priv =
|
||||
(struct imxrt_flexspi_storage_dev_s *)dev;
|
||||
int ret = -EINVAL; /* Assume good command with bad parameters */
|
||||
|
||||
finfo("cmd: %d\n", cmd);
|
||||
|
||||
switch (cmd) {
|
||||
case MTDIOC_GEOMETRY: {
|
||||
struct mtd_geometry_s *geo =
|
||||
(struct mtd_geometry_s *)((uintptr_t)arg);
|
||||
|
||||
if (geo) {
|
||||
/* Populate the geometry structure with information need to
|
||||
* know the capacity and how to access the device.
|
||||
*
|
||||
* NOTE:
|
||||
* that the device is treated as though it where just an array
|
||||
* of fixed size blocks. That is most likely not true, but the
|
||||
* client will expect the device logic to do whatever is
|
||||
* necessary to make it appear so.
|
||||
*/
|
||||
|
||||
geo->blocksize = (NOR_PAGE_SIZE);
|
||||
geo->erasesize = (NOR_SECTOR_SIZE);
|
||||
geo->neraseblocks = (NOR_USED_SECTORS);
|
||||
|
||||
ret = OK;
|
||||
|
||||
finfo("blocksize: %lu erasesize: %lu neraseblocks: %lu\n",
|
||||
geo->blocksize, geo->erasesize, geo->neraseblocks);
|
||||
}
|
||||
}
|
||||
break;
|
||||
|
||||
case BIOC_PARTINFO: {
|
||||
struct partition_info_s *info =
|
||||
(struct partition_info_s *)arg;
|
||||
|
||||
if (info != NULL) {
|
||||
info->numsectors = (NOR_USED_SECTORS * NOR_SECTOR_SIZE) / NOR_PAGE_SIZE;
|
||||
info->sectorsize = NOR_PAGE_SIZE;
|
||||
info->startsector = NOR_START_SECTOR;
|
||||
info->parent[0] = '\0';
|
||||
ret = OK;
|
||||
}
|
||||
}
|
||||
break;
|
||||
|
||||
case MTDIOC_BULKERASE: {
|
||||
/* Erase the entire device */
|
||||
|
||||
imxrt_flexspi_storage_write_enable(priv);
|
||||
imxrt_flexspi_storage_erase_chip(priv);
|
||||
imxrt_flexspi_storage_wait_bus_busy(priv);
|
||||
FLEXSPI_SOFTWARE_RESET(priv->flexspi);
|
||||
ret = OK;
|
||||
}
|
||||
break;
|
||||
|
||||
case MTDIOC_PROTECT:
|
||||
|
||||
/* TODO */
|
||||
|
||||
break;
|
||||
|
||||
case MTDIOC_UNPROTECT:
|
||||
|
||||
/* TODO */
|
||||
|
||||
break;
|
||||
|
||||
default:
|
||||
ret = -ENOTTY; /* Bad/unsupported command */
|
||||
break;
|
||||
}
|
||||
|
||||
finfo("return %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Public Functions
|
||||
****************************************************************************/
|
||||
|
||||
|
||||
/****************************************************************************
|
||||
* Name: imxrt_flexspi_storage_initialize
|
||||
*
|
||||
* Description:
|
||||
* This function is called by board-bringup logic to configure the
|
||||
* flash device.
|
||||
*
|
||||
* Returned Value:
|
||||
* Zero is returned on success. Otherwise, a negated errno value is
|
||||
* returned to indicate the nature of the failure.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
int imxrt_flexspi_storage_initialize(void)
|
||||
{
|
||||
struct mtd_dev_s *mtd_dev = &g_flexspi_nor.mtd;
|
||||
int ret = -ENODEV;
|
||||
|
||||
/* Select FlexSPI2 */
|
||||
|
||||
g_flexspi_nor.flexspi = imxrt_flexspi_initialize(1);
|
||||
|
||||
if (g_flexspi_nor.flexspi) {
|
||||
ret = OK;
|
||||
}
|
||||
|
||||
/* Register the MTD driver so that it can be accessed from the
|
||||
* VFS.
|
||||
*/
|
||||
|
||||
ret = register_mtddriver("/dev/nor", mtd_dev, 0755, NULL);
|
||||
|
||||
if (ret < 0) {
|
||||
syslog(LOG_ERR, "ERROR: Failed to register MTD driver: %d\n",
|
||||
ret);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_FS_LITTLEFS
|
||||
|
||||
/* Mount the LittleFS file system */
|
||||
|
||||
ret = nx_mount("/dev/nor", "/mnt/lfs", "littlefs", 0,
|
||||
"autoformat");
|
||||
|
||||
if (ret < 0) {
|
||||
syslog(LOG_ERR,
|
||||
"ERROR: Failed to mount LittleFS at /mnt/lfs: %d\n",
|
||||
ret);
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
return ret;
|
||||
}
|
||||
#endif /* CONFIG_IMXRT_FLEXSPI */
|
||||
@@ -402,5 +402,15 @@ __EXPORT int board_app_initialize(uintptr_t arg)
|
||||
imxrt_caninitialize(3);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_IMXRT_FLEXSPI
|
||||
ret = imxrt_flexspi_storage_initialize();
|
||||
|
||||
if (ret < 0) {
|
||||
syslog(LOG_ERR,
|
||||
"ERROR: imxrt_flexspi_nor_initialize failed: %d\n", ret);
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
Reference in New Issue
Block a user