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https://gitee.com/mirrors_PX4/PX4-Autopilot.git
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WIP: device tree MVP
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# Copyright (c) 2018, STMicroelectronics
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# SPDX-License-Identifier: Apache-2.0
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# Common fields for I2S controllers
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include: base.yaml
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bus: i2s
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properties:
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"#address-cells":
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required: true
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const: 1
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"#size-cells":
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required: true
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const: 0
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label:
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required: true
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# Copyright (c) 2018, STMicroelectronics
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# SPDX-License-Identifier: Apache-2.0
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# Common fields for I2S devices
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include: base.yaml
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on-bus: i2s
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properties:
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reg:
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required: true
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label:
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required: true
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# Copyright (c) 2020 Intel Corporation
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#
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# SPDX-License-Identifier: Apache-2.0
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description: Intel CAVS I2S controller
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compatible: "intel,cavs-i2s"
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include: [i2s-controller.yaml]
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properties:
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reg:
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required: true
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interrupts:
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required: true
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interrupt-parent:
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required: true
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dmas:
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required: true
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dma-names:
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required: true
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#
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# Copyright (c) 2020 Antmicro <www.antmicro.com>
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#
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# SPDX-License-Identifier: Apache-2.0
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#
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description: LiteX I2S controller
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compatible: "litex,i2s"
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include: i2s-controller.yaml
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properties:
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reg:
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required: true
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fifo_depth:
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type: int
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required: true
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# Copyright (c) 2019 Nordic Semiconductor ASA
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# SPDX-License-Identifier: Apache-2.0
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description: Nordic I2S (Inter-IC sound interface)
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compatible: "nordic,nrf-i2s"
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include: i2s-controller.yaml
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properties:
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reg:
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required: true
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interrupts:
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required: true
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sck-pin:
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type: int
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required: true
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description: SCK pin
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lrck-pin:
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type: int
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required: true
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description: LRCK pin
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sdout-pin:
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type: int
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required: false
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description: SDOUT pin
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sdin-pin:
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type: int
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required: false
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description: SDIN pin
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mck-pin:
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type: int
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required: false
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description: MCK pin
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clock-source:
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type: string
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required: false
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default: "PCLK32M_HFXO"
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description: |
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Clock source to be used by the I2S peripheral for the master clock
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(MCK) generator. The generator is only needed when the I2S peripheral
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is operating in Master mode. The following options are available:
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- "PCLK32M": 32 MHz peripheral clock, synchronous to HFCLK
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- "PCLK32M_HFXO": PCLK32M running off the 32 MHz crystal oscillator
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(HFXO) for better clock accuracy and jitter performance
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- "ACLK": Audio PLL clock with configurable frequency (frequency for
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this clock must be set via the "hfclkaudio-frequency" property
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in the "nordic,nrf-clock" node); this clock source is only available
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in the nRF53 Series SoCs and it requires the use of HFXO
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enum:
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- "PCLK32M"
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- "PCLK32M_HFXO"
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- "ACLK"
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# Copyright (c) 2020 NXP
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# SPDX-License-Identifier: Apache-2.0
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description: LPC I2S node
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compatible: "nxp,lpc-i2s"
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include: [i2s-controller.yaml, "nxp,lpc-flexcomm.yaml"]
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# Copyright (c) 2021, NXP
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# SPDX-License-Identifier: Apache-2.0
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description: NXP mcux SAI-I2S controller
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compatible: "nxp,mcux-i2s"
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include: [i2s-controller.yaml]
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properties:
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reg:
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required: true
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interrupts:
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required: true
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dma-names:
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required: true
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nxp,tx-dma-channel:
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type: int
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required: true
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description: tx dma channel number
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nxp,rx-dma-channel:
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type: int
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required: true
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description: rx dma channel number
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nxp,tx-sync-mode:
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type: boolean
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required: false
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description: tx sync mode
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nxp,rx-sync-mode:
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type: boolean
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required: false
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description: rx sync mode
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pre-div:
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type: int
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required: false
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description: pre divider
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podf:
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type: int
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required: false
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description: post-divider fraction
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pll-clocks:
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type: phandle-array
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required: false
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description: pll settings
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specifier-space: pll-clock
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pll-clock-names:
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required: false
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type: string-array
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description: Provided names of pll-clock specifiers
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pinmuxes:
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type: phandle-array
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required: false
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specifier-space: pinmux
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description: iomux settings
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nxp,tx-channel:
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type: int
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required: false
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description: tx channel the maximum number is SOC dependent
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@@ -0,0 +1,27 @@
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# Copyright (c) 2018, STMicroelectronics
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# SPDX-License-Identifier: Apache-2.0
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description: STM32 I2S controller
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compatible: "st,stm32-i2s"
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include: [i2s-controller.yaml, pinctrl-device.yaml]
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properties:
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reg:
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required: true
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interrupts:
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required: true
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dmas:
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required: true
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dma-names:
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required: true
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pinctrl-0:
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required: true
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pinctrl-names:
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required: true
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