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473 lines
14 KiB
C++
473 lines
14 KiB
C++
/****************************************************************************
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*
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* Copyright (c) 2020-2022 PX4 Development Team. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name PX4 nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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#include "BMM150.hpp"
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using namespace time_literals;
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BMM150::BMM150(const I2CSPIDriverConfig &config) :
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I2C(config),
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I2CSPIDriver(config),
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_px4_mag(get_device_id(), config.rotation)
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{
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}
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BMM150::~BMM150()
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{
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perf_free(_bad_register_perf);
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perf_free(_bad_transfer_perf);
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perf_free(_reset_perf);
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perf_free(_overflow_perf);
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perf_free(_self_test_failed_perf);
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}
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int BMM150::init()
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{
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int ret = I2C::init();
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if (ret != PX4_OK) {
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DEVICE_DEBUG("I2C::init failed (%i)", ret);
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return ret;
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}
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return Reset() ? 0 : -1;
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}
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bool BMM150::Reset()
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{
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RegisterWrite(Register::POWER_CONTROL, 0);
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_state = STATE::RESET;
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ScheduleClear();
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ScheduleDelayed(1_ms);
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return true;
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}
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void BMM150::print_status()
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{
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I2CSPIDriverBase::print_status();
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perf_print_counter(_reset_perf);
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perf_print_counter(_bad_register_perf);
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perf_print_counter(_bad_transfer_perf);
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perf_print_counter(_overflow_perf);
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perf_print_counter(_self_test_failed_perf);
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}
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int BMM150::probe()
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{
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// 3 retries
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for (int i = 0; i < 3; i++) {
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const uint8_t POWER_CONTROL = RegisterRead(Register::POWER_CONTROL);
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const uint8_t CHIP_ID = RegisterRead(Register::CHIP_ID);
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PX4_DEBUG("POWER_CONTROL: 0x%02hhX, CHIP_ID: 0x%02hhX", POWER_CONTROL, CHIP_ID);
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// either power control bit is set and chip ID can be read, or both registers are 0x00
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if ((POWER_CONTROL & POWER_CONTROL_BIT::PowerControl) && (CHIP_ID == chip_identification_number)) {
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return PX4_OK;
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} else if ((POWER_CONTROL == 0) && (CHIP_ID == 0)) {
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return PX4_OK;
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}
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}
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return PX4_ERROR;
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}
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float BMM150::compensate_x(int16_t mag_data_x, uint16_t data_rhall)
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{
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float retval = 0;
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// Processing compensation equations
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// not documented, but derived from https://github.com/BoschSensortec/BMM150-Sensor-API/blob/a20641f216057f0c54de115fe81b57368e119c01/bmm150.c#L1624-L1633 as of 2020-09-25
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float process_comp_x0 = (((float)_trim_data.dig_xyz1) * 16384.f / data_rhall);
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retval = (process_comp_x0 - 16384.f);
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float process_comp_x1 = ((float)_trim_data.dig_xy2) * (retval * retval / 268435456.f);
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float process_comp_x2 = process_comp_x1 + retval * ((float)_trim_data.dig_xy1) / 16384.f;
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float process_comp_x3 = ((float)_trim_data.dig_x2) + 160.f;
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float process_comp_x4 = mag_data_x * ((process_comp_x2 + 256.f) * process_comp_x3);
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retval = ((process_comp_x4 / 8192.f) + (((float)_trim_data.dig_x1) * 8.f)) / 16.f;
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return retval;
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}
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float BMM150::compensate_y(int16_t mag_data_y, uint16_t data_rhall)
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{
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float retval = 0;
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// Processing compensation equations
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// not documented, but derived from https://github.com/BoschSensortec/BMM150-Sensor-API/blob/a20641f216057f0c54de115fe81b57368e119c01/bmm150.c#L1660-L1667 as of 2020-09-25
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float process_comp_y0 = ((float)_trim_data.dig_xyz1) * 16384.f / data_rhall;
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retval = process_comp_y0 - 16384.f;
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float process_comp_y1 = ((float)_trim_data.dig_xy2) * (retval * retval / 268435456.f);
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float process_comp_y2 = process_comp_y1 + retval * ((float)_trim_data.dig_xy1) / 16384.f;
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float process_comp_y3 = ((float)_trim_data.dig_y2) + 160.0f;
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float process_comp_y4 = mag_data_y * (((process_comp_y2) + 256.f) * process_comp_y3);
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retval = ((process_comp_y4 / 8192.f) + (((float)_trim_data.dig_y1) * 8.f)) / 16.f;
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return retval;
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}
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float BMM150::compensate_z(int16_t mag_data_z, uint16_t data_rhall)
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{
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float retval = 0;
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// Processing compensation equations
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// not documented, but derived from https://github.com/BoschSensortec/BMM150-Sensor-API/blob/a20641f216057f0c54de115fe81b57368e119c01/bmm150.c#L1696-L1703 as of 2020-09-25
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float process_comp_z0 = ((float)mag_data_z) - ((float)_trim_data.dig_z4);
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float process_comp_z1 = ((float)data_rhall) - ((float)_trim_data.dig_xyz1);
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float process_comp_z2 = (((float)_trim_data.dig_z3) * process_comp_z1);
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float process_comp_z3 = ((float)_trim_data.dig_z1) * ((float)data_rhall) / 32768.f;
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float process_comp_z4 = ((float)_trim_data.dig_z2) + process_comp_z3;
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float process_comp_z5 = (process_comp_z0 * 131072.f) - process_comp_z2;
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retval = (process_comp_z5 / ((process_comp_z4) * 4.f)) / 16.f;
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return retval;
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}
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static constexpr int16_t combine_xy_int13(const uint8_t msb, const uint8_t lsb)
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{
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int16_t x = ((msb << 8) | lsb);
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return x / 8; // arithmetic shift by 3 (13 bit signed integer)
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}
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static constexpr int16_t combine_z_int15(const uint8_t msb, const uint8_t lsb)
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{
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int16_t z = ((msb << 8) | lsb);
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return z / 2; // arithmetic shift by 1 (15 bit signed integer)
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}
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static constexpr uint16_t combine_rhall_uint14(const uint8_t msb, const uint8_t lsb)
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{
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uint16_t rhall = ((msb << 8) | lsb);
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return (rhall >> 2) & 0x3FFF; // 14 bit unsigned integer
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}
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void BMM150::RunImpl()
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{
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const hrt_abstime now = hrt_absolute_time();
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switch (_state) {
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case STATE::RESET:
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// POWER_CONTROL: soft reset
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RegisterWrite(Register::POWER_CONTROL, POWER_CONTROL_BIT::SoftReset | POWER_CONTROL_BIT::PowerControl);
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_reset_timestamp = now;
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_failure_count = 0;
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_state = STATE::WAIT_FOR_RESET;
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perf_count(_reset_perf);
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ScheduleDelayed(3_ms); // 3.0 ms start-up time from suspend to sleep
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break;
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case STATE::WAIT_FOR_RESET:
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// Soft reset always brings the device into sleep mode (power off -> suspend -> sleep)
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if ((RegisterRead(Register::CHIP_ID) == chip_identification_number)
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&& (RegisterRead(Register::POWER_CONTROL) == POWER_CONTROL_BIT::PowerControl)
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&& (RegisterRead(Register::OP_MODE) == OP_MODE_BIT::Opmode_Sleep)) {
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// if reset succeeded then start self test
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RegisterSetBits(Register::OP_MODE, OP_MODE_BIT::Self_Test);
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_state = STATE::SELF_TEST_CHECK;
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ScheduleDelayed(10_ms);
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} else {
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// RESET not complete
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if (hrt_elapsed_time(&_reset_timestamp) > 1000_ms) {
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PX4_DEBUG("Reset failed, retrying");
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_state = STATE::RESET;
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ScheduleDelayed(100_ms);
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} else {
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PX4_DEBUG("Reset not complete, check again in 10 ms");
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ScheduleDelayed(10_ms);
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}
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}
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break;
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case STATE::SELF_TEST_CHECK: {
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// After performing self test OpMode "Self test" bit is set to 0
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const bool opmode_self_test_cleared = ((RegisterRead(Register::OP_MODE) & OP_MODE_BIT::Self_Test) == 0);
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// When self-test is successful, the corresponding self-test result bits are set
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// “X-Self-Test” register 0x42 bit0
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// “Y-Self-Test” register 0x44 bit0
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// “Z-Self-Test” register 0x46 bit0
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const bool x_success = RegisterRead(Register::DATAX_LSB) & Bit0;
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const bool y_success = RegisterRead(Register::DATAY_LSB) & Bit0;
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const bool z_success = RegisterRead(Register::DATAZ_LSB) & Bit0;
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if (opmode_self_test_cleared && (!x_success || !y_success || !z_success)) {
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PX4_DEBUG("self test failed, resetting");
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perf_count(_self_test_failed_perf);
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_state = STATE::RESET;
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ScheduleDelayed(1000_ms);
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} else {
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_state = STATE::READ_TRIM;
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ScheduleDelayed(1_ms);
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}
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}
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break;
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case STATE::READ_TRIM: {
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// Trim register value is read
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uint8_t cmd = static_cast<uint8_t>(Register::DIG_X1);
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uint8_t trim_x1y1[2] {};
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if (transfer(&cmd, 1, trim_x1y1, 2) == PX4_OK) {
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cmd = static_cast<uint8_t>(Register::DIG_Z4_LSB);
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uint8_t trim_xyz_data[4] {};
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if (transfer(&cmd, 1, trim_xyz_data, 4) == PX4_OK) {
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cmd = static_cast<uint8_t>(Register::DIG_Z2_LSB);
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uint8_t trim_xy1xy2[10] {};
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if (transfer(&cmd, 1, trim_xy1xy2, 10) == PX4_OK) {
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_trim_data.dig_x1 = (int8_t)trim_x1y1[0];
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_trim_data.dig_y1 = (int8_t)trim_x1y1[1];
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_trim_data.dig_x2 = (int8_t)trim_xyz_data[2];
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_trim_data.dig_y2 = (int8_t)trim_xyz_data[3];
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uint16_t temp_msb;
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temp_msb = ((uint16_t)trim_xy1xy2[3]) << 8;
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_trim_data.dig_z1 = (uint16_t)(temp_msb | trim_xy1xy2[2]);
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temp_msb = ((uint16_t)trim_xy1xy2[1]) << 8;
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_trim_data.dig_z2 = (int16_t)(temp_msb | trim_xy1xy2[0]);
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temp_msb = ((uint16_t)trim_xy1xy2[7]) << 8;
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_trim_data.dig_z3 = (int16_t)(temp_msb | trim_xy1xy2[6]);
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temp_msb = ((uint16_t)trim_xyz_data[1]) << 8;
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_trim_data.dig_z4 = (int16_t)(temp_msb | trim_xyz_data[0]);
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_trim_data.dig_xy1 = trim_xy1xy2[9];
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_trim_data.dig_xy2 = (int8_t)trim_xy1xy2[8];
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temp_msb = ((uint16_t)(trim_xy1xy2[5] & 0x7F)) << 8;
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_trim_data.dig_xyz1 = (uint16_t)(temp_msb | trim_xy1xy2[4]);
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if ((_trim_data.dig_xyz1 != 0) && (_trim_data.dig_z2 != 0) && (_trim_data.dig_z1 != 0)) {
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_state = STATE::CONFIGURE;
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ScheduleDelayed(1_ms);
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return;
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}
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}
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}
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}
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// reset if reading trim failed
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PX4_DEBUG("reading trim failed, resetting");
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perf_count(_bad_register_perf);
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_state = STATE::RESET;
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ScheduleDelayed(100_ms);
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}
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break;
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case STATE::CONFIGURE:
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if (Configure()) {
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// if configure succeeded then start reading every 50 ms (20 Hz)
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_state = STATE::READ;
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ScheduleOnInterval(50_ms, 50_ms);
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} else {
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// CONFIGURE not complete
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if (hrt_elapsed_time(&_reset_timestamp) > 1000_ms) {
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PX4_DEBUG("Configure failed, resetting");
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_state = STATE::RESET;
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} else {
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PX4_DEBUG("Configure failed, retrying");
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}
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ScheduleDelayed(100_ms);
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}
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break;
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case STATE::READ: {
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struct TransferBuffer {
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uint8_t DATAX_LSB;
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uint8_t DATAX_MSB;
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uint8_t DATAY_LSB;
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uint8_t DATAY_MSB;
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uint8_t DATAZ_LSB;
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uint8_t DATAZ_MSB;
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uint8_t RHALL_LSB;
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uint8_t RHALL_MSB;
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uint8_t STATUS;
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} buffer{};
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bool success = false;
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// 0x42 to 0x4A with a burst read.
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uint8_t cmd = static_cast<uint8_t>(Register::DATAX_LSB);
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if (transfer(&cmd, 1, (uint8_t *)&buffer, sizeof(buffer)) == PX4_OK) {
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int16_t x = combine_xy_int13(buffer.DATAX_MSB, buffer.DATAX_LSB);
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int16_t y = combine_xy_int13(buffer.DATAY_MSB, buffer.DATAY_LSB);
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int16_t z = combine_z_int15(buffer.DATAZ_MSB, buffer.DATAZ_LSB);
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uint16_t rhall = combine_rhall_uint14(buffer.RHALL_MSB, buffer.RHALL_LSB);
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const bool data_ready = buffer.RHALL_LSB & Bit0;
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if (data_ready && (rhall != 0)) {
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if ((buffer.STATUS & STATUS_BIT::Overflow) ||
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(x == OVERFLOW_XYAXES) || (y == OVERFLOW_XYAXES) || (z == OVERFLOW_ZAXIS)) {
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// overflow ADC value, record error, but don't publish
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perf_count(_overflow_perf);
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} else {
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_px4_mag.set_error_count(perf_event_count(_bad_register_perf) + perf_event_count(_bad_transfer_perf));
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_px4_mag.update(now, compensate_x(x, rhall), compensate_y(y, rhall), compensate_z(z, rhall));
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success = true;
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if (_failure_count > 0) {
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_failure_count--;
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}
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}
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}
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} else {
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perf_count(_bad_transfer_perf);
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}
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if (!success) {
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_failure_count++;
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// full reset if things are failing consistently
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if (_failure_count > 10) {
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Reset();
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return;
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}
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}
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if (!success || hrt_elapsed_time(&_last_config_check_timestamp) > 100_ms) {
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// check configuration registers periodically or immediately following any failure
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if (RegisterCheck(_register_cfg[_checked_register])) {
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_last_config_check_timestamp = now;
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_checked_register = (_checked_register + 1) % size_register_cfg;
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} else {
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// register check failed, force reset
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perf_count(_bad_register_perf);
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Reset();
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}
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}
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}
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break;
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}
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}
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bool BMM150::Configure()
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{
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// first set and clear all configured register bits
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for (const auto ®_cfg : _register_cfg) {
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RegisterSetAndClearBits(reg_cfg.reg, reg_cfg.set_bits, reg_cfg.clear_bits);
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}
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// now check that all are configured
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bool success = true;
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for (const auto ®_cfg : _register_cfg) {
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if (!RegisterCheck(reg_cfg)) {
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success = false;
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}
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}
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// microTesla -> Gauss
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_px4_mag.set_scale(0.01f);
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return success;
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}
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bool BMM150::RegisterCheck(const register_config_t ®_cfg)
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{
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bool success = true;
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const uint8_t reg_value = RegisterRead(reg_cfg.reg);
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if (reg_cfg.set_bits && ((reg_value & reg_cfg.set_bits) != reg_cfg.set_bits)) {
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PX4_DEBUG("0x%02hhX: 0x%02hhX (0x%02hhX not set)", (uint8_t)reg_cfg.reg, reg_value, reg_cfg.set_bits);
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success = false;
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}
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if (reg_cfg.clear_bits && ((reg_value & reg_cfg.clear_bits) != 0)) {
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PX4_DEBUG("0x%02hhX: 0x%02hhX (0x%02hhX not cleared)", (uint8_t)reg_cfg.reg, reg_value, reg_cfg.clear_bits);
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success = false;
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}
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return success;
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}
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uint8_t BMM150::RegisterRead(Register reg)
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{
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const uint8_t cmd = static_cast<uint8_t>(reg);
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uint8_t buffer{};
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int ret = transfer(&cmd, 1, &buffer, 1);
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if (ret != PX4_OK) {
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PX4_DEBUG("register read 0x%02hhX failed, ret = %d", cmd, ret);
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return -1;
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}
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return buffer;
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}
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void BMM150::RegisterWrite(Register reg, uint8_t value)
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{
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uint8_t buffer[2] { (uint8_t)reg, value };
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int ret = transfer(buffer, sizeof(buffer), nullptr, 0);
|
|
|
|
if (ret != PX4_OK) {
|
|
PX4_DEBUG("register write 0x%02hhX failed, ret = %d", (uint8_t)reg, ret);
|
|
}
|
|
}
|
|
|
|
void BMM150::RegisterSetAndClearBits(Register reg, uint8_t setbits, uint8_t clearbits)
|
|
{
|
|
const uint8_t orig_val = RegisterRead(reg);
|
|
uint8_t val = (orig_val & ~clearbits) | setbits;
|
|
|
|
if (orig_val != val) {
|
|
RegisterWrite(reg, val);
|
|
}
|
|
}
|