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* s32k3xx: EMIOS allow independent frequencies for each channel * mr-canhubk3: update config * mr-canhubk344: Fix adap board detect * mr-canhubk344: Use LPSPI1 (Port P1A) for SD card * airframes: Add B3RB Ackermann rover config See https://nxp.gitbook.io/mr-b3rb for more information about the NXP B3RB platform. PX4 Support basic control for now
123 lines
4.3 KiB
C++
123 lines
4.3 KiB
C++
/****************************************************************************
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*
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* Copyright (C) 2016, 2018 PX4 Development Team. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name PX4 nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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/*
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* @file timer_config.cpp
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*
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* Configuration data for the kinetis pwm_servo, input capture and pwm input driver.
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*
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* Note that these arrays must always be fully-sized.
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*/
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// TODO:Stubbed out for now
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#include <stdint.h>
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#include "hardware/s32k3xx_emios.h"
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#include "board_config.h"
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#include <drivers/drv_pwm_output.h>
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#include <px4_arch/io_timer_hw_description.h>
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constexpr io_timers_t io_timers[MAX_IO_TIMERS] = {
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initIOTimer(Timer::EMIOS0_Channel0, Timer::Channel0),
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initIOTimer(Timer::EMIOS0_Channel1, Timer::Channel1),
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initIOTimer(Timer::EMIOS0_Channel2, Timer::Channel2),
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initIOTimer(Timer::EMIOS0_Channel3, Timer::Channel3),
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initIOTimer(Timer::EMIOS0_Channel4, Timer::Channel4),
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initIOTimer(Timer::EMIOS0_Channel5, Timer::Channel5),
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initIOTimer(Timer::EMIOS0_Channel6, Timer::Channel6),
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initIOTimer(Timer::EMIOS0_Channel7, Timer::Channel7),
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};
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constexpr timer_io_channels_t timer_io_channels[MAX_TIMER_IO_CHANNELS] = {
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initIOTimerChannel(io_timers, {Timer::EMIOS0_Channel0, Timer::Channel0}, PIN_EMIOS0_CH0_1),
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initIOTimerChannel(io_timers, {Timer::EMIOS0_Channel1, Timer::Channel1}, PIN_EMIOS0_CH1_1),
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initIOTimerChannel(io_timers, {Timer::EMIOS0_Channel2, Timer::Channel2}, PIN_EMIOS0_CH2_1),
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initIOTimerChannel(io_timers, {Timer::EMIOS0_Channel3, Timer::Channel3}, PIN_EMIOS0_CH3_2),
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initIOTimerChannel(io_timers, {Timer::EMIOS0_Channel4, Timer::Channel4}, PIN_EMIOS0_CH4_2),
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initIOTimerChannel(io_timers, {Timer::EMIOS0_Channel5, Timer::Channel5}, PIN_EMIOS0_CH5_2),
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initIOTimerChannel(io_timers, {Timer::EMIOS0_Channel6, Timer::Channel6}, PIN_EMIOS0_CH6_1),
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initIOTimerChannel(io_timers, {Timer::EMIOS0_Channel7, Timer::Channel7}, PIN_EMIOS0_CH7_2),
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};
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constexpr io_timers_channel_mapping_t io_timers_channel_mapping =
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initIOTimerChannelMapping(io_timers, timer_io_channels);
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const struct io_timers_t led_pwm_timers[MAX_LED_TIMERS] = {
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{
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.base = S32K3XX_EMIOS0_BASE,
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.clock_register = 0,
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.clock_bit = 0,
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.vectorno_0_3 = 0,
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.vectorno_4_7 = 0,
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.vectorno_8_11 = 0,
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.vectorno_12_15 = 0,
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.vectorno_16_19 = 0,
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.vectorno_20_23 = 0,
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},
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{
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.base = S32K3XX_EMIOS1_BASE,
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.clock_register = 0,
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.clock_bit = 0,
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.vectorno_0_3 = 0,
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.vectorno_4_7 = 0,
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.vectorno_8_11 = 0,
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.vectorno_12_15 = 0,
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.vectorno_16_19 = 0,
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.vectorno_20_23 = 0,
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},
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};
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const struct timer_io_channels_t led_pwm_channels[MAX_TIMER_LED_CHANNELS] = {
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{
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.gpio_out = GPIO_LED_R, // RGB_R
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.gpio_in = 0,
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.timer_index = 0,
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.timer_channel = 19,
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},
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{
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.gpio_out = GPIO_LED_G, // RGB_G
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.gpio_in = 0,
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.timer_index = 1,
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.timer_channel = 10,
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},
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{
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.gpio_out = GPIO_LED_B, // RGB_B
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.gpio_in = 0,
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.timer_index = 1,
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.timer_channel = 5,
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},
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};
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