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S32K Dynamic periphclocks

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This commit is contained in:
Peter van der Perk 2022-12-13 15:44:13 +01:00 committed by David Sidrane
parent 6c7702b906
commit f3fe10f63e
7 changed files with 11 additions and 14 deletions
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6
boards/nxp/mr-canhubk3/src/board_config.h
View File

@ -82,10 +82,6 @@ __BEGIN_DECLS
#define BOARD_NUMBER_I2C_BUSES 2
/* Count of peripheral clock user configurations */
#define NUM_OF_PERIPHERAL_CLOCKS_0 28
/* Timer I/O PWM and capture */
#define DIRECT_PWM_OUTPUT_CHANNELS 8
@ -104,7 +100,7 @@ __BEGIN_DECLS
/* User peripheral configuration structure 0 */
extern const struct peripheral_clock_config_s g_peripheral_clockconfig0[NUM_OF_PERIPHERAL_CLOCKS_0];
extern const struct peripheral_clock_config_s g_peripheral_clockconfig0[];
/****************************************************************************
* Public Function Prototypes

1
boards/nxp/mr-canhubk3/src/s32k3xx_clockconfig.c
View File

@ -156,7 +156,6 @@ const struct clock_configuration_s g_initial_clkconfig = {
},
.pcc =
{
.count = NUM_OF_PERIPHERAL_CLOCKS_0, /* Number of peripheral clock configurations */
.pclks = g_peripheral_clockconfig0, /* Peripheral clock configurations */
},
};

6
boards/nxp/mr-canhubk3/src/s32k3xx_periphclocks.c
View File

@ -41,7 +41,7 @@
* This is needed to establish the initial peripheral clocking.
*/
const struct peripheral_clock_config_s g_peripheral_clockconfig0[NUM_OF_PERIPHERAL_CLOCKS_0] = {
const struct peripheral_clock_config_s g_peripheral_clockconfig0[] = {
{
.clkname = FLEXCAN0_CLK,
#ifdef CONFIG_S32K3XX_FLEXCAN0
@ -260,6 +260,10 @@ const struct peripheral_clock_config_s g_peripheral_clockconfig0[NUM_OF_PERIPHER
},
};
unsigned int const num_of_peripheral_clocks_0 =
sizeof(g_peripheral_clockconfig0) /
sizeof(g_peripheral_clockconfig0[0]);
/****************************************************************************
* Public Functions
****************************************************************************/

5
boards/nxp/ucans32k146/src/board_config.h
View File

@ -88,11 +88,6 @@ __BEGIN_DECLS
/* SPI chip selects */
/* Count of peripheral clock user configurations */
#define NUM_OF_PERIPHERAL_CLOCKS_0 19
/* High-resolution timer */
#define HRT_TIMER 5 /* FTM timer for the HRT */
#define HRT_TIMER_CHANNEL 0 /* Use capture/compare channel 0 */

1
boards/nxp/ucans32k146/src/clockconfig.c
View File

@ -197,7 +197,6 @@ const struct clock_configuration_s g_initial_clkconfig = {
},
.pcc =
{
.count = NUM_OF_PERIPHERAL_CLOCKS_0, /* Number peripheral clock configurations */
.pclks = g_peripheral_clockconfig0, /* Peripheral clock configurations */
},
.pmc =

4
boards/nxp/ucans32k146/src/periphclocks.c
View File

@ -200,3 +200,7 @@ const struct peripheral_clock_config_s g_peripheral_clockconfig0[] = {
.clkgate = true,
},
};
unsigned int const num_of_peripheral_clocks_0 =
sizeof(g_peripheral_clockconfig0) /
sizeof(g_peripheral_clockconfig0[0]);

2
platforms/nuttx/NuttX/nuttx

@ -1 +1 @@
Subproject commit 1ee8fb827c570f302a43ca9870c58d1ac73997d3
Subproject commit 0db0836d95ad4360426644444119cbad5df96d1a