Don't do retries, since it just complicates things.

This commit is contained in:
px4dev
2013-01-13 19:04:59 -08:00
parent 7c7112a157
commit f12fa7ee06
+27 -32
View File
@@ -94,46 +94,41 @@ transfer(uint8_t address, uint8_t *send, unsigned send_len, uint8_t *recv, unsig
struct i2c_msg_s msgv[2]; struct i2c_msg_s msgv[2];
unsigned msgs; unsigned msgs;
int ret; int ret;
unsigned tries = 0;
do { // debug("transfer out %p/%u in %p/%u", send, send_len, recv, recv_len);
// debug("transfer out %p/%u in %p/%u", send, send_len, recv, recv_len);
msgs = 0; msgs = 0;
if (send_len > 0) { if (send_len > 0) {
msgv[msgs].addr = address; msgv[msgs].addr = address;
msgv[msgs].flags = 0; msgv[msgs].flags = 0;
msgv[msgs].buffer = send; msgv[msgs].buffer = send;
msgv[msgs].length = send_len; msgv[msgs].length = send_len;
msgs++; msgs++;
} }
if (recv_len > 0) { if (recv_len > 0) {
msgv[msgs].addr = address; msgv[msgs].addr = address;
msgv[msgs].flags = I2C_M_READ; msgv[msgs].flags = I2C_M_READ;
msgv[msgs].buffer = recv; msgv[msgs].buffer = recv;
msgv[msgs].length = recv_len; msgv[msgs].length = recv_len;
msgs++; msgs++;
} }
if (msgs == 0) if (msgs == 0)
return -1; return -1;
/* /*
* I2C architecture means there is an unavoidable race here * I2C architecture means there is an unavoidable race here
* if there are any devices on the bus with a different frequency * if there are any devices on the bus with a different frequency
* preference. Really, this is pointless. * preference. Really, this is pointless.
*/ */
I2C_SETFREQUENCY(i2c, 320000); I2C_SETFREQUENCY(i2c, 320000);
ret = I2C_TRANSFER(i2c, &msgv[0], msgs); ret = I2C_TRANSFER(i2c, &msgv[0], msgs);
if (ret == OK) // reset the I2C bus to unwedge on error
break; if (ret != OK)
// reset the I2C bus to unwedge on error
up_i2creset(i2c); up_i2creset(i2c);
} while (tries++ < 5);
return ret; return ret;
} }