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Manually fixup merge botches via direct comparison with NuttX r5447.

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This commit is contained in:
px4dev
2013-01-11 02:14:43 -08:00
parent 48c5d63319
commit f127495caa
428 changed files with 13932 additions and 3888 deletions
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Makefile
+4 -2
View File
@@ -28,7 +28,9 @@ UPLOADER = $(PX4BASE)/Tools/px_uploader.py
# What are we currently configured for?
#
CONFIGURED = $(PX4BASE)/.configured
ifneq ($(wildcard $(CONFIGURED)),)
export TARGET := $(shell cat $(CONFIGURED))
endif
#
# What we will build
@@ -40,8 +42,8 @@ FIRMWARE_PROTOTYPE = $(IMAGE_DIR)/$(TARGET).prototype
#
# Debugging
#
MQUIET = --no-print-directory
#MQUIET = --print-directory
#MQUIET = --no-print-directory
MQUIET = --print-directory
all: $(FIRMWARE_BUNDLE)
nuttx/COPYING
+51
View File
@@ -163,6 +163,57 @@ dtoa():
"This product includes software developed by the University of
California, Berkeley and its contributors."
libc/string/lib_vikmemcpy.c
^^^^^^^^^^^^^^^^^^^^^^^^^^^
If you enable CONFIG_MEMCPY_VIK, then you will build with the optimized
version of memcpy from Daniel Vik. Licensing information for that version
of memcpy() follows:
Copyright (C) 1999-2010 Daniel Vik
This software is provided 'as-is', without any express or implied
warranty. In no event will the authors be held liable for any
damages arising from the use of this software.
Permission is granted to anyone to use this software for any
purpose, including commercial applications, and to alter it and
redistribute it freely, subject to the following restrictions:
1. The origin of this software must not be misrepresented; you
must not claim that you wrote the original software. If you
use this software in a product, an acknowledgment in the
use this software in a product, an acknowledgment in the
product documentation would be appreciated but is not
required.
2. Altered source versions must be plainly marked as such, and
must not be misrepresented as being the original software.
3. This notice may not be removed or altered from any source
distribution.
libc/math
^^^^^^^^^
If you enable CONFIG_LIB, you will build the math library at libc/math.
This library was taken from the math library developed for the Rhombus
OS by Nick Johnson (https://github.com/nickbjohnson4224/rhombus). This
port was contributed by Darcy Gong. The Rhombus math library has this
compatible MIT license:
Copyright (C) 2009-2011 Nick Johnson <nickbjohnson4224 at gmail.com>
Permission to use, copy, modify, and distribute this software for any
purpose with or without fee is hereby granted, provided that the above
copyright notice and this permission notice appear in all copies.
THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
Documents/rss.gif
^^^^^^^^^^^^^^^^^
nuttx/Kconfig
+106 -6
View File
@@ -20,10 +20,75 @@ menu "Build Setup"
config EXPERIMENTAL
bool "Prompt for development and/or incomplete code/drivers"
choice
prompt "Build Host Platform"
default HOST_LINUX
config HOST_LINUX
bool "Linux"
config HOST_OSX
bool "OSX"
config HOST_WINDOWS
bool "Windows"
config HOST_OTHER
bool "Other"
endchoice
choice
prompt "Windows Build Environment"
default WINDOWS_CYGWIN
depends on HOST_WINDOWS
config WINDOWS_NATIVE
bool "Windows Native"
---help---
Build natively in a CMD.exe environment with Windows style paths (like C:\cgywin\home)
config WINDOWS_CYGWIN
bool "Cygwin"
- --help---
Build natively in a Cygwin environment with POSIX style paths (like /cygdrive/c/cgywin/home)
config WINDOWS_MSYS
bool "MSYS"
---help---
Build natively in a Cygwin environment with POSIX style paths (like /cygdrive/c/cgywin/home)
config WINDOWS_OTHER
bool "Windows POSIX-like environment"
---help---
Build natively in another POSIX-like environment. Additional support may be necessary
endchoice
config WINDOWS_MKLINK
bool "Use mklink"
default n
depends on WINDOWS_NATIVE
---help---
Use the mklink command to set up symbolic links when NuttX is
configured. Otherwise, configuration directories will be copied to
establish the configuration.
If directories are copied, then some confusion can result ("Which
version of the file did I modify?"). In that case, it is recommended
that you re-build using 'make clean_context all'. That will cause the
configured directories to be recopied on each build.
NOTE: This option also (1) that you have administrator privileges, (2)
that you are using Windows 2000 or better, and (3) that you are using
the NTFS file system. Select 'n' is that is not the case.
menu "Build Configuration"
config APPS_DIR
string "Application directory"
default "../apps"
default "../apps" if !WINDOWS_NATIVE
default "..\apps" if WINDOWS_NATIVE
---help---
Identifies the directory that builds the
application to link with NuttX. Default: ../apps This symbol must be assigned
@@ -192,6 +257,17 @@ config ARCH_MATH_H
that don't select ARCH_MATH_H, the redirecting math.h header file
will stay out-of-the-way in include/nuttx/.
config ARCH_FLOAT_H
bool "float.h"
default n
---help---
The float.h header file defines the properties of your floating
point implementation. It would always be best to use your
toolchain's float.h header file but if none is avaiable, a default
float.h header file will provided if this option is selected. However
there is no assurance that the settings in this float.h are actually
correct for your platform!
config ARCH_STDARG_H
bool "stdarg.h"
default n
@@ -244,17 +320,24 @@ config DEBUG_ENABLE
comment "Subsystem Debug Options"
config DEBUG_MM
bool "Enable Memory Manager Debug Output"
default n
---help---
Enable memory management debug output (disabled by default)
config DEBUG_SCHED
bool "Enable Scheduler Debug Output"
default n
---help---
Enable OS debug output (disabled by default)
config DEBUG_MM
bool "Enable Memory Manager Debug Output"
config DEBUG_PAGING
bool "Enable Demand Paging Debug Output"
default n
depends on PAGING
---help---
Enable memory management debug output (disabled by default)
Enable demand paging debug output (disabled by default)
config DEBUG_NET
bool "Enable Network Debug Output"
@@ -311,6 +394,13 @@ config DEBUG_INPUT
Enable low level debug output from the input device drivers such as
mice and touchscreens (disabled by default)
config DEBUG_ANALOG
bool "Enable Analog Device Debug Output"
default n
---help---
Enable low level debug output from the analog device drivers such as
A/D and D/A converters (disabled by default)
config DEBUG_I2C
bool "Enable I2C Debug Output"
default n
@@ -325,12 +415,18 @@ config DEBUG_SPI
---help---
Enable I2C driver debug output (disabled by default)
config DEBUG_DMA
bool "Enable DMA Debug Output"
default n
---help---
Enable DMA-releated debug output (disabled by default)
config DEBUG_WATCHDOG
bool "Enable Watchdog Timer Debug Output"
default n
depends on WATCHDOG
---help---
Enable watchdog timer debug output (disabled by default)
Enable watchdog timer debug output (disabled by default)
endif
@@ -375,8 +471,12 @@ menu "Memory Management"
source mm/Kconfig
endmenu
menu "Binary Formats"
source binfmt/Kconfig
endmenu
menu "Library Routines"
source lib/Kconfig
source libc/Kconfig
source libxx/Kconfig
endmenu
nuttx/Makefile
+12 -614
View File
@@ -1,7 +1,7 @@
############################################################################
# Makefile
#
# Copyright (C) 2007-2012 Gregory Nutt. All rights reserved.
# Copyright (C) 2012 Gregory Nutt. All rights reserved.
# Author: Gregory Nutt <gnutt@nuttx.org>
#
# Redistribution and use in source and binary forms, with or without
@@ -33,619 +33,17 @@
#
############################################################################
TOPDIR := ${shell pwd | sed -e 's/ /\\ /g'}
-include ${TOPDIR}/.config
-include ${TOPDIR}/tools/Config.mk
-include ${TOPDIR}/Make.defs
# This is a top-level "kludge" Makefile that just includes the correct
# Makefile. If you already know the Makefile that you want, you can skip
# this nonsense using:
#
# make -f Makefile.unix, OR
# make -f Makefile.win
#
# Control build verbosity
ifeq ($(V),1)
export Q :=
-include .config
ifeq ($(CONFIG_WINDOWS_NATIVE),y)
include Makefile.win
else
export Q := @
include Makefile.unix
endif
# Default tools
ifeq ($(DIRLINK),)
DIRLINK = $(TOPDIR)/tools/link.sh
DIRUNLINK = $(TOPDIR)/tools/unlink.sh
endif
# This define is passed as EXTRADEFINES for kernel-mode builds. It is also passed
# during PASS1 (but not PASS2) context and depend targets.
KDEFINE = ${shell $(TOPDIR)/tools/define.sh $(CC) __KERNEL__}
# Process architecture and board-specific directories
ARCH_DIR = arch/$(CONFIG_ARCH)
ARCH_SRC = $(ARCH_DIR)/src
ARCH_INC = $(ARCH_DIR)/include
BOARD_DIR = configs/$(CONFIG_ARCH_BOARD)
# Add-on directories. These may or may not be in place in the
# NuttX source tree (they must be specifically installed)
#
# CONFIG_APPS_DIR can be over-ridden from the command line or in the .config file.
# The default value of CONFIG_APPS_DIR is ../apps. Ultimately, the application
# will be built if APPDIR is defined. APPDIR will be defined if a directory containing
# a Makefile is found at the path provided by CONFIG_APPS_DIR
ifeq ($(CONFIG_APPS_DIR),)
CONFIG_APPS_DIR = ../apps
endif
APPDIR := ${shell if [ -r $(CONFIG_APPS_DIR)/Makefile ]; then echo "$(CONFIG_APPS_DIR)"; fi}
# All add-on directories.
#
# NUTTX_ADDONS is the list of directories built into the NuttX kernel.
# USER_ADDONS is the list of directories that will be built into the user application
NUTTX_ADDONS := $(NX_DIR)
USER_ADDONS :=
ifeq ($(CONFIG_NUTTX_KERNEL),y)
USER_ADDONS += $(APPDIR)
else
NUTTX_ADDONS += $(APPDIR)
endif
# Lists of build directories.
#
# FSDIRS depend on file descriptor support; NONFSDIRS do not (except for parts
# of FSDIRS). We will exclude FSDIRS from the build if file descriptor
# support is disabled
# CONTEXTDIRS include directories that have special, one-time pre-build
# requirements. Normally this includes things like auto-generation of
# configuration specific files or creation of configurable symbolic links
# USERDIRS - When NuttX is build is a monolithic kernel, this provides the
# list of directories that must be built
# OTHERDIRS - These are directories that are not built but probably should
# be cleaned to prevent garbarge from collecting in them when changing
# configurations.
NONFSDIRS = sched $(ARCH_SRC) $(NUTTX_ADDONS)
FSDIRS = fs drivers binfmt
CONTEXTDIRS = $(APPDIR)
USERDIRS =
ifeq ($(CONFIG_NUTTX_KERNEL),y)
NONFSDIRS += syscall
CONTEXTDIRS += syscall
USERDIRS += syscall lib mm $(USER_ADDONS)
ifeq ($(CONFIG_HAVE_CXX),y)
USERDIRS += libxx
endif
else
NONFSDIRS += lib mm
OTHERDIRS += syscall $(USER_ADDONS)
ifeq ($(CONFIG_HAVE_CXX),y)
NONFSDIRS += libxx
else
OTHERDIRS += libxx
endif
endif
ifeq ($(CONFIG_NX),y)
NONFSDIRS += graphics
CONTEXTDIRS += graphics
else
OTHERDIRS += graphics
endif
# CLEANDIRS are the directories that will clean in. These are
# all directories that we know about.
# KERNDEPDIRS are the directories in which we will build target dependencies.
# If NuttX and applications are built separately (CONFIG_NUTTX_KERNEL),
# then this holds only the directories containing kernel files.
# USERDEPDIRS. If NuttX and applications are built separately (CONFIG_NUTTX_KERNEL),
# then this holds only the directories containing user files.
CLEANDIRS = $(NONFSDIRS) $(FSDIRS) $(USERDIRS) $(OTHERDIRS)
KERNDEPDIRS = $(NONFSDIRS)
USERDEPDIRS = $(USERDIRS)
# Add file system directories to KERNDEPDIRS (they are already in CLEANDIRS)
ifeq ($(CONFIG_NFILE_DESCRIPTORS),0)
ifeq ($(CONFIG_NET),y)
ifneq ($(CONFIG_NSOCKET_DESCRIPTORS),0)
KERNDEPDIRS += fs
endif
KERNDEPDIRS += drivers
endif
else
KERNDEPDIRS += $(FSDIRS)
endif
# Add networking directories to KERNDEPDIRS and CLEANDIRS
ifeq ($(CONFIG_NET),y)
KERNDEPDIRS += net
endif
CLEANDIRS += net
#
# Extra objects used in the final link.
#
# Pass 1 1ncremental (relative) link objects should be put into the
# processor-specific source directory (where other link objects will
# be created). If the pass1 obect is an archive, it could go anywhere.
ifeq ($(CONFIG_BUILD_2PASS),y)
EXTRA_OBJS += $(CONFIG_PASS1_OBJECT)
endif
# NUTTXLIBS is the list of NuttX libraries that is passed to the
# processor-specific Makefile to build the final NuttX target.
# Libraries in FSDIRS are excluded if file descriptor support
# is disabled.
# USERLIBS is the list of libraries used to build the final user-space
# application
NUTTXLIBS = sched/libsched$(LIBEXT) $(ARCH_SRC)/libarch$(LIBEXT)
USERLIBS =
# Add libraries for syscall support. The C library will be needed by
# both the kernel- and user-space builds. For now, the memory manager (mm)
# is placed in user space (only).
ifeq ($(CONFIG_NUTTX_KERNEL),y)
NUTTXLIBS += syscall/libstubs$(LIBEXT) lib/libklib$(LIBEXT)
USERLIBS += syscall/libproxies$(LIBEXT) lib/libulib$(LIBEXT) mm/libmm$(LIBEXT)
else
NUTTXLIBS += mm/libmm$(LIBEXT) lib/liblib$(LIBEXT)
endif
# Add libraries for C++ support. CXX, CXXFLAGS, and COMPILEXX must
# be defined in Make.defs for this to work!
ifeq ($(CONFIG_HAVE_CXX),y)
ifeq ($(CONFIG_NUTTX_KERNEL),y)
USERLIBS += libxx/liblibxx$(LIBEXT)
else
NUTTXLIBS += libxx/liblibxx$(LIBEXT)
endif
endif
# Add library for application support.
ifneq ($(APPDIR),)
ifeq ($(CONFIG_NUTTX_KERNEL),y)
USERLIBS += $(APPDIR)/libapps$(LIBEXT)
else
NUTTXLIBS += $(APPDIR)/libapps$(LIBEXT)
endif
endif
# Add libraries for network support
ifeq ($(CONFIG_NET),y)
NUTTXLIBS += net/libnet$(LIBEXT)
endif
# Add libraries for file system support
ifeq ($(CONFIG_NFILE_DESCRIPTORS),0)
ifneq ($(CONFIG_NSOCKET_DESCRIPTORS),0)
NUTTXLIBS += fs/libfs$(LIBEXT)
endif
ifeq ($(CONFIG_NET),y)
NUTTXLIBS += drivers/libdrivers$(LIBEXT)
endif
else
NUTTXLIBS += fs/libfs$(LIBEXT) drivers/libdrivers$(LIBEXT) binfmt/libbinfmt$(LIBEXT)
endif
# Add libraries for the NX graphics sub-system
ifneq ($(NX_DIR),)
NUTTXLIBS += $(NX_DIR)/libnx$(LIBEXT)
endif
ifeq ($(CONFIG_NX),y)
NUTTXLIBS += graphics/libgraphics$(LIBEXT)
endif
# This is the name of the final target (relative to the top level directorty)
BIN = nuttx$(EXEEXT)
all: $(BIN)
.PHONY: context clean_context check_context export subdir_clean clean subdir_distclean distclean apps_clean apps_distclean
# Target used to copy include/nuttx/math.h. If CONFIG_ARCH_MATH_H is
# defined, then there is an architecture specific math.h header file
# that will be included indirectly from include/math.h. But first, we
# have to copy math.h from include/nuttx/. to include/.
ifeq ($(CONFIG_ARCH_MATH_H),y)
include/math.h: include/nuttx/math.h
@cp -f include/nuttx/math.h include/math.h
else
include/math.h:
endif
# Target used to copy include/nuttx/stdarg.h. If CONFIG_ARCH_STDARG_H is
# defined, then there is an architecture specific stdarg.h header file
# that will be included indirectly from include/stdarg.h. But first, we
# have to copy stdarg.h from include/nuttx/. to include/.
ifeq ($(CONFIG_ARCH_STDARG_H),y)
include/stdarg.h: include/nuttx/stdarg.h
@cp -f include/nuttx/stdarg.h include/stdarg.h
else
include/stdarg.h:
endif
# Targets used to build include/nuttx/version.h. Creation of version.h is
# part of the overall NuttX configuration sequence. Notice that the
# tools/mkversion tool is built and used to create include/nuttx/version.h
tools/mkversion:
@$(MAKE) -C tools -f Makefile.host TOPDIR="$(TOPDIR)" mkversion
$(TOPDIR)/.version:
@if [ ! -f .version ]; then \
echo "No .version file found, creating one"; \
tools/version.sh -v 0.0 -b 0 .version; \
chmod 755 .version; \
fi
include/nuttx/version.h: $(TOPDIR)/.version tools/mkversion
@tools/mkversion $(TOPDIR) > include/nuttx/version.h
# Targets used to build include/nuttx/config.h. Creation of config.h is
# part of the overall NuttX configuration sequence. Notice that the
# tools/mkconfig tool is built and used to create include/nuttx/config.h
tools/mkconfig:
@$(MAKE) -C tools -f Makefile.host TOPDIR="$(TOPDIR)" mkconfig
include/nuttx/config.h: $(TOPDIR)/.config tools/mkconfig
@tools/mkconfig $(TOPDIR) > include/nuttx/config.h
# dirlinks, and helpers
#
# Directories links. Most of establishing the NuttX configuration involves
# setting up symbolic links with 'generic' directory names to specific,
# configured directories.
#
# Link the apps/include directory to include/apps
include/apps: Make.defs
ifneq ($(APPDIR),)
@if [ -d $(TOPDIR)/$(APPDIR)/include ]; then \
$(DIRLINK) $(TOPDIR)/$(APPDIR)/include include/apps; \
fi
endif
# Link the arch/<arch-name>/include directory to include/arch
include/arch: Make.defs
@$(DIRLINK) $(TOPDIR)/$(ARCH_DIR)/include include/arch
# Link the configs/<board-name>/include directory to include/arch/board
include/arch/board: include/arch Make.defs include/arch
@$(DIRLINK) $(TOPDIR)/$(BOARD_DIR)/include include/arch/board
# Link the configs/<board-name>/src dir to arch/<arch-name>/src/board
$(ARCH_SRC)/board: Make.defs
@$(DIRLINK) $(TOPDIR)/$(BOARD_DIR)/src $(ARCH_SRC)/board
# Link arch/<arch-name>/include/<chip-name> to arch/<arch-name>/include/chip
$(ARCH_SRC)/chip: Make.defs
ifneq ($(CONFIG_ARCH_CHIP),)
@$(DIRLINK) $(TOPDIR)/$(ARCH_SRC)/$(CONFIG_ARCH_CHIP) $(ARCH_SRC)/chip
endif
# Link arch/<arch-name>/src/<chip-name> to arch/<arch-name>/src/chip
include/arch/chip: include/arch Make.defs
ifneq ($(CONFIG_ARCH_CHIP),)
@$(DIRLINK) $(TOPDIR)/$(ARCH_INC)/$(CONFIG_ARCH_CHIP) include/arch/chip
endif
dirlinks: include/arch include/arch/board include/arch/chip $(ARCH_SRC)/board $(ARCH_SRC)/chip include/apps
# context
#
# The context target is invoked on each target build to assure that NuttX is
# properly configured. The basic configuration steps include creation of the
# the config.h and version.h header files in the include/nuttx directory and
# the establishment of symbolic links to configured directories.
context: check_context include/nuttx/config.h include/nuttx/version.h include/math.h include/stdarg.h dirlinks
@for dir in $(CONTEXTDIRS) ; do \
$(MAKE) -C $$dir TOPDIR="$(TOPDIR)" context; \
done
# clean_context
#
# This is part of the distclean target. It removes all of the header files
# and symbolic links created by the context target.
clean_context:
@rm -f include/nuttx/config.h
@rm -f include/nuttx/version.h
@rm -f include/math.h
@rm -f include/stdarg.h
@$(DIRUNLINK) include/arch/board
@$(DIRUNLINK) include/arch/chip
@$(DIRUNLINK) include/arch
@$(DIRUNLINK) $(ARCH_SRC)/board
@$(DIRUNLINK) $(ARCH_SRC)/chip
@$(DIRUNLINK) include/apps
# check_context
#
# This target checks if NuttX has been configured. NuttX is configured using
# the script tools/configure.sh. That script will install certain files in
# the top-level NuttX build directory. This target verifies that those
# configuration files have been installed and that NuttX is ready to be built.
check_context:
@if [ ! -e ${TOPDIR}/.config -o ! -e ${TOPDIR}/Make.defs ]; then \
echo "" ; echo "Nuttx has not been configured:" ; \
echo " cd tools; ./configure.sh <target>" ; echo "" ; \
exit 1 ; \
fi
# Archive targets. The target build sequency will first create a series of
# libraries, one per configured source file directory. The final NuttX
# execution will then be built from those libraries. The following targets
# built those libraries.
#
# Possible kernel-mode builds
lib/libklib$(LIBEXT): context
@$(MAKE) -C lib TOPDIR="$(TOPDIR)" libklib$(LIBEXT) EXTRADEFINES=$(KDEFINE)
sched/libsched$(LIBEXT): context
@$(MAKE) -C sched TOPDIR="$(TOPDIR)" libsched$(LIBEXT) EXTRADEFINES=$(KDEFINE)
$(ARCH_SRC)/libarch$(LIBEXT): context
@$(MAKE) -C $(ARCH_SRC) TOPDIR="$(TOPDIR)" libarch$(LIBEXT) EXTRADEFINES=$(KDEFINE)
net/libnet$(LIBEXT): context
@$(MAKE) -C net TOPDIR="$(TOPDIR)" libnet$(LIBEXT) EXTRADEFINES=$(KDEFINE)
fs/libfs$(LIBEXT): context
@$(MAKE) -C fs TOPDIR="$(TOPDIR)" libfs$(LIBEXT) EXTRADEFINES=$(KDEFINE)
drivers/libdrivers$(LIBEXT): context
@$(MAKE) -C drivers TOPDIR="$(TOPDIR)" libdrivers$(LIBEXT) EXTRADEFINES=$(KDEFINE)
binfmt/libbinfmt$(LIBEXT): context
@$(MAKE) -C binfmt TOPDIR="$(TOPDIR)" libbinfmt$(LIBEXT) EXTRADEFINES=$(KDEFINE)
graphics/libgraphics$(LIBEXT): context
@$(MAKE) -C graphics TOPDIR="$(TOPDIR)" libgraphics$(LIBEXT) EXTRADEFINES=$(KDEFINE)
syscall/libstubs$(LIBEXT): context
@$(MAKE) -C syscall TOPDIR="$(TOPDIR)" libstubs$(LIBEXT) EXTRADEFINES=$(KDEFINE)
# Possible user-mode builds
lib/libulib$(LIBEXT): context
@$(MAKE) -C lib TOPDIR="$(TOPDIR)" libulib$(LIBEXT)
libxx/liblibxx$(LIBEXT): context
@$(MAKE) -C libxx TOPDIR="$(TOPDIR)" liblibxx$(LIBEXT)
mm/libmm$(LIBEXT): context
@$(MAKE) -C mm TOPDIR="$(TOPDIR)" libmm$(LIBEXT) EXTRADEFINES=$(KDEFINE)
$(APPDIR)/libapps$(LIBEXT): context
@$(MAKE) -C $(APPDIR) TOPDIR="$(TOPDIR)" libapps$(LIBEXT)
syscall/libproxies$(LIBEXT): context
@$(MAKE) -C syscall TOPDIR="$(TOPDIR)" libproxies$(LIBEXT)
# Possible non-kernel builds
lib/liblib$(LIBEXT): context
@$(MAKE) -C lib TOPDIR="$(TOPDIR)" liblib$(LIBEXT)
# pass1 and pass2
#
# If the 2 pass build option is selected, then this pass1 target is
# configured to built before the pass2 target. This pass1 target may, as an
# example, build an extra link object (CONFIG_PASS1_OBJECT) which may be an
# incremental (relative) link object, but could be a static library (archive);
# some modification to this Makefile would be required if CONFIG_PASS1_OBJECT
# is an archive. Exactly what is performed during pass1 or what it generates
# is unknown to this makefule unless CONFIG_PASS1_OBJECT is defined.
pass1deps: context pass1dep $(USERLIBS)
pass1: pass1deps
ifeq ($(CONFIG_BUILD_2PASS),y)
@if [ -z "$(CONFIG_PASS1_BUILDIR)" ]; then \
echo "ERROR: CONFIG_PASS1_BUILDIR not defined"; \
exit 1; \
fi
@if [ ! -d "$(CONFIG_PASS1_BUILDIR)" ]; then \
echo "ERROR: CONFIG_PASS1_BUILDIR does not exist"; \
exit 1; \
fi
@if [ ! -f "$(CONFIG_PASS1_BUILDIR)/Makefile" ]; then \
echo "ERROR: No Makefile in CONFIG_PASS1_BUILDIR"; \
exit 1; \
fi
@$(MAKE) -C $(CONFIG_PASS1_BUILDIR) TOPDIR="$(TOPDIR)" LINKLIBS="$(NUTTXLIBS)" USERLIBS="$(USERLIBS)" "$(CONFIG_PASS1_TARGET)"
endif
pass2deps: context pass2dep $(NUTTXLIBS)
pass2: pass2deps
@$(MAKE) -C $(ARCH_SRC) TOPDIR="$(TOPDIR)" EXTRA_OBJS="$(EXTRA_OBJS)" LINKLIBS="$(NUTTXLIBS)" EXTRADEFINES=$(KDEFINE) $(BIN)
@if [ -w /tftpboot ] ; then \
cp -f $(BIN) /tftpboot/$(BIN).${CONFIG_ARCH}; \
fi
ifeq ($(CONFIG_RRLOAD_BINARY),y)
@echo "MK: $(BIN).rr"
@$(TOPDIR)/tools/mkimage.sh --Prefix $(CROSSDEV) $(BIN) $(BIN).rr
@if [ -w /tftpboot ] ; then \
cp -f $(BIN).rr /tftpboot/$\(BIN).rr.$(CONFIG_ARCH); \
fi
endif
ifeq ($(CONFIG_INTELHEX_BINARY),y)
@echo "CP: $(BIN).hex"
@$(OBJCOPY) $(OBJCOPYARGS) -O ihex $(BIN) $(BIN).hex
endif
ifeq ($(CONFIG_MOTOROLA_SREC),y)
@echo "CP: $(BIN).srec"
@$(OBJCOPY) $(OBJCOPYARGS) -O srec $(BIN) $(BIN).srec
endif
ifeq ($(CONFIG_RAW_BINARY),y)
@echo "CP: $(BIN).bin"
@$(OBJCOPY) $(OBJCOPYARGS) -O binary $(BIN) $(BIN).bin
endif
# $(BIN)
#
# Create the final NuttX executable in a two pass build process. In the
# normal case, all pass1 and pass2 dependencies are created then pass1
# and pass2 targets are built. However, in some cases, you may need to build
# pass1 depenencies and pass1 first, then build pass2 dependencies and pass2.
# in that case, execute 'make pass1 pass2' from the command line.
$(BIN): pass1deps pass2deps pass1 pass2
# download
#
# This is a helper target that will rebuild NuttX and download it to the target
# system in one step. The operation of this target depends completely upon
# implementation of the DOWNLOAD command in the user Make.defs file. It will
# generate an error an error if the DOWNLOAD command is not defined.
download: $(BIN)
$(call DOWNLOAD, $<)
# pass1dep: Create pass1 build dependencies
# pass2dep: Create pass2 build dependencies
pass1dep: context
@for dir in $(USERDEPDIRS) ; do \
$(MAKE) -C $$dir TOPDIR="$(TOPDIR)" depend ; \
done
pass2dep: context
@for dir in $(KERNDEPDIRS) ; do \
$(MAKE) -C $$dir TOPDIR="$(TOPDIR)" EXTRADEFINES=$(KDEFINE) depend; \
done
# Configuration targets
#
# These targets depend on the kconfig-frontends packages. To use these, you
# must first download and install the kconfig-frontends package from this
# location: http://ymorin.is-a-geek.org/projects/kconfig-frontends. See
# misc/tools/README.txt for additional information.
config:
@APPSDIR=${CONFIG_APPS_DIR} conf Kconfig
oldconfig:
@APPSDIR=${CONFIG_APPS_DIR} conf --oldconfig Kconfig
menuconfig:
@APPSDIR=${CONFIG_APPS_DIR} mconf Kconfig
# export
#
# The export target will package the NuttX libraries and header files into
# an exportable package. Caveats: (1) These needs some extension for the KERNEL
# build; it needs to receive USERLIBS and create a libuser.a). (2) The logic
# in tools/mkexport.sh only supports GCC and, for example, explicitly assumes
# that the archiver is 'ar'
export: pass2deps
@tools/mkexport.sh -w$(WINTOOL) -t "$(TOPDIR)" -l "$(NUTTXLIBS)"
# General housekeeping targets: dependencies, cleaning, etc.
#
# depend: Create both PASS1 and PASS2 dependencies
# clean: Removes derived object files, archives, executables, and
# temporary files, but retains the configuration and context
# files and directories.
# distclean: Does 'clean' then also removes all configuration and context
# files. This essentially restores the directory structure
# to its original, unconfigured stated.
depend: pass1dep pass2dep
subdir_clean:
@for dir in $(CLEANDIRS) ; do \
if [ -e $$dir/Makefile ]; then \
$(MAKE) -C $$dir TOPDIR="$(TOPDIR)" clean ; \
fi \
done
@$(MAKE) -C tools -f Makefile.host TOPDIR="$(TOPDIR)" clean
@$(MAKE) -C mm -f Makefile.test TOPDIR="$(TOPDIR)" clean
ifeq ($(CONFIG_BUILD_2PASS),y)
@$(MAKE) -C $(CONFIG_PASS1_BUILDIR) TOPDIR="$(TOPDIR)" clean
endif
clean: subdir_clean
@rm -f $(BIN) nuttx.* mm_test *.map _SAVED_APPS_config *~
@rm -f nuttx-export*
subdir_distclean:
@for dir in $(CLEANDIRS) ; do \
if [ -e $$dir/Makefile ]; then \
$(MAKE) -C $$dir TOPDIR="$(TOPDIR)" distclean ; \
fi \
done
distclean: clean subdir_distclean clean_context
ifeq ($(CONFIG_BUILD_2PASS),y)
@$(MAKE) -C $(CONFIG_PASS1_BUILDIR) TOPDIR="$(TOPDIR)" distclean
endif
@rm -f Make.defs setenv.sh .config .config.old
# Application housekeeping targets. The APPDIR variable refers to the user
# application directory. A sample apps/ directory is included with NuttX,
# however, this is not treated as part of NuttX and may be replaced with a
# different application directory. For the most part, the application
# directory is treated like any other build directory in this script. However,
# as a convenience, the following targets are included to support housekeeping
# functions in the user application directory from the NuttX build directory.
#
# apps_clean: Perform the clean operation only in the user application
# directory
# apps_distclean: Perform the distclean operation only in the user application
# directory. Note that the apps/.config file (inf any) is
# preserved so that this is not a "full" distclean but more of a
# configuration "reset." (There willnot be an apps/.config
# file if the configuration was generated via make menuconfig).
apps_clean:
ifneq ($(APPDIR),)
@$(MAKE) -C "$(TOPDIR)/$(APPDIR)" TOPDIR="$(TOPDIR)" clean
endif
apps_distclean:
ifneq ($(APPDIR),)
@if [ -r "$(TOPDIR)/$(APPDIR)/.config" ]; then \
cp "$(TOPDIR)/$(APPDIR)/.config" _SAVED_APPS_config || \
{ echo "Copy of $(APPDIR)/.config failed" ; exit 1 ; } \
else \
rm -f _SAVED_APPS_config; \
fi
@$(MAKE) -C "$(TOPDIR)/$(APPDIR)" TOPDIR="$(TOPDIR)" distclean
@if [ -r _SAVED_APPS_config ]; then \
@mv _SAVED_APPS_config "$(TOPDIR)/$(APPDIR)/.config" || \
{ echo "Copy of _SAVED_APPS_config failed" ; exit 1 ; } \
fi
endif
nuttx/TODO
+23 -32
View File
@@ -14,8 +14,8 @@ nuttx/
(2) C++ Support
(6) Binary loaders (binfmt/)
(17) Network (net/, drivers/net)
(3) USB (drivers/usbdev, drivers/usbhost)
(11) Libraries (lib/)
(4) USB (drivers/usbdev, drivers/usbhost)
(11) Libraries (libc/, )
(9) File system/Generic drivers (fs/, drivers/)
(5) Graphics subystem (graphics/)
(1) Pascal add-on (pcode/)
@@ -32,7 +32,7 @@ nuttx/
(0) ARM/LPC43x (arch/arm/src/lpc43xx/)
(3) ARM/STR71x (arch/arm/src/str71x/)
(3) ARM/LM3S6918 (arch/arm/src/lm3s/)
(7) ARM/STM32 (arch/arm/src/stm32/)
(4) ARM/STM32 (arch/arm/src/stm32/)
(3) AVR (arch/avr)
(0) Intel x86 (arch/x86)
(5) 8051 / MCS51 (arch/8051/)
@@ -421,7 +421,7 @@ o Binary loaders (binfmt/)
.word .LC3-(.LPIC4+4)
.word .LC4-(.LPIC5+4)
This is good and bad. This is good because it means that .rodata.str1.1 can not
This is good and bad. This is good because it means that .rodata.str1.1 can now
reside in FLASH with .text and can be accessed using PC-relative addressing.
That can be accomplished by simply moving the .rodata from the .data section to
the .text section in the linker script. (The NXFLAT linker script is located at
@@ -629,8 +629,13 @@ o USB (drivers/usbdev, drivers/usbhost)
CDC/ACM serial driver might need the line coding data (that
data is not used currenly, but it might be).
o Libraries (lib/)
^^^^^^^^^^^^^^^^
Title: USB HUB SUPPORT
Description: Add support for USB hubs
Status: Open
Priority: Low/Unknown. This is a feature enhancement.
o Libraries (libc/)
^^^^^^^^^^^^^^^^^
Title: ENVIRON
Description: The definition of environ in stdlib.h is bogus and will not
@@ -643,7 +648,7 @@ o Libraries (lib/)
Description: Need some minimal termios support... at a minimum, enough to
switch between raw and "normal" modes to support behavior like
that needed for readline().
UPDATE: There is growing functionality in lib/termios/ and in the
UPDATE: There is growing functionality in libc/termios/ and in the
ioctl methods of several MCU serial drivers (stm32, lpc43, lpc17,
pic32). However, as phrased, this bug cannot yet be closed since
this "growing functionality" does not address all termios.h
@@ -708,7 +713,7 @@ o Libraries (lib/)
Priority:
Title: OLD dtoa NEEDS TO BE UPDATED
Description: This implementation of dtoa in lib/stdio is old and will not
Description: This implementation of dtoa in libc/stdio is old and will not
work with some newer compilers. See
http://patrakov.blogspot.com/2009/03/dont-use-old-dtoac.html
Status: Open
@@ -716,7 +721,7 @@ o Libraries (lib/)
Title: SYSLOG INTEGRATION
Description: There are the beginnings of some system logging capabilities (see
drivers/syslog, fs/fs_syslog.c, and lib/stdio/lib_librawprintf.c and
drivers/syslog, fs/fs_syslog.c, and libc/stdio/lib_librawprintf.c and
lib_liblowprintf.c. For NuttX, SYSLOG is a concept and includes,
extends, and replaces the legacy NuttX debug ouput. Some additional
integration is required to formalized this. For example:
@@ -960,7 +965,7 @@ o Build system
built configuration, only the multiple user mode can be supported
with the NX server residing inside of the kernel space. In
this case, most of the user end functions in graphics/nxmu
must be moved to lib/nx and those functions must be built into
must be moved to libc/nx and those functions must be built into
libuser.a to be linked with the user-space code.
A similar issue exists in NSH that uses some internal OS
interfaces that would not be available in a kernel build
@@ -1393,11 +1398,6 @@ o ARM/LM3S6918 (arch/arm/src/lm3s/)
o ARM/STM32 (arch/arm/src/stm32/)
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Title: NOR FLASH DRIVER
Description: NOR Flash driver with FTL layer to support a file system.
Status: Open
Priority: Low
Title: USBSERIAL ISSUES
Description A USB device-side driver is in place but not well tested. At
present, the apps/examples/usbserial test sometimes fails. The situation
@@ -1420,11 +1420,6 @@ o ARM/STM32 (arch/arm/src/stm32/)
Status: Open
Priority: Medium-High
Title: FSMC EXTERNAL MEMORY UNTESTED
Description: FSMC external memory support is untested
Status: Open
Priority: Low
Title: DMA EXTENSIONS
Description: DMA logic needs to be extended. DMA2, Channel 5, will not work
because the DMA2 channels 4 & 5 share the same interrupt.
@@ -1432,12 +1427,6 @@ o ARM/STM32 (arch/arm/src/stm32/)
Priority: Low until someone needs DMA1, Channel 5 (ADC3, UART4_TX, TIM5_CH1, or
TIM8_CH2).
Title: UNFINISHED DRIVERS
Description: The following drivers are incomplete: DAC. The following drivers
are untested: DMA on the F4, CAN.
Status: Open
Priority: Medium
Title: F4 SDIO MULTI-BLOCK TRANSFER FAILURES
Description: If you use a large I/O buffer to access the file system, then the
MMCSD driver will perform multiple block SD transfers. With DMA
@@ -1461,13 +1450,15 @@ o ARM/STM32 (arch/arm/src/stm32/)
Status: Open
Priority: Low (I am not even sure if this is a problem yet).
Status: UNFINISHED STM32 F4 OTG FS HOST DRIVER
Description: A quick-n-dirty leverage of the the LPC17xx host driver was put into
the STM32 source to support development of the STM32 F4 OTG FS host
driver. It is non-functional and still waiting for STM32 F4 logic
to be added. Don't use it!
Title: DMA FROM EXTERNAL, FSMC MEMORY
Description: I have seen a problem on F1 where all SDIO DMAs work exist for
write DMAs from FSMC memory (i.e., from FSMC memory to SDIO).
Read transfers work fine (SDIO to FSMC memory). The failure is
a data underrun error with zero bytes of data transferred. The
workaround for now is to use DMA buffers allocted from internal
SRAM.
Status: Open
Priority: Low (unless you need a host driver).
Priority: Low
o AVR (arch/avr)
^^^^^^^^^^^^^^
nuttx/arch/arm/include/elf.h
+243
View File
@@ -0,0 +1,243 @@
/****************************************************************************
* arch/arm/include/syscall.h
*
* Copyright (C) 2012 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Reference: "ELF for the ARM® Architecture," ARM IHI 0044D, current through
* ABI release 2.08, October 28, 2009, ARM Limited.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
#ifndef __ARCH_ARM_INCLUDE_ELF_H
#define __ARCH_ARM_INCLUDE_ELF_H
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* 4.3.1 ELF Identification. Should have:
*
* e_machine = EM_ARM
* e_ident[EI_CLASS] = ELFCLASS32
* e_ident[EI_DATA] = ELFDATA2LSB (little endian) or ELFDATA2MSB (big endian)
*/
#if 0 /* Defined in include/elf32.h */
#define EM_ARM 40
#endif
/* Table 4-2, ARM-specific e_flags */
#define EF_ARM_EABI_MASK 0xff000000
#define EF_ARM_EABI_UNKNOWN 0x00000000
#define EF_ARM_EABI_VER1 0x01000000
#define EF_ARM_EABI_VER2 0x02000000
#define EF_ARM_EABI_VER3 0x03000000
#define EF_ARM_EABI_VER4 0x04000000
#define EF_ARM_EABI_VER5 0x05000000
#define EF_ARM_BE8 0x00800000
/* Table 4-4, Processor specific section types */
#define SHT_ARM_EXIDX 0x70000001 /* Exception Index table */
#define SHT_ARM_PREEMPTMAP 0x70000002 /* BPABI DLL dynamic linking pre-emption map */
#define SHT_ARM_ATTRIBUTES 0x70000003 /* Object file compatibility attributes */
#define SHT_ARM_DEBUGOVERLAY 0x70000004
#define SHT_ARM_OVERLAYSECTION 0x70000005
/* 4.7.1 Relocation codes
*
* S (when used on its own) is the address of the symbol.
* A is the addend for the relocation.
* P is the address of the place being relocated (derived from r_offset).
* Pa is the adjusted address of the place being relocated, defined as (P & 0xFFFFFFFC).
* T is 1 if the target symbol S has type STT_FUNC and the symbol addresses a Thumb instruction;
* it is 0 otherwise.
* B(S) is the addressing origin of the output segment defining the symbol S.
* GOT_ORG is the addressing origin of the Global Offset Table
* GOT(S) is the address of the GOT entry for the symbol S.
*/
#define R_ARM_NONE 0 /* No relocation */
#define R_ARM_PC24 1 /* ARM ((S + A) | T) - P */
#define R_ARM_ABS32 2 /* Data (S + A) | T */
#define R_ARM_REL32 3 /* Data ((S + A) | T) - P */
#define R_ARM_LDR_PC_G0 4 /* ARM S + A - P */
#define R_ARM_ABS16 5 /* Data S + A */
#define R_ARM_ABS12 6 /* ARM S + A */
#define R_ARM_THM_ABS5 7 /* Thumb16 S + A */
#define R_ARM_ABS8 8 /* Data S + A */
#define R_ARM_SBREL32 9 /* Data ((S + A) | T) - B(S) */
#define R_ARM_THM_CALL 10 /* Thumb32 ((S + A) | T) - P */
#define R_ARM_THM_PC8 11 /* Thumb16 S + A - Pa */
#define R_ARM_BREL_ADJ 12 /* Data ?B(S) + A */
#define R_ARM_TLS_DESC 13 /* Data */
#define R_ARM_THM_SWI8 14 /* Obsolete */
#define R_ARM_XPC25 15 /* Obsolete */
#define R_ARM_THM_XPC22 16 /* Obsolete */
#define R_ARM_TLS_DTPMOD32 17 /* Data Module[S] */
#define R_ARM_TLS_DTPOFF32 18 /* Data S + A - TLS */
#define R_ARM_TLS_TPOFF32 19 /* Data S + A - tp */
#define R_ARM_COPY 20 /* Miscellaneous */
#define R_ARM_GLOB_DAT 21 /* Data (S + A) | T */
#define R_ARM_JUMP_SLOT 22 /* Data (S + A) | T */
#define R_ARM_RELATIVE 23 /* Data B(S) + A */
#define R_ARM_GOTOFF32 24 /* Data ((S + A) | T) - GOT_ORG */
#define R_ARM_BASE_PREL 25 /* Data B(S) + A - P */
#define R_ARM_GOT_BREL 26 /* Data GOT(S) + A - GOT_ORG */
#define R_ARM_PLT32 27 /* ARM ((S + A) | T) - P */
#define R_ARM_CALL 28 /* ARM ((S + A) | T) - P */
#define R_ARM_JUMP24 29 /* ARM ((S + A) | T) - P */
#define R_ARM_THM_JUMP24 30 /* Thumb32 ((S + A) | T) - P */
#define R_ARM_BASE_ABS 31 /* Data B(S) + A */
#define R_ARM_ALU_PCREL_7_0 32 /* Obsolete */
#define R_ARM_ALU_PCREL_15_8 33 /* Obsolete */
#define R_ARM_ALU_PCREL_23_15 34 /* Obsolete */
#define R_ARM_LDR_SBREL_11_0_NC 35 /* ARM S + A - B(S) */
#define R_ARM_ALU_SBREL_19_12_NC 36 /* ARM S + A - B(S) */
#define R_ARM_ALU_SBREL_27_20_CK 37 /* ARM S + A - B(S) */
#define R_ARM_TARGET1 38 /* Miscellaneous (S + A) | T or ((S + A) | T) - P */
#define R_ARM_SBREL31 39 /* Data ((S + A) | T) - B(S) */
#define R_ARM_V4BX 40 /* Miscellaneous */
#define R_ARM_TARGET2 41 /* Miscellaneous */
#define R_ARM_PREL31 42 /* Data ((S + A) | T) - P */
#define R_ARM_MOVW_ABS_NC 43 /* ARM (S + A) | T */
#define R_ARM_MOVT_ABS 44 /* ARM S + A */
#define R_ARM_MOVW_PREL_NC 45 /* ARM ((S + A) | T) - P */
#define R_ARM_MOVT_PREL 46 /* ARM S + A - P */
#define R_ARM_THM_MOVW_ABS_NC 47 /* Thumb32 (S + A) | T */
#define R_ARM_THM_MOVT_ABS 48 /* Thumb32 S + A */
#define R_ARM_THM_MOVW_PREL_NC 49 /* Thumb32 ((S + A) | T) - P */
#define R_ARM_THM_MOVT_PREL 50 /* Thumb32 S + A - P */
#define R_ARM_THM_JUMP19 51 /* Thumb32 ((S + A) | T) - P */
#define R_ARM_THM_JUMP6 52 /* Thumb16 S + A - P */
#define R_ARM_THM_ALU_PREL_11_0 53 /* Thumb32 ((S + A) | T) - Pa */
#define R_ARM_THM_PC12 54 /* Thumb32 S + A - Pa */
#define R_ARM_ABS32_NOI 55 /* Data S + A */
#define R_ARM_REL32_NOI 56 /* Data S + A - P */
#define R_ARM_ALU_PC_G0_NC 57 /* ARM ((S + A) | T) - P */
#define R_ARM_ALU_PC_G0 58 /* ARM ((S + A) | T) - P */
#define R_ARM_ALU_PC_G1_NC 59 /* ARM ((S + A) | T) - P */
#define R_ARM_ALU_PC_G1 60 /* ARM ((S + A) | T) - P */
#define R_ARM_ALU_PC_G2 61 /* ARM ((S + A) | T) - P */
#define R_ARM_LDR_PC_G1 62 /* ARM S + A - P */
#define R_ARM_LDR_PC_G2 63 /* ARM S + A - P */
#define R_ARM_LDRS_PC_G0 64 /* ARM S + A - P */
#define R_ARM_LDRS_PC_G1 65 /* ARM S + A - P */
#define R_ARM_LDRS_PC_G2 66 /* ARM S + A - P */
#define R_ARM_LDC_PC_G0 67 /* ARM S + A - P */
#define R_ARM_LDC_PC_G1 68 /* ARM S + A - P */
#define R_ARM_LDC_PC_G2 69 /* ARM S + A - P */
#define R_ARM_ALU_SB_G0_NC 70 /* ARM ((S + A) | T) - B(S) */
#define R_ARM_ALU_SB_G0 71 /* ARM ((S + A) | T) - B(S) */
#define R_ARM_ALU_SB_G1_NC 72 /* ARM ((S + A) | T) - B(S) */
#define R_ARM_ALU_SB_G1 73 /* ARM ((S + A) | T) - B(S) */
#define R_ARM_ALU_SB_G2 74 /* ARM ((S + A) | T) - B(S) */
#define R_ARM_LDR_SB_G0 75 /* ARM S + A - B(S) */
#define R_ARM_LDR_SB_G1 76 /* ARM S + A - B(S) */
#define R_ARM_LDR_SB_G2 77 /* ARM S + A - B(S) */
#define R_ARM_LDRS_SB_G0 78 /* ARM S + A - B(S) */
#define R_ARM_LDRS_SB_G1 79 /* ARM S + A - B(S) */
#define R_ARM_LDRS_SB_G2 80 /* ARM S + A - B(S) */
#define R_ARM_LDC_SB_G0 81 /* ARM S + A - B(S) */
#define R_ARM_LDC_SB_G1 82 /* ARM S + A - B(S) */
#define R_ARM_LDC_SB_G2 83 /* ARM S + A - B(S) */
#define R_ARM_MOVW_BREL_NC 84 /* ARM ((S + A) | T) - B(S) */
#define R_ARM_MOVT_BREL 85 /* ARM S + A - B(S) */
#define R_ARM_MOVW_BREL 86 /* ARM ((S + A) | T) - B(S) */
#define R_ARM_THM_MOVW_BREL_NC 87 /* Thumb32 ((S + A) | T) - B(S) */
#define R_ARM_THM_MOVT_BREL 88 /* Thumb32 S + A - B(S) */
#define R_ARM_THM_MOVW_BREL 89 /* Thumb32 ((S + A) | T) - B(S) */
#define R_ARM_TLS_GOTDESC 90 /* Data */
#define R_ARM_TLS_CALL 91 /* ARM */
#define R_ARM_TLS_DESCSEQ 92 /* ARM TLS relaxation */
#define R_ARM_THM_TLS_CALL 93 /* Thumb32 */
#define R_ARM_PLT32_ABS 94 /* Data PLT(S) + A */
#define R_ARM_GOT_ABS 95 /* Data GOT(S) + A */
#define R_ARM_GOT_PREL 96 /* Data GOT(S) + A - P */
#define R_ARM_GOT_BREL12 97 /* ARM GOT(S) + A - GOT_ORG */
#define R_ARM_GOTOFF12 98 /* ARM S + A - GOT_ORG */
#define R_ARM_GOTRELAX 99 /* Miscellaneous */
#define R_ARM_GNU_VTENTRY 100 /* Data */
#define R_ARM_GNU_VTINHERIT 101 /* Data */
#define R_ARM_THM_JUMP11 102 /* Thumb16 S + A - P */
#define R_ARM_THM_JUMP8 103 /* Thumb16 S + A - P */
#define R_ARM_TLS_GD32 104 /* Data GOT(S) + A - P */
#define R_ARM_TLS_LDM32 105 /* Data GOT(S) + A - P */
#define R_ARM_TLS_LDO32 106 /* Data S + A - TLS */
#define R_ARM_TLS_IE32 107 /* Data GOT(S) + A - P */
#define R_ARM_TLS_LE32 108 /* Data S + A - tp */
#define R_ARM_TLS_LDO12 109 /* ARM S + A - TLS */
#define R_ARM_TLS_LE12 110 /* ARM S + A - tp */
#define R_ARM_TLS_IE12GP 111 /* ARM GOT(S) + A - GOT_ORG */
#define R_ARM_ME_TOO 128 /* Obsolete */
#define R_ARM_THM_TLS_DESCSEQ16 129 /* Thumb16 */
#define R_ARM_THM_TLS_DESCSEQ32 130 /* Thumb32 */
/* 5.2.1 Platform architecture compatibility data */
#define PT_ARM_ARCHEXT_FMTMSK 0xff000000
#define PT_ARM_ARCHEXT_PROFMSK 0x00ff0000
#define PT_ARM_ARCHEXT_ARCHMSK 0x000000ff
#define PT_ARM_ARCHEXT_FMT_OS 0x00000000
#define PT_ARM_ARCHEXT_FMT_ABI 0x01000000
#define PT_ARM_ARCHEXT_PROF_NONE 0x00000000
#define PT_ARM_ARCHEXT_PROF_ARM 0x00410000
#define PT_ARM_ARCHEXT_PROF_RT 0x00520000
#define PT_ARM_ARCHEXT_PROF_MC 0x004d0000
#define PT_ARM_ARCHEXT_PROF_CLASSIC 0x00530000
#define PT_ARM_ARCHEXT_ARCH_UNKNOWN 0x00
#define PT_ARM_ARCHEXT_ARCHv4 0x01
#define PT_ARM_ARCHEXT_ARCHv4T 0x02
#define PT_ARM_ARCHEXT_ARCHv5T 0x03
#define PT_ARM_ARCHEXT_ARCHv5TE 0x04
#define PT_ARM_ARCHEXT_ARCHv5TEJ 0x05
#define PT_ARM_ARCHEXT_ARCHv6 0x06
#define PT_ARM_ARCHEXT_ARCHv6KZ 0x07
#define PT_ARM_ARCHEXT_ARCHv6T2 0x08
#define PT_ARM_ARCHEXT_ARCHv6K 0x09
#define PT_ARM_ARCHEXT_ARCHv7 0x0a
#define PT_ARM_ARCHEXT_ARCHv6M 0x0b
#define PT_ARM_ARCHEXT_ARCHv6SM 0x0c
#define PT_ARM_ARCHEXT_ARCHv7EM 0x0d
/* Table 5-6, ARM-specific dynamic array tags */
#define DT_ARM_RESERVED1 0x70000000
#define DT_ARM_SYMTABSZ 0x70000001
#define DT_ARM_PREEMPTMAP 0x70000002
#define DT_ARM_RESERVED2 0x70000003
#endif /* __ARCH_ARM_INCLUDE_ELF_H */
nuttx/arch/arm/include/stm32/chip.h
+147 -53
View File
@@ -59,12 +59,11 @@
/* STM32 F100 Value Line ************************************************************/
#if defined(CONFIG_ARCH_CHIP_STM32F100C8) || defined(CONFIG_ARCH_CHIP_STM32F100CB) \
|| defined(CONFIG_ARCH_CHIP_STM32F100R8) || defined(CONFIG_ARCH_CHIP_STM32F100RB) \
|| defined(CONFIG_ARCH_CHIP_STM32F100V8) || defined(CONFIG_ARCH_CHIP_STM32F100VB)
|| defined(CONFIG_ARCH_CHIP_STM32F100R8) || defined(CONFIG_ARCH_CHIP_STM32F100RB)
# define CONFIG_STM32_STM32F10XX 1 /* STM32F10xxx family */
# undef CONFIG_STM32_LOWDENSITY /* STM32F100x, STM32F102x and STM32F103x w/ 16/32 Kbytes */
# define CONFIG_STM32_MEDIUMDENSITY 1 /* STM32F101x, STM32F102x and STM32F103x w/ 64/128 Kbytes */
# undef CONFIG_STM32_HIGHDENSITY /* STM32F101x and STM32F103x w/ 256/512 Kbytes */
# undef CONFIG_STM32_LOWDENSITY /* STM32F100x, STM32F101x, STM32F102x and STM32F103x w/ 16/32 Kbytes */
# define CONFIG_STM32_MEDIUMDENSITY 1 /* STM32F100x, STM32F101x, STM32F102x and STM32F103x w/ 64/128 Kbytes */
# undef CONFIG_STM32_HIGHDENSITY /* STM32F100x, STM32F101x, and STM32F103x w/ 256/512 Kbytes */
# define CONFIG_STM32_VALUELINE 1 /* STM32F100x */
# undef CONFIG_STM32_CONNECTIVITYLINE /* STM32F105x and STM32F107x */
# undef CONFIG_STM32_STM32F20XX /* STM32F205x and STM32F207x */
@@ -72,15 +71,110 @@
# define STM32_NFSMC 0 /* FSMC */
# define STM32_NATIM 1 /* One advanced timer TIM1 */
# define STM32_NGTIM 3 /* 16-bit general timers TIM2,3,4 with DMA */
# define STM32_NBTIM 0 /* No basic timers */
# define STM32_NDMA 2 /* DMA1-2 */
# define STM32_NBTIM 2 /* 2 basic timers: TIM6, TIM7 */
// TODO: there are also 3 additional timers (15-17) that don't fit any existing category
# define STM32_NDMA 1 /* DMA1 */
# define STM32_NSPI 2 /* SPI1-2 */
# define STM32_NI2S 0 /* No I2S (?) */
# define STM32_NI2S 0 /* No I2S */
# define STM32_NUSART 3 /* USART1-3 */
# define STM32_NI2C 2 /* I2C1-2 */
# define STM32_NCAN 0 /* No CAN */
# define STM32_NSDIO 0 /* No SDIO */
# define STM32_NUSBOTG 0 /* No USB OTG FS/HS */
# define STM32_NGPIO 64 /* GPIOA-D */
# define STM32_NADC 1 /* ADC1 */
# define STM32_NDAC 2 /* DAC 1-2 */
# define STM32_NCRC 1 /* CRC1 */
# define STM32_NETHERNET 0 /* No ethernet */
# define STM32_NRNG 0 /* No random number generator (RNG) */
# define STM32_NDCMI 0 /* No digital camera interface (DCMI) */
#elif defined(CONFIG_ARCH_CHIP_STM32F100V8) || defined(CONFIG_ARCH_CHIP_STM32F100VB)
# define CONFIG_STM32_STM32F10XX 1 /* STM32F10xxx family */
# undef CONFIG_STM32_LOWDENSITY /* STM32F100x, STM32F101x, STM32F102x and STM32F103x w/ 16/32 Kbytes */
# define CONFIG_STM32_MEDIUMDENSITY 1 /* STM32F100x, STM32F101x, STM32F102x and STM32F103x w/ 64/128 Kbytes */
# undef CONFIG_STM32_HIGHDENSITY /* STM32F100x, STM32F101x, and STM32F103x w/ 256/512 Kbytes */
# define CONFIG_STM32_VALUELINE 1 /* STM32F100x */
# undef CONFIG_STM32_CONNECTIVITYLINE /* STM32F105x and STM32F107x */
# undef CONFIG_STM32_STM32F20XX /* STM32F205x and STM32F207x */
# undef CONFIG_STM32_STM32F40XX /* STM32F405xx and STM32407xx families */
# define STM32_NFSMC 0 /* FSMC */
# define STM32_NATIM 1 /* One advanced timer TIM1 */
# define STM32_NGTIM 3 /* 16-bit general timers TIM2,3,4 with DMA */
# define STM32_NBTIM 2 /* 2 basic timers: TIM6, TIM7 */
// TODO: there are also 3 additional timers (15-17) that don't fit any existing category
# define STM32_NDMA 1 /* DMA1 */
# define STM32_NSPI 2 /* SPI1-2 */
# define STM32_NI2S 0 /* No I2S */
# define STM32_NUSART 3 /* USART1-3 */
# define STM32_NI2C 2 /* I2C1-2 */
# define STM32_NCAN 0 /* No CAN */
# define STM32_NSDIO 0 /* No SDIO */
# define STM32_NUSBOTG 0 /* No USB OTG FS/HS */
# define STM32_NGPIO 80 /* GPIOA-E */
# define STM32_NADC 1 /* ADC1 */
# define STM32_NDAC 2 /* DAC 1-2 */
# define STM32_NCRC 1 /* CRC1 */
# define STM32_NETHERNET 0 /* No ethernet */
# define STM32_NRNG 0 /* No random number generator (RNG) */
# define STM32_NDCMI 0 /* No digital camera interface (DCMI) */
/* STM32 F100 High-density value Line ************************************************************/
#elif defined(CONFIG_ARCH_CHIP_STM32F100RC) || defined(CONFIG_ARCH_CHIP_STM32F100RD) \
|| defined(CONFIG_ARCH_CHIP_STM32F100RE)
# define CONFIG_STM32_STM32F10XX 1 /* STM32F10xxx family */
# undef CONFIG_STM32_LOWDENSITY /* STM32F100x, STM32F101x, STM32F102x and STM32F103x w/ 16/32 Kbytes */
# undef CONFIG_STM32_MEDIUMDENSITY /* STM32F100x, STM32F101x, STM32F102x and STM32F103x w/ 64/128 Kbytes */
# define CONFIG_STM32_HIGHDENSITY 1 /* STM32F100x, STM32F101x, and STM32F103x w/ 256/512 Kbytes */
# define CONFIG_STM32_VALUELINE 1 /* STM32F100x */
# undef CONFIG_STM32_CONNECTIVITYLINE /* STM32F105x and STM32F107x */
# undef CONFIG_STM32_STM32F20XX /* STM32F205x and STM32F207x */
# undef CONFIG_STM32_STM32F40XX /* STM32F405xx and STM32407xx families */
# define STM32_NFSMC 0 /* FSMC */
# define STM32_NATIM 1 /* One advanced timer TIM1 */
# define STM32_NGTIM 4 /* 16-bit general timers TIM2,3,4,5 with DMA */
# define STM32_NBTIM 2 /* 2 basic timers: TIM6, TIM7 */
// TODO: there are also 6 additional timers (12-17) that don't fit any existing category
# define STM32_NDMA 2 /* DMA1-2 */
# define STM32_NSPI 3 /* SPI1-3 */
# define STM32_NI2S 0 /* No I2S */
# define STM32_NUSART 5 /* USART1-5 */
# define STM32_NI2C 2 /* I2C1-2 */
# define STM32_NCAN 0 /* No CAN */
# define STM32_NSDIO 0 /* No SDIO */
# define STM32_NUSBOTG 0 /* No USB OTG FS/HS */
# define STM32_NGPIO 64 /* GPIOA-D */
# define STM32_NADC 1 /* ADC1 */
# define STM32_NDAC 2 /* DAC 1-2 */
# define STM32_NCRC 1 /* CRC1 */
# define STM32_NETHERNET 0 /* No ethernet */
# define STM32_NRNG 0 /* No random number generator (RNG) */
# define STM32_NDCMI 0 /* No digital camera interface (DCMI) */
#elif defined(CONFIG_ARCH_CHIP_STM32F100VC) || defined(CONFIG_ARCH_CHIP_STM32F100VD) \
|| defined(CONFIG_ARCH_CHIP_STM32F100VE)
# define CONFIG_STM32_STM32F10XX 1 /* STM32F10xxx family */
# undef CONFIG_STM32_LOWDENSITY /* STM32F100x, STM32F101x, STM32F102x and STM32F103x w/ 16/32 Kbytes */
# undef CONFIG_STM32_MEDIUMDENSITY /* STM32F100x, STM32F101x, STM32F102x and STM32F103x w/ 64/128 Kbytes */
# define CONFIG_STM32_HIGHDENSITY 1 /* STM32F100x, STM32F101x, and STM32F103x w/ 256/512 Kbytes */
# define CONFIG_STM32_VALUELINE 1 /* STM32F100x */
# undef CONFIG_STM32_CONNECTIVITYLINE /* STM32F105x and STM32F107x */
# undef CONFIG_STM32_STM32F20XX /* STM32F205x and STM32F207x */
# undef CONFIG_STM32_STM32F40XX /* STM32F405xx and STM32407xx families */
# define STM32_NFSMC 1 /* FSMC */
# define STM32_NATIM 1 /* One advanced timer TIM1 */
# define STM32_NGTIM 4 /* 16-bit general timers TIM2,3,4,5 with DMA */
# define STM32_NBTIM 2 /* 2 basic timers: TIM6, TIM7 */
// TODO: there are also 6 additional timers (12-17) that don't fit any existing category
# define STM32_NDMA 2 /* DMA1-2 */
# define STM32_NSPI 3 /* SPI1-3 */
# define STM32_NI2S 0 /* No I2S */
# define STM32_NUSART 5 /* USART1-5 */
# define STM32_NI2C 2 /* I2C1-2 */
# define STM32_NCAN 0 /* No CAN */
# define STM32_NSDIO 0 /* No SDIO */
# define STM32_NUSBOTG 0 /* No USB OTG FS/HS */
# define STM32_NGPIO 80 /* GPIOA-E */
# define STM32_NADC 1 /* ADC1 */
# define STM32_NDAC 2 /* DAC 1-2 */
@@ -96,9 +190,9 @@
#elif defined(CONFIG_ARCH_CHIP_STM32F103RET6)
# define CONFIG_STM32_STM32F10XX 1 /* STM32F10xxx family */
# undef CONFIG_STM32_LOWDENSITY /* STM32F101x, STM32F102x and STM32F103x w/ 16/32 Kbytes */
# undef CONFIG_STM32_MEDIUMDENSITY /* STM32F101x, STM32F102x and STM32F103x w/ 64/128 Kbytes */
# define CONFIG_STM32_HIGHDENSITY 1 /* STM32F101x and STM32F103x w/ 256/512 Kbytes */
# undef CONFIG_STM32_LOWDENSITY /* STM32F100x, STM32F101x, STM32F102x and STM32F103x w/ 16/32 Kbytes */
# undef CONFIG_STM32_MEDIUMDENSITY /* STM32F100x, STM32F101x, STM32F102x and STM32F103x w/ 64/128 Kbytes */
# define CONFIG_STM32_HIGHDENSITY 1 /* STM32F100x, STM32F101x, and STM32F103x w/ 256/512 Kbytes */
# undef CONFIG_STM32_VALUELINE /* STM32F100x */
# undef CONFIG_STM32_CONNECTIVITYLINE /* STM32F105x and STM32F107x */
# undef CONFIG_STM32_STM32F20XX /* STM32F205x and STM32F207x */
@@ -129,9 +223,9 @@
#elif defined(CONFIG_ARCH_CHIP_STM32F103VCT6) || defined(CONFIG_ARCH_CHIP_STM32F103VET6)
# define CONFIG_STM32_STM32F10XX 1 /* STM32F10xxx family */
# undef CONFIG_STM32_LOWDENSITY /* STM32F101x, STM32F102x and STM32F103x w/ 16/32 Kbytes */
# undef CONFIG_STM32_MEDIUMDENSITY /* STM32F101x, STM32F102x and STM32F103x w/ 64/128 Kbytes */
# define CONFIG_STM32_HIGHDENSITY 1 /* STM32F101x and STM32F103x w/ 256/512 Kbytes */
# undef CONFIG_STM32_LOWDENSITY /* STM32F100x, STM32F101x, STM32F102x and STM32F103x w/ 16/32 Kbytes */
# undef CONFIG_STM32_MEDIUMDENSITY /* STM32F100x, STM32F101x, STM32F102x and STM32F103x w/ 64/128 Kbytes */
# define CONFIG_STM32_HIGHDENSITY 1 /* STM32F100x, STM32F101x, and STM32F103x w/ 256/512 Kbytes */
# undef CONFIG_STM32_VALUELINE /* STM32F100x */
# undef CONFIG_STM32_CONNECTIVITYLINE /* STM32F105x and STM32F107x */
# undef CONFIG_STM32_STM32F20XX /* STM32F205x and STM32F207x */
@@ -162,9 +256,9 @@
#elif defined(CONFIG_ARCH_CHIP_STM32F103ZET6)
# define CONFIG_STM32_STM32F10XX 1 /* STM32F10xxx family */
# undef CONFIG_STM32_LOWDENSITY /* STM32F101x, STM32F102x and STM32F103x w/ 16/32 Kbytes */
# undef CONFIG_STM32_MEDIUMDENSITY /* STM32F101x, STM32F102x and STM32F103x w/ 64/128 Kbytes */
# define CONFIG_STM32_HIGHDENSITY 1 /* STM32F101x and STM32F103x w/ 256/512 Kbytes */
# undef CONFIG_STM32_LOWDENSITY /* STM32F100x, STM32F101x, STM32F102x and STM32F103x w/ 16/32 Kbytes */
# undef CONFIG_STM32_MEDIUMDENSITY /* STM32F100x, STM32F101x, STM32F102x and STM32F103x w/ 64/128 Kbytes */
# define CONFIG_STM32_HIGHDENSITY 1 /* STM32F100x, STM32F101x, and STM32F103x w/ 256/512 Kbytes */
# undef CONFIG_STM32_VALUELINE /* STM32F100x */
# undef CONFIG_STM32_CONNECTIVITYLINE /* STM32F105x and STM32F107x */
# undef CONFIG_STM32_STM32F20XX /* STM32F205x and STM32F207x */
@@ -192,9 +286,9 @@
/* STM32 F105/F107 Connectivity Line *******************************************************/
#elif defined(CONFIG_ARCH_CHIP_STM32F105VBT7)
# define CONFIG_STM32_STM32F10XX 1 /* STM32F10xxx family */
# undef CONFIG_STM32_LOWDENSITY /* STM32F101x, STM32F102x and STM32F103x w/ 16/32 Kbytes */
# undef CONFIG_STM32_MEDIUMDENSITY /* STM32F101x, STM32F102x and STM32F103x w/ 64/128 Kbytes */
# undef CONFIG_STM32_HIGHDENSITY /* STM32F101x and STM32F103x w/ 256/512 Kbytes */
# undef CONFIG_STM32_LOWDENSITY /* STM32F100x, STM32F101x, STM32F102x and STM32F103x w/ 16/32 Kbytes */
# undef CONFIG_STM32_MEDIUMDENSITY /* STM32F100x, STM32F101x, STM32F102x and STM32F103x w/ 64/128 Kbytes */
# undef CONFIG_STM32_HIGHDENSITY /* STM32F100x, STM32F101x, and STM32F103x w/ 256/512 Kbytes */
# undef CONFIG_STM32_VALUELINE /* STM32F100x */
# define CONFIG_STM32_CONNECTIVITYLINE 1 /* STM32F105x and STM32F107x */
# undef CONFIG_STM32_STM32F20XX /* STM32F205x and STM32F207x */
@@ -221,9 +315,9 @@
#elif defined(CONFIG_ARCH_CHIP_STM32F107VC)
# define CONFIG_STM32_STM32F10XX 1 /* STM32F10xxx family */
# undef CONFIG_STM32_LOWDENSITY /* STM32F101x, STM32F102x and STM32F103x w/ 16/32 Kbytes */
# undef CONFIG_STM32_MEDIUMDENSITY /* STM32F101x, STM32F102x and STM32F103x w/ 64/128 Kbytes */
# undef CONFIG_STM32_HIGHDENSITY /* STM32F101x and STM32F103x w/ 256/512 Kbytes */
# undef CONFIG_STM32_LOWDENSITY /* STM32F100x, STM32F101x, STM32F102x and STM32F103x w/ 16/32 Kbytes */
# undef CONFIG_STM32_MEDIUMDENSITY /* STM32F100x, STM32F101x, STM32F102x and STM32F103x w/ 64/128 Kbytes */
# undef CONFIG_STM32_HIGHDENSITY /* STM32F100x, STM32F101x, and STM32F103x w/ 256/512 Kbytes */
# undef CONFIG_STM32_VALUELINE /* STM32F100x */
# define CONFIG_STM32_CONNECTIVITYLINE 1 /* STM32F105x and STM32F107x */
# undef CONFIG_STM32_STM32F20XX /* STM32F205x and STM32F207x */
@@ -251,9 +345,9 @@
/* STM32 F2 Family ******************************************************************/
#elif defined(CONFIG_ARCH_CHIP_STM32F207IG) /* UFBGA-176 1024Kb FLASH 128Kb SRAM */
# undef CONFIG_STM32_STM32F10XX /* STM32F10xxx family */
# undef CONFIG_STM32_LOWDENSITY /* STM32F101x, STM32F102x and STM32F103x w/ 16/32 Kbytes */
# undef CONFIG_STM32_MEDIUMDENSITY /* STM32F101x, STM32F102x and STM32F103x w/ 64/128 Kbytes */
# undef CONFIG_STM32_HIGHDENSITY /* STM32F101x and STM32F103x w/ 256/512 Kbytes */
# undef CONFIG_STM32_LOWDENSITY /* STM32F100x, STM32F101x, STM32F102x and STM32F103x w/ 16/32 Kbytes */
# undef CONFIG_STM32_MEDIUMDENSITY /* STM32F100x, STM32F101x, STM32F102x and STM32F103x w/ 64/128 Kbytes */
# undef CONFIG_STM32_HIGHDENSITY /* STM32F100x, STM32F101x, and STM32F103x w/ 256/512 Kbytes */
# undef CONFIG_STM32_VALUELINE /* STM32F100x */
# undef CONFIG_STM32_CONNECTIVITYLINE /* STM32F105x and STM32F107x */
# define CONFIG_STM32_STM32F20XX 1 /* STM32F205x and STM32F207x */
@@ -283,9 +377,9 @@
/* STM23 F4 Family ******************************************************************/
#elif defined(CONFIG_ARCH_CHIP_STM32F405RG) /* LQFP 64 10x10x1.4 1024Kb FLASH 192Kb SRAM */
# undef CONFIG_STM32_STM32F10XX /* STM32F10xxx family */
# undef CONFIG_STM32_LOWDENSITY /* STM32F101x, STM32F102x and STM32F103x w/ 16/32 Kbytes */
# undef CONFIG_STM32_MEDIUMDENSITY /* STM32F101x, STM32F102x and STM32F103x w/ 64/128 Kbytes */
# undef CONFIG_STM32_HIGHDENSITY /* STM32F101x and STM32F103x w/ 256/512 Kbytes */
# undef CONFIG_STM32_LOWDENSITY /* STM32F100x, STM32F101x, STM32F102x and STM32F103x w/ 16/32 Kbytes */
# undef CONFIG_STM32_MEDIUMDENSITY /* STM32F100x, STM32F101x, STM32F102x and STM32F103x w/ 64/128 Kbytes */
# undef CONFIG_STM32_HIGHDENSITY /* STM32F100x, STM32F101x, and STM32F103x w/ 256/512 Kbytes */
# undef CONFIG_STM32_VALUELINE /* STM32F100x */
# undef CONFIG_STM32_CONNECTIVITYLINE /* STM32F105x and STM32F107x */
# undef CONFIG_STM32_STM32F20XX /* STM32F205x and STM32F207x */
@@ -314,9 +408,9 @@
#elif defined(CONFIG_ARCH_CHIP_STM32F405VG) /* LQFP 100 14x14x1.4 1024Kb FLASH 192Kb SRAM */
# undef CONFIG_STM32_STM32F10XX /* STM32F10xxx family */
# undef CONFIG_STM32_LOWDENSITY /* STM32F101x, STM32F102x and STM32F103x w/ 16/32 Kbytes */
# undef CONFIG_STM32_MEDIUMDENSITY /* STM32F101x, STM32F102x and STM32F103x w/ 64/128 Kbytes */
# undef CONFIG_STM32_HIGHDENSITY /* STM32F101x and STM32F103x w/ 256/512 Kbytes */
# undef CONFIG_STM32_LOWDENSITY /* STM32F100x, STM32F101x, STM32F102x and STM32F103x w/ 16/32 Kbytes */
# undef CONFIG_STM32_MEDIUMDENSITY /* STM32F100x, STM32F101x, STM32F102x and STM32F103x w/ 64/128 Kbytes */
# undef CONFIG_STM32_HIGHDENSITY /* STM32F100x, STM32F101x, and STM32F103x w/ 256/512 Kbytes */
# undef CONFIG_STM32_VALUELINE /* STM32F100x */
# undef CONFIG_STM32_CONNECTIVITYLINE /* STM32F105x and STM32F107x */
# undef CONFIG_STM32_STM32F20XX /* STM32F205x and STM32F207x */
@@ -345,9 +439,9 @@
#elif defined(CONFIG_ARCH_CHIP_STM32F405ZG) /* LQFP 144 20x20x1.4 1024Kb FLASH 192Kb SRAM */
# undef CONFIG_STM32_STM32F10XX /* STM32F10xxx family */
# undef CONFIG_STM32_LOWDENSITY /* STM32F101x, STM32F102x and STM32F103x w/ 16/32 Kbytes */
# undef CONFIG_STM32_MEDIUMDENSITY /* STM32F101x, STM32F102x and STM32F103x w/ 64/128 Kbytes */
# undef CONFIG_STM32_HIGHDENSITY /* STM32F101x and STM32F103x w/ 256/512 Kbytes */
# undef CONFIG_STM32_LOWDENSITY /* STM32F100x, STM32F101x, STM32F102x and STM32F103x w/ 16/32 Kbytes */
# undef CONFIG_STM32_MEDIUMDENSITY /* STM32F100x, STM32F101x, STM32F102x and STM32F103x w/ 64/128 Kbytes */
# undef CONFIG_STM32_HIGHDENSITY /* STM32F100x, STM32F101x, and STM32F103x w/ 256/512 Kbytes */
# undef CONFIG_STM32_VALUELINE /* STM32F100x */
# undef CONFIG_STM32_CONNECTIVITYLINE /* STM32F105x and STM32F107x */
# undef CONFIG_STM32_STM32F20XX /* STM32F205x and STM32F207x */
@@ -376,9 +470,9 @@
#elif defined(CONFIG_ARCH_CHIP_STM32F407VE) /* LQFP-100 512Kb FLASH 192Kb SRAM */
# undef CONFIG_STM32_STM32F10XX /* STM32F10xxx family */
# undef CONFIG_STM32_LOWDENSITY /* STM32F101x, STM32F102x and STM32F103x w/ 16/32 Kbytes */
# undef CONFIG_STM32_MEDIUMDENSITY /* STM32F101x, STM32F102x and STM32F103x w/ 64/128 Kbytes */
# undef CONFIG_STM32_HIGHDENSITY /* STM32F101x and STM32F103x w/ 256/512 Kbytes */
# undef CONFIG_STM32_LOWDENSITY /* STM32F100x, STM32F101x, STM32F102x and STM32F103x w/ 16/32 Kbytes */
# undef CONFIG_STM32_MEDIUMDENSITY /* STM32F100x, STM32F101x, STM32F102x and STM32F103x w/ 64/128 Kbytes */
# undef CONFIG_STM32_HIGHDENSITY /* STM32F100x, STM32F101x, and STM32F103x w/ 256/512 Kbytes */
# undef CONFIG_STM32_VALUELINE /* STM32F100x */
# undef CONFIG_STM32_CONNECTIVITYLINE /* STM32F105x and STM32F107x */
# undef CONFIG_STM32_STM32F20XX /* STM32F205x and STM32F207x */
@@ -407,9 +501,9 @@
#elif defined(CONFIG_ARCH_CHIP_STM32F407VG) /* LQFP-100 14x14x1.4 1024Kb FLASH 192Kb SRAM */
# undef CONFIG_STM32_STM32F10XX /* STM32F10xxx family */
# undef CONFIG_STM32_LOWDENSITY /* STM32F101x, STM32F102x and STM32F103x w/ 16/32 Kbytes */
# undef CONFIG_STM32_MEDIUMDENSITY /* STM32F101x, STM32F102x and STM32F103x w/ 64/128 Kbytes */
# undef CONFIG_STM32_HIGHDENSITY /* STM32F101x and STM32F103x w/ 256/512 Kbytes */
# undef CONFIG_STM32_LOWDENSITY /* STM32F100x, STM32F101x, STM32F102x and STM32F103x w/ 16/32 Kbytes */
# undef CONFIG_STM32_MEDIUMDENSITY /* STM32F100x, STM32F101x, STM32F102x and STM32F103x w/ 64/128 Kbytes */
# undef CONFIG_STM32_HIGHDENSITY /* STM32F100x, STM32F101x, and STM32F103x w/ 256/512 Kbytes */
# undef CONFIG_STM32_VALUELINE /* STM32F100x */
# undef CONFIG_STM32_CONNECTIVITYLINE /* STM32F105x and STM32F107x */
# undef CONFIG_STM32_STM32F20XX /* STM32F205x and STM32F207x */
@@ -438,9 +532,9 @@
#elif defined(CONFIG_ARCH_CHIP_STM32F407ZE) /* LQFP-144 512Kb FLASH 192Kb SRAM */
# undef CONFIG_STM32_STM32F10XX /* STM32F10xxx family */
# undef CONFIG_STM32_LOWDENSITY /* STM32F101x, STM32F102x and STM32F103x w/ 16/32 Kbytes */
# undef CONFIG_STM32_MEDIUMDENSITY /* STM32F101x, STM32F102x and STM32F103x w/ 64/128 Kbytes */
# undef CONFIG_STM32_HIGHDENSITY /* STM32F101x and STM32F103x w/ 256/512 Kbytes */
# undef CONFIG_STM32_LOWDENSITY /* STM32F100x, STM32F101x, STM32F102x and STM32F103x w/ 16/32 Kbytes */
# undef CONFIG_STM32_MEDIUMDENSITY /* STM32F100x, STM32F101x, STM32F102x and STM32F103x w/ 64/128 Kbytes */
# undef CONFIG_STM32_HIGHDENSITY /* STM32F100x, STM32F101x, and STM32F103x w/ 256/512 Kbytes */
# undef CONFIG_STM32_VALUELINE /* STM32F100x */
# undef CONFIG_STM32_CONNECTIVITYLINE /* STM32F105x and STM32F107x */
# undef CONFIG_STM32_STM32F20XX /* STM32F205x and STM32F207x */
@@ -469,9 +563,9 @@
#elif defined(CONFIG_ARCH_CHIP_STM32F407ZG) /* LQFP 144 20x20x1.4 1024Kb FLASH 192Kb SRAM */
# undef CONFIG_STM32_STM32F10XX /* STM32F10xxx family */
# undef CONFIG_STM32_LOWDENSITY /* STM32F101x, STM32F102x and STM32F103x w/ 16/32 Kbytes */
# undef CONFIG_STM32_MEDIUMDENSITY /* STM32F101x, STM32F102x and STM32F103x w/ 64/128 Kbytes */
# undef CONFIG_STM32_HIGHDENSITY /* STM32F101x and STM32F103x w/ 256/512 Kbytes */
# undef CONFIG_STM32_LOWDENSITY /* STM32F100x, STM32F101x, STM32F102x and STM32F103x w/ 16/32 Kbytes */
# undef CONFIG_STM32_MEDIUMDENSITY /* STM32F100x, STM32F101x, STM32F102x and STM32F103x w/ 64/128 Kbytes */
# undef CONFIG_STM32_HIGHDENSITY /* STM32F100x, STM32F101x, and STM32F103x w/ 256/512 Kbytes */
# undef CONFIG_STM32_VALUELINE /* STM32F100x */
# undef CONFIG_STM32_CONNECTIVITYLINE /* STM32F105x and STM32F107x */
# undef CONFIG_STM32_STM32F20XX /* STM32F205x and STM32F207x */
@@ -500,9 +594,9 @@
#elif defined(CONFIG_ARCH_CHIP_STM32F407IE) /* LQFP 176 24x24x1.4 512Kb FLASH 192Kb SRAM */
# undef CONFIG_STM32_STM32F10XX /* STM32F10xxx family */
# undef CONFIG_STM32_LOWDENSITY /* STM32F101x, STM32F102x and STM32F103x w/ 16/32 Kbytes */
# undef CONFIG_STM32_MEDIUMDENSITY /* STM32F101x, STM32F102x and STM32F103x w/ 64/128 Kbytes */
# undef CONFIG_STM32_HIGHDENSITY /* STM32F101x and STM32F103x w/ 256/512 Kbytes */
# undef CONFIG_STM32_LOWDENSITY /* STM32F100x, STM32F101x, STM32F102x and STM32F103x w/ 16/32 Kbytes */
# undef CONFIG_STM32_MEDIUMDENSITY /* STM32F100x, STM32F101x, STM32F102x and STM32F103x w/ 64/128 Kbytes */
# undef CONFIG_STM32_HIGHDENSITY /* STM32F100x, STM32F101x, and STM32F103x w/ 256/512 Kbytes */
# undef CONFIG_STM32_VALUELINE /* STM32F100x */
# undef CONFIG_STM32_CONNECTIVITYLINE /* STM32F105x and STM32F107x */
# undef CONFIG_STM32_STM32F20XX /* STM32F205x and STM32F207x */
@@ -531,9 +625,9 @@
#elif defined(CONFIG_ARCH_CHIP_STM32F407IG) /* BGA 176; LQFP 176 24x24x1.4 1024Kb FLASH 192Kb SRAM */
# undef CONFIG_STM32_STM32F10XX /* STM32F10xxx family */
# undef CONFIG_STM32_LOWDENSITY /* STM32F101x, STM32F102x and STM32F103x w/ 16/32 Kbytes */
# undef CONFIG_STM32_MEDIUMDENSITY /* STM32F101x, STM32F102x and STM32F103x w/ 64/128 Kbytes */
# undef CONFIG_STM32_HIGHDENSITY /* STM32F101x and STM32F103x w/ 256/512 Kbytes */
# undef CONFIG_STM32_LOWDENSITY /* STM32F100x, STM32F101x, STM32F102x and STM32F103x w/ 16/32 Kbytes */
# undef CONFIG_STM32_MEDIUMDENSITY /* STM32F100x, STM32F101x, STM32F102x and STM32F103x w/ 64/128 Kbytes */
# undef CONFIG_STM32_HIGHDENSITY /* STM32F100x, STM32F101x, and STM32F103x w/ 256/512 Kbytes */
# undef CONFIG_STM32_VALUELINE /* STM32F100x */
# undef CONFIG_STM32_CONNECTIVITYLINE /* STM32F105x and STM32F107x */
# undef CONFIG_STM32_STM32F20XX /* STM32F205x and STM32F207x */
nuttx/arch/arm/include/stm32/stm32f10xxx_irq.h
+35 -23
View File
@@ -61,11 +61,13 @@
* External interrupts (vectors >= 16)
*/
#if defined(CONFIG_STM32_VALUELINE) && defined(CONFIG_STM32_MEDIUMDENSITY)
/* Value line devices */
#if defined(CONFIG_STM32_VALUELINE)
# define STM32_IRQ_WWDG (16) /* 0: Window Watchdog interrupt */
# define STM32_IRQ_PVD (17) /* 1: PVD through EXTI Line detection interrupt */
# define STM32_IRQ_TAMPER (18) /* 2: Tamper interrupt */
# define STM32_IRQ_RTC (19) /* 3: RTC global interrupt */
# define STM32_IRQ_RTC (19) /* 3: RTC Wakeup through EXTI line interrupt */
# define STM32_IRQ_FLASH (20) /* 4: Flash global interrupt */
# define STM32_IRQ_RCC (21) /* 5: RCC global interrupt */
# define STM32_IRQ_EXTI0 (22) /* 6: EXTI Line 0 interrupt */
@@ -80,12 +82,18 @@
# define STM32_IRQ_DMA1CH5 (31) /* 15: DMA1 Channel 5 global interrupt */
# define STM32_IRQ_DMA1CH6 (32) /* 16: DMA1 Channel 6 global interrupt */
# define STM32_IRQ_DMA1CH7 (33) /* 17: DMA1 Channel 7 global interrupt */
# define STM32_IRQ_ADC12 (34) /* 18: ADC1 and ADC2 global interrupt */
/* 19-22: reserved */
# define STM32_IRQ_ADC1 (34) /* 18: ADC1 global interrupt */
# define STM32_IRQ_RESERVED0 (35) /* 19: Reserved 0 */
# define STM32_IRQ_RESERVED1 (36) /* 20: Reserved 1 */
# define STM32_IRQ_RESERVED2 (37) /* 21: Reserved 2 */
# define STM32_IRQ_RESERVED3 (38) /* 22: Reserved 3 */
# define STM32_IRQ_EXTI95 (39) /* 23: EXTI Line[9:5] interrupts */
# define STM32_IRQ_TIM1BRK (40) /* 24: TIM1 Break interrupt */
# define STM32_IRQ_TIM1UP (41) /* 25: TIM1 Update interrupt (TIM16 global interrupt) */
# define STM32_IRQ_TIM1TRGCOM (42) /* 26: TIM1 Trigger and Commutation interrupts (TIM17 global interrupt) */
# define STM32_IRQ_TIM15 (40) /* TIM15 global interrupt */
# define STM32_IRQ_TIM1UP (41) /* 25: TIM1 Update interrupt */
# define STM32_IRQ_TIM16 (41) /* TIM16 global interrupt */
# define STM32_IRQ_TIM1TRGCOM (42) /* 26: TIM1 Trigger and Commutation interrupts */
# define STM32_IRQ_TIM17 (42) /* TIM17 global interrupt */
# define STM32_IRQ_TIM1CC (43) /* 27: TIM1 Capture Compare interrupt */
# define STM32_IRQ_TIM2 (44) /* 28: TIM2 global interrupt */
# define STM32_IRQ_TIM3 (45) /* 29: TIM3 global interrupt */
@@ -100,29 +108,30 @@
# define STM32_IRQ_USART2 (54) /* 38: USART2 global interrupt */
# define STM32_IRQ_USART3 (55) /* 39: USART3 global interrupt */
# define STM32_IRQ_EXTI1510 (56) /* 40: EXTI Line[15:10] interrupts */
# define STM32_IRQ_RTCALR (57) /* 41: RTC alarm through EXTI line interrupt */
# define STM32_IRQ_RTCALR (57) /* 41: RTC alarms (A and B) through EXTI line interrupt */
# define STM32_IRQ_CEC (58) /* 42: CEC global interrupt */
# if defined(CONFIG_STM32_HIGHDENSITY)
# define STM32_IRQ_TIM12 (59) /* 43: TIM12 global interrupt */
# define STM32_IRQ_TIM13 (60) /* 44: TIM13 global interrupt */
# define STM32_IRQ_TIM14 (61) /* 45: TIM14 global interrupt */
/* 46-47: reserved */
# define STM32_IRQ_FSMC (64) /* 48: FSMC global interrupt */
/* 49: reserved */
# define STM32_IRQ_TIM5 (66) /* 50: TIM5 global interrupt */
# define STM32_IRQ_SPI3 (67) /* 51: SPI1 global interrupt */
# define STM32_IRQ_UART4 (68) /* 52: USART2 global interrupt */
# define STM32_IRQ_UART5 (69) /* 53: USART3 global interrupt */
# else
/* 43-53: reserved */
# endif
# define STM32_IRQ_TIM12 (59) /* 43: TIM12 global interrupt */
# define STM32_IRQ_TIM13 (60) /* 44: TIM13 global interrupt */
# define STM32_IRQ_TIM14 (61) /* 45: TIM14 global interrupt */
# define STM32_IRQ_RESERVED4 (62) /* 46: Reserved 4 */
# define STM32_IRQ_RESERVED5 (63) /* 47: Reserved 5 */
# define STM32_IRQ_FSMC (64) /* 48: FSMC global interrupt */
# define STM32_IRQ_RESERVED6 (65) /* 49: Reserved 6 */
# define STM32_IRQ_TIM5 (66) /* 50: TIM5 global interrupt */
# define STM32_IRQ_SPI3 (67) /* 51: SPI3 global interrupt */
# define STM32_IRQ_UART4 (68) /* 52: USART2 global interrupt */
# define STM32_IRQ_UART5 (69) /* 53: USART5 global interrupt */
# define STM32_IRQ_TIM6 (70) /* 54: TIM6 global interrupt */
# define STM32_IRQ_TIM7 (71) /* 55: TIM7 global interrupt */
# define STM32_IRQ_DMA2CH1 (72) /* 56: DMA2 Channel 1 global interrupt */
# define STM32_IRQ_DMA2CH2 (73) /* 57: DMA2 Channel 2 global interrupt */
# define STM32_IRQ_DMA2CH3 (74) /* 58: DMA2 Channel 3 global interrupt */
# define STM32_IRQ_DMA2CH45 (75) /* 59: DMA2 Channel 4 global interrupt */
# define NR_IRQS (76)
# define STM32_IRQ_DMA2CH45 (75) /* 59: DMA2 Channel 4 and 5 global interrupt */
# define STM32_IRQ_DMA2CH5 (76) /* 60: DMA2 Channel 5 global interrupt */
# define NR_IRQS (77)
/* Connectivity Line Devices */
#elif defined(CONFIG_STM32_CONNECTIVITYLINE)
# define STM32_IRQ_WWDG (16) /* 0: Window Watchdog interrupt */
# define STM32_IRQ_PVD (17) /* 1: PVD through EXTI Line detection interrupt */
@@ -193,6 +202,9 @@
# define STM32_IRQ_CAN2SCE (82) /* 66: CAN2 SCE interrupt */
# define STM32_IRQ_OTGFS (83) /* 67: USB On The Go FS global interrupt */
# define NR_IRQS (84)
/* Medium and High Density Devices */
#else
# define STM32_IRQ_WWDG (16) /* 0: Window Watchdog interrupt */
# define STM32_IRQ_PVD (17) /* 1: PVD through EXTI Line detection interrupt */
nuttx/arch/arm/src/Makefile
+97 -63
View File
@@ -36,58 +36,90 @@
-include $(TOPDIR)/Make.defs
-include chip/Make.defs
ARCH_SRCDIR = $(TOPDIR)/arch/$(CONFIG_ARCH)/src
ifeq ($(CONFIG_ARCH_CORTEXM3),y) # Cortex-M3 is ARMv7-M
ARCH_SUBDIR = armv7-m
ARCH_SUBDIR = armv7-m
else
ifeq ($(CONFIG_ARCH_CORTEXM4),y) # Cortex-M4 is ARMv7E-M
ARCH_SUBDIR = armv7-m
ARCH_SUBDIR = armv7-m
else
ARCH_SUBDIR = arm
ARCH_SUBDIR = arm
endif
endif
ifeq ($(CONFIG_WINDOWS_NATIVE),y)
ARCH_SRCDIR = $(TOPDIR)\arch\$(CONFIG_ARCH)\src
NUTTX = "$(TOPDIR)\nuttx$(EXEEXT)"
CFLAGS += -I$(ARCH_SRCDIR)\chip
CFLAGS += -I$(ARCH_SRCDIR)\common
CFLAGS += -I$(ARCH_SRCDIR)\$(ARCH_SUBDIR)
CFLAGS += -I$(TOPDIR)\sched
else
ARCH_SRCDIR = $(TOPDIR)/arch/$(CONFIG_ARCH)/src
ifeq ($(WINTOOL),y)
NUTTX = "${shell cygpath -w $(TOPDIR)/nuttx$(EXEEXT)}"
CFLAGS += -I "${shell cygpath -w $(ARCH_SRCDIR)/chip}"
CFLAGS += -I "${shell cygpath -w $(ARCH_SRCDIR)/common}"
CFLAGS += -I "${shell cygpath -w $(ARCH_SRCDIR)/$(ARCH_SUBDIR)}"
CFLAGS += -I "${shell cygpath -w $(TOPDIR)/sched}"
else
NUTTX = "$(TOPDIR)/nuttx$(EXEEXT)"
CFLAGS += -I$(ARCH_SRCDIR)/chip
CFLAGS += -I$(ARCH_SRCDIR)/common
CFLAGS += -I$(ARCH_SRCDIR)/$(ARCH_SUBDIR)
CFLAGS += -I$(TOPDIR)/sched
endif
endif
HEAD_OBJ = $(HEAD_ASRC:.S=$(OBJEXT))
ASRCS = $(CHIP_ASRCS) $(CMN_ASRCS)
AOBJS = $(ASRCS:.S=$(OBJEXT))
CSRCS = $(CHIP_CSRCS) $(CMN_CSRCS)
COBJS = $(CSRCS:.c=$(OBJEXT))
SRCS = $(ASRCS) $(CSRCS)
OBJS = $(AOBJS) $(COBJS)
LDFLAGS += $(ARCHSCRIPT)
EXTRA_LIBS ?=
EXTRA_LIBPATHS ?=
LINKLIBS ?=
ifeq ($(CONFIG_WINDOWS_NATIVE),y)
BOARDMAKE = $(if $(wildcard .\board\Makefile),y,)
LIBPATHS += -L"$(TOPDIR)\lib"
ifeq ($(BOARDMAKE),y)
LIBPATHS += -L"$(TOPDIR)\arch\$(CONFIG_ARCH)\src\board"
endif
else
BOARDMAKE = $(if $(wildcard ./board/Makefile),y,)
ifeq ($(WINTOOL),y)
NUTTX = "${shell cygpath -w $(TOPDIR)/nuttx}"
CFLAGS += -I "${shell cygpath -w $(ARCH_SRCDIR)/chip}" \
-I "${shell cygpath -w $(ARCH_SRCDIR)/common}" \
-I "${shell cygpath -w $(ARCH_SRCDIR)/$(ARCH_SUBDIR)}" \
-I "${shell cygpath -w $(TOPDIR)/sched}"
else
NUTTX = $(TOPDIR)/nuttx
CFLAGS += -I$(ARCH_SRCDIR)/chip -I$(ARCH_SRCDIR)/common \
-I$(ARCH_SRCDIR)/$(ARCH_SUBDIR) -I$(TOPDIR)/sched
LIBPATHS += -L"${shell cygpath -w "$(TOPDIR)/lib"}"
ifeq ($(BOARDMAKE),y)
LIBPATHS += -L"${shell cygpath -w "$(TOPDIR)/arch/$(CONFIG_ARCH)/src/board"}"
endif
HEAD_OBJ = $(HEAD_ASRC:.S=$(OBJEXT))
ASRCS = $(CHIP_ASRCS) $(CMN_ASRCS)
AOBJS = $(ASRCS:.S=$(OBJEXT))
CSRCS = $(CHIP_CSRCS) $(CMN_CSRCS)
COBJS = $(CSRCS:.c=$(OBJEXT))
SRCS = $(ASRCS) $(CSRCS)
OBJS = $(AOBJS) $(COBJS)
LDFLAGS = $(ARCHSCRIPT)
EXTRA_LIBS ?=
LINKLIBS =
ifeq ($(WINTOOL),y)
LIBPATHS = ${shell for path in $(LINKLIBS); do dir=`dirname $(TOPDIR)/$$path`;echo "-L\"`cygpath -w $$dir`\"";done}
LIBPATHS += -L"${shell cygpath -w $(BOARDDIR)}"
else
LIBPATHS = $(addprefix -L$(TOPDIR)/,$(dir $(LINKLIBS)))
LIBPATHS += -L"$(BOARDDIR)"
LIBPATHS += -L"$(TOPDIR)/lib"
ifeq ($(BOARDMAKE),y)
LIBPATHS += -L"$(TOPDIR)/arch/$(CONFIG_ARCH)/src/board"
endif
endif
endif
LDLIBS = $(patsubst lib%,-l%,$(basename $(notdir $(LINKLIBS))))
BOARDDIR = $(TOPDIR)/arch/$(CONFIG_ARCH)/src/board
LDLIBS = $(patsubst %.a,%,$(patsubst lib%,-l%,$(LINKLIBS)))
ifeq ($(BOARDMAKE),y)
LDLIBS += -lboard
endif
LIBGCC = "${shell $(CC) $(ARCHCPUFLAGS) -print-libgcc-file-name}"
LIBGCC = "${shell "$(CC)" $(ARCHCPUFLAGS) -print-libgcc-file-name}"
GCC_LIBDIR := ${shell dirname $(LIBGCC)}
VPATH = chip:common:$(ARCH_SUBDIR)
VPATH = chip:common:$(ARCH_SUBDIR)
all: $(HEAD_OBJ) libarch$(LIBEXT)
@@ -100,20 +132,21 @@ $(COBJS): %$(OBJEXT): %.c
$(call COMPILE, $<, $@)
libarch$(LIBEXT): $(OBJS)
@( for obj in $(OBJS) ; do \
$(call ARCHIVE, $@, $${obj}); \
done ; )
$(call ARCHIVE, $@, $(OBJS))
board/libboard$(LIBEXT):
@$(MAKE) -C board TOPDIR="$(TOPDIR)" libboard$(LIBEXT) EXTRADEFINES=$(EXTRADEFINES)
$(Q) $(MAKE) -C board TOPDIR="$(TOPDIR)" libboard$(LIBEXT) EXTRADEFINES=$(EXTRADEFINES)
nuttx: $(HEAD_OBJ) board/libboard$(LIBEXT)
@echo "LD: nuttx"
@$(LD) --entry=__start $(LDFLAGS) $(LIBPATHS) -o $(NUTTX)$(EXEEXT) $(HEAD_OBJ) $(EXTRA_OBJS) \
--start-group $(LDLIBS) -lboard $(EXTRA_LIBS) $(LIBGCC) --end-group
@$(NM) $(NUTTX)$(EXEEXT) | \
nuttx$(EXEEXT): $(HEAD_OBJ) board/libboard$(LIBEXT)
$(Q) echo "LD: nuttx"
$(Q) $(LD) --entry=__start $(LDFLAGS) $(LIBPATHS) $(EXTRA_LIBPATHS) \
-o $(NUTTX)$(EXEEXT) $(HEAD_OBJ) $(EXTRA_OBJS) \
--start-group $(LDLIBS) $(EXTRA_LIBS) $(LIBGCC) --end-group
ifneq ($(CONFIG_WINDOWS_NATIVE),y)
$(Q) $(NM) $(NUTTX)$(EXEEXT) | \
grep -v '\(compiled\)\|\(\$(OBJEXT)$$\)\|\( [aUw] \)\|\(\.\.ng$$\)\|\(LASH[RL]DI\)' | \
sort > $(TOPDIR)/System.map
endif
# This is part of the top-level export target
# Note that there may not be a head object if layout is handled
@@ -121,37 +154,38 @@ nuttx: $(HEAD_OBJ) board/libboard$(LIBEXT)
export_head: board/libboard$(LIBEXT) $(HEAD_OBJ)
ifneq ($(HEAD_OBJ),)
@if [ -d "$(EXPORT_DIR)/startup" ]; then \
$(Q) if [ -d "$(EXPORT_DIR)/startup" ]; then \
cp -f $(HEAD_OBJ) "$(EXPORT_DIR)/startup"; \
else \
echo "$(EXPORT_DIR)/startup does not exist"; \
exit 1; \
fi
exit 1; \
fi
endif
# Dependencies
.depend: Makefile chip/Make.defs $(SRCS)
@if [ -e board/Makefile ]; then \
$(MAKE) -C board TOPDIR="$(TOPDIR)" depend ; \
fi
@$(MKDEP) --dep-path chip --dep-path common --dep-path $(ARCH_SUBDIR) \
$(CC) -- $(CFLAGS) -- $(SRCS) >Make.dep
@touch $@
ifeq ($(BOARDMAKE),y)
$(Q) $(MAKE) -C board TOPDIR="$(TOPDIR)" depend
endif
$(Q) $(MKDEP) --dep-path chip --dep-path common --dep-path $(ARCH_SUBDIR) \
"$(CC)" -- $(CFLAGS) -- $(SRCS) >Make.dep
$(Q) touch $@
depend: .depend
clean:
@if [ -e board/Makefile ]; then \
$(MAKE) -C board TOPDIR="$(TOPDIR)" clean ; \
fi
@rm -f libarch$(LIBEXT) *~ .*.swp
ifeq ($(BOARDMAKE),y)
$(Q) $(MAKE) -C board TOPDIR="$(TOPDIR)" clean
endif
$(call DELFILE, libarch$(LIBEXT))
$(call CLEAN)
distclean: clean
@if [ -e board/Makefile ]; then \
$(MAKE) -C board TOPDIR="$(TOPDIR)" distclean ; \
fi
@rm -f Make.dep .depend
ifeq ($(BOARDMAKE),y)
$(Q) $(MAKE) -C board TOPDIR="$(TOPDIR)" distclean
endif
$(call DELFILE, Make.dep)
$(call DELFILE, .depend)
-include Make.dep
nuttx/arch/arm/src/armv7-m/Kconfig
+51
View File
@@ -0,0 +1,51 @@
#
# For a description of the syntax of this configuration file,
# see misc/tools/kconfig-language.txt.
#
comment "ARMV7M Configuration Options"
choice
prompt "Toolchain Selection"
default ARMV7M_TOOLCHAIN_CODESOURCERYW if HOST_WINDOWS
default ARMV7M_TOOLCHAIN_GNU_EABI if !HOST_WINDOWS
config ARMV7M_TOOLCHAIN_ATOLLIC
bool "Atollic Lite/Pro for Windows"
depends on HOST_WINDOWS
config ARMV7M_TOOLCHAIN_BUILDROOT
bool "Buildroot (Cygwin or Linux)"
depends on !WINDOWS_NATIVE
config ARMV7M_TOOLCHAIN_CODEREDL
bool "CodeRed for Linux"
depends on HOST_LINUX
config ARMV7M_TOOLCHAIN_CODEREDW
bool "CodeRed for Windows"
depends on HOST_WINDOWS
config ARMV7M_TOOLCHAIN_CODESOURCERYL
bool "CodeSourcery GNU toolchain under Linux"
depends on HOST_LINUX
config ARMV7M_TOOLCHAIN_CODESOURCERYW
bool "CodeSourcery GNU toolchain under Windows"
depends on HOST_WINDOWS
config ARMV7M_TOOLCHAIN_DEVKITARM
bool "devkitARM GNU toolchain"
depends on HOST_WINDOWS
config ARMV7M_TOOLCHAIN_GNU_EABI
bool "Generic GNU EABI toolchain"
---help---
This option should work for any modern GNU toolchain (GCC 4.5 or newer)
configured for arm-none-eabi.
config ARMV7M_TOOLCHAIN_RAISONANCE
bool "STMicro Raisonance for Windows"
depends on HOST_WINDOWS
endchoice
nuttx/arch/arm/src/armv7-m/memcpy.S
-351
View File
@@ -1,351 +0,0 @@
@
@ armv7m-optimised memcpy, apparently in the public domain
@
@ Obtained via a posting on the Stellaris forum:
@ http://e2e.ti.com/support/microcontrollers/stellaris_arm_cortex-m3_microcontroller/f/473/t/44360.aspx
@
@ Posted by rocksoft on Jul 24, 2008 10:19 AM
@
@ Hi,
@
@ I recently finished a "memcpy" replacement and thought it might be useful for others...
@
@ I've put some instructions and the code here:
@
@ http://www.rock-software.net/downloads/memcpy/
@
@ Hope it works for you as well as it did for me.
@
@ Liam.
@ @
@ ----------------------------------------------------------------------------
.syntax unified
.thumb
.cpu cortex-m3
@ ----------------------------------------------------------------------------
.global memcpy
@ ----------------------------------------------------------------------------
@ Optimised "general" copy routine
.text
@ We have 16 possible alignment combinations of src and dst, this jump table directs the copy operation
@ Bits: Src=00, Dst=00 - Long to Long copy
@ Bits: Src=00, Dst=01 - Long to Byte before half word
@ Bits: Src=00, Dst=10 - Long to Half word
@ Bits: Src=00, Dst=11 - Long to Byte before long word
@ Bits: Src=01, Dst=00 - Byte before half word to long
@ Bits: Src=01, Dst=01 - Byte before half word to byte before half word - Same alignment
@ Bits: Src=01, Dst=10 - Byte before half word to half word
@ Bits: Src=01, Dst=11 - Byte before half word to byte before long word
@ Bits: Src=10, Dst=00 - Half word to long word
@ Bits: Src=10, Dst=01 - Half word to byte before half word
@ Bits: Src=10, Dst=10 - Half word to half word - Same Alignment
@ Bits: Src=10, Dst=11 - Half word to byte before long word
@ Bits: Src=11, Dst=00 - Byte before long word to long word
@ Bits: Src=11, Dst=01 - Byte before long word to byte before half word
@ Bits: Src=11, Dst=11 - Byte before long word to half word
@ Bits: Src=11, Dst=11 - Byte before long word to Byte before long word - Same alignment
MEM_DataCopyTable:
.byte (MEM_DataCopy0 - MEM_DataCopyJump) >> 1
.byte (MEM_DataCopy1 - MEM_DataCopyJump) >> 1
.byte (MEM_DataCopy2 - MEM_DataCopyJump) >> 1
.byte (MEM_DataCopy3 - MEM_DataCopyJump) >> 1
.byte (MEM_DataCopy4 - MEM_DataCopyJump) >> 1
.byte (MEM_DataCopy5 - MEM_DataCopyJump) >> 1
.byte (MEM_DataCopy6 - MEM_DataCopyJump) >> 1
.byte (MEM_DataCopy7 - MEM_DataCopyJump) >> 1
.byte (MEM_DataCopy8 - MEM_DataCopyJump) >> 1
.byte (MEM_DataCopy9 - MEM_DataCopyJump) >> 1
.byte (MEM_DataCopy10 - MEM_DataCopyJump) >> 1
.byte (MEM_DataCopy11 - MEM_DataCopyJump) >> 1
.byte (MEM_DataCopy12 - MEM_DataCopyJump) >> 1
.byte (MEM_DataCopy13 - MEM_DataCopyJump) >> 1
.byte (MEM_DataCopy14 - MEM_DataCopyJump) >> 1
.byte (MEM_DataCopy15 - MEM_DataCopyJump) >> 1
.align 2
@ ----------------------------------------------------------------------------
//#define 10 10
MEM_LongCopyTable:
.byte (MEM_LongCopyEnd - MEM_LongCopyJump) >> 1 @ 0 bytes left
.byte 0 @ 4 bytes left
.byte (1 * 10) >> 1 @ 8 bytes left
.byte (2 * 10) >> 1 @ 12 bytes left
.byte (3 * 10) >> 1 @ 16 bytes left
.byte (4 * 10) >> 1 @ 20 bytes left
.byte (5 * 10) >> 1 @ 24 bytes left
.byte (6 * 10) >> 1 @ 28 bytes left
.byte (7 * 10) >> 1 @ 32 bytes left
.byte (8 * 10) >> 1 @ 36 bytes left
.align 2
@ ----------------------------------------------------------------------------
@ r0 = destination, r1 = source, r2 = length
.thumb_func
memcpy:
push {r14}
@ This allows the inner workings to "assume" a minimum amount of bytes
cmp r2, #4
blt MEM_DataCopyBytes
and r14, r0, #3 @ Get destination alignment bits
bfi r14, r1, #2, #2 @ Get source alignment bits
ldr r3, =MEM_DataCopyTable @ Jump table base
tbb [r3, r14] @ Perform jump on src/dst alignment bits
MEM_DataCopyJump:
.align 4
@ ----------------------------------------------------------------------------
@ Bits: Src=01, Dst=01 - Byte before half word to byte before half word - Same alignment
@ 3 bytes to read for long word aligning
MEM_DataCopy5:
ldrb r3, [r1], #0x01
strb r3, [r0], #0x01
sub r2, r2, #0x01
@ ----------------------------------------------------------------------------
@ Bits: Src=10, Dst=10 - Half word to half word - Same Alignment
@ 2 bytes to read for long word aligning
MEM_DataCopy10:
ldrb r3, [r1], #0x01
strb r3, [r0], #0x01
sub r2, r2, #0x01
@ ----------------------------------------------------------------------------
@ Bits: Src=11, Dst=11 - Byte before long word to Byte before long word - Same alignment
@ 1 bytes to read for long word aligning
MEM_DataCopy15:
ldrb r3, [r1], #0x01
strb r3, [r0], #0x01
sub r2, r2, #0x01
@ ----------------------------------------------------------------------------
@ Bits: Src=00, Dst=00 - Long to Long copy
MEM_DataCopy0:
@ Save regs
push {r4-r12}
cmp r2, #0x28
blt MEM_DataCopy0_2
MEM_DataCopy0_1:
ldmia r1!, {r3-r12}
stmia r0!, {r3-r12}
sub r2, r2, #0x28
cmp r2, #0x28
bge MEM_DataCopy0_1
MEM_DataCopy0_2:
@ Copy remaining long words
ldr r14, =MEM_LongCopyTable
lsr r11, r2, #0x02
tbb [r14, r11]
MEM_LongCopyJump:
ldr.w r3, [r1], #0x04 @ 4 bytes remain
str.w r3, [r0], #0x04
b MEM_LongCopyEnd
ldmia.w r1!, {r3-r4} @ 8 bytes remain
stmia.w r0!, {r3-r4}
b MEM_LongCopyEnd
ldmia.w r1!, {r3-r5} @ 12 bytes remain
stmia.w r0!, {r3-r5}
b MEM_LongCopyEnd
ldmia.w r1!, {r3-r6} @ 16 bytes remain
stmia.w r0!, {r3-r6}
b MEM_LongCopyEnd
ldmia.w r1!, {r3-r7} @ 20 bytes remain
stmia.w r0!, {r3-r7}
b MEM_LongCopyEnd
ldmia.w r1!, {r3-r8} @ 24 bytes remain
stmia.w r0!, {r3-r8}
b MEM_LongCopyEnd
ldmia.w r1!, {r3-r9} @ 28 bytes remain
stmia.w r0!, {r3-r9}
b MEM_LongCopyEnd
ldmia.w r1!, {r3-r10} @ 32 bytes remain
stmia.w r0!, {r3-r10}
b MEM_LongCopyEnd
ldmia.w r1!, {r3-r11} @ 36 bytes remain
stmia.w r0!, {r3-r11}
MEM_LongCopyEnd:
pop {r4-r12}
and r2, r2, #0x03 @ All the longs have been copied
@ ----------------------------------------------------------------------------
MEM_DataCopyBytes:
@ Deal with up to 3 remaining bytes
cmp r2, #0x00
it eq
popeq {pc}
ldrb r3, [r1], #0x01
strb r3, [r0], #0x01
subs r2, r2, #0x01
it eq
popeq {pc}
ldrb r3, [r1], #0x01
strb r3, [r0], #0x01
subs r2, r2, #0x01
it eq
popeq {pc}
ldrb r3, [r1], #0x01
strb r3, [r0], #0x01
pop {pc}
.align 4
@ ----------------------------------------------------------------------------
@ Bits: Src=01, Dst=11 - Byte before half word to byte before long word
@ 3 bytes to read for long word aligning the source
MEM_DataCopy7:
ldrb r3, [r1], #0x01
strb r3, [r0], #0x01
sub r2, r2, #0x01
@ ----------------------------------------------------------------------------
@ Bits: Src=10, Dst=00 - Half word to long word
@ 2 bytes to read for long word aligning the source
MEM_DataCopy8:
ldrb r3, [r1], #0x01
strb r3, [r0], #0x01
sub r2, r2, #0x01
@ ----------------------------------------------------------------------------
@ Bits: Src=11, Dst=01 - Byte before long word to byte before half word
@ 1 byte to read for long word aligning the source
MEM_DataCopy13:
ldrb r3, [r1], #0x01
strb r3, [r0], #0x01
sub r2, r2, #0x01
@ ----------------------------------------------------------------------------
@ Bits: Src=00, Dst=10 - Long to Half word
MEM_DataCopy2:
cmp r2, #0x28
blt MEM_DataCopy2_1
@ Save regs
push {r4-r12}
MEM_DataCopy2_2:
ldmia r1!, {r3-r12}
strh r3, [r0], #0x02
lsr r3, r3, #0x10
bfi r3, r4, #0x10, #0x10
lsr r4, r4, #0x10
bfi r4, r5, #0x10, #0x10
lsr r5, r5, #0x10
bfi r5, r6, #0x10, #0x10
lsr r6, r6, #0x10
bfi r6, r7, #0x10, #0x10
lsr r7, r7, #0x10
bfi r7, r8, #0x10, #0x10
lsr r8, r8, #0x10
bfi r8, r9, #0x10, #0x10
lsr r9, r9, #0x10
bfi r9, r10, #0x10, #0x10
lsr r10, r10, #0x10
bfi r10, r11, #0x10, #0x10
lsr r11, r11, #0x10
bfi r11, r12, #0x10, #0x10
stmia r0!, {r3-r11}
lsr r12, r12, #0x10
strh r12, [r0], #0x02
sub r2, r2, #0x28
cmp r2, #0x28
bge MEM_DataCopy2_2
pop {r4-r12}
MEM_DataCopy2_1: @ Read longs and write 2 x half words
cmp r2, #4
blt MEM_DataCopyBytes
ldr r3, [r1], #0x04
strh r3, [r0], #0x02
lsr r3, r3, #0x10
strh r3, [r0], #0x02
sub r2, r2, #0x04
b MEM_DataCopy2
@ ----------------------------------------------------------------------------
@ Bits: Src=01, Dst=00 - Byte before half word to long
@ Bits: Src=01, Dst=10 - Byte before half word to half word
@ 3 bytes to read for long word aligning the source
MEM_DataCopy4:
MEM_DataCopy6:
@ Read B and write B
ldrb r3, [r1], #0x01
strb r3, [r0], #0x01
sub r2, r2, #0x01
@ ----------------------------------------------------------------------------
@ Bits: Src=10, Dst=01 - Half word to byte before half word
@ Bits: Src=10, Dst=11 - Half word to byte before long word
@ 2 bytes to read for long word aligning the source
MEM_DataCopy9:
MEM_DataCopy11:
ldrb r3, [r1], #0x01
strb r3, [r0], #0x01
sub r2, r2, #0x01
@ ----------------------------------------------------------------------------
@ Bits: Src=11, Dst=00 - Byte before long word to long word
@ Bits: Src=11, Dst=11 - Byte before long word to half word
@ 1 byte to read for long word aligning the source
MEM_DataCopy12:
MEM_DataCopy14:
@ Read B and write B
ldrb r3, [r1], #0x01
strb r3, [r0], #0x01
sub r2, r2, #0x01
@ ----------------------------------------------------------------------------
@ Bits: Src=00, Dst=01 - Long to Byte before half word
@ Bits: Src=00, Dst=11 - Long to Byte before long word
MEM_DataCopy1: @ Read longs, write B->H->B
MEM_DataCopy3:
cmp r2, #4
blt MEM_DataCopyBytes
ldr r3, [r1], #0x04
strb r3, [r0], #0x01
lsr r3, r3, #0x08
strh r3, [r0], #0x02
lsr r3, r3, #0x10
strb r3, [r0], #0x01
sub r2, r2, #0x04
b MEM_DataCopy3
@ ----------------------------------------------------------------------------
nuttx/arch/arm/src/armv7-m/up_elf.c
+450
View File
@@ -0,0 +1,450 @@
/****************************************************************************
* arch/arm/src/armv7-m/up_elf.c
*
* Copyright (C) 2012 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdlib.h>
#include <elf32.h>
#include <errno.h>
#include <debug.h>
#include <arch/elf.h>
#include <nuttx/arch.h>
#include <nuttx/binfmt/elf.h>
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Private Data
****************************************************************************/
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: arch_checkarch
*
* Description:
* Given the ELF header in 'hdr', verify that the ELF file is appropriate
* for the current, configured architecture. Every architecture that uses
* the ELF loader must provide this function.
*
* Input Parameters:
* hdr - The ELF header read from the ELF file.
*
* Returned Value:
* True if the architecture supports this ELF file.
*
****************************************************************************/
bool arch_checkarch(FAR const Elf32_Ehdr *ehdr)
{
/* Make sure it's an ARM executable */
if (ehdr->e_machine != EM_ARM)
{
bdbg("Not for ARM: e_machine=%04x\n", ehdr->e_machine);
return -ENOEXEC;
}
/* Make sure that 32-bit objects are supported */
if (ehdr->e_ident[EI_CLASS] != ELFCLASS32)
{
bdbg("Need 32-bit objects: e_ident[EI_CLASS]=%02x\n", ehdr->e_ident[EI_CLASS]);
return -ENOEXEC;
}
/* Verify endian-ness */
#ifdef CONFIG_ENDIAN_BIG
if (ehdr->e_ident[EI_DATA] != ELFDATA2MSB)
#else
if (ehdr->e_ident[EI_DATA] != ELFDATA2LSB)
#endif
{
bdbg("Wrong endian-ness: e_ident[EI_DATA]=%02x\n", ehdr->e_ident[EI_DATA]);
return -ENOEXEC;
}
/* TODO: Check ABI here. */
return OK;
}
/****************************************************************************
* Name: arch_relocate and arch_relocateadd
*
* Description:
* Perform on architecture-specific ELF relocation. Every architecture
* that uses the ELF loader must provide this function.
*
* Input Parameters:
* rel - The relocation type
* sym - The ELF symbol structure containing the fully resolved value.
* addr - The address that requires the relocation.
*
* Returned Value:
* Zero (OK) if the relocation was successful. Otherwise, a negated errno
* value indicating the cause of the relocation failure.
*
****************************************************************************/
int arch_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
uintptr_t addr)
{
int32_t offset;
uint32_t upper_insn;
uint32_t lower_insn;
switch (ELF32_R_TYPE(rel->r_info))
{
case R_ARM_NONE:
{
/* No relocation */
}
break;
case R_ARM_PC24:
case R_ARM_CALL:
case R_ARM_JUMP24:
{
bvdbg("Performing PC24 [%d] link at addr %08lx [%08lx] to sym '%s' st_value=%08lx\n",
ELF32_R_TYPE(rel->r_info), (long)addr, (long)(*(uint32_t*)addr),
sym, (long)sym->st_value);
offset = (*(uint32_t*)addr & 0x00ffffff) << 2;
if (offset & 0x02000000)
{
offset -= 0x04000000;
}
offset += sym->st_value - addr;
if (offset & 3 || offset <= (int32_t) 0xfe000000 || offset >= (int32_t) 0x02000000)
{
bdbg(" ERROR: PC24 [%d] relocation out of range, offset=%08lx\n",
ELF32_R_TYPE(rel->r_info), offset);
return -EINVAL;
}
offset >>= 2;
*(uint32_t*)addr &= 0xff000000;
*(uint32_t*)addr |= offset & 0x00ffffff;
}
break;
case R_ARM_ABS32:
case R_ARM_TARGET1: /* New ABI: TARGET1 always treated as ABS32 */
{
bvdbg("Performing ABS32 link at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
(long)addr, (long)(*(uint32_t*)addr), sym, (long)sym->st_value);
*(uint32_t*)addr += sym->st_value;
}
break;
case R_ARM_THM_CALL:
case R_ARM_THM_JUMP24:
{
uint32_t S;
uint32_t J1;
uint32_t J2;
/* Thumb BL and B.W instructions. Encoding:
*
* upper_insn:
*
* 1 1 1 1 1 1
* 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
* +----------+---+-------------------------------+--------------+
* |1 1 1 |OP1| OP2 | | 32-Bit Instructions
* +----------+---+--+-----+----------------------+--------------+
* |1 1 1 | 1 0| S | imm10 | BL Instruction
* +----------+------+-----+-------------------------------------+
*
* lower_insn:
*
* 1 1 1 1 1 1
* 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
* +---+---------------------------------------------------------+
* |OP | | 32-Bit Instructions
* +---+--+---+---+---+------------------------------------------+
* |1 1 |J1 | 1 |J2 | imm11 | BL Instruction
* +------+---+---+---+------------------------------------------+
*
* The branch target is encoded in these bits:
*
* S = upper_insn[10]
* imm10 = upper_insn[0:9]
* imm11 = lower_insn[0:10]
* J1 = lower_insn[13]
* J2 = lower_insn[11]
*/
upper_insn = (uint32_t)(*(uint16_t*)addr);
lower_insn = (uint32_t)(*(uint16_t*)(addr + 2));
bvdbg("Performing THM_JUMP24 [%d] link at addr=%08lx [%04x %04x] to sym=%p st_value=%08lx\n",
ELF32_R_TYPE(rel->r_info), (long)addr, (int)upper_insn, (int)lower_insn,
sym, (long)sym->st_value);
/* Extract the 25-bit offset from the 32-bit instruction:
*
* offset[24] = S
* offset[23] = ~(J1 ^ S)
* offset[22] = ~(J2 ^ S)]
* offset[12:21] = imm10
* offset[1:11] = imm11
* offset[0] = 0
*/
S = (upper_insn >> 10) & 1;
J1 = (lower_insn >> 13) & 1;
J2 = (lower_insn >> 11) & 1;
offset = (S << 24) | /* S - > offset[24] */
((~(J1 ^ S) & 1) << 23) | /* J1 -> offset[23] */
((~(J2 ^ S) & 1) << 22) | /* J2 -> offset[22] */
((upper_insn & 0x03ff) << 12) | /* imm10 -> offset[12:21] */
((lower_insn & 0x07ff) << 1); /* imm11 -> offset[1:11] */
/* 0 -> offset[0] */
/* Sign extend */
if (offset & 0x01000000)
{
offset -= 0x02000000;
}
/* And perform the relocation */
bvdbg(" S=%d J1=%d J2=%d offset=%08lx branch target=%08lx\n",
S, J1, J2, (long)offset, offset + sym->st_value - addr);
offset += sym->st_value - addr;
/* Is this a function symbol? If so, then the branch target must be
* an odd Thumb address
*/
if (ELF32_ST_TYPE(sym->st_info) == STT_FUNC && (offset & 1) == 0)
{
bdbg(" ERROR: JUMP24 [%d] requires odd offset, offset=%08lx\n",
ELF32_R_TYPE(rel->r_info), offset);
return -EINVAL;
}
/* Check the range of the offset */
if (offset <= (int32_t)0xff000000 || offset >= (int32_t)0x01000000)
{
bdbg(" ERROR: JUMP24 [%d] relocation out of range, branch taget=%08lx\n",
ELF32_R_TYPE(rel->r_info), offset);
return -EINVAL;
}
/* Now, reconstruct the 32-bit instruction using the new, relocated
* branch target.
*/
S = (offset >> 24) & 1;
J1 = S ^ (~(offset >> 23) & 1);
J2 = S ^ (~(offset >> 22) & 1);
upper_insn = ((upper_insn & 0xf800) | (S << 10) | ((offset >> 12) & 0x03ff));
*(uint16_t*)addr = (uint16_t)upper_insn;
lower_insn = ((lower_insn & 0xd000) | (J1 << 13) | (J2 << 11) | ((offset >> 1) & 0x07ff));
*(uint16_t*)(addr + 2) = (uint16_t)lower_insn;
bvdbg(" S=%d J1=%d J2=%d insn [%04x %04x]\n",
S, J1, J2, (int)upper_insn, (int)lower_insn);
}
break;
case R_ARM_V4BX:
{
bvdbg("Performing V4BX link at addr=%08lx [%08lx]\n",
(long)addr, (long)(*(uint32_t*)addr));
/* Preserve only Rm and the condition code */
*(uint32_t*)addr &= 0xf000000f;
/* Change instruction to 'mov pc, Rm' */
*(uint32_t*)addr |= 0x01a0f000;
}
break;
case R_ARM_PREL31:
{
bvdbg("Performing PREL31 link at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
(long)addr, (long)(*(uint32_t*)addr), sym, (long)sym->st_value);
offset = *(uint32_t*)addr + sym->st_value - addr;
*(uint32_t*)addr = offset & 0x7fffffff;
}
break;
case R_ARM_MOVW_ABS_NC:
case R_ARM_MOVT_ABS:
{
bvdbg("Performing MOVx_ABS [%d] link at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
ELF32_R_TYPE(rel->r_info), (long)addr, (long)(*(uint32_t*)addr),
sym, (long)sym->st_value);
offset = *(uint32_t*)addr;
offset = ((offset & 0xf0000) >> 4) | (offset & 0xfff);
offset = (offset ^ 0x8000) - 0x8000;
offset += sym->st_value;
if (ELF32_R_TYPE(rel->r_info) == R_ARM_MOVT_ABS)
{
offset >>= 16;
}
*(uint32_t*)addr &= 0xfff0f000;
*(uint32_t*)addr |= ((offset & 0xf000) << 4) | (offset & 0x0fff);
}
break;
case R_ARM_THM_MOVW_ABS_NC:
case R_ARM_THM_MOVT_ABS:
{
/* Thumb BL and B.W instructions. Encoding:
*
* upper_insn:
*
* 1 1 1 1 1 1
* 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
* +----------+---+-------------------------------+--------------+
* |1 1 1 |OP1| OP2 | | 32-Bit Instructions
* +----------+---+--+-----+----------------------+--------------+
* |1 1 1 | 1 0| i | 1 0 1 1 0 0 | imm4 | MOVT Instruction
* +----------+------+-----+----------------------+--------------+
*
* lower_insn:
*
* 1 1 1 1 1 1
* 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
* +---+---------------------------------------------------------+
* |OP | | 32-Bit Instructions
* +---+----------+--------------+-------------------------------+
* |0 | imm3 | Rd | imm8 | MOVT Instruction
* +---+----------+--------------+-------------------------------+
*
* The 16-bit immediate value is encoded in these bits:
*
* i = imm16[11] = upper_insn[10]
* imm4 = imm16[12:15] = upper_insn[3:0]
* imm3 = imm16[8:10] = lower_insn[14:12]
* imm8 = imm16[0:7] = lower_insn[7:0]
*/
upper_insn = (uint32_t)(*(uint16_t*)addr);
lower_insn = (uint32_t)(*(uint16_t*)(addr + 2));
bvdbg("Performing THM_MOVx [%d] link at addr=%08lx [%04x %04x] to sym=%p st_value=%08lx\n",
ELF32_R_TYPE(rel->r_info), (long)addr, (int)upper_insn, (int)lower_insn,
sym, (long)sym->st_value);
/* Extract the 16-bit offset from the 32-bit instruction */
offset = ((upper_insn & 0x000f) << 12) | /* imm4 -> imm16[8:10] */
((upper_insn & 0x0400) << 1) | /* i -> imm16[11] */
((lower_insn & 0x7000) >> 4) | /* imm3 -> imm16[8:10] */
(lower_insn & 0x00ff); /* imm8 -> imm16[0:7] */
/* Sign extend */
offset = (offset ^ 0x8000) - 0x8000;
/* And perform the relocation */
bvdbg(" offset=%08lx branch target=%08lx\n",
(long)offset, offset + sym->st_value);
offset += sym->st_value;
/* Update the immediate value in the instruction. For MOVW we want the bottom
* 16-bits; for MOVT we want the top 16-bits.
*/
if (ELF32_R_TYPE(rel->r_info) == R_ARM_THM_MOVT_ABS)
{
offset >>= 16;
}
upper_insn = ((upper_insn & 0xfbf0) | ((offset & 0xf000) >> 12) | ((offset & 0x0800) >> 1));
*(uint16_t*)addr = (uint16_t)upper_insn;
lower_insn = ((lower_insn & 0x8f00) | ((offset & 0x0700) << 4) | (offset & 0x00ff));
*(uint16_t*)(addr + 2) = (uint16_t)lower_insn;
bvdbg(" insn [%04x %04x]\n",
(int)upper_insn, (int)lower_insn);
}
break;
default:
bdbg("Unsupported relocation: %d\n", ELF32_R_TYPE(rel->r_info));
return -EINVAL;
}
return OK;
}
int arch_relocateadd(FAR const Elf32_Rela *rel, FAR const Elf32_Sym *sym,
uintptr_t addr)
{
bdbg("RELA relocation not supported\n");
return -ENOSYS;
}
nuttx/arch/arm/src/armv7-m/up_hardfault.c
+1 -3
View File
@@ -57,9 +57,7 @@
/* Debug output from this file may interfere with context switching! */
#undef DEBUG_HARDFAULTS /* Define to debug hard faults */
#ifdef DEBUG_HARDFAULTS
#ifdef CONFIG_DEBUG_HARDFAULT
# define hfdbg(format, arg...) lldbg(format, ##arg)
#else
# define hfdbg(x...)
nuttx/arch/arm/src/armv7-m/up_memcpy.S
+416
View File
@@ -0,0 +1,416 @@
/************************************************************************************
* nuttx/arch/arm/src/armv7-m/up_memcpy.S
*
* armv7m-optimised memcpy, contributed by Mike Smith. Apparently in the public
* domain and is re-released here under the modified BSD license:
*
* Obtained via a posting on the Stellaris forum:
* http://e2e.ti.com/support/microcontrollers/\
* stellaris_arm_cortex-m3_microcontroller/f/473/t/44360.aspx
*
* Posted by rocksoft on Jul 24, 2008 10:19 AM
*
* Hi,
*
* I recently finished a "memcpy" replacement and thought it might be useful for
* others...
*
* I've put some instructions and the code here:
*
* http://www.rock-software.net/downloads/memcpy/
*
* Hope it works for you as well as it did for me.
*
* Liam.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
/************************************************************************************
* Global Symbols
************************************************************************************/
.global memcpy
.syntax unified
.thumb
.cpu cortex-m3
.file "up_memcpy.S"
/************************************************************************************
* .text
************************************************************************************/
.text
/************************************************************************************
* Private Constant Data
************************************************************************************/
/* We have 16 possible alignment combinations of src and dst, this jump table
* directs the copy operation
*
* Bits: Src=00, Dst=00 - Long to Long copy
* Bits: Src=00, Dst=01 - Long to Byte before half word
* Bits: Src=00, Dst=10 - Long to Half word
* Bits: Src=00, Dst=11 - Long to Byte before long word
* Bits: Src=01, Dst=00 - Byte before half word to long
* Bits: Src=01, Dst=01 - Byte before half word to byte before half word -
* Same alignment
* Bits: Src=01, Dst=10 - Byte before half word to half word
* Bits: Src=01, Dst=11 - Byte before half word to byte before long word
* Bits: Src=10, Dst=00 - Half word to long word
* Bits: Src=10, Dst=01 - Half word to byte before half word
* Bits: Src=10, Dst=10 - Half word to half word - Same Alignment
* Bits: Src=10, Dst=11 - Half word to byte before long word
* Bits: Src=11, Dst=00 - Byte before long word to long word
* Bits: Src=11, Dst=01 - Byte before long word to byte before half word
* Bits: Src=11, Dst=11 - Byte before long word to half word
* Bits: Src=11, Dst=11 - Byte before long word to Byte before long word -
* Same alignment
*/
MEM_DataCopyTable:
.byte (MEM_DataCopy0 - MEM_DataCopyJump) >> 1
.byte (MEM_DataCopy1 - MEM_DataCopyJump) >> 1
.byte (MEM_DataCopy2 - MEM_DataCopyJump) >> 1
.byte (MEM_DataCopy3 - MEM_DataCopyJump) >> 1
.byte (MEM_DataCopy4 - MEM_DataCopyJump) >> 1
.byte (MEM_DataCopy5 - MEM_DataCopyJump) >> 1
.byte (MEM_DataCopy6 - MEM_DataCopyJump) >> 1
.byte (MEM_DataCopy7 - MEM_DataCopyJump) >> 1
.byte (MEM_DataCopy8 - MEM_DataCopyJump) >> 1
.byte (MEM_DataCopy9 - MEM_DataCopyJump) >> 1
.byte (MEM_DataCopy10 - MEM_DataCopyJump) >> 1
.byte (MEM_DataCopy11 - MEM_DataCopyJump) >> 1
.byte (MEM_DataCopy12 - MEM_DataCopyJump) >> 1
.byte (MEM_DataCopy13 - MEM_DataCopyJump) >> 1
.byte (MEM_DataCopy14 - MEM_DataCopyJump) >> 1
.byte (MEM_DataCopy15 - MEM_DataCopyJump) >> 1
.align 2
MEM_LongCopyTable:
.byte (MEM_LongCopyEnd - MEM_LongCopyJump) >> 1 /* 0 bytes left */
.byte 0 /* 4 bytes left */
.byte (1 * 10) >> 1 /* 8 bytes left */
.byte (2 * 10) >> 1 /* 12 bytes left */
.byte (3 * 10) >> 1 /* 16 bytes left */
.byte (4 * 10) >> 1 /* 20 bytes left */
.byte (5 * 10) >> 1 /* 24 bytes left */
.byte (6 * 10) >> 1 /* 28 bytes left */
.byte (7 * 10) >> 1 /* 32 bytes left */
.byte (8 * 10) >> 1 /* 36 bytes left */
.align 2
/************************************************************************************
* Public Functions
************************************************************************************/
/************************************************************************************
* Name: memcpy
*
* Description:
* Optimised "general" copy routine
*
* Input Parameters:
* r0 = destination, r1 = source, r2 = length
*
************************************************************************************/
.thumb_func
memcpy:
push {r14}
/* This allows the inner workings to "assume" a minimum amount of bytes */
/* Quickly check for very short copies */
cmp r2, #4
blt MEM_DataCopyBytes
and r14, r0, #3 /* Get destination alignment bits */
bfi r14, r1, #2, #2 /* Get source alignment bits */
ldr r3, =MEM_DataCopyTable /* Jump table base */
tbb [r3, r14] /* Perform jump on src/dst alignment bits */
MEM_DataCopyJump:
.align 4
/* Bits: Src=01, Dst=01 - Byte before half word to byte before half word - Same alignment
* 3 bytes to read for long word aligning
*/
MEM_DataCopy5:
ldrb r3, [r1], #0x01
strb r3, [r0], #0x01
sub r2, r2, #0x01
/* Bits: Src=10, Dst=10 - Half word to half word - Same Alignment
* 2 bytes to read for long word aligning
*/
MEM_DataCopy10:
ldrb r3, [r1], #0x01
strb r3, [r0], #0x01
sub r2, r2, #0x01
/* Bits: Src=11, Dst=11 - Byte before long word to Byte before long word - Same alignment
* 1 bytes to read for long word aligning
*/
MEM_DataCopy15:
ldrb r3, [r1], #0x01
strb r3, [r0], #0x01
sub r2, r2, #0x01
/* Bits: Src=00, Dst=00 - Long to Long copy */
MEM_DataCopy0:
/* Save regs that may be used by memcpy */
push {r4-r12}
/* Check for short word-aligned copy */
cmp r2, #0x28
blt MEM_DataCopy0_2
/* Bulk copy loop */
MEM_DataCopy0_1:
ldmia r1!, {r3-r12}
stmia r0!, {r3-r12}
sub r2, r2, #0x28
cmp r2, #0x28
bge MEM_DataCopy0_1
/* Copy remaining long words */
MEM_DataCopy0_2:
/* Copy remaining long words */
ldr r14, =MEM_LongCopyTable
lsr r11, r2, #0x02
tbb [r14, r11]
/* longword copy branch table anchor */
MEM_LongCopyJump:
ldr.w r3, [r1], #0x04 /* 4 bytes remain */
str.w r3, [r0], #0x04
b MEM_LongCopyEnd
ldmia.w r1!, {r3-r4} /* 8 bytes remain */
stmia.w r0!, {r3-r4}
b MEM_LongCopyEnd
ldmia.w r1!, {r3-r5} /* 12 bytes remain */
stmia.w r0!, {r3-r5}
b MEM_LongCopyEnd
ldmia.w r1!, {r3-r6} /* 16 bytes remain */
stmia.w r0!, {r3-r6}
b MEM_LongCopyEnd
ldmia.w r1!, {r3-r7} /* 20 bytes remain */
stmia.w r0!, {r3-r7}
b MEM_LongCopyEnd
ldmia.w r1!, {r3-r8} /* 24 bytes remain */
stmia.w r0!, {r3-r8}
b MEM_LongCopyEnd
ldmia.w r1!, {r3-r9} /* 28 bytes remain */
stmia.w r0!, {r3-r9}
b MEM_LongCopyEnd
ldmia.w r1!, {r3-r10} /* 32 bytes remain */
stmia.w r0!, {r3-r10}
b MEM_LongCopyEnd
ldmia.w r1!, {r3-r11} /* 36 bytes remain */
stmia.w r0!, {r3-r11}
MEM_LongCopyEnd:
pop {r4-r12}
and r2, r2, #0x03 /* All the longs have been copied */
/* Deal with up to 3 remaining bytes */
MEM_DataCopyBytes:
/* Deal with up to 3 remaining bytes */
cmp r2, #0x00
it eq
popeq {pc}
ldrb r3, [r1], #0x01
strb r3, [r0], #0x01
subs r2, r2, #0x01
it eq
popeq {pc}
ldrb r3, [r1], #0x01
strb r3, [r0], #0x01
subs r2, r2, #0x01
it eq
popeq {pc}
ldrb r3, [r1], #0x01
strb r3, [r0], #0x01
pop {pc}
.align 4
/* Bits: Src=01, Dst=11 - Byte before half word to byte before long word
* 3 bytes to read for long word aligning the source
*/
MEM_DataCopy7:
ldrb r3, [r1], #0x01
strb r3, [r0], #0x01
sub r2, r2, #0x01
/* Bits: Src=10, Dst=00 - Half word to long word
* 2 bytes to read for long word aligning the source
*/
MEM_DataCopy8:
ldrb r3, [r1], #0x01
strb r3, [r0], #0x01
sub r2, r2, #0x01
/* Bits: Src=11, Dst=01 - Byte before long word to byte before half word
* 1 byte to read for long word aligning the source
*/
MEM_DataCopy13:
ldrb r3, [r1], #0x01
strb r3, [r0], #0x01
sub r2, r2, #0x01
/* Bits: Src=00, Dst=10 - Long to Half word */
MEM_DataCopy2:
cmp r2, #0x28
blt MEM_DataCopy2_1
/* Save regs */
push {r4-r12}
/* Bulk copy loop */
MEM_DataCopy2_2:
ldmia r1!, {r3-r12}
strh r3, [r0], #0x02
lsr r3, r3, #0x10
bfi r3, r4, #0x10, #0x10
lsr r4, r4, #0x10
bfi r4, r5, #0x10, #0x10
lsr r5, r5, #0x10
bfi r5, r6, #0x10, #0x10
lsr r6, r6, #0x10
bfi r6, r7, #0x10, #0x10
lsr r7, r7, #0x10
bfi r7, r8, #0x10, #0x10
lsr r8, r8, #0x10
bfi r8, r9, #0x10, #0x10
lsr r9, r9, #0x10
bfi r9, r10, #0x10, #0x10
lsr r10, r10, #0x10
bfi r10, r11, #0x10, #0x10
lsr r11, r11, #0x10
bfi r11, r12, #0x10, #0x10
stmia r0!, {r3-r11}
lsr r12, r12, #0x10
strh r12, [r0], #0x02
sub r2, r2, #0x28
cmp r2, #0x28
bge MEM_DataCopy2_2
pop {r4-r12}
MEM_DataCopy2_1: /* Read longs and write 2 x half words */
cmp r2, #4
blt MEM_DataCopyBytes
ldr r3, [r1], #0x04
strh r3, [r0], #0x02
lsr r3, r3, #0x10
strh r3, [r0], #0x02
sub r2, r2, #0x04
b MEM_DataCopy2
/* Bits: Src=01, Dst=00 - Byte before half word to long
* Bits: Src=01, Dst=10 - Byte before half word to half word
* 3 bytes to read for long word aligning the source
*/
MEM_DataCopy4:
MEM_DataCopy6:
/* Read B and write B */
ldrb r3, [r1], #0x01
strb r3, [r0], #0x01
sub r2, r2, #0x01
/* Bits: Src=10, Dst=01 - Half word to byte before half word
* Bits: Src=10, Dst=11 - Half word to byte before long word
* 2 bytes to read for long word aligning the source
*/
MEM_DataCopy9:
MEM_DataCopy11:
ldrb r3, [r1], #0x01
strb r3, [r0], #0x01
sub r2, r2, #0x01
/* Bits: Src=11, Dst=00 -chm Byte before long word to long word
* Bits: Src=11, Dst=11 - Byte before long word to half word
* 1 byte to read for long word aligning the source
*/
MEM_DataCopy12:
MEM_DataCopy14:
/* Read B and write B */
ldrb r3, [r1], #0x01
strb r3, [r0], #0x01
sub r2, r2, #0x01
/* Bits: Src=00, Dst=01 - Long to Byte before half word
* Bits: Src=00, Dst=11 - Long to Byte before long word
*/
MEM_DataCopy1: /* Read longs, write B->H->B */
MEM_DataCopy3:
cmp r2, #4
blt MEM_DataCopyBytes
ldr r3, [r1], #0x04
strb r3, [r0], #0x01
lsr r3, r3, #0x08
strh r3, [r0], #0x02
lsr r3, r3, #0x10
strb r3, [r0], #0x01
sub r2, r2, #0x04
b MEM_DataCopy3
.size memcpy, .-memcpy
.end
nuttx/lib/string/lib_memset.c → nuttx/arch/arm/src/common/arm-elf.h
+16 -22
View File
@@ -1,7 +1,7 @@
/************************************************************
* lib/string/lib_memset.c
/****************************************************************************
* arch/arm/src/common/arm-elf.h
*
* Copyright (C) 2007, 2011 Gregory Nutt. All rights reserved.
* Copyright (C) 2012 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@@ -31,29 +31,23 @@
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************/
****************************************************************************/
/************************************************************
* Compilation Switches
************************************************************/
#ifndef __ARCH_ARM_SRC_ARM_ELF_H
#define __ARCH_ARM_SRC_ARM_ELF_H
/************************************************************
/****************************************************************************
* Included Files
************************************************************/
****************************************************************************/
#include <nuttx/config.h>
#include <sys/types.h>
#include <string.h>
/************************************************************
* Global Functions
************************************************************/
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#ifndef CONFIG_ARCH_MEMSET
void *memset(void *s, int c, size_t n)
{
unsigned char *p = (unsigned char*)s;
while (n-- > 0) *p++ = c;
return s;
}
#endif
/****************************************************************************
* Public Types
****************************************************************************/
#endif /* __ARCH_ARM_SRC_ARM_ELF_H */
nuttx/arch/arm/src/stm32/Kconfig
+501 -121
View File
File diff suppressed because it is too large Load Diff
nuttx/arch/arm/src/stm32/chip/stm32_eth.h
-8
View File
@@ -835,14 +835,6 @@ struct eth_rxdesc_s
* Public Functions
****************************************************************************************************/
#undef EXTERN
#if defined(__cplusplus)
#define EXTERN extern "C"
extern "C" {
#else
#define EXTERN extern
#endif
#endif /* __ASSEMBLY__ */
#endif /* STM32_NETHERNET > 0 */
#endif /* __ARCH_ARM_SRC_STM32_CHIP_STM32_ETH_H */
nuttx/arch/arm/src/stm32/chip/stm32f100_pinmap.h
+158 -32
View File
@@ -6,6 +6,8 @@
* Copyright (C) 2012 Michael Smith. All Rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
* Uros Platise <uros.platise@isotel.eu>
* Michael Smith
* Freddie Chopin <freddie_chopin@op.pl>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@@ -49,6 +51,87 @@
* Pre-processor Definitions
************************************************************************************/
/* Alternate Pin Functions: */
/* ADC */
#define GPIO_ADC1_IN0 (GPIO_INPUT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN0)
#define GPIO_ADC1_IN1 (GPIO_INPUT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN1)
#define GPIO_ADC1_IN2 (GPIO_INPUT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN2)
#define GPIO_ADC1_IN3 (GPIO_INPUT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN3)
#define GPIO_ADC1_IN4 (GPIO_INPUT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN4)
#define GPIO_ADC1_IN5 (GPIO_INPUT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN5)
#define GPIO_ADC1_IN6 (GPIO_INPUT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN6)
#define GPIO_ADC1_IN7 (GPIO_INPUT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN7)
#define GPIO_ADC1_IN8 (GPIO_INPUT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN0)
#define GPIO_ADC1_IN9 (GPIO_INPUT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN1)
#define GPIO_ADC1_IN10 (GPIO_INPUT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTC|GPIO_PIN0)
#define GPIO_ADC1_IN11 (GPIO_INPUT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTC|GPIO_PIN1)
#define GPIO_ADC1_IN12 (GPIO_INPUT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTC|GPIO_PIN2)
#define GPIO_ADC1_IN13 (GPIO_INPUT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTC|GPIO_PIN3)
#define GPIO_ADC1_IN14 (GPIO_INPUT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTC|GPIO_PIN4)
#define GPIO_ADC1_IN15 (GPIO_INPUT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTC|GPIO_PIN5)
/* CEC */
#if defined(CONFIG_STM32_CEC_REMAP)
# define GPIO_CEC (GPIO_ALT|GPIO_CNF_AFOD|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN10)
#else
# define GPIO_CEC (GPIO_ALT|GPIO_CNF_AFOD|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN8)
#endif
/* DAC
* Note from RM0041, 11.2: "Once the DAC channelx is enabled, the corresponding
* GPIO pin (PA4 or PA5) is automatically connected to the analog converter
* output (DAC_OUTx). In order to avoid parasitic consumption, the PA4 or PA5
* pin should first be configured to analog (AIN)."
*/
#define GPIO_DAC_OUT1 (GPIO_INPUT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN4)
#define GPIO_DAC_OUT2 (GPIO_INPUT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN5)
/* FSMC */
/* TODO - VL devices in 100- and 144-pin packages have FSMC */
/* I2C */
#if defined(CONFIG_STM32_I2C1_REMAP)
# define GPIO_I2C1_SCL (GPIO_ALT|GPIO_CNF_AFOD|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN8)
# define GPIO_I2C1_SDA (GPIO_ALT|GPIO_CNF_AFOD|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN9)
#else
# define GPIO_I2C1_SCL (GPIO_ALT|GPIO_CNF_AFOD|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN6)
# define GPIO_I2C1_SDA (GPIO_ALT|GPIO_CNF_AFOD|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN7)
#endif
#define GPIO_I2C1_SMBA (GPIO_ALT|GPIO_CNF_INFLOAT|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN5)
#define GPIO_I2C2_SCL (GPIO_ALT|GPIO_CNF_AFOD|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN10)
#define GPIO_I2C2_SDA (GPIO_ALT|GPIO_CNF_AFOD|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN11)
#define GPIO_I2C2_SMBA (GPIO_ALT|GPIO_CNF_INFLOAT|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN12)
/* SPI */
#if defined(CONFIG_STM32_SPI1_REMAP)
# define GPIO_SPI1_NSS (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN15)
# define GPIO_SPI1_SCK (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN3)
# define GPIO_SPI1_MISO (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN4)
# define GPIO_SPI1_MOSI (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN5)
#else
# define GPIO_SPI1_NSS (GPIO_INPUT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN4)
# define GPIO_SPI1_SCK (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN5)
# define GPIO_SPI1_MISO (GPIO_INPUT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN6)
# define GPIO_SPI1_MOSI (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN7)
#endif
#define GPIO_SPI2_NSS (GPIO_INPUT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN12)
#define GPIO_SPI2_SCK (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN13)
#define GPIO_SPI2_MISO (GPIO_INPUT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN14)
#define GPIO_SPI2_MOSI (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN15)
#define GPIO_SPI3_NSS (GPIO_INPUT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN15)
#define GPIO_SPI3_SCK (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN3)
#define GPIO_SPI3_MISO (GPIO_INPUT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN4)
#define GPIO_SPI3_MOSI (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN5)
/* TIMERS */
#if defined(CONFIG_STM32_TIM1_FULL_REMAP)
@@ -186,6 +269,77 @@
# define GPIO_TIM4_CH4OUT (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN9)
#endif
#define GPIO_TIM5_CH1IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN0)
#define GPIO_TIM5_CH1OUT (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN0)
#define GPIO_TIM5_CH2IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN1)
#define GPIO_TIM5_CH2OUT (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN1)
#define GPIO_TIM5_CH3IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN2)
#define GPIO_TIM5_CH3OUT (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN2)
#define GPIO_TIM5_CH4IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN3)
#define GPIO_TIM5_CH4OUT (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN3)
#if defined(CONFIG_STM32_TIM12_REMAP)
# define GPIO_TIM12_CH1IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN12)
# define GPIO_TIM12_CH1OUT (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN12)
# define GPIO_TIM12_CH2IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN13)
# define GPIO_TIM12_CH2OUT (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN13)
#else
# define GPIO_TIM12_CH1IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTC|GPIO_PIN4)
# define GPIO_TIM12_CH1OUT (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN4)
# define GPIO_TIM12_CH2IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTC|GPIO_PIN5)
# define GPIO_TIM12_CH2OUT (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN5)
#endif
#if defined(CONFIG_STM32_TIM13_REMAP)
# define GPIO_TIM13_CH1IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN0)
# define GPIO_TIM13_CH1OUT (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN0)
#else
# define GPIO_TIM13_CH1IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTC|GPIO_PIN8)
# define GPIO_TIM13_CH1OUT (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN8)
#endif
#if defined(CONFIG_STM32_TIM14_REMAP)
# define GPIO_TIM14_CH1IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN1)
# define GPIO_TIM14_CH1OUT (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN1)
#else
# define GPIO_TIM14_CH1IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTC|GPIO_PIN9)
# define GPIO_TIM14_CH1OUT (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN9)
#endif
#if defined(CONFIG_STM32_TIM15_REMAP)
# define GPIO_TIM15_CH1IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN14)
# define GPIO_TIM15_CH1OUT (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN14)
# define GPIO_TIM15_CH2IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN15)
# define GPIO_TIM15_CH2OUT (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN15)
#else
# define GPIO_TIM15_CH1IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN2)
# define GPIO_TIM15_CH1OUT (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN2)
# define GPIO_TIM15_CH2IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN3)
# define GPIO_TIM15_CH2OUT (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN3)
#endif
#define GPIO_TIM15_BKIN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN9)
#define GPIO_TIM15_CH1N (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN15)
#if defined(CONFIG_STM32_TIM16_REMAP)
# define GPIO_TIM16_CH1IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN6)
# define GPIO_TIM16_CH1OUT (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN6)
#else
# define GPIO_TIM16_CH1IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN8)
# define GPIO_TIM16_CH1OUT (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN8)
#endif
#define GPIO_TIM16_BKIN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN5)
#define GPIO_TIM16_CH1N (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN6)
#if defined(CONFIG_STM32_TIM17_REMAP)
# define GPIO_TIM17_CH1IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN7)
# define GPIO_TIM17_CH1OUT (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN7)
#else
# define GPIO_TIM17_CH1IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN9)
# define GPIO_TIM17_CH1OUT (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN9)
#endif
#define GPIO_TIM17_BKIN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN10)
#define GPIO_TIM17_CH1N (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN7)
/* USART */
#if defined(CONFIG_STM32_USART1_REMAP)
@@ -230,38 +384,10 @@
# define GPIO_USART3_RTS (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN14)
#endif
/* SPI */
#define GPIO_UART4_TX (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN10)
#define GPIO_UART4_RX (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTC|GPIO_PIN11)
#if defined(CONFIG_STM32_SPI1_REMAP)
# define GPIO_SPI1_NSS (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN15)
# define GPIO_SPI1_SCK (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN3)
# define GPIO_SPI1_MISO (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN4)
# define GPIO_SPI1_MOSI (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN5)
#else
# define GPIO_SPI1_NSS (GPIO_INPUT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN4)
# define GPIO_SPI1_SCK (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN5)
# define GPIO_SPI1_MISO (GPIO_INPUT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN6)
# define GPIO_SPI1_MOSI (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN7)
#endif
#define GPIO_SPI2_NSS (GPIO_INPUT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN12)
#define GPIO_SPI2_SCK (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN13)
#define GPIO_SPI2_MISO (GPIO_INPUT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN14)
#define GPIO_SPI2_MOSI (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN15)
/* I2C */
#if defined(CONFIG_STM32_I2C1_REMAP)
# define GPIO_I2C1_SCL (GPIO_ALT|GPIO_CNF_AFOD|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN8)
# define GPIO_I2C1_SDA (GPIO_ALT|GPIO_CNF_AFOD|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN9)
#else
# define GPIO_I2C1_SCL (GPIO_ALT|GPIO_CNF_AFOD|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN6)
# define GPIO_I2C1_SDA (GPIO_ALT|GPIO_CNF_AFOD|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN7)
#endif
#define GPIO_I2C1_SMBA (GPIO_ALT|GPIO_CNF_INFLOAT|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN5)
#define GPIO_I2C2_SCL (GPIO_ALT|GPIO_CNF_AFOD|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN10)
#define GPIO_I2C2_SDA (GPIO_ALT|GPIO_CNF_AFOD|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN11)
#define GPIO_I2C2_SMBA (GPIO_ALT|GPIO_CNF_INFLOAT|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN12)
#define GPIO_UART5_TX (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN12)
#define GPIO_UART5_RX (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTD|GPIO_PIN2)
#endif /* __ARCH_ARM_SRC_STM32_CHIP_STM32F100_PINMAP_H */
nuttx/arch/arm/src/stm32/chip/stm32f103vc_pinmap.h
+1 -1
View File
@@ -129,7 +129,7 @@
#if 0 /* Needs further investigation */
#define GPIO_DAC_OUT1 (GPIO_INPUT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUTz|GPIO_PORTA|GPIO_PIN4)
#define GPIO_DAC_OUT1 (GPIO_INPUT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN4)
#define GPIO_DAC_OUT2 (GPIO_INPUT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN5)
#endif
nuttx/arch/arm/src/stm32/chip/stm32f103ze_pinmap.h
+47 -47
View File
@@ -50,53 +50,53 @@
/* ADC */
#define GPIO_ADC1_IN0 (GPIO_ALT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN0)
#define GPIO_ADC1_IN1 (GPIO_ALT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN1)
#define GPIO_ADC1_IN2 (GPIO_ALT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN2)
#define GPIO_ADC1_IN3 (GPIO_ALT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN3)
#define GPIO_ADC1_IN4 (GPIO_ALT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN4)
#define GPIO_ADC1_IN5 (GPIO_ALT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN5)
#define GPIO_ADC1_IN6 (GPIO_ALT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN6)
#define GPIO_ADC1_IN7 (GPIO_ALT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN7)
#define GPIO_ADC1_IN8 (GPIO_ALT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN0)
#define GPIO_ADC1_IN9 (GPIO_ALT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN1)
#define GPIO_ADC1_IN10 (GPIO_ALT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTC|GPIO_PIN0)
#define GPIO_ADC1_IN11 (GPIO_ALT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTC|GPIO_PIN1)
#define GPIO_ADC1_IN12 (GPIO_ALT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTC|GPIO_PIN2)
#define GPIO_ADC1_IN13 (GPIO_ALT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTC|GPIO_PIN3)
#define GPIO_ADC1_IN14 (GPIO_ALT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTC|GPIO_PIN4)
#define GPIO_ADC1_IN15 (GPIO_ALT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTC|GPIO_PIN5)
#define GPIO_ADC1_IN0 (GPIO_INPUT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN0)
#define GPIO_ADC1_IN1 (GPIO_INPUT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN1)
#define GPIO_ADC1_IN2 (GPIO_INPUT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN2)
#define GPIO_ADC1_IN3 (GPIO_INPUT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN3)
#define GPIO_ADC1_IN4 (GPIO_INPUT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN4)
#define GPIO_ADC1_IN5 (GPIO_INPUT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN5)
#define GPIO_ADC1_IN6 (GPIO_INPUT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN6)
#define GPIO_ADC1_IN7 (GPIO_INPUT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN7)
#define GPIO_ADC1_IN8 (GPIO_INPUT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN0)
#define GPIO_ADC1_IN9 (GPIO_INPUT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN1)
#define GPIO_ADC1_IN10 (GPIO_INPUT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTC|GPIO_PIN0)
#define GPIO_ADC1_IN11 (GPIO_INPUT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTC|GPIO_PIN1)
#define GPIO_ADC1_IN12 (GPIO_INPUT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTC|GPIO_PIN2)
#define GPIO_ADC1_IN13 (GPIO_INPUT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTC|GPIO_PIN3)
#define GPIO_ADC1_IN14 (GPIO_INPUT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTC|GPIO_PIN4)
#define GPIO_ADC1_IN15 (GPIO_INPUT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTC|GPIO_PIN5)
#define GPIO_ADC2_IN0 (GPIO_ALT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN0)
#define GPIO_ADC2_IN1 (GPIO_ALT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN1)
#define GPIO_ADC2_IN2 (GPIO_ALT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN2)
#define GPIO_ADC2_IN3 (GPIO_ALT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN3)
#define GPIO_ADC2_IN4 (GPIO_ALT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN4)
#define GPIO_ADC2_IN5 (GPIO_ALT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN5)
#define GPIO_ADC2_IN6 (GPIO_ALT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN6)
#define GPIO_ADC2_IN7 (GPIO_ALT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN7)
#define GPIO_ADC2_IN8 (GPIO_ALT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN0)
#define GPIO_ADC2_IN9 (GPIO_ALT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN1)
#define GPIO_ADC2_IN10 (GPIO_ALT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTC|GPIO_PIN0)
#define GPIO_ADC2_IN11 (GPIO_ALT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTC|GPIO_PIN1)
#define GPIO_ADC2_IN12 (GPIO_ALT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTC|GPIO_PIN2)
#define GPIO_ADC2_IN13 (GPIO_ALT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTC|GPIO_PIN3)
#define GPIO_ADC2_IN14 (GPIO_ALT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTC|GPIO_PIN4)
#define GPIO_ADC2_IN15 (GPIO_ALT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTC|GPIO_PIN5)
#define GPIO_ADC2_IN0 (GPIO_INPUT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN0)
#define GPIO_ADC2_IN1 (GPIO_INPUT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN1)
#define GPIO_ADC2_IN2 (GPIO_INPUT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN2)
#define GPIO_ADC2_IN3 (GPIO_INPUT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN3)
#define GPIO_ADC2_IN4 (GPIO_INPUT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN4)
#define GPIO_ADC2_IN5 (GPIO_INPUT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN5)
#define GPIO_ADC2_IN6 (GPIO_INPUT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN6)
#define GPIO_ADC2_IN7 (GPIO_INPUT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN7)
#define GPIO_ADC2_IN8 (GPIO_INPUT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN0)
#define GPIO_ADC2_IN9 (GPIO_INPUT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN1)
#define GPIO_ADC2_IN10 (GPIO_INPUT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTC|GPIO_PIN0)
#define GPIO_ADC2_IN11 (GPIO_INPUT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTC|GPIO_PIN1)
#define GPIO_ADC2_IN12 (GPIO_INPUT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTC|GPIO_PIN2)
#define GPIO_ADC2_IN13 (GPIO_INPUT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTC|GPIO_PIN3)
#define GPIO_ADC2_IN14 (GPIO_INPUT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTC|GPIO_PIN4)
#define GPIO_ADC2_IN15 (GPIO_INPUT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTC|GPIO_PIN5)
#define GPIO_ADC3_IN0 (GPIO_ALT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN0)
#define GPIO_ADC3_IN1 (GPIO_ALT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN1)
#define GPIO_ADC3_IN2 (GPIO_ALT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN2)
#define GPIO_ADC3_IN3 (GPIO_ALT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN3)
#define GPIO_ADC3_IN4 (GPIO_ALT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTF|GPIO_PIN6)
#define GPIO_ADC3_IN5 (GPIO_ALT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTF|GPIO_PIN7)
#define GPIO_ADC3_IN6 (GPIO_ALT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTF|GPIO_PIN8)
#define GPIO_ADC3_IN7 (GPIO_ALT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTF|GPIO_PIN9)
#define GPIO_ADC3_IN8 (GPIO_ALT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTF|GPIO_PIN10)
#define GPIO_ADC3_IN10 (GPIO_ALT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTC|GPIO_PIN0)
#define GPIO_ADC3_IN11 (GPIO_ALT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTC|GPIO_PIN1)
#define GPIO_ADC3_IN12 (GPIO_ALT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTC|GPIO_PIN2)
#define GPIO_ADC3_IN13 (GPIO_ALT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTC|GPIO_PIN3)
#define GPIO_ADC3_IN0 (GPIO_INPUT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN0)
#define GPIO_ADC3_IN1 (GPIO_INPUT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN1)
#define GPIO_ADC3_IN2 (GPIO_INPUT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN2)
#define GPIO_ADC3_IN3 (GPIO_INPUT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN3)
#define GPIO_ADC3_IN4 (GPIO_INPUT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTF|GPIO_PIN6)
#define GPIO_ADC3_IN5 (GPIO_INPUT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTF|GPIO_PIN7)
#define GPIO_ADC3_IN6 (GPIO_INPUT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTF|GPIO_PIN8)
#define GPIO_ADC3_IN7 (GPIO_INPUT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTF|GPIO_PIN9)
#define GPIO_ADC3_IN8 (GPIO_INPUT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTF|GPIO_PIN10)
#define GPIO_ADC3_IN10 (GPIO_INPUT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTC|GPIO_PIN0)
#define GPIO_ADC3_IN11 (GPIO_INPUT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTC|GPIO_PIN1)
#define GPIO_ADC3_IN12 (GPIO_INPUT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTC|GPIO_PIN2)
#define GPIO_ADC3_IN13 (GPIO_INPUT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTC|GPIO_PIN3)
/* DAC - "Once the DAC channelx is enabled, the corresponding GPIO pin
* (PA4 or PA5) is automatically connected to the analog converter output
@@ -104,8 +104,8 @@
* should first be configured to analog (AIN)."
*/
#define GPIO_DAC_OUT1 (GPIO_ALT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTF|GPIO_PIN10)
#define GPIO_DAC_OUT2 (GPIO_ALT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PIN10)
#define GPIO_DAC_OUT1 (GPIO_INPUT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN4)
#define GPIO_DAC_OUT2 (GPIO_INPUT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN5)
/* TIMERS */
nuttx/arch/arm/src/stm32/chip/stm32f105vb_pinmap.h
+1 -1
View File
@@ -85,7 +85,7 @@
#endif
#if 0 /* Needs further investigation */
#define GPIO_DAC_OUT1 (GPIO_INPUT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUTz|GPIO_PORTA|GPIO_PIN4)
#define GPIO_DAC_OUT1 (GPIO_INPUT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN4)
#define GPIO_DAC_OUT2 (GPIO_INPUT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN5)
#endif
nuttx/arch/arm/src/stm32/chip/stm32f107vc_pinmap.h
+1 -1
View File
@@ -85,7 +85,7 @@
#endif
#if 0 /* Needs further investigation */
#define GPIO_DAC_OUT1 (GPIO_INPUT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUTz|GPIO_PORTA|GPIO_PIN4)
#define GPIO_DAC_OUT1 (GPIO_INPUT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN4)
#define GPIO_DAC_OUT2 (GPIO_INPUT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN5)
#endif
nuttx/arch/arm/src/stm32/chip/stm32f10xxx_gpio.h
+23
View File
@@ -59,6 +59,7 @@
#define STM32_AFIO_EXTICR2_OFFSET 0x000c /* External interrupt configuration register 2 */
#define STM32_AFIO_EXTICR3_OFFSET 0x0010 /* External interrupt configuration register 3 */
#define STM32_AFIO_EXTICR4_OFFSET 0x0014 /* External interrupt configuration register 4 */
#define STM32_AFIO_MAPR2_OFFSET 0x001c /* AF remap and debug I/O configuration register 2 */
/* Register Addresses ***************************************************************/
@@ -373,5 +374,27 @@
#define AFIO_EXTICR4_EXTI15_SHIFT (12) /* Bits 15-12: EXTI 15 configuration */
#define AFIO_EXTICR4_EXTI15_MASK (AFIO_EXTICR_PORT_MASK << AFIO_EXTICR4_EXTI15_SHIFT)
/* AF remap and debug I/O configuration register 2 */
#ifdef CONFIG_STM32_VALUELINE
# define AFIO_MAPR2_TIM15_REMAP (1 << 0) /* Bit 0: TIM15 remapping */
# define AFIO_MAPR2_TIM16_REMAP (1 << 1) /* Bit 1: TIM16 remapping */
# define AFIO_MAPR2_TIM17_REMAP (1 << 2) /* Bit 2: TIM17 remapping */
# define AFIO_MAPR2_CEC_REMAP (1 << 3) /* Bit 3: CEC remapping */
# define AFIO_MAPR2_TIM1_DMA_REMAP (1 << 4) /* Bit 4: TIM1 DMA remapping */
#else
# define AFIO_MAPR2_TIM9_REMAP (1 << 5) /* Bit 5: TIM9 remapping */
# define AFIO_MAPR2_TIM10_REMAP (1 << 6) /* Bit 6: TIM10 remapping */
# define AFIO_MAPR2_TIM11_REMAP (1 << 7) /* Bit 7: TIM11 remapping */
#endif
#define AFIO_MAPR2_TIM13_REMAP (1 << 8) /* Bit 8: TIM13 remapping */
#define AFIO_MAPR2_TIM14_REMAP (1 << 9) /* Bit 9: TIM14 remapping */
#define AFIO_MAPR2_FSMC_NADV (1 << 10) /* Bit 10: NADV connect/disconnect */
#ifdef CONFIG_STM32_VALUELINE
# define AFIO_MAPR2_TIM67_DAC_DMA_REMAP (1 << 11) /* Bit 11: TIM67_DAC DMA remapping */
# define AFIO_MAPR2_TIM12_REMAP (1 << 12) /* Bit 12: TIM12 remapping */
# define AFIO_MAPR2_MISC_REMAP (1 << 13) /* Bit 13: Miscellaneous features remapping */
#endif
#endif /* __ARCH_ARM_SRC_STM32_CHIP_STM32F10XXX_GPIO_H */
nuttx/arch/arm/src/stm32/chip/stm32f10xxx_memorymap.h
+34 -27
View File
@@ -60,7 +60,9 @@
#define STM32_TIM5_BASE 0x40000c00 /* 0x40000c00 - 0x40000fff: TIM5 timer */
#define STM32_TIM6_BASE 0x40001000 /* 0x40001000 - 0x400013ff: TIM6 timer */
#define STM32_TIM7_BASE 0x40001400 /* 0x40001400 - 0x400007ff: TIM7 timer */
/* 0x40001800 - 0x40000fff: Reserved */
#define STM32_TIM12_BASE 0x40001800 /* 0x40001800 - 0x40001bff: TIM12 timer */
#define STM32_TIM13_BASE 0x40001c00 /* 0x40001c00 - 0x40001fff: TIM13 timer */
#define STM32_TIM14_BASE 0x40002000 /* 0x40002000 - 0x400023ff: TIM14 timer */
#define STM32_RTC_BASE 0x40002800 /* 0x40002800 - 0x40002bff: RTC */
#define STM32_WWDG_BASE 0x40002c00 /* 0x40002C00 - 0x40002fff: Window watchdog (WWDG) */
#define STM32_IWDG_BASE 0x40003000 /* 0x40003000 - 0x400033ff: Independent watchdog (IWDG) */
@@ -83,8 +85,8 @@
#define STM32_BKP_BASE 0x40006c00 /* 0x40006c00 - 0x40006fff: Backup registers (BKP) */
#define STM32_PWR_BASE 0x40007000 /* 0x40007000 - 0x400073ff: Power control PWR */
#define STM32_DAC_BASE 0x40007400 /* 0x40007400 - 0x400077ff: DAC */
/* 0x40007800 - 0x4000ffff: Reserved */
#define STM32_CEC_BASE 0x40007800 /* 0x40007800 - 0x40007bff: CEC */
/* 0x40007c00 - 0x4000ffff: Reserved */
/* APB2 bus */
#define STM32_AFIO_BASE 0x40010000 /* 0x40010000 - 0x400103ff: AFIO */
@@ -102,44 +104,49 @@
#define STM32_SPI1_BASE 0x40013000 /* 0x40013000 - 0x400133ff: SPI1 */
#define STM32_TIM8_BASE 0x40013400 /* 0x40013400 - 0x400137ff: TIM8 timer */
#define STM32_USART1_BASE 0x40013800 /* 0x40013800 - 0x40013bff: USART1 */
#define STM32_ADC3_BASE 0x40012800 /* 0x40012800 - 0x40013fff: ADC3 */
/* 0x40014000 - 0x40017fff: Reserved */
#define STM32_ADC3_BASE 0x40012800 /* 0x40012800 - 0x40013c00: ADC3 */
/* 0x40013c00 - 0x40013fff: Reserved */
#define STM32_TIM15_BASE 0x40014400 /* 0x40014400 - 0x400147ff: TIM15 */
#define STM32_TIM16_BASE 0x40014400 /* 0x40014400 - 0x400147ff: TIM16 */
#define STM32_TIM17_BASE 0x40014800 /* 0x40014800 - 0x40014bff: TIM17 */
/* 0x40014c00 - 0x4001ffff: Reserved */
/* AHB bus */
#define STM32_SDIO_BASE 0x40018000 /* 0x40018000 - 0x400183ff: SDIO */
/* 0x40018400 - 0x40017fff: Reserved */
#define STM32_DMA1_BASE 0x40020000 /* 0x40020000 - 0x400203ff: DMA1 */
#define STM32_DMA2_BASE 0x40020400 /* 0x40020000 - 0x400207ff: DMA2 */
/* 0x40020800 - 0x40020fff: Reserved */
#define STM32_RCC_BASE 0x40021000 /* 0x40021000 - 0x400213ff: Reset and Clock control RCC */
/* 0x40021400 - 0x40021fff: Reserved */
#define STM32_OTGFS_BASE 0x50000000 /* 0x50000000 - 0x500003ff: USB OTG FS */
#define STM32_FLASHIF_BASE 0x40022000 /* 0x40022000 - 0x400223ff: Flash memory interface */
#define STM32_CRC_BASE 0x40028000 /* 0x40023000 - 0x400233ff: CRC */
/* 0x40023400 - 0x40027fff: Reserved */
#define STM32_ETHERNET_BASE 0x40028000 /* 0x40028000 - 0x40029fff: Ethernet */
/* 0x40030000 - 0x4fffffff: Reserved */
#define STM32_SDIO_BASE 0x40018000 /* 0x40018000 - 0x400183ff: SDIO */
/* 0x40018400 - 0x40017fff: Reserved */
#define STM32_DMA1_BASE 0x40020000 /* 0x40020000 - 0x400203ff: DMA1 */
#define STM32_DMA2_BASE 0x40020400 /* 0x40020000 - 0x400207ff: DMA2 */
/* 0x40020800 - 0x40020fff: Reserved */
#define STM32_RCC_BASE 0x40021000 /* 0x40021000 - 0x400213ff: Reset and Clock control RCC */
/* 0x40021400 - 0x40021fff: Reserved */
#define STM32_OTGFS_BASE 0x50000000 /* 0x50000000 - 0x500003ff: USB OTG FS */
#define STM32_FLASHIF_BASE 0x40022000 /* 0x40022000 - 0x400223ff: Flash memory interface */
#define STM32_CRC_BASE 0x40028000 /* 0x40023000 - 0x400233ff: CRC */
/* 0x40023400 - 0x40027fff: Reserved */
#define STM32_ETHERNET_BASE 0x40028000 /* 0x40028000 - 0x40029fff: Ethernet */
/* 0x40030000 - 0x4fffffff: Reserved */
/* Peripheral BB base */
#define STM32_PERIPHBB_BASE 0x42000000
#define STM32_PERIPHBB_BASE 0x42000000
/* Flexible SRAM controller (FSMC) */
#define STM32_FSMC_BANK1 0x60000000 /* 0x60000000-0x6fffffff: 256Mb NOR/SRAM */
#define STM32_FSMC_BANK2 0x70000000 /* 0x70000000-0x7fffffff: 256Mb NAND FLASH */
#define STM32_FSMC_BANK3 0x80000000 /* 0x80000000-0x8fffffff: 256Mb NAND FLASH */
#define STM32_FSMC_BANK4 0x90000000 /* 0x90000000-0x9fffffff: 256Mb PC CARD*/
#define STM32_IS_EXTSRAM(a) ((((uint32_t)(a)) & STM32_REGION_MASK) == STM32_FSMC_BANK1)
#define STM32_FSMC_BANK1 0x60000000 /* 0x60000000-0x6fffffff: 256Mb NOR/SRAM */
#define STM32_FSMC_BANK2 0x70000000 /* 0x70000000-0x7fffffff: 256Mb NAND FLASH */
#define STM32_FSMC_BANK3 0x80000000 /* 0x80000000-0x8fffffff: 256Mb NAND FLASH */
#define STM32_FSMC_BANK4 0x90000000 /* 0x90000000-0x9fffffff: 256Mb PC CARD*/
#define STM32_IS_EXTSRAM(a) ((((uint32_t)(a)) & STM32_REGION_MASK) == STM32_FSMC_BANK1)
#define STM32_FSMC_BASE 0xa0000000 /* 0xa0000000-0xbfffffff: 512Mb FSMC register block */
#define STM32_FSMC_BASE 0xa0000000 /* 0xa0000000-0xbfffffff: 512Mb FSMC register block */
/* Other registers -- see armv7-m/nvic.h for standard Cortex-M3 registers in this
* address range
*/
#define STM32_SCS_BASE 0xe000e000
#define STM32_DEBUGMCU_BASE 0xe0042000
#define STM32_SCS_BASE 0xe000e000
#define STM32_DEBUGMCU_BASE 0xe0042000
#endif /* __ARCH_ARM_SRC_STM32_CHIP_STM32F10XXX_MEMORYMAP_H */
nuttx/arch/arm/src/stm32/chip/stm32f10xxx_rcc.h
+63 -15
View File
@@ -163,7 +163,9 @@
# define RCC_CFGR_PLLMUL_CLKx14 (12 << RCC_CFGR_PLLMUL_SHIFT) /* 1100: PLL input clock x 14 */
# define RCC_CFGR_PLLMUL_CLKx15 (13 << RCC_CFGR_PLLMUL_SHIFT) /* 1101: PLL input clock x 15 */
# define RCC_CFGR_PLLMUL_CLKx16 (14 << RCC_CFGR_PLLMUL_SHIFT) /* 111x: PLL input clock x 16 */
#define RCC_CFGR_USBPRE (1 << 22) /* Bit 22: USB prescaler */
#ifndef CONFIG_STM32_VALUELINE
# define RCC_CFGR_USBPRE (1 << 22) /* Bit 22: USB prescaler */
#endif
#define RCC_CFGR_MCO_SHIFT (24) /* Bits 26-24: Microcontroller Clock Output */
#define RCC_CFGR_MCO_MASK (0x0f << RCC_CFGR_MCO_SHIFT)
# define RCC_CFGR_NOCLK (0 << RCC_CFGR_MCO_SHIFT) /* 0xx: No clock */
@@ -207,12 +209,22 @@
#define TCC_APB2RSTR_IOPFRST (1 << 7) /* Bit 7: IO port F reset */
#define TCC_APB2RSTR_IOPGRST (1 << 8) /* Bit 8: IO port G reset */
#define RCC_APB2RSTR_ADC1RST (1 << 9) /* Bit 9: ADC 1 interface reset */
#define RCC_APB2RSTR_ADC2RST (1 << 10) /* Bit 10: ADC 2 interface reset */
#ifndef CONFIG_STM32_VALUELINE
# define RCC_APB2RSTR_ADC2RST (1 << 10) /* Bit 10: ADC 2 interface reset */
#endif
#define RCC_APB2RSTR_TIM1RST (1 << 11) /* Bit 11: TIM1 Timer reset */
#define RCC_APB2RSTR_SPI1RST (1 << 12) /* Bit 12: SPI 1 reset */
#define RCC_APB2RSTR_TIM8RST (1 << 13) /* Bit 13: TIM8 Timer reset */
#ifndef CONFIG_STM32_VALUELINE
# define RCC_APB2RSTR_TIM8RST (1 << 13) /* Bit 13: TIM8 Timer reset */
#endif
#define RCC_APB2RSTR_USART1RST (1 << 14) /* Bit 14: USART1 reset */
#define RCC_APB2RSTR_ADC3RST (1 << 15) /* Bit 15: ADC3 interface reset */
#ifndef CONFIG_STM32_VALUELINE
# define RCC_APB2RSTR_ADC3RST (1 << 15) /* Bit 15: ADC3 interface reset */
#else
# define RCC_APB2RSTR_TIM15RST (1 << 16) /* Bit 16: TIM15 reset */
# define RCC_APB2RSTR_TIM16RST (1 << 17) /* Bit 17: TIM16 reset */
# define RCC_APB2RSTR_TIM17RST (1 << 18) /* Bit 18: TIM17 reset */
#endif
/* APB1 Peripheral reset register */
@@ -222,6 +234,11 @@
#define RCC_APB1RSTR_TIM5RST (1 << 3) /* Bit 3: Timer 5 reset */
#define RCC_APB1RSTR_TIM6RST (1 << 4) /* Bit 4: Timer 6 reset */
#define RCC_APB1RSTR_TIM7RST (1 << 5) /* Bit 5: Timer 7 reset */
#ifdef CONFIG_STM32_VALUELINE
# define RCC_APB1RSTR_TIM12RST (1 << 6) /* Bit 6: TIM12 reset */
# define RCC_APB1RSTR_TIM13RST (1 << 7) /* Bit 7: TIM13 reset */
# define RCC_APB1RSTR_TIM14RST (1 << 8) /* Bit 8: TIM14 reset */
#endif
#define RCC_APB1RSTR_WWDGRST (1 << 11) /* Bit 11: Window Watchdog reset */
#define RCC_APB1RSTR_SPI2RST (1 << 14) /* Bit 14: SPI 2 reset */
#define RCC_APB1RSTR_SPI3RST (1 << 15) /* Bit 15: SPI 3 reset */
@@ -231,12 +248,17 @@
#define RCC_APB1RSTR_UART5RST (1 << 20) /* Bit 18: UART 5 reset */
#define RCC_APB1RSTR_I2C1RST (1 << 21) /* Bit 21: I2C 1 reset */
#define RCC_APB1RSTR_I2C2RST (1 << 22) /* Bit 22: I2C 2 reset */
#define RCC_APB1RSTR_USBRST (1 << 23) /* Bit 23: USB reset */
#define RCC_APB1RSTR_CAN1RST (1 << 25) /* Bit 25: CAN1 reset */
#define RCC_APB1RSTR_CAN2RST (1 << 26) /* Bit 26: CAN2 reset */
#ifndef CONFIG_STM32_VALUELINE
# define RCC_APB1RSTR_USBRST (1 << 23) /* Bit 23: USB reset */
# define RCC_APB1RSTR_CAN1RST (1 << 25) /* Bit 25: CAN1 reset */
# define RCC_APB1RSTR_CAN2RST (1 << 26) /* Bit 26: CAN2 reset */
#endif
#define RCC_APB1RSTR_BKPRST (1 << 27) /* Bit 27: Backup interface reset */
#define RCC_APB1RSTR_PWRRST (1 << 28) /* Bit 28: Power interface reset */
#define RCC_APB1RSTR_DACRST (1 << 29) /* Bit 29: DAC interface reset */
#ifdef CONFIG_STM32_VALUELINE
# define RCC_APB1RSTR_CECRST (1 << 30) /* Bit 30: CEC reset */
#endif
/* AHB Peripheral Clock enable register */
@@ -246,7 +268,9 @@
#define RCC_AHBENR_FLITFEN (1 << 4) /* Bit 4: FLITF clock enable */
#define RCC_AHBENR_CRCEN (1 << 6) /* Bit 6: CRC clock enable */
#define RCC_AHBENR_FSMCEN (1 << 8) /* Bit 8: FSMC clock enable */
#define RCC_AHBENR_SDIOEN (1 << 10) /* Bit 10: SDIO clock enable */
#ifndef CONFIG_STM32_VALUELINE
# define RCC_AHBENR_SDIOEN (1 << 10) /* Bit 10: SDIO clock enable */
#endif
#ifdef CONFIG_STM32_CONNECTIVITYLINE
# define RCC_AHBENR_ETHMACEN (1 << 14) /* Bit 14: Ethernet MAC clock enable */
# define RCC_AHBENR_ETHMACTXEN (1 << 15) /* Bit 15: Ethernet MAC TX clock enable */
@@ -272,12 +296,22 @@
#define RCC_APB2ENR_IOPFEN (1 << 7) /* Bit 7: I/O port F clock enable */
#define RCC_APB2ENR_IOPGEN (1 << 8) /* Bit 8: I/O port G clock enable */
#define RCC_APB2ENR_ADC1EN (1 << 9) /* Bit 9: ADC 1 interface clock enable */
#define RCC_APB2ENR_ADC2EN (1 << 10) /* Bit 10: ADC 2 interface clock enable */
#ifndef CONFIG_STM32_VALUELINE
# define RCC_APB2ENR_ADC2EN (1 << 10) /* Bit 10: ADC 2 interface clock enable */
#endif
#define RCC_APB2ENR_TIM1EN (1 << 11) /* Bit 11: TIM1 Timer clock enable */
#define RCC_APB2ENR_SPI1EN (1 << 12) /* Bit 12: SPI 1 clock enable */
#define RCC_APB2ENR_TIM8EN (1 << 13) /* Bit 13: TIM8 Timer clock enable */
#ifndef CONFIG_STM32_VALUELINE
# define RCC_APB2ENR_TIM8EN (1 << 13) /* Bit 13: TIM8 Timer clock enable */
#endif
#define RCC_APB2ENR_USART1EN (1 << 14) /* Bit 14: USART1 clock enable */
#define RCC_APB2ENR_ADC3EN (1 << 15) /* Bit 14: ADC3 interface clock enable */
#ifndef CONFIG_STM32_VALUELINE
# define RCC_APB2ENR_ADC3EN (1 << 15) /* Bit 14: ADC3 interface clock enable */
#else
# define RCC_APB2ENR_TIM15EN (1 << 16) /* Bit 16: TIM15 clock enable */
# define RCC_APB2ENR_TIM16EN (1 << 17) /* Bit 17: TIM16 clock enable */
# define RCC_APB2ENR_TIM17EN (1 << 18) /* Bit 18: TIM17 clock enable */
#endif
/* APB1 Peripheral Clock enable register */
@@ -287,6 +321,11 @@
#define RCC_APB1ENR_TIM5EN (1 << 3) /* Bit 3: Timer 5 clock enable */
#define RCC_APB1ENR_TIM6EN (1 << 4) /* Bit 4: Timer 6 clock enable */
#define RCC_APB1ENR_TIM7EN (1 << 5) /* Bit 5: Timer 7 clock enable */
#ifdef CONFIG_STM32_VALUELINE
# define RCC_APB1ENR_TIM12EN (1 << 6) /* Bit 6: Timer 12 clock enable */
# define RCC_APB1ENR_TIM13EN (1 << 7) /* Bit 7: Timer 13 clock enable */
# define RCC_APB1ENR_TIM14EN (1 << 8) /* Bit 8: Timer 14 clock enable */
#endif
#define RCC_APB1ENR_WWDGEN (1 << 11) /* Bit 11: Window Watchdog clock enable */
#define RCC_APB1ENR_SPI2EN (1 << 14) /* Bit 14: SPI 2 clock enable */
#define RCC_APB1ENR_SPI3EN (1 << 15) /* Bit 15: SPI 3 clock enable */
@@ -296,12 +335,17 @@
#define RCC_APB1ENR_UART5EN (1 << 20) /* Bit 20: UART 5 clock enable */
#define RCC_APB1ENR_I2C1EN (1 << 21) /* Bit 21: I2C 1 clock enable */
#define RCC_APB1ENR_I2C2EN (1 << 22) /* Bit 22: I2C 2 clock enable */
#define RCC_APB1ENR_USBEN (1 << 23) /* Bit 23: USB clock enable */
#define RCC_APB1ENR_CAN1EN (1 << 25) /* Bit 25: CAN1 clock enable */
#define RCC_APB1ENR_CAN2EN (1 << 26) /* Bit 25: CAN2 clock enable */
#ifndef CONFIG_STM32_VALUELINE
# define RCC_APB1ENR_USBEN (1 << 23) /* Bit 23: USB clock enable */
# define RCC_APB1ENR_CAN1EN (1 << 25) /* Bit 25: CAN1 clock enable */
# define RCC_APB1ENR_CAN2EN (1 << 26) /* Bit 25: CAN2 clock enable */
#endif
#define RCC_APB1ENR_BKPEN (1 << 27) /* Bit 27: Backup interface clock enable */
#define RCC_APB1ENR_PWREN (1 << 28) /* Bit 28: Power interface clock enable */
#define RCC_APB1ENR_DACEN (1 << 29) /* Bit 29: DAC interface clock enable */
#ifdef CONFIG_STM32_VALUELINE
# define RCC_APB1ENR_CECEN (1 << 30) /* Bit 30: CEC clock enable */
#endif
/* Backup domain control register */
@@ -331,7 +375,7 @@
#if defined(CONFIG_STM32_VALUELINE) || defined(CONFIG_STM32_CONNECTIVITYLINE)
/* Clock configuration register 2 (For connectivity line only) */
/* Clock configuration register 2 (For value line and connectivity line only) */
#define RCC_CFGR2_PREDIV1_SHIFT (0)
#define RCC_CFGR2_PREDIV1_MASK (0x0f << RCC_CFGR2_PREDIV1_SHIFT)
@@ -352,6 +396,10 @@
# define RCC_CFGR2_PREDIV1d15 (14 << RCC_CFGR2_PREDIV1_SHIFT)
# define RCC_CFGR2_PREDIV1d16 (15 << RCC_CFGR2_PREDIV1_SHIFT)
#endif
#ifdef CONFIG_STM32_CONNECTIVITYLINE
#define RCC_CFGR2_PREDIV2_SHIFT (4)
#define RCC_CFGR2_PREDIV2_MASK (0x0f << RCC_CFGR2_PREDIV2_SHIFT)
# define RCC_CFGR2_PREDIV2d1 (0 << RCC_CFGR2_PREDIV2_SHIFT)
nuttx/arch/arm/src/stm32/chip/stm32f10xxx_vectors.h
+67 -5
View File
@@ -49,15 +49,77 @@
* definition that provides the number of supported vectors.
*/
#ifdef CONFIG_ARMV7M_CMNVECTOR
# ifdef CONFIG_ARMV7M_CMNVECTOR
/* Reserve 60 interrupt table entries for I/O interrupts. */
/* Reserve 61 interrupt table entries for I/O interrupts. */
# define ARMV7M_PERIPHERAL_INTERRUPTS 60
# define ARMV7M_PERIPHERAL_INTERRUPTS 61
#else
# error This target requires CONFIG_ARMV7M_CMNVECTOR
#endif /* CONFIG_ARMV7M_CMNVECTOR */
VECTOR(stm32_wwdg, STM32_IRQ_WWDG) /* Vector 16+0: Window Watchdog interrupt */
VECTOR(stm32_pvd, STM32_IRQ_PVD) /* Vector 16+1: PVD through EXTI Line detection interrupt */
VECTOR(stm32_tamper, STM32_IRQ_TAMPER) /* Vector 16+2: Tamper interrupt */
VECTOR(stm32_rtc, STM32_IRQ_RTC) /* Vector 16+3: RTC Wakeup through EXTI line interrupt */
VECTOR(stm32_flash, STM32_IRQ_FLASH) /* Vector 16+4: Flash global interrupt */
VECTOR(stm32_rcc, STM32_IRQ_RCC) /* Vector 16+5: RCC global interrupt */
VECTOR(stm32_exti0, STM32_IRQ_EXTI0) /* Vector 16+6: EXTI Line 0 interrupt */
VECTOR(stm32_exti1, STM32_IRQ_EXTI1) /* Vector 16+7: EXTI Line 1 interrupt */
VECTOR(stm32_exti2, STM32_IRQ_EXTI2) /* Vector 16+8: EXTI Line 2 interrupt */
VECTOR(stm32_exti3, STM32_IRQ_EXTI3) /* Vector 16+9: EXTI Line 3 interrupt */
VECTOR(stm32_exti4, STM32_IRQ_EXTI4) /* Vector 16+10: EXTI Line 4 interrupt */
VECTOR(stm32_dma1ch1, STM32_IRQ_DMA1CH1) /* Vector 16+11: DMA1 Channel 1 global interrupt */
VECTOR(stm32_dma1ch2, STM32_IRQ_DMA1CH2) /* Vector 16+12: DMA1 Channel 2 global interrupt */
VECTOR(stm32_dma1ch3, STM32_IRQ_DMA1CH3) /* Vector 16+13: DMA1 Channel 3 global interrupt */
VECTOR(stm32_dma1ch4, STM32_IRQ_DMA1CH4) /* Vector 16+14: DMA1 Channel 4 global interrupt */
VECTOR(stm32_dma1ch5, STM32_IRQ_DMA1CH5) /* Vector 16+15: DMA1 Channel 5 global interrupt */
VECTOR(stm32_dma1ch6, STM32_IRQ_DMA1CH6) /* Vector 16+16: DMA1 Channel 6 global interrupt */
VECTOR(stm32_dma1ch7, STM32_IRQ_DMA1CH7) /* Vector 16+17: DMA1 Channel 7 global interrupt */
VECTOR(stm32_adc1, STM32_IRQ_ADC1) /* Vector 16+18: ADC1 global interrupt */
UNUSED(STM32_IRQ_RESERVED0) /* Vector 16+19: Reserved 0 */
UNUSED(STM32_IRQ_RESERVED1) /* Vector 16+20: Reserved 1 */
UNUSED(STM32_IRQ_RESERVED2) /* Vector 16+21: Reserved 2 */
UNUSED(STM32_IRQ_RESERVED3) /* Vector 16+22: Reserved 3 */
VECTOR(stm32_exti95, STM32_IRQ_EXTI95) /* Vector 16+23: EXTI Line[9:5] interrupts */
VECTOR(stm32_tim1brk, STM32_IRQ_TIM1BRK) /* Vector 16+24: TIM1 Break interrupt; TIM15 global interrupt */
VECTOR(stm32_tim1up, STM32_IRQ_TIM1UP) /* Vector 16+25: TIM1 Update interrupt; TIM16 global interrupt */
VECTOR(stm32_tim1trgcom, STM32_IRQ_TIM1TRGCOM) /* Vector 16+26: TIM1 Trigger and Commutation interrupts; TIM17 global interrupt */
VECTOR(stm32_tim1cc, STM32_IRQ_TIM1CC) /* Vector 16+27: TIM1 Capture Compare interrupt */
VECTOR(stm32_tim2, STM32_IRQ_TIM2) /* Vector 16+28: TIM2 global interrupt */
VECTOR(stm32_tim3, STM32_IRQ_TIM3) /* Vector 16+29: TIM3 global interrupt */
VECTOR(stm32_tim4, STM32_IRQ_TIM4) /* Vector 16+30: TIM4 global interrupt */
VECTOR(stm32_i2c1ev, STM32_IRQ_I2C1EV) /* Vector 16+31: I2C1 event interrupt */
VECTOR(stm32_i2c1er, STM32_IRQ_I2C1ER) /* Vector 16+32: I2C1 error interrupt */
VECTOR(stm32_i2c2ev, STM32_IRQ_I2C2EV) /* Vector 16+33: I2C2 event interrupt */
VECTOR(stm32_i2c2er, STM32_IRQ_I2C2ER) /* Vector 16+34: I2C2 error interrupt */
VECTOR(stm32_spi1, STM32_IRQ_SPI1) /* Vector 16+35: SPI1 global interrupt */
VECTOR(stm32_spi2, STM32_IRQ_SPI2) /* Vector 16+36: SPI2 global interrupt */
VECTOR(stm32_usart1, STM32_IRQ_USART1) /* Vector 16+37: USART1 global interrupt */
VECTOR(stm32_usart2, STM32_IRQ_USART2) /* Vector 16+38: USART2 global interrupt */
VECTOR(stm32_usart3, STM32_IRQ_USART3) /* Vector 16+39: USART3 global interrupt */
VECTOR(stm32_exti1510, STM32_IRQ_EXTI1510) /* Vector 16+40: EXTI Line[15:10] interrupts */
VECTOR(stm32_rtcalr, STM32_IRQ_RTCALR) /* Vector 16+41: RTC alarms (A and B) through EXTI line interrupt */
VECTOR(stm32_cec, STM32_IRQ_CEC) /* Vector 16+42: CEC global interrupt */
VECTOR(stm32_tim12, STM32_IRQ_TIM12) /* Vector 16+43: TIM12 global interrupt */
VECTOR(stm32_tim13, STM32_IRQ_TIM13) /* Vector 16+44: TIM13 global interrupt */
VECTOR(stm32_tim14, STM32_IRQ_TIM14) /* Vector 16+45: TIM14 global interrupt */
UNUSED(STM32_IRQ_RESERVED4) /* Vector 16+46: Reserved 4 */
UNUSED(STM32_IRQ_RESERVED5) /* Vector 16+47: Reserved 5 */
VECTOR(stm32_fsmc, STM32_IRQ_FSMC) /* Vector 16+48: FSMC global interrupt */
UNUSED(STM32_IRQ_RESERVED6) /* Vector 16+49: Reserved 6 */
VECTOR(stm32_tim5, STM32_IRQ_TIM5) /* Vector 16+50: TIM5 global interrupt */
VECTOR(stm32_spi3, STM32_IRQ_SPI3) /* Vector 16+51: SPI3 global interrupt */
VECTOR(stm32_uart4, STM32_IRQ_UART4) /* Vector 16+52: USART2 global interrupt */
VECTOR(stm32_uart5, STM32_IRQ_UART5) /* Vector 16+53: USART5 global interrupt */
VECTOR(stm32_tim6, STM32_IRQ_TIM6) /* Vector 16+54: TIM6 global interrupt */
VECTOR(stm32_tim7, STM32_IRQ_TIM7) /* Vector 16+55: TIM7 global interrupt */
VECTOR(stm32_dma2ch1, STM32_IRQ_DMA2CH1) /* Vector 16+56: DMA2 Channel 1 global interrupt */
VECTOR(stm32_dma2ch2, STM32_IRQ_DMA2CH2) /* Vector 16+57: DMA2 Channel 2 global interrupt */
VECTOR(stm32_dma2ch3, STM32_IRQ_DMA2CH3) /* Vector 16+58: DMA2 Channel 3 global interrupt */
VECTOR(stm32_dma2ch45, STM32_IRQ_DMA2CH45) /* Vector 16+59: DMA2 Channel 4 and 5 global interrupt */
VECTOR(stm32_dma2ch5, STM32_IRQ_DMA2CH5) /* Vector 16+60: DMA2 Channel 5 global interrupt */
# endif /* CONFIG_ARMV7M_CMNVECTOR */
#elif defined(CONFIG_STM32_CONNECTIVITYLINE)
nuttx/arch/arm/src/stm32/chip/stm32f20xxx_pinmap.h
+1 -1
View File
@@ -222,7 +222,7 @@
#define GPIO_ETH_MII_TX_EN_2 (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTG|GPIO_PIN11)
#define GPIO_ETH_PPS_OUT_1 (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN5)
#define GPIO_ETH_PPS_OUT_2 (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTG|GPIO_PIN8)
#define GPIO_ETH_RMII_CRS_DV (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULLGPIO_PORTA|GPIO_PIN7)
#define GPIO_ETH_RMII_CRS_DV (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN7)
#define GPIO_ETH_RMII_REF_CLK (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN1)
#define GPIO_ETH_RMII_RXD0 (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN4)
#define GPIO_ETH_RMII_RXD1 (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN5)
nuttx/arch/arm/src/stm32/chip/stm32f40xxx_pinmap.h
+1 -1
View File
@@ -222,7 +222,7 @@
#define GPIO_ETH_MII_TX_EN_2 (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTG|GPIO_PIN11)
#define GPIO_ETH_PPS_OUT_1 (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN5)
#define GPIO_ETH_PPS_OUT_2 (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTG|GPIO_PIN8)
#define GPIO_ETH_RMII_CRS_DV (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULLGPIO_PORTA|GPIO_PIN7)
#define GPIO_ETH_RMII_CRS_DV (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN7)
#define GPIO_ETH_RMII_REF_CLK (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN1)
#define GPIO_ETH_RMII_RXD0 (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN4)
#define GPIO_ETH_RMII_RXD1 (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN5)
nuttx/arch/arm/src/stm32/stm32_adc.h
+1 -1
View File
@@ -281,7 +281,7 @@
#if defined(ADC1_HAVE_TIMER) || defined(ADC2_HAVE_TIMER) || defined(ADC3_HAVE_TIMER)
# define ADC_HAVE_TIMER 1
# if defined(CONFIG_STM32_STM32F10XX) && defined(CONFIG_STM32_FORCEPOWER)
# if defined(CONFIG_STM32_STM32F10XX) && !defined(CONFIG_STM32_FORCEPOWER)
# warning "CONFIG_STM32_FORCEPOWER must be defined to enable the timer(s)"
# endif
#else
nuttx/arch/arm/src/stm32/stm32_eth.c
+11
View File
@@ -2594,6 +2594,17 @@ static int stm32_phyinit(FAR struct stm32_ethmac_s *priv)
}
up_mdelay(PHY_RESET_DELAY);
/* Perform any necessary, board-specific PHY initialization */
#ifdef CONFIG_STM32_PHYINIT
ret = stm32_phy_boardinitialize(0);
if (ret < 0)
{
ndbg("Failed to initialize the PHY: %d\n", ret);
return ret;
}
#endif
/* Special workaround for the Davicom DM9161 PHY is required. */
#ifdef CONFIG_PHY_DM9161
nuttx/arch/arm/src/stm32/stm32_eth.h
+29 -6
View File
@@ -66,14 +66,13 @@ extern "C" {
* Function: stm32_ethinitialize
*
* Description:
* Initialize the Ethernet driver for one interface. If the STM32 chip
* supports multiple Ethernet controllers, then board specific logic
* must implement up_netinitialize() and call this function to initialize
* the desired interfaces.
* Initialize the Ethernet driver for one interface. If the STM32 chip supports
* multiple Ethernet controllers, then board specific logic must implement
* up_netinitialize() and call this function to initialize the desired interfaces.
*
* Parameters:
* intf - In the case where there are multiple EMACs, this value
* identifies which EMAC is to be initialized.
* intf - In the case where there are multiple EMACs, this value identifies which
* EMAC is to be initialized.
*
* Returned Value:
* OK on success; Negated errno on failure.
@@ -86,6 +85,30 @@ extern "C" {
EXTERN int stm32_ethinitialize(int intf);
#endif
/************************************************************************************
* Function: stm32_phy_boardinitialize
*
* Description:
* Some boards require specialized initialization of the PHY before it can be used.
* This may include such things as configuring GPIOs, resetting the PHY, etc. If
* CONFIG_STM32_PHYINIT is defined in the configuration then the board specific
* logic must provide stm32_phyinitialize(); The STM32 Ethernet driver will call
* this function one time before it first uses the PHY.
*
* Parameters:
* intf - Always zero for now.
*
* Returned Value:
* OK on success; Negated errno on failure.
*
* Assumptions:
*
************************************************************************************/
#ifdef CONFIG_STM32_PHYINIT
EXTERN int stm32_phy_boardinitialize(int intf);
#endif
#undef EXTERN
#if defined(__cplusplus)
}
nuttx/arch/arm/src/stm32/stm32_i2c.c
+201 -188
View File
@@ -107,17 +107,23 @@
#if !defined(CONFIG_STM32_I2CTIMEOSEC) && !defined(CONFIG_STM32_I2CTIMEOMS)
# define CONFIG_STM32_I2CTIMEOSEC 0
# define CONFIG_STM32_I2CTIMEOMS 500 /* Default is 500 milliseconds */
# define CONFIG_STM32_I2CTIMEOMS 500 /* Default is 500 milliseconds */
#elif !defined(CONFIG_STM32_I2CTIMEOSEC)
# define CONFIG_STM32_I2CTIMEOSEC 0 /* User provided milliseconds */
#elif !defined(CONFIG_STM32_I2CTIMEOMS)
# define CONFIG_STM32_I2CTIMEOMS 0 /* User provided seconds */
# define CONFIG_STM32_I2CTIMEOMS 0 /* User provided seconds */
#endif
/* Interrupt wait time timeout in system timer ticks */
#define CONFIG_STM32_I2CTIMEOTICKS \
(SEC2TICK(CONFIG_STM32_I2CTIMEOSEC) + MSEC2TICK(CONFIG_STM32_I2CTIMEOMS))
#ifndef CONFIG_STM32_I2CTIMEOTICKS
# define CONFIG_STM32_I2CTIMEOTICKS \
(SEC2TICK(CONFIG_STM32_I2CTIMEOSEC) + MSEC2TICK(CONFIG_STM32_I2CTIMEOMS))
#endif
#ifndef CONFIG_STM32_I2C_DYNTIMEO_STARTSTOP
# define CONFIG_STM32_I2C_DYNTIMEO_STARTSTOP TICK2USEC(CONFIG_STM32_I2CTIMEOTICKS)
#endif
/* On the STM32F103ZE, there is an internal conflict between I2C1 and FSMC. In that
* case, it is necessary to disable FSMC before each I2C1 access and re-enable FSMC
@@ -129,6 +135,18 @@
# define I2C1_FSMC_CONFLICT
#endif
/* Macros to convert a I2C pin to a GPIO output */
#if defined(CONFIG_STM32_STM32F10XX)
# define I2C_OUTPUT (GPIO_OUTPUT | GPIO_OUTPUT_SET | GPIO_CNF_OUTOD | \
GPIO_MODE_50MHz)
#elif defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F40XX)
# define I2C_OUTPUT (GPIO_OUTPUT | GPIO_FLOAT | GPIO_OPENDRAIN |\
GPIO_SPEED_50MHz | GPIO_OUTPUT_SET)
#endif
#define MKI2C_OUTPUT(p) (((p) & (GPIO_PORT_MASK | GPIO_PIN_MASK)) | I2C_OUTPUT)
/* Debug ****************************************************************************/
/* CONFIG_DEBUG_I2C + CONFIG_DEBUG enables general I2C debug output. */
@@ -200,18 +218,16 @@ struct stm32_trace_s
struct stm32_i2c_config_s
{
uint32_t base; /* I2C base address */
uint32_t base; /* I2C base address */
uint32_t clk_bit; /* Clock enable bit */
uint32_t reset_bit; /* Reset bit */
uint32_t scl_pin; /* GPIO configuration for SCL as SCL */
uint32_t sda_pin; /* GPIO configuration for SDA as SDA */
#ifndef CONFIG_I2C_POLLED
int ( *isr)(int, void *); /* Interrupt handler */
int (*isr)(int, void *); /* Interrupt handler */
uint32_t ev_irq; /* Event IRQ */
uint32_t er_irq; /* Error IRQ */
#endif
uint32_t clk_bit; /* Clock enable bit */
uint32_t reset_bit; /* Reset bit */
uint32_t scl_pin; /* GPIO configuration for SCL as SCL */
uint32_t scl_gpio; /* GPIO configuration for SCL as a GPIO */
uint32_t sda_pin; /* GPIO configuration for SDA as SDA */
uint32_t sda_gpio; /* GPIO configuration for SDA as a GPIO */
uint32_t ev_irq; /* Event IRQ */
uint32_t er_irq; /* Error IRQ */
};
/* I2C Device Private Data */
@@ -219,31 +235,31 @@ struct stm32_i2c_config_s
struct stm32_i2c_priv_s
{
const struct stm32_i2c_config_s *config; /* Port configuration */
int refs; /* Referernce count */
sem_t sem_excl; /* Mutual exclusion semaphore */
int refs; /* Referernce count */
sem_t sem_excl; /* Mutual exclusion semaphore */
#ifndef CONFIG_I2C_POLLED
sem_t sem_isr; /* Interrupt wait semaphore */
sem_t sem_isr; /* Interrupt wait semaphore */
#endif
volatile uint8_t intstate; /* Interrupt handshake (see enum stm32_intstate_e) */
volatile uint8_t intstate; /* Interrupt handshake (see enum stm32_intstate_e) */
uint8_t msgc; /* Message count */
struct i2c_msg_s *msgv; /* Message list */
uint8_t *ptr; /* Current message buffer */
int dcnt; /* Current message length */
uint16_t flags; /* Current message flags */
uint8_t msgc; /* Message count */
struct i2c_msg_s *msgv; /* Message list */
uint8_t *ptr; /* Current message buffer */
int dcnt; /* Current message length */
uint16_t flags; /* Current message flags */
/* I2C trace support */
#ifdef CONFIG_I2C_TRACE
int tndx; /* Trace array index */
uint32_t start_time; /* Time when the trace was started */
int tndx; /* Trace array index */
uint32_t start_time; /* Time when the trace was started */
/* The actual trace data */
struct stm32_trace_s trace[CONFIG_I2C_NTRACE];
#endif
uint32_t status; /* End of transfer SR2|SR1 status */
uint32_t status; /* End of transfer SR2|SR1 status */
};
/* I2C Device, Instance */
@@ -270,8 +286,11 @@ static inline void stm32_i2c_modifyreg(FAR struct stm32_i2c_priv_s *priv,
uint8_t offset, uint16_t clearbits,
uint16_t setbits);
static inline void stm32_i2c_sem_wait(FAR struct i2c_dev_s *dev);
static inline int stm32_i2c_sem_waitdone(FAR struct stm32_i2c_priv_s *priv, int timeout_us);
static inline void stm32_i2c_sem_waitstop(FAR struct stm32_i2c_priv_s *priv, int timeout_us);
#ifdef CONFIG_STM32_I2C_DYNTIMEO
static useconds_t stm32_i2c_tousecs(int msgc, FAR struct i2c_msg_s *msgs);
#endif /* CONFIG_STM32_I2C_DYNTIMEO */
static inline int stm32_i2c_sem_waitdone(FAR struct stm32_i2c_priv_s *priv);
static inline void stm32_i2c_sem_waitstop(FAR struct stm32_i2c_priv_s *priv);
static inline void stm32_i2c_sem_post(FAR struct i2c_dev_s *dev);
static inline void stm32_i2c_sem_init(FAR struct i2c_dev_s *dev);
static inline void stm32_i2c_sem_destroy(FAR struct i2c_dev_s *dev);
@@ -281,7 +300,7 @@ static void stm32_i2c_tracenew(FAR struct stm32_i2c_priv_s *priv, uint32_t statu
static void stm32_i2c_traceevent(FAR struct stm32_i2c_priv_s *priv,
enum stm32_trace_e event, uint32_t parm);
static void stm32_i2c_tracedump(FAR struct stm32_i2c_priv_s *priv);
#endif
#endif /* CONFIG_I2C_TRACE */
static void stm32_i2c_setclock(FAR struct stm32_i2c_priv_s *priv,
uint32_t frequency);
static inline void stm32_i2c_sendstart(FAR struct stm32_i2c_priv_s *priv);
@@ -291,7 +310,7 @@ static inline uint32_t stm32_i2c_getstatus(FAR struct stm32_i2c_priv_s *priv);
#ifdef I2C1_FSMC_CONFLICT
static inline uint32_t stm32_i2c_disablefsmc(FAR struct stm32_i2c_priv_s *priv);
static inline void stm32_i2c_enablefsmc(uint32_t ahbenr);
#endif
#endif /* I2C1_FSMC_CONFLICT */
static int stm32_i2c_isr(struct stm32_i2c_priv_s * priv);
#ifndef CONFIG_I2C_POLLED
#ifdef CONFIG_STM32_I2C1
@@ -329,27 +348,18 @@ static int stm32_i2c_transfer(FAR struct i2c_dev_s *dev, FAR struct i2c_msg_s *m
************************************************************************************/
#ifdef CONFIG_STM32_I2C1
# ifndef GPIO_I2C1_SCL_GPIO
# define GPIO_I2C1_SCL_GPIO 0
# endif
# ifndef GPIO_I2C1_SDA_GPIO
# define GPIO_I2C1_SDA_GPIO 0
# endif
static const struct stm32_i2c_config_s stm32_i2c1_config =
{
.base = STM32_I2C1_BASE,
#ifndef CONFIG_I2C_POLLED
.isr = stm32_i2c1_isr,
#endif
.clk_bit = RCC_APB1ENR_I2C1EN,
.reset_bit = RCC_APB1RSTR_I2C1RST,
.scl_pin = GPIO_I2C1_SCL,
.scl_gpio = GPIO_I2C1_SCL_GPIO,
.sda_pin = GPIO_I2C1_SDA,
.sda_gpio = GPIO_I2C1_SDA_GPIO,
#ifndef CONFIG_I2C_POLLED
.isr = stm32_i2c1_isr,
.ev_irq = STM32_IRQ_I2C1EV,
.er_irq = STM32_IRQ_I2C1ER
#endif
};
struct stm32_i2c_priv_s stm32_i2c1_priv =
@@ -367,27 +377,18 @@ struct stm32_i2c_priv_s stm32_i2c1_priv =
#endif
#ifdef CONFIG_STM32_I2C2
# ifndef GPIO_I2C2_SCL_GPIO
# define GPIO_I2C2_SCL_GPIO 0
# endif
# ifndef GPIO_I2C2_SDA_GPIO
# define GPIO_I2C2_SDA_GPIO 0
# endif
static const struct stm32_i2c_config_s stm32_i2c2_config =
{
.base = STM32_I2C2_BASE,
#ifndef CONFIG_I2C_POLLED
.isr = stm32_i2c2_isr,
#endif
.clk_bit = RCC_APB1ENR_I2C2EN,
.reset_bit = RCC_APB1RSTR_I2C2RST,
.scl_pin = GPIO_I2C2_SCL,
.scl_gpio = GPIO_I2C2_SCL_GPIO,
.sda_pin = GPIO_I2C2_SDA,
.sda_gpio = GPIO_I2C2_SDA_GPIO,
#ifndef CONFIG_I2C_POLLED
.isr = stm32_i2c2_isr,
.ev_irq = STM32_IRQ_I2C2EV,
.er_irq = STM32_IRQ_I2C2ER
#endif
};
struct stm32_i2c_priv_s stm32_i2c2_priv =
@@ -405,27 +406,18 @@ struct stm32_i2c_priv_s stm32_i2c2_priv =
#endif
#ifdef CONFIG_STM32_I2C3
# ifndef GPIO_I2C3_SCL_GPIO
# define GPIO_I2C3_SCL_GPIO 0
# endif
# ifndef GPIO_I2C3_SDA_GPIO
# define GPIO_I2C3_SDA_GPIO 0
# endif
static const struct stm32_i2c_config_s stm32_i2c3_config =
{
.base = STM32_I2C3_BASE,
#ifndef CONFIG_I2C_POLLED
.isr = stm32_i2c3_isr,
#endif
.clk_bit = RCC_APB1ENR_I2C3EN,
.reset_bit = RCC_APB1RSTR_I2C3RST,
.scl_pin = GPIO_I2C3_SCL,
.scl_gpio = GPIO_I2C3_SCL_GPIO,
.sda_pin = GPIO_I2C3_SDA,
.sda_gpio = GPIO_I2C3_SDA_GPIO,
#ifndef CONFIG_I2C_POLLED
.isr = stm32_i2c3_isr,
.ev_irq = STM32_IRQ_I2C3EV,
.er_irq = STM32_IRQ_I2C3ER
#endif
};
struct stm32_i2c_priv_s stm32_i2c3_priv =
@@ -525,6 +517,35 @@ static inline void stm32_i2c_sem_wait(FAR struct i2c_dev_s *dev)
}
}
/************************************************************************************
* Name: stm32_i2c_tousecs
*
* Description:
* Return a micro-second delay based on the number of bytes left to be processed.
*
************************************************************************************/
#ifdef CONFIG_STM32_I2C_DYNTIMEO
static useconds_t stm32_i2c_tousecs(int msgc, FAR struct i2c_msg_s *msgs)
{
size_t bytecount = 0;
int i;
/* Count the number of bytes left to process */
for (i = 0; i < msgc; i++)
{
bytecount += msgs[i].length;
}
/* Then return a number of microseconds based on a user provided scaling
* factor.
*/
return (useconds_t)(CONFIG_STM32_I2C_DYNTIMEO_USECPERBYTE * bytecount);
}
#endif
/************************************************************************************
* Name: stm32_i2c_sem_waitdone
*
@@ -534,7 +555,7 @@ static inline void stm32_i2c_sem_wait(FAR struct i2c_dev_s *dev)
************************************************************************************/
#ifndef CONFIG_I2C_POLLED
static inline int stm32_i2c_sem_waitdone(FAR struct stm32_i2c_priv_s *priv, int timeout_us)
static inline int stm32_i2c_sem_waitdone(FAR struct stm32_i2c_priv_s *priv)
{
struct timespec abstime;
irqstate_t flags;
@@ -566,31 +587,24 @@ static inline int stm32_i2c_sem_waitdone(FAR struct stm32_i2c_priv_s *priv, int
#if CONFIG_STM32_I2CTIMEOSEC > 0
abstime.tv_sec += CONFIG_STM32_I2CTIMEOSEC;
#endif
#if CONFIG_STM32_I2CTIMEOUS_PER_BYTE > 0
/* Count the number of bytes left to process */
int i;
int bytecount = 0;
for (i = 0; i < priv->msgc; i++)
{
bytecount += priv->msgv[i].length;
}
/* Add a value proportional to the number of bytes in the transfer */
abstime.tv_nsec += (CONFIG_STM32_I2CTIMEOUS_PER_BYTE * bytecount) * 1000;
#ifdef CONFIG_STM32_I2C_DYNTIMEO
abstime.tv_nsec += 1000 * stm32_i2c_tousecs(priv->msgc, priv->msgv);
if (abstime.tv_nsec > 1000 * 1000 * 1000)
{
abstime.tv_sec++;
abstime.tv_nsec -= 1000 * 1000 * 1000;
}
#elif CONFIG_STM32_I2CTIMEOMS > 0
abstime.tv_nsec += CONFIG_STM32_I2CTIMEOMS * 1000 * 1000;
if (abstime.tv_nsec > 1000 * 1000 * 1000)
{
abstime.tv_sec++;
abstime.tv_nsec -= 1000 * 1000 * 1000;
}
#else
#if CONFIG_STM32_I2CTIMEOMS > 0
abstime.tv_nsec += CONFIG_STM32_I2CTIMEOMS * 1000 * 1000;
if (abstime.tv_nsec > 1000 * 1000 * 1000)
{
abstime.tv_sec++;
abstime.tv_nsec -= 1000 * 1000 * 1000;
}
#endif
#endif
/* Wait until either the transfer is complete or the timeout expires */
@@ -624,12 +638,21 @@ static inline int stm32_i2c_sem_waitdone(FAR struct stm32_i2c_priv_s *priv, int
return ret;
}
#else
static inline int stm32_i2c_sem_waitdone(FAR struct stm32_i2c_priv_s *priv, int timeout_us)
static inline int stm32_i2c_sem_waitdone(FAR struct stm32_i2c_priv_s *priv)
{
uint32_t timeout;
uint32_t start;
uint32_t elapsed;
int ret;
/* Get the timeout value */
#ifdef CONFIG_STM32_I2C_DYNTIMEO
timeout = USEC2TICK(stm32_i2c_tousecs(priv->msgc, priv->msgv));
#else
timeout = CONFIG_STM32_I2CTIMEOTICKS;
#endif
/* Signal the interrupt handler that we are waiting. NOTE: Interrupts
* are currently disabled but will be temporarily re-enabled below when
* sem_timedwait() sleeps.
@@ -652,10 +675,11 @@ static inline int stm32_i2c_sem_waitdone(FAR struct stm32_i2c_priv_s *priv, int
}
/* Loop until the transfer is complete. */
while (priv->intstate != INTSTATE_DONE && elapsed < USEC2TICK(timeout_us));
while (priv->intstate != INTSTATE_DONE && elapsed < timeout);
i2cvdbg("intstate: %d elapsed: %d threshold: %d status: %08x\n",
priv->intstate, elapsed, USEC2TICK(timeout_us), priv->status);
priv->intstate, elapsed, timeout, priv->status);
/* Set the interrupt state back to IDLE */
@@ -673,13 +697,22 @@ static inline int stm32_i2c_sem_waitdone(FAR struct stm32_i2c_priv_s *priv, int
*
************************************************************************************/
static inline void stm32_i2c_sem_waitstop(FAR struct stm32_i2c_priv_s *priv, int timeout_us)
static inline void stm32_i2c_sem_waitstop(FAR struct stm32_i2c_priv_s *priv)
{
uint32_t start;
uint32_t elapsed;
uint32_t timeout;
uint32_t cr1;
uint32_t sr1;
/* Select a timeout */
#ifdef CONFIG_STM32_I2C_DYNTIMEO
timeout = USEC2TICK(CONFIG_STM32_I2C_DYNTIMEO_STARTSTOP);
#else
timeout = CONFIG_STM32_I2CTIMEOTICKS;
#endif
/* Wait as stop might still be in progress; but stop might also
* be set because of a timeout error: "The [STOP] bit is set and
* cleared by software, cleared by hardware when a Stop condition is
@@ -712,7 +745,7 @@ static inline void stm32_i2c_sem_waitstop(FAR struct stm32_i2c_priv_s *priv, int
/* Loop until the stop is complete or a timeout occurs. */
while (elapsed < USEC2TICK(timeout_us));
while (elapsed < timeout);
/* If we get here then a timeout occurred with the STOP condition
* still pending.
@@ -932,7 +965,7 @@ static void stm32_i2c_setclock(FAR struct stm32_i2c_priv_s *priv, uint32_t frequ
{
/* Fast mode speed calculation with Tlow/Thigh = 16/9 */
#ifdef CONFIG_I2C_DUTY16_9
#ifdef CONFIG_STM32_I2C_DUTY16_9
speed = (uint16_t)(STM32_PCLK1_FREQUENCY / (frequency * 25));
/* Set DUTY and fast speed bits */
@@ -1071,7 +1104,7 @@ static inline uint32_t stm32_i2c_disablefsmc(FAR struct stm32_i2c_priv_s *priv)
/* Is this I2C1 */
#ifdef CONFIG_STM32_I2C2
#if defined(CONFIG_STM32_I2C2) || defined(CONFIG_STM32_I2C3)
if (priv->config->base == STM32_I2C1_BASE)
#endif
{
@@ -1198,10 +1231,14 @@ static int stm32_i2c_isr(struct stm32_i2c_priv_s *priv)
{
stm32_i2c_traceevent(priv, I2CEVENT_RCVBYTE, priv->dcnt);
/* No interrupts or context switches may occur in the following
* sequence. Otherwise, additional bytes may be sent by the
* device.
*/
#ifdef CONFIG_I2C_POLLED
irqstate_t state = irqsave();
#endif
/* Receive a byte */
*priv->ptr++ = stm32_i2c_getreg(priv, STM32_I2C_DR_OFFSET);
@@ -1217,7 +1254,6 @@ static int stm32_i2c_isr(struct stm32_i2c_priv_s *priv)
#ifdef CONFIG_I2C_POLLED
irqrestore(state);
#endif
}
}
@@ -1408,7 +1444,6 @@ static int stm32_i2c_init(FAR struct stm32_i2c_priv_s *priv)
/* Enable power and reset the peripheral */
modifyreg32(STM32_RCC_APB1ENR, 0, priv->config->clk_bit);
modifyreg32(STM32_RCC_APB1RSTR, 0, priv->config->reset_bit);
modifyreg32(STM32_RCC_APB1RSTR, priv->config->reset_bit, 0);
@@ -1428,10 +1463,10 @@ static int stm32_i2c_init(FAR struct stm32_i2c_priv_s *priv)
/* Attach ISRs */
#ifndef CONFIG_I2C_POLLED
irq_attach(priv->config->ev_irq, priv->config->isr);
irq_attach(priv->config->er_irq, priv->config->isr);
up_enable_irq(priv->config->ev_irq);
up_enable_irq(priv->config->er_irq);
irq_attach(priv->config->ev_irq, priv->config->isr);
irq_attach(priv->config->er_irq, priv->config->isr);
up_enable_irq(priv->config->ev_irq);
up_enable_irq(priv->config->er_irq);
#endif
/* Set peripheral frequency, where it must be at least 2 MHz for 100 kHz
@@ -1461,17 +1496,23 @@ static int stm32_i2c_deinit(FAR struct stm32_i2c_priv_s *priv)
stm32_i2c_putreg(priv, STM32_I2C_CR1_OFFSET, 0);
/* Unconfigure GPIO pins */
stm32_unconfiggpio(priv->config->scl_pin);
stm32_unconfiggpio(priv->config->sda_pin);
/* Disable and detach interrupts */
#ifndef CONFIG_I2C_POLLED
up_disable_irq(priv->config->ev_irq);
up_disable_irq(priv->config->er_irq);
irq_detach(priv->config->ev_irq);
irq_detach(priv->config->er_irq);
#endif
modifyreg32(STM32_RCC_APB1ENR, priv->config->clk_bit, 0);
/* Disable clocking */
modifyreg32(STM32_RCC_APB1ENR, priv->config->clk_bit, 0);
return OK;
}
@@ -1533,14 +1574,14 @@ static int stm32_i2c_process(FAR struct i2c_dev_s *dev, FAR struct i2c_msg_s *ms
struct stm32_i2c_inst_s *inst = (struct stm32_i2c_inst_s *)dev;
FAR struct stm32_i2c_priv_s *priv = inst->priv;
uint32_t status = 0;
//uint32_t ahbenr;
uint32_t ahbenr;
int errval = 0;
ASSERT(count);
/* Disable FSMC that shares a pin with I2C1 (LBAR) */
(void)stm32_i2c_disablefsmc(priv);
ahbenr = stm32_i2c_disablefsmc(priv);
/* Wait for any STOP in progress. NOTE: If we have to disable the FSMC
* then we cannot do this at the top of the loop, unfortunately. The STOP
@@ -1548,11 +1589,7 @@ static int stm32_i2c_process(FAR struct i2c_dev_s *dev, FAR struct i2c_msg_s *ms
*/
#ifndef I2C1_FSMC_CONFLICT
#if CONFIG_STM32_I2CTIMEOUS_START_STOP > 0
stm32_i2c_sem_waitstop(priv, CONFIG_STM32_I2CTIMEOUS_START_STOP);
#else
stm32_i2c_sem_waitstop(priv, CONFIG_STM32_I2CTIMEOMS + CONFIG_STM32_I2CTIMEOSEC * 1000000);
#endif
stm32_i2c_sem_waitstop(priv);
#endif
/* Clear any pending error interrupts */
@@ -1573,22 +1610,6 @@ static int stm32_i2c_process(FAR struct i2c_dev_s *dev, FAR struct i2c_msg_s *ms
priv->msgv = msgs;
priv->msgc = count;
/* Calculate timeout values */
int timeout_us = 0;
#if CONFIG_STM32_I2CTIMEOUS_PER_BYTE > 0
/* Count the number of bytes left to process */
int i;
int bytecount = 10;
for (i = 0; i < count; i++)
{
bytecount += msgs[i].length;
}
timeout_us = CONFIG_STM32_I2CTIMEOUS_PER_BYTE * bytecount;
//i2cvdbg("i2c wait: %d\n", timeout_us);
#else
timeout_us = CONFIG_STM32_I2CTIMEOMS + CONFIG_STM32_I2CTIMEOSEC * 1000000;
#endif
/* Reset I2C trace logic */
stm32_i2c_tracereset(priv);
@@ -1608,7 +1629,7 @@ static int stm32_i2c_process(FAR struct i2c_dev_s *dev, FAR struct i2c_msg_s *ms
* the BUSY flag.
*/
if (stm32_i2c_sem_waitdone(priv, timeout_us) < 0)
if (stm32_i2c_sem_waitdone(priv) < 0)
{
status = stm32_i2c_getstatus(priv);
errval = ETIMEDOUT;
@@ -1623,7 +1644,9 @@ static int stm32_i2c_process(FAR struct i2c_dev_s *dev, FAR struct i2c_msg_s *ms
*/
stm32_i2c_clrstart(priv);
// XXX also clear busy flag in case of timeout
/* Clear busy flag in case of timeout */
status = priv->status & 0xffff;
}
else
@@ -1953,11 +1976,14 @@ int up_i2cuninitialize(FAR struct i2c_dev_s * dev)
*
************************************************************************************/
#ifdef CONFIG_I2C_RESET
int up_i2creset(FAR struct i2c_dev_s * dev)
{
struct stm32_i2c_priv_s * priv;
unsigned clock_count;
unsigned stretch_count;
unsigned int clock_count;
unsigned int stretch_count;
unit32_ scl_gpio;
unit32_ sda_gpio;
int ret = ERROR;
irqstate_t state;
@@ -1979,83 +2005,70 @@ int up_i2creset(FAR struct i2c_dev_s * dev)
stm32_i2c_deinit(priv);
/* If possible, use GPIO configuration to un-wedge the bus */
/* Use GPIO configuration to un-wedge the bus */
if ((priv->config->scl_gpio != 0) && (priv->config->sda_gpio != 0))
scl_gpio = MKI2C_OUTPUT(priv->config->scl_pin);
sda_gpio = MKI2C_OUTPUT(priv->config->sda_pin);
/* Clock the bus until any slaves currently driving it let it go. */
clock_count = 0;
while (!stm32_gpioread(sda_gpio))
{
stm32_configgpio(priv->config->scl_gpio);
stm32_configgpio(priv->config->sda_gpio);
/* Give up if we have tried too hard */
/*
* Clock the bus until any slaves currently driving it let it go.
if (clock_count++ > 1000)
{
goto out;
}
/* Sniff to make sure that clock stretching has finished.
*
* If the bus never relaxes, the reset has failed.
*/
clock_count = 0;
while (!stm32_gpioread(priv->config->sda_gpio))
{
stretch_count = 0;
while (!stm32_gpioread(scl_gpio))
{
/* Give up if we have tried too hard */
if (clock_count++ > 1000)
if (stretch_count++ > 1000)
{
goto out;
}
/*
* Sniff to make sure that clock stretching has finished.
*
* If the bus never relaxes, the reset has failed.
*/
stretch_count = 0;
while (!stm32_gpioread(priv->config->scl_gpio))
{
/* Give up if we have tried too hard */
if (stretch_count++ > 1000)
{
goto out;
}
up_udelay(10);
}
/* Drive SCL low */
stm32_gpiowrite(priv->config->scl_gpio, 0);
up_udelay(10);
/* Drive SCL high again */
stm32_gpiowrite(priv->config->scl_gpio, 1);
up_udelay(10);
up_udelay(10);
}
/*
* Generate a start followed by a stop to reset slave
* state machines.
*/
/* Drive SCL low */
stm32_gpiowrite(priv->config->sda_gpio, 0);
up_udelay(10);
stm32_gpiowrite(priv->config->scl_gpio, 0);
up_udelay(10);
stm32_gpiowrite(priv->config->scl_gpio, 1);
up_udelay(10);
stm32_gpiowrite(priv->config->sda_gpio, 1);
stm32_gpiowrite(scl_gpio, 0);
up_udelay(10);
/*
* Revert the GPIO configuration.
*/
stm32_unconfiggpio(priv->config->sda_gpio);
stm32_unconfiggpio(priv->config->scl_gpio);
/* Drive SCL high again */
stm32_gpiowrite(scl_gpio, 1);
up_udelay(10);
}
/* Generate a start followed by a stop to reset slave
* state machines.
*/
stm32_gpiowrite(sda_gpio, 0);
up_udelay(10);
stm32_gpiowrite(scl_gpio, 0);
up_udelay(10);
stm32_gpiowrite(scl_gpio, 1);
up_udelay(10);
stm32_gpiowrite(sda_gpio, 1);
up_udelay(10);
/* Revert the GPIO configuration. */
stm32_unconfiggpio(sda_gpio);
stm32_unconfiggpio(scl_gpio);
/* Re-init the port */
stm32_i2c_init(priv);
@@ -2063,11 +2076,11 @@ int up_i2creset(FAR struct i2c_dev_s * dev)
out:
/* release the port for re-use by other clients */
/* Release the port for re-use by other clients */
stm32_i2c_sem_post(dev);
return ret;
}
#endif /* CONFIG_I2C_RESET */
#endif /* defined(CONFIG_STM32_I2C1) || defined(CONFIG_STM32_I2C2) || defined(CONFIG_STM32_I2C3) */
#endif /* CONFIG_STM32_I2C1 || CONFIG_STM32_I2C2 || CONFIG_STM32_I2C3 */
nuttx/arch/arm/src/stm32/stm32_lowputc.c
+73 -2
View File
@@ -67,6 +67,14 @@
# define STM32_CONSOLE_2STOP CONFIG_USART1_2STOP
# define STM32_CONSOLE_TX GPIO_USART1_TX
# define STM32_CONSOLE_RX GPIO_USART1_RX
# ifdef CONFIG_USART1_RS485
# define STM32_CONSOLE_RS485_DIR GPIO_USART1_RS485_DIR
# if (CONFIG_USART1_RS485_DIR_POLARITY == 0)
# define STM32_CONSOLE_RS485_DIR_POLARITY false
# else
# define STM32_CONSOLE_RS485_DIR_POLARITY true
# endif
# endif
#elif defined(CONFIG_USART2_SERIAL_CONSOLE)
# define STM32_CONSOLE_BASE STM32_USART2_BASE
# define STM32_APBCLOCK STM32_PCLK1_FREQUENCY
@@ -76,6 +84,14 @@
# define STM32_CONSOLE_2STOP CONFIG_USART2_2STOP
# define STM32_CONSOLE_TX GPIO_USART2_TX
# define STM32_CONSOLE_RX GPIO_USART2_RX
# ifdef CONFIG_USART2_RS485
# define STM32_CONSOLE_RS485_DIR GPIO_USART2_RS485_DIR
# if (CONFIG_USART2_RS485_DIR_POLARITY == 0)
# define STM32_CONSOLE_RS485_DIR_POLARITY false
# else
# define STM32_CONSOLE_RS485_DIR_POLARITY true
# endif
# endif
#elif defined(CONFIG_USART3_SERIAL_CONSOLE)
# define STM32_CONSOLE_BASE STM32_USART3_BASE
# define STM32_APBCLOCK STM32_PCLK1_FREQUENCY
@@ -85,6 +101,14 @@
# define STM32_CONSOLE_2STOP CONFIG_USART3_2STOP
# define STM32_CONSOLE_TX GPIO_USART3_TX
# define STM32_CONSOLE_RX GPIO_USART3_RX
# ifdef CONFIG_USART3_RS485
# define STM32_CONSOLE_RS485_DIR GPIO_USART3_RS485_DIR
# if (CONFIG_USART3_RS485_DIR_POLARITY == 0)
# define STM32_CONSOLE_RS485_DIR_POLARITY false
# else
# define STM32_CONSOLE_RS485_DIR_POLARITY true
# endif
# endif
#elif defined(CONFIG_UART4_SERIAL_CONSOLE)
# define STM32_CONSOLE_BASE STM32_UART4_BASE
# define STM32_APBCLOCK STM32_PCLK1_FREQUENCY
@@ -94,6 +118,14 @@
# define STM32_CONSOLE_2STOP CONFIG_UART4_2STOP
# define STM32_CONSOLE_TX GPIO_UART4_TX
# define STM32_CONSOLE_RX GPIO_UART4_RX
# ifdef CONFIG_UART4_RS485
# define STM32_CONSOLE_RS485_DIR GPIO_UART4_RS485_DIR
# if (CONFIG_UART4_RS485_DIR_POLARITY == 0)
# define STM32_CONSOLE_RS485_DIR_POLARITY false
# else
# define STM32_CONSOLE_RS485_DIR_POLARITY true
# endif
# endif
#elif defined(CONFIG_UART5_SERIAL_CONSOLE)
# define STM32_CONSOLE_BASE STM32_UART5_BASE
# define STM32_APBCLOCK STM32_PCLK1_FREQUENCY
@@ -103,6 +135,14 @@
# define STM32_CONSOLE_2STOP CONFIG_UART5_2STOP
# define STM32_CONSOLE_TX GPIO_UART5_TX
# define STM32_CONSOLE_RX GPIO_UART5_RX
# ifdef CONFIG_UART5_RS485
# define STM32_CONSOLE_RS485_DIR GPIO_UART5_RS485_DIR
# if (CONFIG_UART5_RS485_DIR_POLARITY == 0)
# define STM32_CONSOLE_RS485_DIR_POLARITY false
# else
# define STM32_CONSOLE_RS485_DIR_POLARITY true
# endif
# endif
#elif defined(CONFIG_USART6_SERIAL_CONSOLE)
# define STM32_CONSOLE_BASE STM32_USART6_BASE
# define STM32_APBCLOCK STM32_PCLK2_FREQUENCY
@@ -112,6 +152,14 @@
# define STM32_CONSOLE_2STOP CONFIG_USART6_2STOP
# define STM32_CONSOLE_TX GPIO_USART6_TX
# define STM32_CONSOLE_RX GPIO_USART6_RX
# ifdef CONFIG_USART6_RS485
# define STM32_CONSOLE_RS485_DIR GPIO_USART6_RS485_DIR
# if (CONFIG_USART6_RS485_DIR_POLARITY == 0)
# define STM32_CONSOLE_RS485_DIR_POLARITY false
# else
# define STM32_CONSOLE_RS485_DIR_POLARITY true
# endif
# endif
#endif
/* CR1 settings */
@@ -230,10 +278,19 @@ void up_lowputc(char ch)
/* Wait until the TX data register is empty */
while ((getreg32(STM32_CONSOLE_BASE + STM32_USART_SR_OFFSET) & USART_SR_TXE) == 0);
#if STM32_CONSOLE_RS485_DIR
stm32_gpiowrite(STM32_CONSOLE_RS485_DIR, STM32_CONSOLE_RS485_DIR_POLARITY);
#endif
/* Then send the character */
putreg32((uint32_t)ch, STM32_CONSOLE_BASE + STM32_USART_DR_OFFSET);
#if STM32_CONSOLE_RS485_DIR
while ((getreg32(STM32_CONSOLE_BASE + STM32_USART_SR_OFFSET) & USART_SR_TC) == 0);
stm32_gpiowrite(STM32_CONSOLE_RS485_DIR, !STM32_CONSOLE_RS485_DIR_POLARITY);
#endif
#endif
}
@@ -328,7 +385,14 @@ void stm32_lowsetup(void)
#ifdef STM32_CONSOLE_TX
stm32_configgpio(STM32_CONSOLE_TX);
stm32_configgpio(STM32_CONSOLE_TX);
#endif
#ifdef STM32_CONSOLE_RX
stm32_configgpio(STM32_CONSOLE_RX);
#endif
#if STM32_CONSOLE_RS485_DIR
stm32_configgpio(STM32_CONSOLE_RS485_DIR);
stm32_gpiowrite(STM32_CONSOLE_RS485_DIR, !STM32_CONSOLE_RS485_DIR_POLARITY);
#endif
/* Enable and configure the selected console device */
@@ -382,7 +446,14 @@ void stm32_lowsetup(void)
#ifdef STM32_CONSOLE_TX
stm32_configgpio(STM32_CONSOLE_TX);
stm32_configgpio(STM32_CONSOLE_TX);
#endif
#ifdef STM32_CONSOLE_RX
stm32_configgpio(STM32_CONSOLE_RX);
#endif
#if STM32_CONSOLE_RS485_DIR
stm32_configgpio(STM32_CONSOLE_RS485_DIR);
stm32_gpiowrite(STM32_CONSOLE_RS485_DIR, !STM32_CONSOLE_RS485_DIR_POLARITY);
#endif
/* Enable and configure the selected console device */
nuttx/arch/arm/src/stm32/stm32_otgfsdev.c
+23 -3
View File
@@ -3651,10 +3651,14 @@ static int stm32_epout_configure(FAR struct stm32_ep_s *privep, uint8_t eptype,
regval = stm32_getreg(regaddr);
if ((regval & OTGFS_DOEPCTL_USBAEP) == 0)
{
regval &= ~(OTGFS_DOEPCTL_MPSIZ_MASK | OTGFS_DIEPCTL_EPTYP_MASK | OTGFS_DIEPCTL_TXFNUM_MASK);
if (regval & OTGFS_DOEPCTL_NAKSTS)
{
regval |= OTGFS_DOEPCTL_CNAK;
}
regval &= ~(OTGFS_DOEPCTL_MPSIZ_MASK | OTGFS_DOEPCTL_EPTYP_MASK);
regval |= mpsiz;
regval |= (eptype << OTGFS_DOEPCTL_EPTYP_SHIFT);
regval |= (eptype << OTGFS_DIEPCTL_TXFNUM_SHIFT);
regval |= (OTGFS_DOEPCTL_SD0PID | OTGFS_DOEPCTL_USBAEP);
stm32_putreg(regval, regaddr);
@@ -3743,6 +3747,11 @@ static int stm32_epin_configure(FAR struct stm32_ep_s *privep, uint8_t eptype,
regval = stm32_getreg(regaddr);
if ((regval & OTGFS_DIEPCTL_USBAEP) == 0)
{
if (regval & OTGFS_DIEPCTL_NAKSTS)
{
regval |= OTGFS_DIEPCTL_CNAK;
}
regval &= ~(OTGFS_DIEPCTL_MPSIZ_MASK | OTGFS_DIEPCTL_EPTYP_MASK | OTGFS_DIEPCTL_TXFNUM_MASK);
regval |= mpsiz;
regval |= (eptype << OTGFS_DIEPCTL_EPTYP_SHIFT);
@@ -3900,7 +3909,7 @@ static void stm32_epout_disable(FAR struct stm32_ep_s *privep)
* Name: stm32_epin_disable
*
* Description:
* Diable an IN endpoint will no longer be used
* Disable an IN endpoint when it will no longer be used
*
*******************************************************************************/
@@ -3912,6 +3921,17 @@ static void stm32_epin_disable(FAR struct stm32_ep_s *privep)
usbtrace(TRACE_EPDISABLE, privep->epphy);
/* After USB reset, the endpoint will already be deactivated by the
* hardware. Trying to disable again will just hang in the wait.
*/
regaddr = STM32_OTGFS_DIEPCTL(privep->epphy);
regval = stm32_getreg(regaddr);
if ((regval & OTGFS_DIEPCTL_USBAEP) == 0)
{
return;
}
/* Make sure that there is no pending IPEPNE interrupt (because we are
* to poll this bit below).
*/
nuttx/arch/arm/src/stm32/stm32_qencoder.c
+1
View File
@@ -607,6 +607,7 @@ static FAR struct stm32_lowerhalf_s *stm32_tim2lower(int tim)
#endif
#ifdef CONFIG_STM32_TIM3_QE
case 3:
return &g_tim3lower;
#endif
#ifdef CONFIG_STM32_TIM4_QE
case 4:
nuttx/arch/arm/src/stm32/stm32_serial.c
+134 -52
View File
@@ -198,11 +198,15 @@ struct up_dev_s
uint8_t parity; /* 0=none, 1=odd, 2=even */
uint8_t bits; /* Number of bits (7 or 8) */
bool stopbits2; /* True: Configure with 2 stop bits instead of 1 */
bool iflow; /* input flow control (RTS) enabled */
bool oflow; /* output flow control (CTS) enabled */
uint32_t baud; /* Configured baud */
#else
const uint8_t parity; /* 0=none, 1=odd, 2=even */
const uint8_t bits; /* Number of bits (7 or 8) */
const bool stopbits2; /* True: Configure with 2 stop bits instead of 1 */
const bool iflow; /* input flow control (RTS) enabled */
const bool oflow; /* output flow control (CTS) enabled */
const uint32_t baud; /* Configured baud */
#endif
@@ -239,7 +243,7 @@ struct up_dev_s
* Private Function Prototypes
****************************************************************************/
static void up_setspeed(struct uart_dev_s *dev);
static void up_set_format(struct uart_dev_s *dev);
static int up_setup(struct uart_dev_s *dev);
static void up_shutdown(struct uart_dev_s *dev);
static int up_attach(struct uart_dev_s *dev);
@@ -411,6 +415,8 @@ static struct up_dev_s g_usart1priv =
.parity = CONFIG_USART1_PARITY,
.bits = CONFIG_USART1_BITS,
.stopbits2 = CONFIG_USART1_2STOP,
.iflow = false,
.oflow = false,
.baud = CONFIG_USART1_BAUD,
.apbclock = STM32_PCLK2_FREQUENCY,
.usartbase = STM32_USART1_BASE,
@@ -471,6 +477,8 @@ static struct up_dev_s g_usart2priv =
.parity = CONFIG_USART2_PARITY,
.bits = CONFIG_USART2_BITS,
.stopbits2 = CONFIG_USART2_2STOP,
.iflow = false,
.oflow = false,
.baud = CONFIG_USART2_BAUD,
.apbclock = STM32_PCLK1_FREQUENCY,
.usartbase = STM32_USART2_BASE,
@@ -531,6 +539,8 @@ static struct up_dev_s g_usart3priv =
.parity = CONFIG_USART3_PARITY,
.bits = CONFIG_USART3_BITS,
.stopbits2 = CONFIG_USART3_2STOP,
.iflow = false,
.oflow = false,
.baud = CONFIG_USART3_BAUD,
.apbclock = STM32_PCLK1_FREQUENCY,
.usartbase = STM32_USART3_BASE,
@@ -591,17 +601,15 @@ static struct up_dev_s g_uart4priv =
.parity = CONFIG_UART4_PARITY,
.bits = CONFIG_UART4_BITS,
.stopbits2 = CONFIG_UART4_2STOP,
.iflow = false,
.oflow = false,
.baud = CONFIG_UART4_BAUD,
.apbclock = STM32_PCLK1_FREQUENCY,
.usartbase = STM32_UART4_BASE,
.tx_gpio = GPIO_UART4_TX,
.rx_gpio = GPIO_UART4_RX,
#ifdef GPIO_UART4_CTS
.cts_gpio = GPIO_UART4_CTS,
#endif
#ifdef GPIO_UART4_RTS
.rts_gpio = GPIO_UART4_RTS,
#endif
.cts_gpio = 0, /* flow control not supported on this port */
.rts_gpio = 0, /* flow control not supported on this port */
#ifdef CONFIG_UART4_RXDMA
.rxdma_channel = DMAMAP_UART4_RX,
.rxfifo = g_uart4rxfifo,
@@ -651,17 +659,15 @@ static struct up_dev_s g_uart5priv =
.parity = CONFIG_UART5_PARITY,
.bits = CONFIG_UART5_BITS,
.stopbits2 = CONFIG_UART5_2STOP,
.iflow = false,
.oflow = false,
.baud = CONFIG_UART5_BAUD,
.apbclock = STM32_PCLK1_FREQUENCY,
.usartbase = STM32_UART5_BASE,
.tx_gpio = GPIO_UART5_TX,
.rx_gpio = GPIO_UART5_RX,
#ifdef GPIO_UART5_CTS
.cts_gpio = GPIO_UART5_CTS,
#endif
#ifdef GPIO_UART5_RTS
.rts_gpio = GPIO_UART5_RTS,
#endif
.cts_gpio = 0, /* flow control not supported on this port */
.rts_gpio = 0, /* flow control not supported on this port */
#ifdef CONFIG_UART5_RXDMA
.rxdma_channel = DMAMAP_UART5_RX,
.rxfifo = g_uart5rxfifo,
@@ -711,6 +717,8 @@ static struct up_dev_s g_usart6priv =
.parity = CONFIG_USART6_PARITY,
.bits = CONFIG_USART6_BITS,
.stopbits2 = CONFIG_USART6_2STOP,
.iflow = false,
.oflow = false,
.baud = CONFIG_USART6_BAUD,
.apbclock = STM32_PCLK2_FREQUENCY,
.usartbase = STM32_USART6_BASE,
@@ -884,21 +892,22 @@ static int up_dma_nextrx(struct up_dev_s *priv)
#endif
/****************************************************************************
* Name: up_setspeed
* Name: up_set_format
*
* Description:
* Set the serial line speed.
* Set the serial line format and speed.
*
****************************************************************************/
#ifndef CONFIG_SUPPRESS_UART_CONFIG
static void up_setspeed(struct uart_dev_s *dev)
static void up_set_format(struct uart_dev_s *dev)
{
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
uint32_t usartdiv32;
uint32_t mantissa;
uint32_t fraction;
uint32_t brr;
uint32_t regval;
/* Configure the USART Baud Rate. The baud rate for the receiver and
* transmitter (Rx and Tx) are both set to the same value as programmed
@@ -928,8 +937,52 @@ static void up_setspeed(struct uart_dev_s *dev)
fraction = (usartdiv32 - (mantissa << 5) + 1) >> 1;
brr |= fraction << USART_BRR_FRAC_SHIFT;
up_serialout(priv, STM32_USART_BRR_OFFSET, brr);
/* Configure parity mode */
regval = up_serialin(priv, STM32_USART_CR1_OFFSET);
regval &= ~(USART_CR1_PCE|USART_CR1_PS);
if (priv->parity == 1) /* Odd parity */
{
regval |= (USART_CR1_PCE|USART_CR1_PS);
}
else if (priv->parity == 2) /* Even parity */
{
regval |= USART_CR1_PCE;
}
up_serialout(priv, STM32_USART_CR1_OFFSET, regval);
/* Configure STOP bits */
regval = up_serialin(priv, STM32_USART_CR2_OFFSET);
regval &= ~(USART_CR2_STOP_MASK);
if (priv->stopbits2)
{
regval |= USART_CR2_STOP2;
}
up_serialout(priv, STM32_USART_CR2_OFFSET, regval);
/* Configure hardware flow control */
regval = up_serialin(priv, STM32_USART_CR3_OFFSET);
regval &= ~(USART_CR3_CTSE|USART_CR3_RTSE);
if (priv->iflow && (priv->rts_gpio != 0))
{
regval |= USART_CR3_RTSE;
}
if (priv->oflow && (priv->cts_gpio != 0))
{
regval |= USART_CR3_CTSE;
}
up_serialout(priv, STM32_USART_CR3_OFFSET, regval);
}
#endif
#endif /* CONFIG_SUPPRESS_UART_CONFIG */
/****************************************************************************
* Name: up_setup
@@ -974,43 +1027,28 @@ static int up_setup(struct uart_dev_s *dev)
#endif
/* Configure CR2 */
/* Clear STOP, CLKEN, CPOL, CPHA, LBCL, and interrupt enable bits */
/* Clear CLKEN, CPOL, CPHA, LBCL, and interrupt enable bits */
regval = up_serialin(priv, STM32_USART_CR2_OFFSET);
regval &= ~(USART_CR2_STOP_MASK|USART_CR2_CLKEN|USART_CR2_CPOL|
regval &= ~(USART_CR2_CLKEN|USART_CR2_CPOL|
USART_CR2_CPHA|USART_CR2_LBCL|USART_CR2_LBDIE);
/* Configure STOP bits */
if (priv->stopbits2)
{
regval |= USART_CR2_STOP2;
}
up_serialout(priv, STM32_USART_CR2_OFFSET, regval);
/* Configure CR1 */
/* Clear M, PCE, PS, TE, REm and all interrupt enable bits */
/* Clear M, TE, REm and all interrupt enable bits */
regval = up_serialin(priv, STM32_USART_CR1_OFFSET);
regval &= ~(USART_CR1_M|USART_CR1_PCE|USART_CR1_PS|USART_CR1_TE|
regval &= ~(USART_CR1_M|USART_CR1_TE|
USART_CR1_RE|USART_CR1_ALLINTS);
/* Configure word length and parity mode */
/* Configure word length */
if (priv->bits == 9) /* Default: 1 start, 8 data, n stop */
{
regval |= USART_CR1_M; /* 1 start, 9 data, n stop */
}
if (priv->parity == 1) /* Odd parity */
{
regval |= (USART_CR1_PCE|USART_CR1_PS);
}
else if (priv->parity == 2) /* Even parity */
{
regval |= USART_CR1_PCE;
}
up_serialout(priv, STM32_USART_CR1_OFFSET, regval);
/* Configure CR3 */
@@ -1023,9 +1061,9 @@ static int up_setup(struct uart_dev_s *dev)
up_serialout(priv, STM32_USART_CR3_OFFSET, regval);
/* Configure the USART Baud Rate. */
/* Configure the USART line format and speed. */
up_setspeed(dev);
up_set_format(dev);
/* Enable Rx, Tx, and the USART */
@@ -1056,12 +1094,15 @@ static int up_dma_setup(struct uart_dev_s *dev)
int result;
uint32_t regval;
/* Do the basic UART setup first */
/* Do the basic UART setup first, unless we are the console */
result = up_setup(dev);
if (result != OK)
{
return result;
if (!dev->isconsole)
{
result = up_setup(dev);
if (result != OK)
{
return result;
}
}
/* Acquire the DMA channel. This should always succeed. */
@@ -1371,12 +1412,21 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg)
break;
}
/* TODO: Other termios fields are not yet returned.
* Note that only cfsetospeed is not necessary because we have
* knowledge that only one speed is supported.
cfsetispeed(termiosp, priv->baud);
/* Note that since we only support 8/9 bit modes and
* there is no way to report 9-bit mode, we always claim 8.
*/
cfsetispeed(termiosp, priv->baud);
termiosp->c_cflag =
((priv->parity != 0) ? PARENB : 0) |
((priv->parity == 1) ? PARODD : 0) |
((priv->stopbits2) ? CSTOPB : 0) |
((priv->oflow) ? CCTS_OFLOW : 0) |
((priv->iflow) ? CRTS_IFLOW : 0) |
CS8;
/* TODO: CCTS_IFLOW, CCTS_OFLOW */
}
break;
@@ -1390,16 +1440,48 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg)
break;
}
/* TODO: Handle other termios settings.
* Note that only cfgetispeed is used besued we have knowledge
/* Perform some sanity checks before accepting any changes */
if (((termiosp->c_cflag & CSIZE) != CS8) ||
((termiosp->c_cflag & CCTS_OFLOW) && (priv->cts_gpio == 0)) ||
((termiosp->c_cflag & CRTS_IFLOW) && (priv->rts_gpio == 0)))
{
ret = -EINVAL;
break;
}
if (termiosp->c_cflag & PARENB)
{
priv->parity = (termiosp->c_cflag & PARODD) ? 1 : 2;
}
else
{
priv->parity = 0;
}
priv->stopbits2 = (termiosp->c_cflag & CSTOPB) != 0;
priv->oflow = (termiosp->c_cflag & CCTS_OFLOW) != 0;
priv->iflow = (termiosp->c_cflag & CRTS_IFLOW) != 0;
/* Note that since there is no way to request 9-bit mode
* and no way to support 5/6/7-bit modes, we ignore them
* all here.
*/
/* Note that only cfgetispeed is used because we have knowledge
* that only one speed is supported.
*/
priv->baud = cfgetispeed(termiosp);
up_setspeed(dev);
/* effect the changes immediately - note that we do not implement
* TCSADRAIN / TCSAFLUSH
*/
up_set_format(dev);
}
break;
#endif
#endif /* CONFIG_SERIAL_TERMIOS */
#ifdef CONFIG_USART_BREAKS
case TIOCSBRK: /* BSD compatibility: Turn break on, unconditionally */
nuttx/arch/arm/src/stm32/stm32_uart.h
+14
View File
@@ -223,6 +223,20 @@
# undef SERIAL_HAVE_ONLY_DMA
#endif
/* Is RS-485 used? */
#if defined(CONFIG_USART1_RS485) || defined(CONFIG_USART2_RS485) || \
defined(CONFIG_USART3_RS485) || defined(CONFIG_UART4_RS485) || \
defined(CONFIG_UART5_RS485) || defined(CONFIG_USART6_RS485)
# define HAVE_RS485 1
#endif
#ifdef HAVE_RS485
# define USART_CR1_USED_INTS (USART_CR1_RXNEIE | USART_CR1_TXEIE | USART_CR1_PEIE | USART_CR1_TCIE)
#else
# define USART_CR1_USED_INTS (USART_CR1_RXNEIE | USART_CR1_TXEIE | USART_CR1_PEIE)
#endif
/************************************************************************************
* Public Types
************************************************************************************/
nuttx/arch/arm/src/stm32/stm32f10xxx_rcc.c
+55 -1
View File
@@ -92,7 +92,11 @@ static inline void rcc_reset(void)
putreg32(regval, STM32_RCC_CR);
regval = getreg32(STM32_RCC_CFGR); /* Reset PLLSRC, PLLXTPRE, PLLMUL and USBPRE bits */
regval &= ~(RCC_CFGR_PLLSRC|RCC_CFGR_PLLXTPRE|RCC_CFGR_PLLMUL_MASK|RCC_CFGR_USBPRE);
regval &= ~(RCC_CFGR_PLLSRC|RCC_CFGR_PLLXTPRE|RCC_CFGR_PLLMUL_MASK
#ifndef CONFIG_STM32_VALUELINE
|RCC_CFGR_USBPRE
#endif
);
putreg32(regval, STM32_RCC_CFGR);
putreg32(0, STM32_RCC_CIR); /* Disable all interrupts */
@@ -224,6 +228,27 @@ static inline void rcc_enableapb1(void)
#endif
#endif
#ifdef CONFIG_STM32_TIM12
/* Timer 12 clock enable */
#ifdef CONFIG_STM32_FORCEPOWER
regval |= RCC_APB1ENR_TIM12EN;
#endif
#endif
#ifdef CONFIG_STM32_TIM13
/* Timer 13 clock enable */
#ifdef CONFIG_STM32_FORCEPOWER
regval |= RCC_APB1ENR_TIM13EN;
#endif
#endif
#ifdef CONFIG_STM32_TIM14
/* Timer 14 clock enable */
#ifdef CONFIG_STM32_FORCEPOWER
regval |= RCC_APB1ENR_TIM14EN;
#endif
#endif
#ifdef CONFIG_STM32_WWDG
/* Window Watchdog clock enable */
@@ -315,6 +340,13 @@ static inline void rcc_enableapb1(void)
regval |= RCC_APB1ENR_DACEN;
#endif
#ifdef CONFIG_STM32_CEC
/* CEC clock enable */
regval |= RCC_APB1ENR_CECEN;
#endif
putreg32(regval, STM32_RCC_APB1ENR);
}
@@ -404,6 +436,28 @@ static inline void rcc_enableapb2(void)
regval |= RCC_APB2ENR_ADC3EN;
#endif
#ifdef CONFIG_STM32_TIM15
/* TIM15 Timer clock enable */
#ifdef CONFIG_STM32_FORCEPOWER
regval |= RCC_APB2ENR_TIM15EN;
#endif
#endif
#ifdef CONFIG_STM32_TIM16
/* TIM16 Timer clock enable */
#ifdef CONFIG_STM32_FORCEPOWER
regval |= RCC_APB2ENR_TIM16EN;
#endif
#endif
#ifdef CONFIG_STM32_TIM17
/* TIM17 Timer clock enable */
#ifdef CONFIG_STM32_FORCEPOWER
regval |= RCC_APB2ENR_TIM17EN;
#endif
#endif
putreg32(regval, STM32_RCC_APB2ENR);
}
nuttx/binfmt/binfmt_exec.c
+1 -1
View File
@@ -44,7 +44,7 @@
#include <debug.h>
#include <errno.h>
#include <nuttx/binfmt.h>
#include <nuttx/binfmt/binfmt.h>
#include "binfmt_internal.h"
nuttx/binfmt/binfmt_globals.c
+1 -1
View File
@@ -39,7 +39,7 @@
#include <nuttx/config.h>
#include <nuttx/binfmt.h>
#include <nuttx/binfmt/binfmt.h>
#ifndef CONFIG_BINFMT_DISABLE
nuttx/binfmt/binfmt_internal.h
+1 -1
View File
@@ -42,7 +42,7 @@
#include <nuttx/config.h>
#include <nuttx/binfmt.h>
#include <nuttx/binfmt/binfmt.h>
/****************************************************************************
* Pre-processor Definitions
nuttx/binfmt/binfmt_register.c
+1 -1
View File
@@ -44,7 +44,7 @@
#include <debug.h>
#include <errno.h>
#include <nuttx/binfmt.h>
#include <nuttx/binfmt/binfmt.h>
#include "binfmt_internal.h"
nuttx/binfmt/binfmt_unregister.c
+1 -1
View File
@@ -44,7 +44,7 @@
#include <debug.h>
#include <errno.h>
#include <nuttx/binfmt.h>
#include <nuttx/binfmt/binfmt.h>
#include "binfmt_internal.h"
nuttx/binfmt/libnxflat/Kconfig
+5
View File
@@ -2,3 +2,8 @@
# For a description of the syntax of this configuration file,
# see misc/tools/kconfig-language.txt.
#
config NXFLAT_DUMPBUFFER
bool "Dump NXFLAT buffers"
default n
depends on DEBUG && DEBUG_VERBOSE
nuttx/binfmt/libnxflat/libnxflat_init.c
+4 -3
View File
@@ -48,7 +48,7 @@
#include <errno.h>
#include <arpa/inet.h>
#include <nuttx/nxflat.h>
#include <nuttx/binfmt/nxflat.h>
/****************************************************************************
* Pre-Processor Definitions
@@ -112,8 +112,9 @@ int nxflat_init(const char *filename, struct nxflat_loadinfo_s *loadinfo)
loadinfo->filfd = open(filename, O_RDONLY);
if (loadinfo->filfd < 0)
{
bdbg("Failed to open NXFLAT binary %s: %d\n", filename, ret);
return -errno;
int errval = errno;
bdbg("Failed to open NXFLAT binary %s: %d\n", filename, errval);
return -errval;
}
/* Read the NXFLAT header from offset 0 */
nuttx/binfmt/libnxflat/libnxflat_read.c
+8 -6
View File
@@ -48,7 +48,7 @@
#include <errno.h>
#include <arpa/inet.h>
#include <nuttx/nxflat.h>
#include <nuttx/binfmt/nxflat.h>
/****************************************************************************
* Pre-Processor Definitions
@@ -129,8 +129,9 @@ int nxflat_read(struct nxflat_loadinfo_s *loadinfo, char *buffer, int readsize,
rpos = lseek(loadinfo->filfd, offset, SEEK_SET);
if (rpos != offset)
{
bdbg("Failed to seek to position %d: %d\n", offset, errno);
return -errno;
int errval = errno;
bdbg("Failed to seek to position %d: %d\n", offset, errval);
return -errval;
}
/* Read the file data at offset into the user buffer */
@@ -138,10 +139,11 @@ int nxflat_read(struct nxflat_loadinfo_s *loadinfo, char *buffer, int readsize,
nbytes = read(loadinfo->filfd, bufptr, bytesleft);
if (nbytes < 0)
{
if (errno != EINTR)
int errval = errno;
if (errval != EINTR)
{
bdbg("Read of .data failed: %d\n", errno);
return -errno;
bdbg("Read of .data failed: %d\n", errval);
return -errval;
}
}
else if (nbytes == 0)
nuttx/binfmt/libnxflat/libnxflat_uninit.c
+2 -5
View File
@@ -42,7 +42,8 @@
#include <unistd.h>
#include <debug.h>
#include <errno.h>
#include <nuttx/nxflat.h>
#include <nuttx/binfmt/nxflat.h>
/****************************************************************************
* Pre-Processor Definitions
@@ -56,10 +57,6 @@
* Private Functions
****************************************************************************/
/****************************************************************************
* Name: nxflat_swap32
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
nuttx/binfmt/libnxflat/libnxflat_verify.c
+5 -4
View File
@@ -42,8 +42,9 @@
#include <string.h>
#include <debug.h>
#include <errno.h>
#include <arpa/inet.h>
#include <nuttx/nxflat.h>
#include <nuttx/binfmt/nxflat.h>
/****************************************************************************
* Pre-processor Definitions
@@ -91,10 +92,10 @@ int nxflat_verifyheader(const struct nxflat_hdr_s *header)
if (strncmp(header->h_magic, NXFLAT_MAGIC, 4) != 0)
{
bdbg("Unrecognized magic=\"%c%c%c%c\"\n",
header->h_magic[0], header->h_magic[1],
header->h_magic[2], header->h_magic[3]);
header->h_magic[0], header->h_magic[1],
header->h_magic[2], header->h_magic[3]);
return -ENOEXEC;
}
return OK;
}
nuttx/binfmt/symtab_findbyname.c
+1 -1
View File
@@ -44,7 +44,7 @@
#include <assert.h>
#include <errno.h>
#include <nuttx/symtab.h>
#include <nuttx/binfmt/symtab.h>
/****************************************************************************
* Pre-processor Definitions
nuttx/binfmt/symtab_findbyvalue.c
+1 -1
View File
@@ -44,7 +44,7 @@
#include <assert.h>
#include <errno.h>
#include <nuttx/symtab.h>
#include <nuttx/binfmt/symtab.h>
/****************************************************************************
* Pre-processor Definitions
nuttx/binfmt/symtab_findorderedbyname.c
+1 -1
View File
@@ -44,7 +44,7 @@
#include <assert.h>
#include <errno.h>
#include <nuttx/symtab.h>
#include <nuttx/binfmt/symtab.h>
/****************************************************************************
* Pre-processor Definitions
nuttx/binfmt/symtab_findorderedbyvalue.c
+1 -1
View File
@@ -44,7 +44,7 @@
#include <assert.h>
#include <errno.h>
#include <nuttx/symtab.h>
#include <nuttx/binfmt/symtab.h>
/****************************************************************************
* Pre-processor Definitions
nuttx/configs/README.txt
+136 -43
View File
@@ -103,14 +103,23 @@ Make.defs -- This makefile fragment provides architecture and
Tools: CC, LD, AR, NM, OBJCOPY, OBJDUMP
Tool options: CFLAGS, LDFLAGS
COMPILE, ASSEMBLE, ARCHIVE, CLEAN, and MKDEP macros
When this makefile fragment runs, it will be passed TOPDIR which
is the path to the root directory of the build. This makefile
fragment may include ${TOPDIR}/.config to perform configuration
specific settings. For example, the CFLAGS will most likely be
fragment should include:
$(TOPDIR)/.config : Nuttx configuration
$(TOPDIR)/tools/Config.mk : Common definitions
Definitions in the Make.defs file probably depend on some of the
settings in the .config file. For example, the CFLAGS will most likely be
different if CONFIG_DEBUG=y.
The included tools/Config.mk file contains additional definitions that may
be overriden in the architecture-specific Make.defs file as necessary:
COMPILE, ASSEMBLE, ARCHIVE, CLEAN, and MKDEP macros
defconfig -- This is a configuration file similar to the Linux
configuration file. In contains variable/value pairs like:
@@ -174,7 +183,6 @@ defconfig -- This is a configuration file similar to the Linux
CONFIG_RAW_BINARY - make a raw binary format file used with many
different loaders using the GNU objcopy program. This option
should not be selected if you are not using the GNU toolchain.
CONFIG_HAVE_LIBM - toolchain supports libm.a
CONFIG_HAVE_CXX - toolchain supports C++ and CXX, CXXFLAGS, and
COMPILEXX have been defined in the configurations Make.defs
file.
@@ -321,7 +329,7 @@ defconfig -- This is a configuration file similar to the Linux
CONFIG_RR_INTERVAL - The round robin timeslice will be set
this number of milliseconds; Round robin scheduling can
be disabled by setting this value to zero.
CONFIG_SCHED_INSTRUMENTATION - enables instrumentation in
CONFIG_SCHED_INSTRUMENTATION - enables instrumentation in
scheduler to monitor system performance
CONFIG_TASK_NAME_SIZE - Specifies that maximum size of a
task name to save in the TCB. Useful if scheduler
@@ -349,7 +357,7 @@ defconfig -- This is a configuration file similar to the Linux
CONFIG_SEM_PREALLOCHOLDERS: This setting is only used if priority
inheritance is enabled. It defines the maximum number of
different threads (minus one) that can take counts on a
semaphore with priority inheritance support. This may be
semaphore with priority inheritance support. This may be
set to zero if priority inheritance is disabled OR if you
are only using semaphores as mutexes (only one holder) OR
if no more than two threads participate using a counting
@@ -375,9 +383,6 @@ defconfig -- This is a configuration file similar to the Linux
CONFIG_SDCLONE_DISABLE. Disable cloning of all socket
desciptors by task_create() when a new task is started. If
set, all sockets will appear to be closed in the new task.
CONFIG_NXFLAT. Enable support for the NXFLAT binary format.
This format will support execution of NuttX binaries located
in a ROMFS filesystem (see examples/nxflat).
CONFIG_SCHED_WORKQUEUE. Create a dedicated "worker" thread to
handle delayed processing from interrupt handlers. This feature
is required for some drivers but, if there are not complaints,
@@ -421,6 +426,39 @@ defconfig -- This is a configuration file similar to the Linux
where 'app' is the application name. If not defined, CONFIG_USER_ENTRYPOINT
defaults to user_start.
Binary Loaders:
CONFIG_BINFMT_DISABLE - By default, support for loadable binary formats
is built.
This logic may be suppressed be defining this setting.
CONFIG_BINFMT_CONSTRUCTORS - Build in support for C++ constructors in
loaded modules.
CONFIG_SYMTAB_ORDEREDBYNAME - Symbol tables are order by name (rather
than value).
CONFIG_NXFLAT. Enable support for the NXFLAT binary format. This format
will support execution of NuttX binaries located in a ROMFS filesystem
(see apps/examples/nxflat).
CONFIG_ELF - Enable support for the ELF binary format. This format will
support execution of ELF binaries copied from a file system and
relocated into RAM (see apps/examples/elf).
If CONFIG_ELF is selected, then these additional options are available:
CONFIG_ELF_ALIGN_LOG2 - Align all sections to this Log2 value: 0->1,
1->2, 2->4, etc.
CONFIG_ELF_STACKSIZE - This is the default stack size that will will
be used when starting ELF binaries.
CONFIG_ELF_BUFFERSIZE - This is an I/O buffer that is used to access
the ELF file. Variable length items will need to be read (such as
symbol names). This is really just this initial size of the buffer;
it will be reallocated as necessary to hold large symbol names).
Default: 128
CONFIG_ELF_BUFFERINCR - This is an I/O buffer that is used to access
the ELF file. Variable length items will need to be read (such as
symbol names). This value specifies the size increment to use each
time the buffer is reallocated. Default: 32
CONFIG_ELF_DUMPBUFFER - Dump various ELF buffers for debug purposes.
This option requires CONFIG_DEBUG and CONFIG_DEBUG_VERBOSE.
System Logging:
CONFIG_SYSLOG enables general system logging support.
CONFIG_SYSLOG_DEVPATH - The full path to the system logging device. Default
@@ -506,7 +544,7 @@ defconfig -- This is a configuration file similar to the Linux
from the end of RAM for page tables or other system usage. The
configuration settings and linker directives must be cognizant of that:
CONFIG_PAGING_NDATA should be defined to prevent the data region from
extending all the way to the end of memory.
extending all the way to the end of memory.
CONFIG_PAGING_DEFPRIO - The default, minimum priority of the page fill
worker thread. The priority of the page fill work thread will be boosted
boosted dynmically so that it matches the priority of the task on behalf
@@ -520,7 +558,7 @@ defconfig -- This is a configuration file similar to the Linux
transfer is completed. Default: Undefined (non-blocking).
CONFIG_PAGING_WORKPERIOD - The page fill worker thread will wake periodically
even if there is no mapping to do. This selection controls that wake-up
period (in microseconds). This wake-up a failsafe that will handle any
period (in microseconds). This wake-up a failsafe that will handle any
cases where a single is lost (that would really be a bug and shouldn't
happen!) and also supports timeouts for case of non-blocking, asynchronous
fills (see CONFIG_PAGING_TIMEOUT_TICKS).
@@ -532,7 +570,7 @@ defconfig -- This is a configuration file similar to the Linux
Some architecture-specific settings. Defaults are architecture specific.
If you don't know what you are doing, it is best to leave these undefined
and try the system defaults:
CONFIG_PAGING_VECPPAGE - This the physical address of the page in
memory to be mapped to the vector address.
CONFIG_PAGING_VECL2PADDR - This is the physical address of the L2
@@ -555,7 +593,7 @@ defconfig -- This is a configuration file similar to the Linux
devices. CONFIG_PAGING_SDSLOT identifies the slot number of the SD
device to initialize. This must be undefined if SD is not being used.
This should be defined to be zero for the typical device that has
only a single slot (See CONFIG_MMCSD_NSLOTS). If defined,
only a single slot (See CONFIG_MMCSD_NSLOTS). If defined,
CONFIG_PAGING_SDSLOT will instruct certain board-specific logic to
initialize the media in this SD slot.
CONFIG_PAGING_M25PX - Use the m25px.c FLASH driver. If this is selected,
@@ -624,6 +662,37 @@ defconfig -- This is a configuration file similar to the Linux
CONFIG_ARCH_STRNCPY, CONFIG_ARCH_STRLEN, CONFIG_ARCH_STRNLEN
CONFIG_ARCH_BZERO
If CONFIG_ARCH_MEMCPY is not selected, then you make also select Daniel
Vik's optimized implementation of memcpy():
CONFIG_MEMCPY_VIK - Select this option to use the optimized memcpy()
function by Daniel Vik. Select this option for improved performance
at the expense of increased size. See licensing information in the
top-level COPYING file. Default: n
And if CONFIG_MEMCPY_VIK is selected, the following tuning options are available:
CONFIG_MEMCPY_PRE_INC_PTRS - Use pre-increment of pointers. Default is
post increment of pointers.
CONFIG_MEMCPY_INDEXED_COPY - Copying data using array indexing. Using
this option, disables the CONFIG_MEMCPY_PRE_INC_PTRS option.
CONFIG_MEMCPY_64BIT - Compiles memcpy for architectures that suppport
64-bit operations efficiently.
If CONFIG_ARCH_MEMSET is not selected, then the following option is
also available:
CONFIG_MEMSET_OPTSPEED - Select this option to use a version of memcpy()
optimized for speed. Default: memcpy() is optimized for size.
And if CONFIG_MEMSET_OPTSPEED is selected, the following tuning option is
available:
CONFIG_MEMSET_64BIT - Compiles memset() for architectures that suppport
64-bit operations efficiently.
The architecture may provide custom versions of certain standard header
files:
@@ -666,6 +735,15 @@ defconfig -- This is a configuration file similar to the Linux
don't select CONFIG_ARCH_MATH_H, the redirecting math.h header file will
stay out-of-the-way in include/nuttx/.
CONFIG_ARCH_FLOAT_H
If you enable the generic, built-in math library, then that math library
will expect your toolchain to provide the standard float.h header file.
The float.h header file defines the properties of your floating point
implementation. It would always be best to use your toolchain's float.h
header file but if none is avaiable, a default float.h header file will
provided if this option is selected. However, there is no assurance that
the settings in this float.h are actually correct for your platform!
CONFIG_ARCH_STDARG_H - There is also a redirecting version of stdarg.h in
the source tree as well. It also resides out-of-the-way at include/nuttx/stdarg.h.
This is because you should normally use your toolchain's stdarg.h file. But
@@ -696,7 +774,7 @@ defconfig -- This is a configuration file similar to the Linux
If CONFIG_ARCH_ROMGETC is defined, then the architecture logic
must export the function up_romgetc(). up_romgetc() will simply
read one byte of data from the instruction space.
If CONFIG_ARCH_ROMGETC, certain C stdio functions are effected:
(1) All format strings in printf, fprintf, sprintf, etc. are
assumed to lie in FLASH (string arguments for %s are still assumed
@@ -766,7 +844,7 @@ defconfig -- This is a configuration file similar to the Linux
much sense in supporting FAT date and time unless you have a
hardware RTC or other way to get the time and date.
CONFIG_FS_NXFFS: Enable NuttX FLASH file system (NXFF) support.
CONFIG_NXFFS_ERASEDSTATE: The erased state of FLASH.
CONFIG_NXFFS_ERASEDSTATE: The erased state of FLASH.
This must have one of the values of 0xff or 0x00.
Default: 0xff.
CONFIG_NXFFS_PACKTHRESHOLD: When packing flash file data,
@@ -920,7 +998,7 @@ defconfig -- This is a configuration file similar to the Linux
CONFIG_INPUT
Enables general support for input devices
CONFIG_INPUT_TSC2007
If CONFIG_INPUT is selected, then this setting will enable building
of the TI TSC2007 touchscreen driver.
@@ -935,14 +1013,14 @@ defconfig -- This is a configuration file similar to the Linux
Enables support for the SPI interface (not currenly supported)
CONFIG_STMPE811_I2C
Enables support for the I2C interface
CONFIG_STMPE811_MULTIPLE
CONFIG_STMPE811_MULTIPLE
Can be defined to support multiple STMPE811 devices on board.
CONFIG_STMPE811_ACTIVELOW
Interrupt is generated by an active low signal (or falling edge).
CONFIG_STMPE811_EDGE
Interrupt is generated on an edge (vs. on the active level)
CONFIG_STMPE811_NPOLLWAITERS
Maximum number of threads that can be waiting on poll() (ignored if
Maximum number of threads that can be waiting on poll() (ignored if
CONFIG_DISABLE_POLL is set).
CONFIG_STMPE811_TSC_DISABLE
Disable driver touchscreen functionality.
@@ -1051,21 +1129,21 @@ defconfig -- This is a configuration file similar to the Linux
port. The default data link layer for uIP is Ethernet. If CONFIG_NET_SLIP
is defined in the NuttX configuration file, then SLIP will be supported.
The basic differences between the SLIP and Ethernet configurations is that
when SLIP is selected:
when SLIP is selected:
* The link level header (that comes before the IP header) is omitted.
* All MAC address processing is suppressed.
* The link level header (that comes before the IP header) is omitted.
* All MAC address processing is suppressed.
* ARP is disabled.
If CONFIG_NET_SLIP is not selected, then Ethernet will be used (there is
no need to define anything special in the configuration file to use
Ethernet -- it is the default).
Ethernet -- it is the default).
CONFIG_NET_SLIP -- Enables building of the SLIP driver. SLIP requires
at least one IP protocols selected and the following additional
network settings: CONFIG_NET_NOINTS and CONFIG_NET_MULTIBUFFER.
CONFIG_NET_BUFSIZE *must* be set to 296. Other optional configuration
settings that affect the SLIP driver: CONFIG_NET_STATISTICS.
settings that affect the SLIP driver: CONFIG_NET_STATISTICS.
Default: Ethernet
If SLIP is selected, then the following SLIP options are available:
@@ -1081,6 +1159,10 @@ defconfig -- This is a configuration file similar to the Linux
CONFIG_NET_DHCP_LIGHT - Reduces size of DHCP
CONFIG_NET_RESOLV_ENTRIES - Number of resolver entries
CONFIG_NET_RESOLV_MAXRESPONSE - This setting determines the maximum
size of response message that can be received by the DNS resolver.
The default is 96 but may need to be larger on enterprise networks
(perhaps 176).
THTTPD
@@ -1102,7 +1184,7 @@ defconfig -- This is a configuration file similar to the Linux
to run before killing them.
CONFIG_THTTPD_CHARSET- The default character set name to use with
text MIME types.
CONFIG_THTTPD_IOBUFFERSIZE -
CONFIG_THTTPD_IOBUFFERSIZE -
CONFIG_THTTPD_INDEX_NAMES - A list of index filenames to check. The
files are searched for in this order.
CONFIG_AUTH_FILE - The file to use for authentication. If this is
@@ -1134,7 +1216,7 @@ defconfig -- This is a configuration file similar to the Linux
You can also leave both options undefined, and thttpd will not do
anything special about tildes. Enabling both options is an error.
Typical values, if they're defined, are "users" for
CONFIG_THTTPD_TILDE_MAP1 and "public_html"forCONFIG_THTTPD_TILDE_MAP2.
CONFIG_THTTPD_TILDE_MAP1 and "public_html"forCONFIG_THTTPD_TILDE_MAP2.
CONFIG_THTTPD_GENERATE_INDICES
CONFIG_THTTPD_URLPATTERN - If defined, then it will be used to match
and verify referrers.
@@ -1192,7 +1274,7 @@ defconfig -- This is a configuration file similar to the Linux
USB host HID class driver. Requires CONFIG_USBHOST=y,
CONFIG_USBHOST_INT_DISABLE=n, CONFIG_NFILE_DESCRIPTORS > 0,
CONFIG_SCHED_WORKQUEUE=y, and CONFIG_DISABLE_SIGNALS=n.
CONFIG_HIDKBD_POLLUSEC
Device poll rate in microseconds. Default: 100 milliseconds.
CONFIG_HIDKBD_DEFPRIO
@@ -1211,7 +1293,7 @@ defconfig -- This is a configuration file similar to the Linux
If set to y all 231 possible scancodes will be converted to
something. Default: 104 key US keyboard.
CONFIG_HIDKBD_NODEBOUNCE
If set to y normal debouncing is disabled. Default:
If set to y normal debouncing is disabled. Default:
Debounce enabled (No repeat keys).
USB host mass storage class driver. Requires CONFIG_USBHOST=y,
@@ -1248,12 +1330,12 @@ defconfig -- This is a configuration file similar to the Linux
Configure the CDC serial driver as part of a composite driver
(only if CONFIG_USBDEV_COMPOSITE is also defined)
CONFIG_CDCACM_IFNOBASE
If the CDC driver is part of a composite device, then this may need to
If the CDC driver is part of a composite device, then this may need to
be defined to offset the CDC/ACM interface numbers so that they are
unique and contiguous. When used with the Mass Storage driver, the
correct value for this offset is zero.
CONFIG_CDCACM_STRBASE
If the CDC driver is part of a composite device, then this may need to
If the CDC driver is part of a composite device, then this may need to
be defined to offset the CDC/ACM string numbers so that they are
unique and contiguous. When used with the Mass Storage driver, the
correct value for this offset is four (this value actuallly only needs
@@ -1312,13 +1394,13 @@ defconfig -- This is a configuration file similar to the Linux
Configure the mass storage driver as part of a composite driver
(only if CONFIG_USBDEV_COMPOSITE is also defined)
CONFIG_USBMSC_IFNOBASE
If the CDC driver is part of a composite device, then this may need to
If the CDC driver is part of a composite device, then this may need to
be defined to offset the mass storage interface number so that it is
unique and contiguous. When used with the CDC/ACM driver, the
correct value for this offset is two (because of the two CDC/ACM
interfaces that will precede it).
CONFIG_USBMSC_STRBASE
If the CDC driver is part of a composite device, then this may need to
If the CDC driver is part of a composite device, then this may need to
be defined to offset the mass storage string numbers so that they are
unique and contiguous. When used with the CDC/ACM driver, the
correct value for this offset is four (or perhaps 5 or 6, depending
@@ -1526,10 +1608,15 @@ configs/avr32dev1
configs/c5471evm
This is a port to the Spectrum Digital C5471 evaluation board. The
TMS320C5471 is a dual core processor from TI with an ARM7TDMI general
purpose processor and a c54 DSP. It is also known as TMS320DA180 or just DA180.
purpose processor and a c54 DSP. It is also known as TMS320DA180 or just DA180.
NuttX runs on the ARM core and is built with a GNU arm-nuttx-elf toolchain*.
This port is complete and verified.
configs/cloudctrl
Darcy's CloudController board. This is a small network relay development
board. Based on the Shenzhou IV development board design. It is based on
the STM32F107VC MCU.
configs/compal_e88 and compal_e99
These directories contain the board support for compal e88 and e99 phones.
These ports are based on patches contributed by Denis Carikli for both the
@@ -1542,23 +1629,23 @@ configs/demo9s12ne64
is code complete but has not yet been verified.
configs/ea3131
Embedded Artists EA3131 Development board. This board is based on the
Embedded Artists EA3131 Development board. This board is based on the
an NXP LPC3131 MCU. This OS is built with the arm-nuttx-elf toolchain*.
STATUS: This port is complete and mature.
configs/ea3152
Embedded Artists EA3152 Development board. This board is based on the
Embedded Artists EA3152 Development board. This board is based on the
an NXP LPC3152 MCU. This OS is built with the arm-nuttx-elf toolchain*.
STATUS: This port is has not be exercised well, but since it is
a simple derivative of the ea3131, it should be fully functional.
configs/eagle100
Micromint Eagle-100 Development board. This board is based on the
Micromint Eagle-100 Development board. This board is based on the
an ARM Cortex-M3 MCU, the Luminary LM3S6918. This OS is built with the
arm-nuttx-elf toolchain*. STATUS: This port is complete and mature.
configs/ekk-lm3s9b96
TI/Stellaris EKK-LM3S9B96 board. This board is based on the
TI/Stellaris EKK-LM3S9B96 board. This board is based on the
an EKK-LM3S9B96 which is a Cortex-M3.
configs/ez80f0910200kitg
@@ -1586,13 +1673,13 @@ configs/kwikstik-k40.
configs/lincoln60
NuttX port to the Micromint Lincoln 60 board.
configs/lm3s6432-s2e
Stellaris RDK-S2E Reference Design Kit and the MDL-S2E Ethernet to
Serial module.
configs/lm3s6965-ek
Stellaris LM3S6965 Evaluation Kit. This board is based on the
Stellaris LM3S6965 Evaluation Kit. This board is based on the
an ARM Cortex-M3 MCU, the Luminary/TI LM3S6965. This OS is built with the
arm-nuttx-elf toolchain*. STATUS: This port is complete and mature.
@@ -1649,7 +1736,7 @@ configs/ntosd-dm320
toolchain*: see
http://wiki.neurostechnology.com/index.php/OSD_1.0_Developer_Home
There are some differences between the Dev Board and the currently
available commercial v1.0 Boards. See
@@ -1739,7 +1826,7 @@ configs/qemu-i486
hardwared (Google the Bifferboard).
configs/rgmp
RGMP stands for RTOS and GPOS on Multi-Processor. RGMP is a project for
RGMP stands for RTOS and GPOS on Multi-Processor. RGMP is a project for
running GPOS and RTOS simultaneously on multi-processor platforms. You can
port your favorite RTOS to RGMP together with an unmodified Linux to form a
hybrid operating system. This makes your application able to use both RTOS
@@ -1780,8 +1867,14 @@ configs/stm3240g-eval
microcontroller (ARM Cortex-M4 with FPU). This port uses a GNU Cortex-M4
toolchain (such as CodeSourcery).
configs/stm32f100rc_generic
STMicro STM32F100RC generic board based on STM32F100RC high-density value line
chip. This "generic" configuration is not very usable out-of-box, but can be
used as a starting point to creating new configs with similar STM32
high-density value line chips.
configs/stm32f4discovery
STMicro STM32F4-Discovery board boased on the STMIcro STM32F407VGT6 MCU.
STMicro STM32F4-Discovery board based on the STMIcro STM32F407VGT6 MCU.
configs/sure-pic32mx
The "Advanced USB Storage Demo Board," Model DB-DP11215, from Sure
@@ -1818,7 +1911,7 @@ configs/vsn
configs/xtrs
TRS80 Model 3. This port uses a vintage computer based on the Z80.
An emulator for this computer is available to run TRS80 programs on a
An emulator for this computer is available to run TRS80 programs on a
linux platform (http://www.tim-mann.org/xtrs.html).
configs/z16f2800100zcog
@@ -1869,7 +1962,7 @@ And if configs/<board-name>/<config-dir>/appconfig exists and your
application directory is not in the standard loction (../apps), then
you should also specify the location of the application directory on the
command line like:
cd tools
./configure.sh -a <app-dir> <board-name>/<config-dir>
nuttx/configs/px4fmu/nsh/defconfig
+5
View File
@@ -200,6 +200,10 @@ CONFIG_STM32_TIM9=y
CONFIG_STM32_TIM10=y
CONFIG_STM32_TIM11=y
#
# We want the flash prefetch on for max performance.
#
STM32_FLASH_PREFETCH=y
#
# Enable the MTD driver for the onboard I2C EEPROM
@@ -351,6 +355,7 @@ CONFIG_I2C=y
CONFIG_I2C_POLLED=y
CONFIG_I2C_TRANSFER=y
CONFIG_I2C_TRACE=n
CONFIG_I2C_RESET=y
# Allow 180 us per byte, a wide margin for the 400 KHz clock we're using
# e.g. 9.6 ms for an EEPROM page write, 0.9 ms for a MAG update
CONFIG_STM32_I2CTIMEOUS_PER_BYTE=200
nuttx/drivers/Kconfig
+41 -35
View File
@@ -47,7 +47,8 @@ config CAN_EXTID
bool "CAN extended IDs"
default n
---help---
Enables support for the 29-bit extended ID. Default Standard 11-bit IDs.
Enables support for the 29-bit extended ID. Default Standard 11-bit
IDs.
config CAN_FIFOSIZE
int "CAN driver I/O buffer size"
@@ -83,10 +84,10 @@ config PWM_PULSECOUNT
bool "PWM Pulse Count Support"
default n
---help---
Some hardware will support generation of a fixed number of pulses. This
might be used, for example to support a stepper motor. If the hardware
will support a fixed pulse count, then this configuration should be set to
enable the capability.
Some hardware will support generation of a fixed number of pulses.
This might be used, for example to support a stepper motor. If the
hardware will support a fixed pulse count, then this configuration
should be set to enable the capability.
endif
@@ -147,23 +148,25 @@ config SPI_OWNBUS
bool "SPI single device"
default n
---help---
Set if there is only one active device on the SPI bus. No locking or SPI
configuration will be performed. It is not necessary for clients to lock,
re-configure, etc..
Set if there is only one active device on the SPI bus. No locking or
SPI configuration will be performed. It is not necessary for clients to
lock, re-configure, etc..
config SPI_EXCHANGE
bool "SPI exchange"
default y
---help---
Driver supports a single exchange method (vs a recvblock() and sndblock ()methods).
Driver supports a single exchange method (vs a recvblock() and
sndblock() methods).
config SPI_CMDDATA
bool "SPI CMD/DATA"
default n
---help---
Devices on the SPI bus require out-of-band support to distinguish command
transfers from data transfers. Such devices will often support either 9-bit
SPI (yech) or 8-bit SPI and a GPIO output that selects between command and data.
Devices on the SPI bus require out-of-band support to distinguish
command transfers from data transfers. Such devices will often support
either 9-bit SPI (yech) or 8-bit SPI and a GPIO output that selects
between command and data.
endif
@@ -173,35 +176,36 @@ menuconfig RTC
---help---
This selection enables configuration of a real time clock (RTCdriver.
See include/nuttx/rtc.h for further watchdog timer driver information.
Most RTC drivers are MCU specific and may require other specific settings.
Most RTC drivers are MCU specific and may require other specific
settings.
config RTC_DATETIME
bool "Date/Time RTC Support"
default n
depends on RTC
---help---
There are two general types of RTC: (1) A simple battery backed counter
that keeps the time when power is down, and (2) a full date / time RTC the
provides the date and time information, often in BCD format. If
RTC_DATETIME is selected, it specifies this second kind of RTC. In this
case, the RTC is used to "seed" the normal NuttX timer and the NuttX system
timer provides for higher resolution time.
There are two general types of RTC: (1) A simple battery backed
counter that keeps the time when power is down, and (2) a full
date / time RTC the provides the date and time information, often in
BCD format. If RTC_DATETIME is selected, it specifies this second kind
of RTC. In this case, the RTC is used to "seed" the normal NuttX timer
and the NuttX system timer provides for higher resolution time.
config RTC_HIRES
bool "Hi-Res RTC Support"
default n
depends on RTC && !RTC_DATETIME
---help---
If RTC_DATETIME not selected, then the simple, battery backed counter is
used. There are two different implementations of such simple counters
based on the time resolution of the counter: The typical RTC keeps time
to resolution of 1 second, usually supporting a 32-bit time_t value. In
this case, the RTC is used to "seed" the normal NuttX timer and the NuttX
timer provides for higherresoution time.
If RTC_DATETIME not selected, then the simple, battery backed counter
is used. There are two different implementations of such simple
counters based on the time resolution of the counter: The typical RTC
keeps time to resolution of 1 second, usually supporting a 32-bit
time_t value. In this case, the RTC is used to "seed" the normal NuttX
timer and the NuttX timer provides for higherresoution time.
If RTC_HIRES is enabled in the NuttX configuration, then the RTC provides
higher resolution time and completely replaces the system timer for purpose
of date and time.
If RTC_HIRES is enabled in the NuttX configuration, then the RTC
provides higher resolution time and completely replaces the system
timer for purpose of date and time.
config RTC_FREQUENCY
int "Hi-Res RTC frequency"
@@ -209,8 +213,8 @@ config RTC_FREQUENCY
depends on RTC && !RTC_DATETIME && RTC_HIRES
---help---
If RTC_HIRES is defined, then the frequency of the high resolution RTC
must be provided. If RTC_HIRES is not defined, RTC_FREQUENCY is assumed
to be one Hz.
must be provided. If RTC_HIRES is not defined, RTC_FREQUENCY is
assumed to be one Hz.
config RTC_ALARM
bool "RTC Alarm Support"
@@ -224,8 +228,9 @@ menuconfig WATCHDOG
bool "Watchdog Timer Support"
default n
---help---
This selection enables building of the "upper-half" watchdog timer driver.
See include/nuttx/watchdog.h for further watchdog timer driver information.
This selection enables building of the "upper-half" watchdog timer
driver. See include/nuttx/watchdog.h for further watchdog timer driver
information.
if WATCHDOG
endif
@@ -348,7 +353,8 @@ menuconfig POWER
bool "Power Management Support"
default n
---help---
Enable building of power-related devices (battery monitors, chargers, etc).
Enable building of power-related devices (battery monitors, chargers,
etc).
if POWER
source drivers/power/Kconfig
@@ -386,8 +392,8 @@ menuconfig SERIAL
default y
---help---
Front-end character drivers for chip-specific UARTs. This provide
some TTY-like functionality and are commonly used (but not required for)
the NuttX system console. See also include/nuttx/serial/serial.h
some TTY-like functionality and are commonly used (but not required
for) the NuttX system console. See also include/nuttx/serial/serial.h
if SERIAL
source drivers/serial/Kconfig
nuttx/drivers/Makefile
+13 -14
View File
@@ -86,15 +86,15 @@ ifeq ($(CONFIG_WATCHDOG),y)
endif
endif
AOBJS = $(ASRCS:.S=$(OBJEXT))
COBJS = $(CSRCS:.c=$(OBJEXT))
AOBJS = $(ASRCS:.S=$(OBJEXT))
COBJS = $(CSRCS:.c=$(OBJEXT))
SRCS = $(ASRCS) $(CSRCS)
OBJS = $(AOBJS) $(COBJS)
SRCS = $(ASRCS) $(CSRCS)
OBJS = $(AOBJS) $(COBJS)
BIN = libdrivers$(LIBEXT)
BIN = libdrivers$(LIBEXT)
all: $(BIN)
all: $(BIN)
$(AOBJS): %$(OBJEXT): %.S
$(call ASSEMBLE, $<, $@)
@@ -102,22 +102,21 @@ $(AOBJS): %$(OBJEXT): %.S
$(COBJS): %$(OBJEXT): %.c
$(call COMPILE, $<, $@)
$(BIN): $(OBJS)
@( for obj in $(OBJS) ; do \
$(call ARCHIVE, $@, $${obj}); \
done ; )
$(BIN): $(OBJS)
$(call ARCHIVE, $@, $(OBJS))
.depend: Makefile $(SRCS)
@$(MKDEP) $(DEPPATH) $(CC) -- $(CFLAGS) -- $(SRCS) >Make.dep
@touch $@
$(Q) $(MKDEP) $(DEPPATH) "$(CC)" -- $(CFLAGS) -- $(SRCS) >Make.dep
$(Q) touch $@
depend: .depend
clean:
@rm -f $(BIN) *~ .*.swp
$(call DELFILE, $(BIN))
$(call CLEAN)
distclean: clean
@rm -f Make.dep .depend
$(call DELFILE, Make.dep)
$(call DELFILE, .depend)
-include Make.dep
nuttx/drivers/analog/adc.c
+13 -2
View File
@@ -143,7 +143,7 @@ static int adc_open(FAR struct file *filep)
dev->ad_recv.af_head = 0;
dev->ad_recv.af_tail = 0;
/* Finally, Enable the CAN RX interrupt */
/* Finally, Enable the ADC RX interrupt */
dev->ad_ops->ao_rxint(dev, true);
@@ -151,9 +151,11 @@ static int adc_open(FAR struct file *filep)
dev->ad_ocount = tmp;
}
irqrestore(flags);
}
}
sem_post(&dev->ad_closesem);
}
return ret;
@@ -370,6 +372,10 @@ static int adc_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: adc_receive
****************************************************************************/
int adc_receive(FAR struct adc_dev_s *dev, uint8_t ch, int32_t data)
{
FAR struct adc_fifo_s *fifo = &dev->ad_recv;
@@ -390,7 +396,7 @@ int adc_receive(FAR struct adc_dev_s *dev, uint8_t ch, int32_t data)
if (nexttail != fifo->af_head)
{
/* Add the new, decoded CAN message at the tail of the FIFO */
/* Add the new, decoded ADC sample at the tail of the FIFO */
fifo->af_buffer[fifo->af_tail].am_channel = ch;
fifo->af_buffer[fifo->af_tail].am_data = data;
@@ -403,11 +409,16 @@ int adc_receive(FAR struct adc_dev_s *dev, uint8_t ch, int32_t data)
{
sem_post(&fifo->af_sem);
}
err = OK;
}
return err;
}
/****************************************************************************
* Name: adc_register
****************************************************************************/
int adc_register(FAR const char *path, FAR struct adc_dev_s *dev)
{
/* Initialize the ADC device structure */
nuttx/drivers/input/max11802.c
+1313
View File
File diff suppressed because it is too large Load Diff
nuttx/drivers/input/max11802.h
+167
View File
@@ -0,0 +1,167 @@
/********************************************************************************************
* drivers/input/max11802.h
*
* Copyright (C) 2011-2012 Gregory Nutt. All rights reserved.
* Authors: Gregory Nutt <gnutt@nuttx.org>
* Petteri Aimonen <jpa@nx.mail.kapsi.fi>
*
* References:
* "Low-Power, Ultra-Small Resistive Touch-Screen Controllers
* with I2C/SPI Interface" Maxim IC, Rev 3, 10/2010
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
********************************************************************************************/
#ifndef __DRIVERS_INPUT_MAX11802_H
#define __DRIVERS_INPUT_MAX11802_H
/********************************************************************************************
* Included Files
********************************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <semaphore.h>
#include <poll.h>
#include <wdog.h>
#include <nuttx/wqueue.h>
#include <nuttx/spi.h>
#include <nuttx/clock.h>
#include <nuttx/input/max11802.h>
/********************************************************************************************
* Pre-Processor Definitions
********************************************************************************************/
/* Configuration ****************************************************************************/
/* MAX11802 Interfaces *********************************************************************/
/* LSB of register addresses specifies read (1) or write (0). */
#define MAX11802_CMD_XPOSITION ((0x52 << 1) | 1)
#define MAX11802_CMD_YPOSITION ((0x54 << 1) | 1)
#define MAX11802_CMD_MEASUREXY (0x70 << 1)
#define MAX11802_CMD_MODE_WR (0x0B << 1)
#define MAX11802_CMD_MODE_RD ((0x0B << 1) | 1)
#define MAX11802_CMD_AVG_WR (0x03 << 1)
#define MAX11802_CMD_TIMING_WR (0x05 << 1)
#define MAX11802_CMD_DELAY_WR (0x06 << 1)
/* Register values to set */
#define MAX11802_MODE 0x0E
#define MAX11802_AVG 0x55
#define MAX11802_TIMING 0x77
#define MAX11802_DELAY 0x55
/* Driver support **************************************************************************/
/* This format is used to construct the /dev/input[n] device driver path. It
* defined here so that it will be used consistently in all places.
*/
#define DEV_FORMAT "/dev/input%d"
#define DEV_NAMELEN 16
/* Poll the pen position while the pen is down at this rate (50MS): */
#define MAX11802_WDOG_DELAY ((50 + (MSEC_PER_TICK-1))/ MSEC_PER_TICK)
/********************************************************************************************
* Public Types
********************************************************************************************/
/* This describes the state of one contact */
enum max11802_contact_3
{
CONTACT_NONE = 0, /* No contact */
CONTACT_DOWN, /* First contact */
CONTACT_MOVE, /* Same contact, possibly different position */
CONTACT_UP, /* Contact lost */
};
/* This structure describes the results of one MAX11802 sample */
struct max11802_sample_s
{
uint8_t id; /* Sampled touch point ID */
uint8_t contact; /* Contact state (see enum ads7843e_contact_e) */
bool valid; /* True: x,y contain valid, sampled data */
uint16_t x; /* Measured X position */
uint16_t y; /* Measured Y position */
};
/* This structure describes the state of one MAX11802 driver instance */
struct max11802_dev_s
{
#ifdef CONFIG_ADS7843E_MULTIPLE
FAR struct ads7843e_dev_s *flink; /* Supports a singly linked list of drivers */
#endif
uint8_t nwaiters; /* Number of threads waiting for MAX11802 data */
uint8_t id; /* Current touch point ID */
volatile bool penchange; /* An unreported event is buffered */
uint16_t threshx; /* Thresholding X value */
uint16_t threshy; /* Thresholding Y value */
sem_t devsem; /* Manages exclusive access to this structure */
sem_t waitsem; /* Used to wait for the availability of data */
FAR struct max11802_config_s *config; /* Board configuration data */
FAR struct spi_dev_s *spi; /* Saved SPI driver instance */
struct work_s work; /* Supports the interrupt handling "bottom half" */
struct max11802_sample_s sample; /* Last sampled touch point data */
WDOG_ID wdog; /* Poll the position while the pen is down */
/* The following is a list if poll structures of threads waiting for
* driver events. The 'struct pollfd' reference for each open is also
* retained in the f_priv field of the 'struct file'.
*/
#ifndef CONFIG_DISABLE_POLL
struct pollfd *fds[CONFIG_ADS7843E_NPOLLWAITERS];
#endif
};
/********************************************************************************************
* Public Function Prototypes
********************************************************************************************/
#ifdef __cplusplus
#define EXTERN extern "C"
extern "C" {
#else
#define EXTERN extern
#endif
#undef EXTERN
#ifdef __cplusplus
}
#endif
#endif /* __DRIVERS_INPUT_ADS7843E_H */
nuttx/drivers/lcd/Kconfig
+77 -4
View File
@@ -183,12 +183,85 @@ config NOKIA6100_RGBORD
endif
config LCD_UG9664HSWAG01
bool "9664HSWAG01 OLED Display Module"
bool "UG-9664HSWAG01 OLED Display Module"
default n
---help---
ug-9664hswag01.c. OLED Display Module, UG-9664HSWAG01", Univision
Technology Inc. Used with the LPC Xpresso and Embedded Artists
base board.
OLED Display Module, UG-9664HSWAG01, Univision Technology Inc. Used
with the LPCXpresso and Embedded Artists base board.
Required LCD driver settings:
LCD_MAXCONTRAST should be 255, but any value >0 and <=255 will be accepted.
LCD_MAXPOWER should be 1: 0=off, 1=on
Required SPI driver settings:
SPI_CMDDATA - Include support for cmd/data selection.
if LCD_UG9664HSWAG01
config UG9664HSWAG01_SPIMODE
int "UG-9664HSWAG01 SPI Mode"
default 0
---help---
Controls the SPI mode
config UG9664HSWAG01_FREQUENCY
int "UG-9664HSWAG01 SPI Frequency"
default 3500000
---help---
Define to use a different bus frequency
config UG9664HSWAG01_NINTERFACES
int "Number of UG-9664HSWAG01 Devices"
default 1
---help---
Specifies the number of physical UG-9664HSWAG01 devices that will be
supported. NOTE: At present, this must be undefined or defined to be 1.
config UG9664HSWAG01_POWER
bool "Power control"
default n
---help---
If the hardware supports a controllable OLED a power supply, this
configuration should be defined. In this case the system must
provide an interface ug_power().
endif
config LCD_UG2864AMBAG01
bool "UG-2864AMBAG01 OLED Display Module"
default n
---help---
OLED Display Module, UG-2864AMBAG01, Univision Technology Inc.
Required LCD driver settings:
LCD_MAXCONTRAST should be 255, but any value >0 and <=255 will be accepted.
LCD_MAXPOWER should be 1: 0=off, 1=on
Required SPI driver settings:
SPI_CMDDATA - Include support for cmd/data selection.
if LCD_UG2864AMBAG01
config UG2864AMBAG01_SPIMODE
int "UG-2864AMBAG01 SPI Mode"
default 3
---help---
Controls the SPI mode
config UG2864AMBAG01_FREQUENCY
int "UG-2864AMBAG01 SPI Frequency"
default 3500000
---help---
Define to use a different bus frequency
config UG2864AMBAG01_NINTERFACES
int "Number of UG-2864AMBAG01 Devices"
default 1
---help---
Specifies the number of physical UG-9664HSWAG01 devices that will be
supported. NOTE: At present, this must be undefined or defined to be 1.
endif
config LCD_SSD1289
bool "LCD Based on SSD1289 Controller"
nuttx/drivers/lcd/ug-9664hswag01.c
+6 -9
View File
@@ -73,8 +73,6 @@
* CONFIG_UG9664HSWAG01_POWER
* If the hardware supports a controllable OLED a power supply, this
* configuration shold be defined. (See ug_power() below).
* CONFIG_LCD_UGDEBUG - Enable detailed UG-9664HSWAG01 debug output
* (CONFIG_DEBUG and CONFIG_VERBOSE must also be enabled).
*
* Required LCD driver settings:
* CONFIG_LCD_UG9664HSWAG01 - Enable UG-9664HSWAG01 support
@@ -119,11 +117,10 @@
#ifndef CONFIG_DEBUG
# undef CONFIG_DEBUG_VERBOSE
# undef CONFIG_DEBUG_GRAPHICS
#endif
#ifndef CONFIG_DEBUG_VERBOSE
# undef CONFIG_LCD_UGDEBUG
# undef CONFIG_DEBUG_LCD
#endif
/* Check contrast selection */
@@ -182,7 +179,7 @@
#define UG_BPP 1
#define UG_COLORFMT FB_FMT_Y1
/* Bytes per logical row andactual device row */
/* Bytes per logical row and actual device row */
#define UG_XSTRIDE (UG_XRES >> 3) /* Pixels arrange "horizontally for user" */
#define UG_YSTRIDE (UG_YRES >> 3) /* But actual device arrangement is "vertical" */
@@ -198,10 +195,10 @@
/* Debug ******************************************************************************/
#ifdef CONFIG_LCD_UGDEBUG
# define ugdbg(format, arg...) vdbg(format, ##arg)
#ifdef CONFIG_DEBUG_LCD
# define lcddbg(format, arg...) vdbg(format, ##arg)
#else
# define ugdbg(x...)
# define lcddbg(x...)
#endif
/**************************************************************************************
@@ -997,7 +994,7 @@ FAR struct lcd_dev_s *ug_initialize(FAR struct spi_dev_s *spi, unsigned int devn
SPI_CMDDATA(spi, SPIDEV_DISPLAY, true);
/* Set the starting position for the run */
/* Configure the device */
(void)SPI_SEND(spi, SSD1305_SETCOLL + 2); /* Set low column address */
(void)SPI_SEND(spi, SSD1305_SETCOLH + 2); /* Set high column address */
nuttx/drivers/mmcsd/mmcsd_sdio.c
+5
View File
@@ -38,6 +38,9 @@
****************************************************************************/
#include <nuttx/config.h>
#if defined (CONFIG_MMCSD) && defined (CONFIG_MMCSD_SDIO)
#include <nuttx/compiler.h>
#include <sys/types.h>
@@ -3179,3 +3182,5 @@ errout_with_alloc:
kfree(priv);
return ret;
}
#endif /* defined (CONFIG_MMCSD) && defined (CONFIG_MMCSD_SDIO) */
nuttx/drivers/mmcsd/mmcsd_spi.c
+9 -2
View File
@@ -38,6 +38,9 @@
****************************************************************************/
#include <nuttx/config.h>
#if defined (CONFIG_MMCSD) && defined (CONFIG_MMCSD_SPI)
#include <sys/types.h>
#include <stdint.h>
@@ -508,7 +511,7 @@ static uint32_t mmcsd_sendcmd(FAR struct mmcsd_slot_s *slot,
}
break;
/* The R3 response is 5 bytes long */
/* The R3 response is 5 bytes long. The first byte is identical to R1. */
case MMCSD_CMDRESP_R3:
{
@@ -520,8 +523,10 @@ static uint32_t mmcsd_sendcmd(FAR struct mmcsd_slot_s *slot,
fvdbg("CMD%d[%08x] R1=%02x OCR=%08x\n",
cmd->cmd & 0x3f, arg, response, slot->ocr);
}
break;
/* The R7 response is 5 bytes long. The first byte is identical to R1. */
/* The R7 response is 5 bytes long */
case MMCSD_CMDRESP_R7:
default:
{
@@ -1876,3 +1881,5 @@ int mmcsd_spislotinitialize(int minor, int slotno, FAR struct spi_dev_s *spi)
(void)SPI_REGISTERCALLBACK(spi, mmcsd_mediachanged, (void*)slot);
return OK;
}
#endif /* defined (CONFIG_MMCSD) && defined (CONFIG_MMCSD_SPI) */
nuttx/drivers/net/e1000.c
+145 -152
View File
@@ -60,6 +60,7 @@
#include <rgmp/pmap.h>
#include <rgmp/string.h>
#include <rgmp/stdio.h>
#include <rgmp/utils.h>
#include <rgmp/arch/pci.h>
#include <rgmp/memio.h>
#include "e1000.h"
@@ -104,9 +105,9 @@ struct e1000_dev {
uint32_t io_mem_base;
uint32_t mem_size;
int pci_dev_id;
uint16_t pci_addr;
unsigned char src_mac[6];
unsigned char dst_mac[6];
int irq;
struct irq_action int_desc;
struct tx_ring tx_ring;
struct rx_ring rx_ring;
@@ -308,16 +309,16 @@ void e1000_init(struct e1000_dev *dev)
e1000_outl(dev, E1000_FCRTH, pba*9/10);
// setup tx rings
txd_phys = PADDR(dev->tx_ring.desc);
kmem_phys = PADDR(dev->tx_ring.buf);
txd_phys = PADDR((uintptr_t)dev->tx_ring.desc);
kmem_phys = PADDR((uintptr_t)dev->tx_ring.buf);
for (i=0; i<CONFIG_E1000_N_TX_DESC; i++,kmem_phys+=CONFIG_E1000_BUFF_SIZE) {
dev->tx_ring.desc[i].base_address = kmem_phys;
dev->tx_ring.desc[i].packet_length = 0;
dev->tx_ring.desc[i].cksum_offset = 0;
dev->tx_ring.desc[i].cksum_origin = 0;
dev->tx_ring.desc[i].desc_status = 1;
dev->tx_ring.desc[i].desc_command = (1<<0)|(1<<1)|(1<<3);
dev->tx_ring.desc[i].special_info = 0;
dev->tx_ring.desc[i].base_address = kmem_phys;
dev->tx_ring.desc[i].packet_length = 0;
dev->tx_ring.desc[i].cksum_offset = 0;
dev->tx_ring.desc[i].cksum_origin = 0;
dev->tx_ring.desc[i].desc_status = 1;
dev->tx_ring.desc[i].desc_command = (1<<0)|(1<<1)|(1<<3);
dev->tx_ring.desc[i].special_info = 0;
}
dev->tx_ring.tail = 0;
e1000_outl(dev, E1000_TDT, 0);
@@ -329,15 +330,15 @@ void e1000_init(struct e1000_dev *dev)
e1000_outl(dev, E1000_TXDCTL, 0x01010000);
// setup rx rings
rxd_phys = PADDR(dev->rx_ring.desc);
kmem_phys = PADDR(dev->rx_ring.buf);
rxd_phys = PADDR((uintptr_t)dev->rx_ring.desc);
kmem_phys = PADDR((uintptr_t)dev->rx_ring.buf);
for (i=0; i<CONFIG_E1000_N_RX_DESC; i++,kmem_phys+=CONFIG_E1000_BUFF_SIZE) {
dev->rx_ring.desc[i].base_address = kmem_phys;
dev->rx_ring.desc[i].packet_length = 0;
dev->rx_ring.desc[i].packet_cksum = 0;
dev->rx_ring.desc[i].desc_status = 0;
dev->rx_ring.desc[i].desc_errors = 0;
dev->rx_ring.desc[i].vlan_tag = 0;
dev->rx_ring.desc[i].base_address = kmem_phys;
dev->rx_ring.desc[i].packet_length = 0;
dev->rx_ring.desc[i].packet_cksum = 0;
dev->rx_ring.desc[i].desc_status = 0;
dev->rx_ring.desc[i].desc_errors = 0;
dev->rx_ring.desc[i].vlan_tag = 0;
}
dev->rx_ring.head = 0;
dev->rx_ring.tail = CONFIG_E1000_N_RX_DESC-1;
@@ -378,7 +379,7 @@ static int e1000_transmit(struct e1000_dev *e1000)
{
int tail = e1000->tx_ring.tail;
unsigned char *cp = (unsigned char *)
(e1000->tx_ring.buf + tail * CONFIG_E1000_BUFF_SIZE);
(e1000->tx_ring.buf + tail * CONFIG_E1000_BUFF_SIZE);
int count = e1000->uip_dev.d_len;
/* Verify that the hardware is ready to send another packet. If we get
@@ -387,7 +388,7 @@ static int e1000_transmit(struct e1000_dev *e1000)
*/
if (!e1000->tx_ring.desc[tail].desc_status)
return -1;
return -1;
/* Increment statistics */
@@ -445,14 +446,14 @@ static int e1000_uiptxpoll(struct uip_driver_s *dev)
*/
if (e1000->uip_dev.d_len > 0) {
uip_arp_out(&e1000->uip_dev);
e1000_transmit(e1000);
uip_arp_out(&e1000->uip_dev);
e1000_transmit(e1000);
/* Check if there is room in the device to hold another packet. If not,
* return a non-zero value to terminate the poll.
*/
if (!e1000->tx_ring.desc[tail].desc_status)
return -1;
/* Check if there is room in the device to hold another packet. If not,
* return a non-zero value to terminate the poll.
*/
if (!e1000->tx_ring.desc[tail].desc_status)
return -1;
}
/* If zero is returned, the polling will continue until all connections have
@@ -483,75 +484,75 @@ static void e1000_receive(struct e1000_dev *e1000)
{
int head = e1000->rx_ring.head;
unsigned char *cp = (unsigned char *)
(e1000->rx_ring.buf + head * CONFIG_E1000_BUFF_SIZE);
(e1000->rx_ring.buf + head * CONFIG_E1000_BUFF_SIZE);
int cnt;
while (e1000->rx_ring.desc[head].desc_status) {
/* Check for errors and update statistics */
/* Check for errors and update statistics */
// Here we do not handle packets that exceed packet-buffer size
if ((e1000->rx_ring.desc[head].desc_status & 3) == 1) {
cprintf("NIC READ: Oversized packet\n");
goto next;
}
// Here we do not handle packets that exceed packet-buffer size
if ((e1000->rx_ring.desc[head].desc_status & 3) == 1) {
cprintf("NIC READ: Oversized packet\n");
goto next;
}
/* Check if the packet is a valid size for the uIP buffer configuration */
/* Check if the packet is a valid size for the uIP buffer configuration */
// get the number of actual data-bytes in this packet
cnt = e1000->rx_ring.desc[head].packet_length;
// get the number of actual data-bytes in this packet
cnt = e1000->rx_ring.desc[head].packet_length;
if (cnt > CONFIG_NET_BUFSIZE || cnt < 14) {
cprintf("NIC READ: invalid package size\n");
goto next;
}
if (cnt > CONFIG_NET_BUFSIZE || cnt < 14) {
cprintf("NIC READ: invalid package size\n");
goto next;
}
/* Copy the data data from the hardware to e1000->uip_dev.d_buf. Set
* amount of data in e1000->uip_dev.d_len
*/
/* Copy the data data from the hardware to e1000->uip_dev.d_buf. Set
* amount of data in e1000->uip_dev.d_len
*/
// now we try to copy these data-bytes to the UIP buffer
memcpy(e1000->uip_dev.d_buf, cp, cnt);
e1000->uip_dev.d_len = cnt;
// now we try to copy these data-bytes to the UIP buffer
memcpy(e1000->uip_dev.d_buf, cp, cnt);
e1000->uip_dev.d_len = cnt;
/* We only accept IP packets of the configured type and ARP packets */
/* We only accept IP packets of the configured type and ARP packets */
#ifdef CONFIG_NET_IPv6
if (BUF->type == HTONS(UIP_ETHTYPE_IP6))
if (BUF->type == HTONS(UIP_ETHTYPE_IP6))
#else
if (BUF->type == HTONS(UIP_ETHTYPE_IP))
if (BUF->type == HTONS(UIP_ETHTYPE_IP))
#endif
{
uip_arp_ipin(&e1000->uip_dev);
uip_input(&e1000->uip_dev);
{
uip_arp_ipin(&e1000->uip_dev);
uip_input(&e1000->uip_dev);
/* If the above function invocation resulted in data that should be
* sent out on the network, the field d_len will set to a value > 0.
*/
/* If the above function invocation resulted in data that should be
* sent out on the network, the field d_len will set to a value > 0.
*/
if (e1000->uip_dev.d_len > 0) {
uip_arp_out(&e1000->uip_dev);
e1000_transmit(e1000);
}
}
else if (BUF->type == htons(UIP_ETHTYPE_ARP)) {
uip_arp_arpin(&e1000->uip_dev);
if (e1000->uip_dev.d_len > 0) {
uip_arp_out(&e1000->uip_dev);
e1000_transmit(e1000);
}
}
else if (BUF->type == htons(UIP_ETHTYPE_ARP)) {
uip_arp_arpin(&e1000->uip_dev);
/* If the above function invocation resulted in data that should be
* sent out on the network, the field d_len will set to a value > 0.
*/
/* If the above function invocation resulted in data that should be
* sent out on the network, the field d_len will set to a value > 0.
*/
if (e1000->uip_dev.d_len > 0) {
e1000_transmit(e1000);
}
}
if (e1000->uip_dev.d_len > 0) {
e1000_transmit(e1000);
}
}
next:
e1000->rx_ring.desc[head].desc_status = 0;
e1000->rx_ring.head = (head + 1) % CONFIG_E1000_N_RX_DESC;
e1000->rx_ring.free++;
head = e1000->rx_ring.head;
cp = (unsigned char *)(e1000->rx_ring.buf + head * CONFIG_E1000_BUFF_SIZE);
e1000->rx_ring.desc[head].desc_status = 0;
e1000->rx_ring.head = (head + 1) % CONFIG_E1000_N_RX_DESC;
e1000->rx_ring.free++;
head = e1000->rx_ring.head;
cp = (unsigned char *)(e1000->rx_ring.buf + head * CONFIG_E1000_BUFF_SIZE);
}
}
@@ -615,7 +616,7 @@ static void e1000_polltimer(int argc, uint32_t arg, ...)
* the TX poll if he are unable to accept another packet for transmission.
*/
if (!e1000->tx_ring.desc[tail].desc_status)
return;
return;
/* If so, update TCP timing states and poll uIP for new XMIT data. Hmmm..
* might be bug here. Does this mean if there is a transmit in progress,
@@ -651,8 +652,8 @@ static int e1000_ifup(struct uip_driver_s *dev)
struct e1000_dev *e1000 = (struct e1000_dev *)dev->d_private;
ndbg("Bringing up: %d.%d.%d.%d\n",
dev->d_ipaddr & 0xff, (dev->d_ipaddr >> 8) & 0xff,
(dev->d_ipaddr >> 16) & 0xff, dev->d_ipaddr >> 24 );
dev->d_ipaddr & 0xff, (dev->d_ipaddr >> 8) & 0xff,
(dev->d_ipaddr >> 16) & 0xff, dev->d_ipaddr >> 24 );
/* Initialize PHYs, the Ethernet interface, and setup up Ethernet interrupts */
e1000_init(e1000);
@@ -662,9 +663,9 @@ static int e1000_ifup(struct uip_driver_s *dev)
(void)wd_start(e1000->txpoll, E1000_WDDELAY, e1000_polltimer, 1, (uint32_t)e1000);
if (e1000_inl(e1000, E1000_STATUS) & 2)
e1000->bifup = true;
e1000->bifup = true;
else
e1000->bifup = false;
e1000->bifup = false;
return OK;
}
@@ -749,9 +750,9 @@ static int e1000_txavail(struct uip_driver_s *dev)
/* Ignore the notification if the interface is not yet up */
if (e1000->bifup) {
/* Check if there is room in the hardware to hold another outgoing packet. */
if (e1000->tx_ring.desc[tail].desc_status)
(void)uip_poll(&e1000->uip_dev, e1000_uiptxpoll);
/* Check if there is room in the hardware to hold another outgoing packet. */
if (e1000->tx_ring.desc[tail].desc_status)
(void)uip_poll(&e1000->uip_dev, e1000_uiptxpoll);
}
irqrestore(flags);
@@ -779,11 +780,11 @@ static int e1000_txavail(struct uip_driver_s *dev)
#ifdef CONFIG_NET_IGMP
static int e1000_addmac(struct uip_driver_s *dev, const uint8_t *mac)
{
struct e1000_dev *e1000 = (struct e1000_dev *)dev->d_private;
struct e1000_dev *e1000 = (struct e1000_dev *)dev->d_private;
/* Add the MAC address to the hardware multicast routing table */
/* Add the MAC address to the hardware multicast routing table */
return OK;
return OK;
}
#endif
@@ -808,15 +809,15 @@ static int e1000_addmac(struct uip_driver_s *dev, const uint8_t *mac)
#ifdef CONFIG_NET_IGMP
static int e1000_rmmac(struct uip_driver_s *dev, const uint8_t *mac)
{
struct e1000_dev *e1000 = (struct e1000_dev *)dev->d_private;
struct e1000_dev *e1000 = (struct e1000_dev *)dev->d_private;
/* Add the MAC address to the hardware multicast routing table */
/* Add the MAC address to the hardware multicast routing table */
return OK;
return OK;
}
#endif
irqreturn_t e1000_interrupt_handler(struct Trapframe *tf, void *dev_id)
static irqreturn_t e1000_interrupt_handler(int irq, void *dev_id)
{
struct e1000_dev *e1000 = (struct e1000_dev *)dev_id;
@@ -826,27 +827,27 @@ irqreturn_t e1000_interrupt_handler(struct Trapframe *tf, void *dev_id)
// not for me
if (intr_cause == 0)
return IRQ_NONE;
return IRQ_NONE;
/* Handle interrupts according to status bit settings */
// Link status change
if (intr_cause & (1<<2)) {
if (e1000_inl(e1000, E1000_STATUS) & 2)
e1000->bifup = true;
else
e1000->bifup = false;
if (e1000_inl(e1000, E1000_STATUS) & 2)
e1000->bifup = true;
else
e1000->bifup = false;
}
/* Check if we received an incoming packet, if so, call skel_receive() */
// Rx-descriptor Timer expired
if (intr_cause & (1<<7))
e1000_receive(e1000);
e1000_receive(e1000);
// Tx queue empty
if (intr_cause & (1<<1))
wd_cancel(e1000->txtimeout);
wd_cancel(e1000->txtimeout);
/* Check is a packet transmission just completed. If so, call skel_txdone.
* This may disable further Tx interrupts if there are no pending
@@ -855,17 +856,17 @@ irqreturn_t e1000_interrupt_handler(struct Trapframe *tf, void *dev_id)
// Tx-descriptor Written back
if (intr_cause & (1<<0))
uip_poll(&e1000->uip_dev, e1000_uiptxpoll);
uip_poll(&e1000->uip_dev, e1000_uiptxpoll);
// Rx-Descriptors Low
if (intr_cause & (1<<4)) {
int tail;
tail = e1000->rx_ring.tail + e1000->rx_ring.free;
tail %= CONFIG_E1000_N_RX_DESC;
e1000->rx_ring.tail = tail;
e1000->rx_ring.free = 0;
e1000_outl(e1000, E1000_RDT, tail);
int tail;
tail = e1000->rx_ring.tail + e1000->rx_ring.free;
tail %= CONFIG_E1000_N_RX_DESC;
e1000->rx_ring.tail = tail;
e1000->rx_ring.free = 0;
e1000_outl(e1000, E1000_RDT, tail);
}
return IRQ_HANDLED;
@@ -885,20 +886,21 @@ static pci_id_t e1000_id_table[] = {
static int e1000_probe(uint16_t addr, pci_id_t id)
{
uint32_t mmio_base, mmio_size;
uint32_t pci_cmd, size;
int err, irq, flags;
uint32_t size;
int err;
void *kmem, *omem;
struct e1000_dev *dev;
// alloc e1000_dev memory
dev = kzalloc(sizeof(struct e1000_dev));
if (dev == NULL)
return -1;
if ((dev = kzalloc(sizeof(struct e1000_dev))) == NULL)
return -1;
// save pci addr
dev->pci_addr = addr;
// enable device
err = pci_enable_device(addr, PCI_RESOURCE_MEM);
if (err)
goto error;
if ((err = pci_enable_device(addr, PCI_BUS_MASTER)) < 0)
goto error;
// get e1000 device type
dev->pci_dev_id = id.join;
@@ -908,33 +910,20 @@ static int e1000_probe(uint16_t addr, pci_id_t id)
mmio_size = pci_resource_len(addr, 0);
err = rgmp_memmap_nocache(mmio_base, mmio_size, mmio_base);
if (err)
goto error;
goto error;
dev->phy_mem_base = mmio_base;
dev->io_mem_base = mmio_base;
dev->mem_size = mmio_size;
// make sure the controller's Bus Master capability is enabled
pci_cmd = pci_config_readl(addr, PCI_COMMAND);
pci_cmd |= (1<<2);
pci_config_writel(addr, PCI_COMMAND, pci_cmd);
// MAC address
memset(dev->dst_mac, 0xFF, 6);
memcpy(dev->src_mac, (void *)(dev->io_mem_base+E1000_RA), 6);
// get e1000 IRQ
flags = 0;
irq = pci_enable_msi(addr);
if (irq == 0) {
irq = pci_read_irq(addr);
flags |= IDC_SHARE;
}
dev->irq = irq;
// IRQ setup
dev->int_desc.handler = e1000_interrupt_handler;
dev->int_desc.dev_id = dev;
err = rgmp_request_irq(irq, &dev->int_desc, flags);
if (err)
goto err0;
if ((err = pci_request_irq(addr, &dev->int_desc, 0)) < 0)
goto err0;
// Here we alloc a big block of memory once and make it
// aligned to page boundary and multiple of page size. This
@@ -942,15 +931,19 @@ static int e1000_probe(uint16_t addr, pci_id_t id)
// should be mapped no-cache which will hugely reduce memory
// access performance. The page size alloc will restrict
// this bad effect only within the memory we alloc here.
//
// NEED FIX: the memalign may alloc memory continous in
// virtual address but dis-continous in physical address
// due to RGMP memory setup.
size = CONFIG_E1000_N_TX_DESC * sizeof(struct tx_desc) +
CONFIG_E1000_N_TX_DESC * CONFIG_E1000_BUFF_SIZE +
CONFIG_E1000_N_RX_DESC * sizeof(struct rx_desc) +
CONFIG_E1000_N_RX_DESC * CONFIG_E1000_BUFF_SIZE;
CONFIG_E1000_N_TX_DESC * CONFIG_E1000_BUFF_SIZE +
CONFIG_E1000_N_RX_DESC * sizeof(struct rx_desc) +
CONFIG_E1000_N_RX_DESC * CONFIG_E1000_BUFF_SIZE;
size = ROUNDUP(size, PGSIZE);
omem = kmem = memalign(PGSIZE, size);
if (kmem == NULL) {
err = -ENOMEM;
goto err1;
err = -ENOMEM;
goto err1;
}
rgmp_memremap_nocache((uintptr_t)kmem, size);
@@ -991,7 +984,7 @@ static int e1000_probe(uint16_t addr, pci_id_t id)
/* Register the device with the OS so that socket IOCTLs can be performed */
err = netdev_register(&dev->uip_dev);
if (err)
goto err2;
goto err2;
// insert into e1000_list
dev->next = e1000_list.next;
@@ -1000,14 +993,14 @@ static int e1000_probe(uint16_t addr, pci_id_t id)
return 0;
err2:
err2:
rgmp_memremap((uintptr_t)omem, size);
free(omem);
err1:
rgmp_free_irq(irq, &dev->int_desc);
err0:
err1:
pci_free_irq(addr);
err0:
rgmp_memunmap(mmio_base, mmio_size);
error:
error:
kfree(dev);
cprintf("e1000 device probe fail: %d\n", err);
return err;
@@ -1028,21 +1021,21 @@ void e1000_mod_exit(void)
struct e1000_dev *dev;
size = CONFIG_E1000_N_TX_DESC * sizeof(struct tx_desc) +
CONFIG_E1000_N_TX_DESC * CONFIG_E1000_BUFF_SIZE +
CONFIG_E1000_N_RX_DESC * sizeof(struct rx_desc) +
CONFIG_E1000_N_RX_DESC * CONFIG_E1000_BUFF_SIZE;
CONFIG_E1000_N_TX_DESC * CONFIG_E1000_BUFF_SIZE +
CONFIG_E1000_N_RX_DESC * sizeof(struct rx_desc) +
CONFIG_E1000_N_RX_DESC * CONFIG_E1000_BUFF_SIZE;
size = ROUNDUP(size, PGSIZE);
for (dev=e1000_list.next; dev!=NULL; dev=dev->next) {
netdev_unregister(&dev->uip_dev);
e1000_reset(dev);
wd_delete(dev->txpoll);
wd_delete(dev->txtimeout);
rgmp_memremap((uintptr_t)dev->tx_ring.desc, size);
free(dev->tx_ring.desc);
rgmp_free_irq(dev->irq, &dev->int_desc);
rgmp_memunmap((uintptr_t)dev->io_mem_base, dev->mem_size);
kfree(dev);
netdev_unregister(&dev->uip_dev);
e1000_reset(dev);
wd_delete(dev->txpoll);
wd_delete(dev->txtimeout);
rgmp_memremap((uintptr_t)dev->tx_ring.desc, size);
free(dev->tx_ring.desc);
pci_free_irq(dev->pci_addr);
rgmp_memunmap((uintptr_t)dev->io_mem_base, dev->mem_size);
kfree(dev);
}
e1000_list.next = NULL;
nuttx/drivers/net/e1000.h
+1 -3
View File
@@ -44,9 +44,7 @@
* Included Files
****************************************************************************/
#include <rgmp/types.h>
#include <rgmp/trap.h>
#include <rgmp/arch/arch.h>
#include <stdint.h>
/****************************************************************************
* Pre-processor Definitions
nuttx/drivers/net/vnet.c
+163 -164
View File
@@ -168,30 +168,30 @@ static int vnet_transmit(FAR struct vnet_driver_s *vnet)
{
int err;
/* Verify that the hardware is ready to send another packet. If we get
* here, then we are committed to sending a packet; Higher level logic
* must have assured that there is not transmission in progress.
*/
/* Verify that the hardware is ready to send another packet. If we get
* here, then we are committed to sending a packet; Higher level logic
* must have assured that there is not transmission in progress.
*/
/* Increment statistics */
/* Increment statistics */
/* Send the packet: address=vnet->sk_dev.d_buf, length=vnet->sk_dev.d_len */
/* Send the packet: address=vnet->sk_dev.d_buf, length=vnet->sk_dev.d_len */
err = vnet_xmit(vnet->vnet, (char *)vnet->sk_dev.d_buf, vnet->sk_dev.d_len);
if (err) {
/* Setup the TX timeout watchdog (perhaps restarting the timer) */
//(void)wd_start(vnet->sk_txtimeout, VNET_TXTIMEOUT, vnet_txtimeout, 1, (uint32_t)vnet);
/* Setup the TX timeout watchdog (perhaps restarting the timer) */
//(void)wd_start(vnet->sk_txtimeout, VNET_TXTIMEOUT, vnet_txtimeout, 1, (uint32_t)vnet);
// When vnet_xmit fail, it means TX buffer is full. Watchdog
// is of no use here because no TX done INT will happen. So
// we reset the TX buffer directly.
// When vnet_xmit fail, it means TX buffer is full. Watchdog
// is of no use here because no TX done INT will happen. So
// we reset the TX buffer directly.
#ifdef CONFIG_DEBUG
cprintf("VNET: TX buffer is full\n");
cprintf("VNET: TX buffer is full\n");
#endif
return ERROR;
return ERROR;
}
else {
// this step may be unnecessary here
vnet_txdone(vnet);
// this step may be unnecessary here
vnet_txdone(vnet);
}
return OK;
@@ -223,29 +223,29 @@ static int vnet_transmit(FAR struct vnet_driver_s *vnet)
static int vnet_uiptxpoll(struct uip_driver_s *dev)
{
FAR struct vnet_driver_s *vnet = (FAR struct vnet_driver_s *)dev->d_private;
FAR struct vnet_driver_s *vnet = (FAR struct vnet_driver_s *)dev->d_private;
/* If the polling resulted in data that should be sent out on the network,
* the field d_len is set to a value > 0.
*/
/* If the polling resulted in data that should be sent out on the network,
* the field d_len is set to a value > 0.
*/
if (vnet->sk_dev.d_len > 0)
if (vnet->sk_dev.d_len > 0)
{
uip_arp_out(&vnet->sk_dev);
vnet_transmit(vnet);
uip_arp_out(&vnet->sk_dev);
vnet_transmit(vnet);
/* Check if there is room in the device to hold another packet. If not,
* return a non-zero value to terminate the poll.
*/
if (vnet_is_txbuff_full(vnet->vnet))
return 1;
/* Check if there is room in the device to hold another packet. If not,
* return a non-zero value to terminate the poll.
*/
if (vnet_is_txbuff_full(vnet->vnet))
return 1;
}
/* If zero is returned, the polling will continue until all connections have
* been examined.
*/
/* If zero is returned, the polling will continue until all connections have
* been examined.
*/
return 0;
return 0;
}
/****************************************************************************
@@ -265,54 +265,53 @@ static int vnet_uiptxpoll(struct uip_driver_s *dev)
*
****************************************************************************/
void rtos_vnet_recv(struct rgmp_vnet *vnet_dummy, char *data, int len)
void rtos_vnet_recv(struct rgmp_vnet *rgmp_vnet, char *data, int len)
{
// now only support 1 vnet
struct vnet_driver_s *vnet = &g_vnet[0];
struct vnet_driver_s *vnet = rgmp_vnet->priv;
do {
/* Check for errors and update statistics */
/* Check for errors and update statistics */
/* Check if the packet is a valid size for the uIP buffer configuration */
if (len > CONFIG_NET_BUFSIZE || len < 14) {
/* Check if the packet is a valid size for the uIP buffer configuration */
if (len > CONFIG_NET_BUFSIZE || len < 14) {
#ifdef CONFIG_DEBUG
cprintf("VNET: receive invalid packet of size %d\n", len);
cprintf("VNET: receive invalid packet of size %d\n", len);
#endif
return;
}
return;
}
// Copy the data data from the hardware to vnet->sk_dev.d_buf. Set
// amount of data in vnet->sk_dev.d_len
memcpy(vnet->sk_dev.d_buf, data, len);
vnet->sk_dev.d_len = len;
// Copy the data data from the hardware to vnet->sk_dev.d_buf. Set
// amount of data in vnet->sk_dev.d_len
memcpy(vnet->sk_dev.d_buf, data, len);
vnet->sk_dev.d_len = len;
/* We only accept IP packets of the configured type and ARP packets */
/* We only accept IP packets of the configured type and ARP packets */
#ifdef CONFIG_NET_IPv6
if (BUF->type == HTONS(UIP_ETHTYPE_IP6))
if (BUF->type == HTONS(UIP_ETHTYPE_IP6))
#else
if (BUF->type == HTONS(UIP_ETHTYPE_IP))
if (BUF->type == HTONS(UIP_ETHTYPE_IP))
#endif
{
uip_arp_ipin(&vnet->sk_dev);
uip_input(&vnet->sk_dev);
{
uip_arp_ipin(&vnet->sk_dev);
uip_input(&vnet->sk_dev);
// If the above function invocation resulted in data that should be
// sent out on the network, the field d_len will set to a value > 0.
if (vnet->sk_dev.d_len > 0) {
uip_arp_out(&vnet->sk_dev);
vnet_transmit(vnet);
}
}
else if (BUF->type == htons(UIP_ETHTYPE_ARP)) {
uip_arp_arpin(&vnet->sk_dev);
// If the above function invocation resulted in data that should be
// sent out on the network, the field d_len will set to a value > 0.
if (vnet->sk_dev.d_len > 0) {
uip_arp_out(&vnet->sk_dev);
vnet_transmit(vnet);
}
}
else if (BUF->type == htons(UIP_ETHTYPE_ARP)) {
uip_arp_arpin(&vnet->sk_dev);
// If the above function invocation resulted in data that should be
// sent out on the network, the field d_len will set to a value > 0.
if (vnet->sk_dev.d_len > 0) {
vnet_transmit(vnet);
}
}
// If the above function invocation resulted in data that should be
// sent out on the network, the field d_len will set to a value > 0.
if (vnet->sk_dev.d_len > 0) {
vnet_transmit(vnet);
}
}
}
while (0); /* While there are more packets to be processed */
}
@@ -336,17 +335,17 @@ void rtos_vnet_recv(struct rgmp_vnet *vnet_dummy, char *data, int len)
static void vnet_txdone(FAR struct vnet_driver_s *vnet)
{
/* Check for errors and update statistics */
/* Check for errors and update statistics */
/* If no further xmits are pending, then cancel the TX timeout and
* disable further Tx interrupts.
*/
/* If no further xmits are pending, then cancel the TX timeout and
* disable further Tx interrupts.
*/
//wd_cancel(vnet->sk_txtimeout);
//wd_cancel(vnet->sk_txtimeout);
/* Then poll uIP for new XMIT data */
/* Then poll uIP for new XMIT data */
(void)uip_poll(&vnet->sk_dev, vnet_uiptxpoll);
(void)uip_poll(&vnet->sk_dev, vnet_uiptxpoll);
}
/****************************************************************************
@@ -370,15 +369,15 @@ static void vnet_txdone(FAR struct vnet_driver_s *vnet)
static void vnet_txtimeout(int argc, uint32_t arg, ...)
{
FAR struct vnet_driver_s *vnet = (FAR struct vnet_driver_s *)arg;
FAR struct vnet_driver_s *vnet = (FAR struct vnet_driver_s *)arg;
/* Increment statistics and dump debug info */
/* Increment statistics and dump debug info */
/* Then reset the hardware */
/* Then reset the hardware */
/* Then poll uIP for new XMIT data */
/* Then poll uIP for new XMIT data */
(void)uip_poll(&vnet->sk_dev, vnet_uiptxpoll);
(void)uip_poll(&vnet->sk_dev, vnet_uiptxpoll);
}
/****************************************************************************
@@ -401,28 +400,28 @@ static void vnet_txtimeout(int argc, uint32_t arg, ...)
static void vnet_polltimer(int argc, uint32_t arg, ...)
{
FAR struct vnet_driver_s *vnet = (FAR struct vnet_driver_s *)arg;
FAR struct vnet_driver_s *vnet = (FAR struct vnet_driver_s *)arg;
/* Check if there is room in the send another TX packet. We cannot perform
* the TX poll if he are unable to accept another packet for transmission.
*/
if (vnet_is_txbuff_full(vnet->vnet)) {
/* Check if there is room in the send another TX packet. We cannot perform
* the TX poll if he are unable to accept another packet for transmission.
*/
if (vnet_is_txbuff_full(vnet->vnet)) {
#ifdef CONFIG_DEBUG
cprintf("VNET: TX buffer is full\n");
cprintf("VNET: TX buffer is full\n");
#endif
return;
}
return;
}
/* If so, update TCP timing states and poll uIP for new XMIT data. Hmmm..
* might be bug here. Does this mean if there is a transmit in progress,
* we will missing TCP time state updates?
*/
/* If so, update TCP timing states and poll uIP for new XMIT data. Hmmm..
* might be bug here. Does this mean if there is a transmit in progress,
* we will missing TCP time state updates?
*/
(void)uip_timer(&vnet->sk_dev, vnet_uiptxpoll, VNET_POLLHSEC);
(void)uip_timer(&vnet->sk_dev, vnet_uiptxpoll, VNET_POLLHSEC);
/* Setup the watchdog poll timer again */
/* Setup the watchdog poll timer again */
(void)wd_start(vnet->sk_txpoll, VNET_WDDELAY, vnet_polltimer, 1, arg);
(void)wd_start(vnet->sk_txpoll, VNET_WDDELAY, vnet_polltimer, 1, arg);
}
/****************************************************************************
@@ -444,20 +443,20 @@ static void vnet_polltimer(int argc, uint32_t arg, ...)
static int vnet_ifup(struct uip_driver_s *dev)
{
FAR struct vnet_driver_s *vnet = (FAR struct vnet_driver_s *)dev->d_private;
FAR struct vnet_driver_s *vnet = (FAR struct vnet_driver_s *)dev->d_private;
ndbg("Bringing up: %d.%d.%d.%d\n",
dev->d_ipaddr & 0xff, (dev->d_ipaddr >> 8) & 0xff,
(dev->d_ipaddr >> 16) & 0xff, dev->d_ipaddr >> 24 );
ndbg("Bringing up: %d.%d.%d.%d\n",
dev->d_ipaddr & 0xff, (dev->d_ipaddr >> 8) & 0xff,
(dev->d_ipaddr >> 16) & 0xff, dev->d_ipaddr >> 24 );
/* Initialize PHYs, the Ethernet interface, and setup up Ethernet interrupts */
/* Initialize PHYs, the Ethernet interface, and setup up Ethernet interrupts */
/* Set and activate a timer process */
/* Set and activate a timer process */
(void)wd_start(vnet->sk_txpoll, VNET_WDDELAY, vnet_polltimer, 1, (uint32_t)vnet);
(void)wd_start(vnet->sk_txpoll, VNET_WDDELAY, vnet_polltimer, 1, (uint32_t)vnet);
vnet->sk_bifup = true;
return OK;
vnet->sk_bifup = true;
return OK;
}
/****************************************************************************
@@ -478,28 +477,28 @@ static int vnet_ifup(struct uip_driver_s *dev)
static int vnet_ifdown(struct uip_driver_s *dev)
{
FAR struct vnet_driver_s *vnet = (FAR struct vnet_driver_s *)dev->d_private;
irqstate_t flags;
FAR struct vnet_driver_s *vnet = (FAR struct vnet_driver_s *)dev->d_private;
irqstate_t flags;
/* Disable the Ethernet interrupt */
/* Disable the Ethernet interrupt */
flags = irqsave();
flags = irqsave();
/* Cancel the TX poll timer and TX timeout timers */
/* Cancel the TX poll timer and TX timeout timers */
wd_cancel(vnet->sk_txpoll);
//wd_cancel(vnet->sk_txtimeout);
wd_cancel(vnet->sk_txpoll);
//wd_cancel(vnet->sk_txtimeout);
/* Put the the EMAC is its reset, non-operational state. This should be
* a known configuration that will guarantee the vnet_ifup() always
* successfully brings the interface back up.
*/
/* Put the the EMAC is its reset, non-operational state. This should be
* a known configuration that will guarantee the vnet_ifup() always
* successfully brings the interface back up.
*/
/* Mark the device "down" */
/* Mark the device "down" */
vnet->sk_bifup = false;
irqrestore(flags);
return OK;
vnet->sk_bifup = false;
irqrestore(flags);
return OK;
}
/****************************************************************************
@@ -523,35 +522,35 @@ static int vnet_ifdown(struct uip_driver_s *dev)
static int vnet_txavail(struct uip_driver_s *dev)
{
FAR struct vnet_driver_s *vnet = (FAR struct vnet_driver_s *)dev->d_private;
irqstate_t flags;
FAR struct vnet_driver_s *vnet = (FAR struct vnet_driver_s *)dev->d_private;
irqstate_t flags;
/* Disable interrupts because this function may be called from interrupt
* level processing.
*/
/* Disable interrupts because this function may be called from interrupt
* level processing.
*/
flags = irqsave();
flags = irqsave();
/* Ignore the notification if the interface is not yet up */
/* Ignore the notification if the interface is not yet up */
if (vnet->sk_bifup)
if (vnet->sk_bifup)
{
/* Check if there is room in the hardware to hold another outgoing packet. */
if (vnet_is_txbuff_full(vnet->vnet)) {
/* Check if there is room in the hardware to hold another outgoing packet. */
if (vnet_is_txbuff_full(vnet->vnet)) {
#ifdef CONFIG_DEBUG
cprintf("VNET: TX buffer is full\n");
cprintf("VNET: TX buffer is full\n");
#endif
goto out;
}
goto out;
}
/* If so, then poll uIP for new XMIT data */
/* If so, then poll uIP for new XMIT data */
(void)uip_poll(&vnet->sk_dev, vnet_uiptxpoll);
(void)uip_poll(&vnet->sk_dev, vnet_uiptxpoll);
}
out:
irqrestore(flags);
return OK;
out:
irqrestore(flags);
return OK;
}
/****************************************************************************
@@ -575,11 +574,11 @@ static int vnet_txavail(struct uip_driver_s *dev)
#ifdef CONFIG_NET_IGMP
static int vnet_addmac(struct uip_driver_s *dev, FAR const uint8_t *mac)
{
FAR struct vnet_driver_s *vnet = (FAR struct vnet_driver_s *)dev->d_private;
FAR struct vnet_driver_s *vnet = (FAR struct vnet_driver_s *)dev->d_private;
/* Add the MAC address to the hardware multicast routing table */
/* Add the MAC address to the hardware multicast routing table */
return OK;
return OK;
}
#endif
@@ -604,11 +603,11 @@ static int vnet_addmac(struct uip_driver_s *dev, FAR const uint8_t *mac)
#ifdef CONFIG_NET_IGMP
static int vnet_rmmac(struct uip_driver_s *dev, FAR const uint8_t *mac)
{
FAR struct vnet_driver_s *vnet = (FAR struct vnet_driver_s *)dev->d_private;
FAR struct vnet_driver_s *vnet = (FAR struct vnet_driver_s *)dev->d_private;
/* Add the MAC address to the hardware multicast routing table */
/* Add the MAC address to the hardware multicast routing table */
return OK;
return OK;
}
#endif
@@ -633,41 +632,41 @@ static int vnet_rmmac(struct uip_driver_s *dev, FAR const uint8_t *mac)
*
****************************************************************************/
void vnet_initialize(void)
int vnet_init(struct rgmp_vnet *vnet)
{
struct vnet_driver_s *priv;
struct rgmp_vnet *vnet = vnet_list.next;
int i;
struct vnet_driver_s *priv;
static int i = 0;
for (i=0; i<CONFIG_VNET_NINTERFACES; i++) {
if (vnet == NULL)
break;
priv = &g_vnet[i];
if (i >= CONFIG_VNET_NINTERFACES)
return -1;
/* Initialize the driver structure */
priv = &g_vnet[i++];
memset(priv, 0, sizeof(struct vnet_driver_s));
priv->sk_dev.d_ifup = vnet_ifup; /* I/F down callback */
priv->sk_dev.d_ifdown = vnet_ifdown; /* I/F up (new IP address) callback */
priv->sk_dev.d_txavail = vnet_txavail; /* New TX data callback */
/* Initialize the driver structure */
memset(priv, 0, sizeof(struct vnet_driver_s));
priv->sk_dev.d_ifup = vnet_ifup; /* I/F down callback */
priv->sk_dev.d_ifdown = vnet_ifdown; /* I/F up (new IP address) callback */
priv->sk_dev.d_txavail = vnet_txavail; /* New TX data callback */
#ifdef CONFIG_NET_IGMP
priv->sk_dev.d_addmac = vnet_addmac; /* Add multicast MAC address */
priv->sk_dev.d_rmmac = vnet_rmmac; /* Remove multicast MAC address */
priv->sk_dev.d_addmac = vnet_addmac; /* Add multicast MAC address */
priv->sk_dev.d_rmmac = vnet_rmmac; /* Remove multicast MAC address */
#endif
priv->sk_dev.d_private = (void*)g_vnet; /* Used to recover private state from dev */
priv->sk_dev.d_private = (void*)priv; /* Used to recover private state from dev */
/* Create a watchdog for timing polling for and timing of transmisstions */
/* Create a watchdog for timing polling for and timing of transmisstions */
priv->sk_txpoll = wd_create(); /* Create periodic poll timer */
//priv->sk_txtimeout = wd_create(); /* Create TX timeout timer */
priv->sk_txpoll = wd_create(); /* Create periodic poll timer */
//priv->sk_txtimeout = wd_create(); /* Create TX timeout timer */
priv->vnet = vnet;
priv->vnet = vnet;
vnet->priv = priv;
/* Register the device with the OS */
/* Register the device with the OS */
(void)netdev_register(&priv->sk_dev);
vnet = vnet->next;
}
(void)netdev_register(&priv->sk_dev);
return 0;
}
#endif /* CONFIG_NET && CONFIG_NET_VNET */
nuttx/drivers/usbdev/pl2303.c
+1 -1
View File
@@ -132,7 +132,7 @@
/* USB Controller */
#ifndef CONFIG_USBDEV_SELFPOWERED
# define SELFPOWERED USB_CONFIG_ATT_SELFPOWER
# define SELFPOWERED USB_CONFIG_ATTR_SELFPOWER
#else
# define SELFPOWERED (0)
#endif
nuttx/drivers/usbdev/usbmsc.h
+1 -1
View File
@@ -227,7 +227,7 @@
/* USB Controller */
#ifndef CONFIG_USBDEV_SELFPOWERED
# define SELFPOWERED USB_CONFIG_ATT_SELFPOWER
# define SELFPOWERED USB_CONFIG_ATTR_SELFPOWER
#else
# define SELFPOWERED (0)
#endif
nuttx/fs/Makefile
+7 -11
View File
@@ -120,25 +120,21 @@ $(COBJS): %$(OBJEXT): %.c
$(call COMPILE, $<, $@)
$(BIN): $(OBJS)
@( for obj in $(OBJS) ; do \
$(call ARCHIVE, $@, $${obj}); \
done ; )
$(call ARCHIVE, $@, $(OBJS))
.depend: Makefile $(SRCS)
@$(MKDEP) --dep-path . $(MMAPDEPPATH) $(FATDEPPATH) $(ROMFSDEPPATH) $(NXFFSDEPPATH) $(NFSDEPPATH) \
$(CC) -- $(CFLAGS) -- $(SRCS) >Make.dep
@touch $@
$(Q) $(MKDEP) --dep-path . $(MMAPDEPPATH) $(FATDEPPATH) $(ROMFSDEPPATH) $(NXFFSDEPPATH) $(NFSDEPPATH) \
"$(CC)" -- $(CFLAGS) -- $(SRCS) >Make.dep
$(Q) touch $@
depend: .depend
clean:
@rm -f $(BIN) *~ .*.swp
$(call DELFILE, $(BIN))
$(call CLEAN)
@( for dir in $(SUBDIRS); do \
rm -f $${dir}/*~ $${dir}/.*.swp; \
done ; )
distclean: clean
@rm -f Make.dep .depend
$(call DELFILE, Make.dep)
$(call DELFILE, .depend)
-include Make.dep
nuttx/fs/fs_stat.c
+4 -3
View File
@@ -1,7 +1,7 @@
/****************************************************************************
* fs/fs_stat.c
*
* Copyright (C) 2007-2009 , 2012Gregory Nutt. All rights reserved.
* Copyright (C) 2007-2009, 2012 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@@ -122,7 +122,8 @@ static inline int statroot(FAR struct stat *buf)
/****************************************************************************
* Name: stat
*
* Return: Zero on success; -1 on failure with errno set:
* Returned Value:
* Zero on success; -1 on failure with errno set:
*
* EACCES Search permission is denied for one of the directories in the
* path prefix of path.
@@ -134,7 +135,7 @@ static inline int statroot(FAR struct stat *buf)
*
****************************************************************************/
int stat(const char *path, FAR struct stat *buf)
int stat(FAR const char *path, FAR struct stat *buf)
{
FAR struct inode *inode;
const char *relpath = NULL;
nuttx/graphics/Makefile
+48 -50
View File
@@ -33,7 +33,6 @@
#
############################################################################
-include $(TOPDIR)/.config
-include $(TOPDIR)/Make.defs
DEPPATH = --dep-path .
@@ -44,34 +43,34 @@ endif
include nxglib/Make.defs
DEPPATH += --dep-path nxglib
CFLAGS += ${shell $(TOPDIR)/tools/incdir.sh $(INCDIROPT) "$(CC)" $(TOPDIR)/graphics/nxglib}
CFLAGS += ${shell $(INCDIR) $(INCDIROPT) "$(CC)" $(TOPDIR)/graphics/nxglib}
include nxbe/Make.defs
DEPPATH += --dep-path nxbe
CFLAGS += ${shell $(TOPDIR)/tools/incdir.sh $(INCDIROPT) "$(CC)" $(TOPDIR)/graphics/nxbe}
CFLAGS += ${shell $(INCDIR) $(INCDIROPT) "$(CC)" $(TOPDIR)/graphics/nxbe}
ifeq ($(CONFIG_NX_MULTIUSER),y)
include nxmu/Make.defs
DEPPATH += --dep-path nxmu
CFLAGS += ${shell $(TOPDIR)/tools/incdir.sh $(INCDIROPT) "$(CC)" $(TOPDIR)/graphics/nxmu}
CFLAGS += ${shell $(INCDIR) $(INCDIROPT) "$(CC)" $(TOPDIR)/graphics/nxmu}
else
include nxsu/Make.defs
DEPPATH += --dep-path nxsu
CFLAGS += ${shell $(TOPDIR)/tools/incdir.sh $(INCDIROPT) "$(CC)" $(TOPDIR)/graphics/nxsu}
CFLAGS += ${shell $(INCDIR) $(INCDIROPT) "$(CC)" $(TOPDIR)/graphics/nxsu}
endif
include nxtk/Make.defs
DEPPATH += --dep-path nxtk
CFLAGS += ${shell $(TOPDIR)/tools/incdir.sh $(INCDIROPT) "$(CC)" $(TOPDIR)/graphics/nxtk}
CFLAGS += ${shell $(INCDIR) $(INCDIROPT) "$(CC)" $(TOPDIR)/graphics/nxtk}
include nxfonts/Make.defs
DEPPATH += --dep-path nxfonts
CFLAGS += ${shell $(TOPDIR)/tools/incdir.sh $(INCDIROPT) "$(CC)" $(TOPDIR)/graphics/nxfonts}
CFLAGS += ${shell $(INCDIR) $(INCDIROPT) "$(CC)" $(TOPDIR)/graphics/nxfonts}
ifeq ($(CONFIG_NXCONSOLE),y)
include nxconsole/Make.defs
DEPPATH += --dep-path nxconsole
CFLAGS += ${shell $(TOPDIR)/tools/incdir.sh $(INCDIROPT) "$(CC)" $(TOPDIR)/graphics/nxconsole}
CFLAGS += ${shell $(INCDIR) $(INCDIROPT) "$(CC)" $(TOPDIR)/graphics/nxconsole}
endif
ASRCS = $(NXGLIB_ASRCS) $(NXBE_ASRCS) $(NX_ASRCS) $(NXTK_ASRCS) $(NXFONTS_ASRCS) $(NXCON_ASRCS)
@@ -97,84 +96,84 @@ all: mklibgraphics
gen32bppsources genfontsources
gen1bppsources:
@$(MAKE) -C nxglib -f Makefile.sources TOPDIR=$(TOPDIR) NXGLIB_BITSPERPIXEL=1 EXTRADEFINES=$(EXTRADEFINES)
@$(MAKE) -C nxfonts -f Makefile.sources TOPDIR=$(TOPDIR) NXFONTS_BITSPERPIXEL=1 EXTRADEFINES=$(EXTRADEFINES)
$(Q) $(MAKE) -C nxglib -f Makefile.sources TOPDIR=$(TOPDIR) NXGLIB_BITSPERPIXEL=1 EXTRADEFINES=$(EXTRADEFINES)
$(Q) $(MAKE) -C nxfonts -f Makefile.sources TOPDIR=$(TOPDIR) NXFONTS_BITSPERPIXEL=1 EXTRADEFINES=$(EXTRADEFINES)
gen2bppsource:
@$(MAKE) -C nxglib -f Makefile.sources TOPDIR=$(TOPDIR) NXGLIB_BITSPERPIXEL=2 EXTRADEFINES=$(EXTRADEFINES)
@$(MAKE) -C nxfonts -f Makefile.sources TOPDIR=$(TOPDIR) NXFONTS_BITSPERPIXEL=2 EXTRADEFINES=$(EXTRADEFINES)
$(Q) $(MAKE) -C nxglib -f Makefile.sources TOPDIR=$(TOPDIR) NXGLIB_BITSPERPIXEL=2 EXTRADEFINES=$(EXTRADEFINES)
$(Q) $(MAKE) -C nxfonts -f Makefile.sources TOPDIR=$(TOPDIR) NXFONTS_BITSPERPIXEL=2 EXTRADEFINES=$(EXTRADEFINES)
gen4bppsource:
@$(MAKE) -C nxglib -f Makefile.sources TOPDIR=$(TOPDIR) NXGLIB_BITSPERPIXEL=4 EXTRADEFINES=$(EXTRADEFINES)
@$(MAKE) -C nxfonts -f Makefile.sources TOPDIR=$(TOPDIR) NXFONTS_BITSPERPIXEL=4 EXTRADEFINES=$(EXTRADEFINES)
$(Q) $(MAKE) -C nxglib -f Makefile.sources TOPDIR=$(TOPDIR) NXGLIB_BITSPERPIXEL=4 EXTRADEFINES=$(EXTRADEFINES)
$(Q) $(MAKE) -C nxfonts -f Makefile.sources TOPDIR=$(TOPDIR) NXFONTS_BITSPERPIXEL=4 EXTRADEFINES=$(EXTRADEFINES)
gen8bppsource:
@$(MAKE) -C nxglib -f Makefile.sources TOPDIR=$(TOPDIR) NXGLIB_BITSPERPIXEL=8 EXTRADEFINES=$(EXTRADEFINES)
@$(MAKE) -C nxfonts -f Makefile.sources TOPDIR=$(TOPDIR) NXFONTS_BITSPERPIXEL=8 EXTRADEFINES=$(EXTRADEFINES)
$(Q) $(MAKE) -C nxglib -f Makefile.sources TOPDIR=$(TOPDIR) NXGLIB_BITSPERPIXEL=8 EXTRADEFINES=$(EXTRADEFINES)
$(Q) $(MAKE) -C nxfonts -f Makefile.sources TOPDIR=$(TOPDIR) NXFONTS_BITSPERPIXEL=8 EXTRADEFINES=$(EXTRADEFINES)
gen16bppsource:
@$(MAKE) -C nxglib -f Makefile.sources TOPDIR=$(TOPDIR) NXGLIB_BITSPERPIXEL=16 EXTRADEFINES=$(EXTRADEFINES)
@$(MAKE) -C nxfonts -f Makefile.sources TOPDIR=$(TOPDIR) NXFONTS_BITSPERPIXEL=16 EXTRADEFINES=$(EXTRADEFINES)
$(Q) $(MAKE) -C nxglib -f Makefile.sources TOPDIR=$(TOPDIR) NXGLIB_BITSPERPIXEL=16 EXTRADEFINES=$(EXTRADEFINES)
$(Q) $(MAKE) -C nxfonts -f Makefile.sources TOPDIR=$(TOPDIR) NXFONTS_BITSPERPIXEL=16 EXTRADEFINES=$(EXTRADEFINES)
gen24bppsource:
@$(MAKE) -C nxglib -f Makefile.sources TOPDIR=$(TOPDIR) NXGLIB_BITSPERPIXEL=24 EXTRADEFINES=$(EXTRADEFINES)
@$(MAKE) -C nxfonts -f Makefile.sources TOPDIR=$(TOPDIR) NXFONTS_BITSPERPIXEL=24 EXTRADEFINES=$(EXTRADEFINES)
$(Q) $(MAKE) -C nxglib -f Makefile.sources TOPDIR=$(TOPDIR) NXGLIB_BITSPERPIXEL=24 EXTRADEFINES=$(EXTRADEFINES)
$(Q) $(MAKE) -C nxfonts -f Makefile.sources TOPDIR=$(TOPDIR) NXFONTS_BITSPERPIXEL=24 EXTRADEFINES=$(EXTRADEFINES)
gen32bppsources:
@$(MAKE) -C nxglib -f Makefile.sources TOPDIR=$(TOPDIR) NXGLIB_BITSPERPIXEL=32 EXTRADEFINES=$(EXTRADEFINES)
@$(MAKE) -C nxfonts -f Makefile.sources TOPDIR=$(TOPDIR) NXFONTS_BITSPERPIXEL=32 EXTRADEFINES=$(EXTRADEFINES)
$(Q) $(MAKE) -C nxglib -f Makefile.sources TOPDIR=$(TOPDIR) NXGLIB_BITSPERPIXEL=32 EXTRADEFINES=$(EXTRADEFINES)
$(Q) $(MAKE) -C nxfonts -f Makefile.sources TOPDIR=$(TOPDIR) NXFONTS_BITSPERPIXEL=32 EXTRADEFINES=$(EXTRADEFINES)
genfontsources:
ifeq ($(CONFIG_NXFONT_SANS23X27),y)
@$(MAKE) -C nxfonts -f Makefile.sources TOPDIR=$(TOPDIR) NXFONTS_FONTID=1 EXTRADEFINES=$(EXTRADEFINES)
$(Q) $(MAKE) -C nxfonts -f Makefile.sources TOPDIR=$(TOPDIR) NXFONTS_FONTID=1 EXTRADEFINES=$(EXTRADEFINES)
endif
ifeq ($(CONFIG_NXFONT_SANS22X29),y)
@$(MAKE) -C nxfonts -f Makefile.sources TOPDIR=$(TOPDIR) NXFONTS_FONTID=2 EXTRADEFINES=$(EXTRADEFINES)
$(Q) $(MAKE) -C nxfonts -f Makefile.sources TOPDIR=$(TOPDIR) NXFONTS_FONTID=2 EXTRADEFINES=$(EXTRADEFINES)
endif
ifeq ($(CONFIG_NXFONT_SANS28X37),y)
@$(MAKE) -C nxfonts -f Makefile.sources TOPDIR=$(TOPDIR) NXFONTS_FONTID=3 EXTRADEFINES=$(EXTRADEFINES)
$(Q) $(MAKE) -C nxfonts -f Makefile.sources TOPDIR=$(TOPDIR) NXFONTS_FONTID=3 EXTRADEFINES=$(EXTRADEFINES)
endif
ifeq ($(CONFIG_NXFONT_SANS39X48),y)
@$(MAKE) -C nxfonts -f Makefile.sources TOPDIR=$(TOPDIR) NXFONTS_FONTID=4 EXTRADEFINES=$(EXTRADEFINES)
$(Q) $(MAKE) -C nxfonts -f Makefile.sources TOPDIR=$(TOPDIR) NXFONTS_FONTID=4 EXTRADEFINES=$(EXTRADEFINES)
endif
ifeq ($(CONFIG_NXFONT_SANS17X23B),y)
@$(MAKE) -C nxfonts -f Makefile.sources TOPDIR=$(TOPDIR) NXFONTS_FONTID=16 EXTRADEFINES=$(EXTRADEFINES)
$(Q) $(MAKE) -C nxfonts -f Makefile.sources TOPDIR=$(TOPDIR) NXFONTS_FONTID=16 EXTRADEFINES=$(EXTRADEFINES)
endif
ifeq ($(CONFIG_NXFONT_SANS20X27B),y)
@$(MAKE) -C nxfonts -f Makefile.sources TOPDIR=$(TOPDIR) NXFONTS_FONTID=17 EXTRADEFINES=$(EXTRADEFINES)
$(Q) $(MAKE) -C nxfonts -f Makefile.sources TOPDIR=$(TOPDIR) NXFONTS_FONTID=17 EXTRADEFINES=$(EXTRADEFINES)
endif
ifeq ($(CONFIG_NXFONT_SANS22X29B),y)
@$(MAKE) -C nxfonts -f Makefile.sources TOPDIR=$(TOPDIR) NXFONTS_FONTID=5 EXTRADEFINES=$(EXTRADEFINES)
$(Q) $(MAKE) -C nxfonts -f Makefile.sources TOPDIR=$(TOPDIR) NXFONTS_FONTID=5 EXTRADEFINES=$(EXTRADEFINES)
endif
ifeq ($(CONFIG_NXFONT_SANS28X37B),y)
@$(MAKE) -C nxfonts -f Makefile.sources TOPDIR=$(TOPDIR) NXFONTS_FONTID=6 EXTRADEFINES=$(EXTRADEFINES)
$(Q) $(MAKE) -C nxfonts -f Makefile.sources TOPDIR=$(TOPDIR) NXFONTS_FONTID=6 EXTRADEFINES=$(EXTRADEFINES)
endif
ifeq ($(CONFIG_NXFONT_SANS40X49B),y)
@$(MAKE) -C nxfonts -f Makefile.sources TOPDIR=$(TOPDIR) NXFONTS_FONTID=7 EXTRADEFINES=$(EXTRADEFINES)
$(Q) $(MAKE) -C nxfonts -f Makefile.sources TOPDIR=$(TOPDIR) NXFONTS_FONTID=7 EXTRADEFINES=$(EXTRADEFINES)
endif
ifeq ($(CONFIG_NXFONT_SERIF22X29),y)
@$(MAKE) -C nxfonts -f Makefile.sources TOPDIR=$(TOPDIR) NXFONTS_FONTID=8 EXTRADEFINES=$(EXTRADEFINES)
$(Q) $(MAKE) -C nxfonts -f Makefile.sources TOPDIR=$(TOPDIR) NXFONTS_FONTID=8 EXTRADEFINES=$(EXTRADEFINES)
endif
ifeq ($(CONFIG_NXFONT_SERIF29X37),y)
@$(MAKE) -C nxfonts -f Makefile.sources TOPDIR=$(TOPDIR) NXFONTS_FONTID=9 EXTRADEFINES=$(EXTRADEFINES)
$(Q) $(MAKE) -C nxfonts -f Makefile.sources TOPDIR=$(TOPDIR) NXFONTS_FONTID=9 EXTRADEFINES=$(EXTRADEFINES)
endif
ifeq ($(CONFIG_NXFONT_SERIF38X48),y)
@$(MAKE) -C nxfonts -f Makefile.sources TOPDIR=$(TOPDIR) NXFONTS_FONTID=10 EXTRADEFINES=$(EXTRADEFINES)
$(Q) $(MAKE) -C nxfonts -f Makefile.sources TOPDIR=$(TOPDIR) NXFONTS_FONTID=10 EXTRADEFINES=$(EXTRADEFINES)
endif
ifeq ($(CONFIG_NXFONT_SERIF22X28B),y)
@$(MAKE) -C nxfonts -f Makefile.sources TOPDIR=$(TOPDIR) NXFONTS_FONTID=11 EXTRADEFINES=$(EXTRADEFINES)
$(Q) $(MAKE) -C nxfonts -f Makefile.sources TOPDIR=$(TOPDIR) NXFONTS_FONTID=11 EXTRADEFINES=$(EXTRADEFINES)
endif
ifeq ($(CONFIG_NXFONT_SERIF27X38B),y)
@$(MAKE) -C nxfonts -f Makefile.sources TOPDIR=$(TOPDIR) NXFONTS_FONTID=12 EXTRADEFINES=$(EXTRADEFINES)
$(Q) $(MAKE) -C nxfonts -f Makefile.sources TOPDIR=$(TOPDIR) NXFONTS_FONTID=12 EXTRADEFINES=$(EXTRADEFINES)
endif
ifeq ($(CONFIG_NXFONT_SERIF38X49B),y)
@$(MAKE) -C nxfonts -f Makefile.sources TOPDIR=$(TOPDIR) NXFONTS_FONTID=13 EXTRADEFINES=$(EXTRADEFINES)
$(Q) $(MAKE) -C nxfonts -f Makefile.sources TOPDIR=$(TOPDIR) NXFONTS_FONTID=13 EXTRADEFINES=$(EXTRADEFINES)
endif
ifeq ($(CONFIG_NXFONT_SANS17X22),y)
@$(MAKE) -C nxfonts -f Makefile.sources TOPDIR=$(TOPDIR) NXFONTS_FONTID=14 EXTRADEFINES=$(EXTRADEFINES)
$(Q) $(MAKE) -C nxfonts -f Makefile.sources TOPDIR=$(TOPDIR) NXFONTS_FONTID=14 EXTRADEFINES=$(EXTRADEFINES)
endif
ifeq ($(CONFIG_NXFONT_SANS20X26),y)
@$(MAKE) -C nxfonts -f Makefile.sources TOPDIR=$(TOPDIR) NXFONTS_FONTID=15 EXTRADEFINES=$(EXTRADEFINES)
$(Q) $(MAKE) -C nxfonts -f Makefile.sources TOPDIR=$(TOPDIR) NXFONTS_FONTID=15 EXTRADEFINES=$(EXTRADEFINES)
endif
gensources: gen1bppsources gen2bppsource gen4bppsource gen8bppsource gen16bppsource gen24bppsource gen32bppsources genfontsources
@@ -186,30 +185,29 @@ $(COBJS): %$(OBJEXT): %.c
$(call COMPILE, $<, $@)
$(BIN): $(OBJS)
@( for obj in $(OBJS) ; do \
$(call ARCHIVE, $@, $${obj}); \
done ; )
$(call ARCHIVE, $@, $(OBJS))
mklibgraphics: gensources $(BIN)
.depend: gensources Makefile $(SRCS)
@$(MKDEP) $(DEPPATH) $(CC) -- $(CFLAGS) -- $(SRCS) >Make.dep
@touch $@
$(Q) $(MKDEP) $(DEPPATH) "$(CC)" -- $(CFLAGS) -- $(SRCS) >Make.dep
$(Q) touch $@
depend: .depend
context: gensources
clean:
@$(MAKE) -C nxglib -f Makefile.sources clean TOPDIR=$(TOPDIR) EXTRADEFINES=$(EXTRADEFINES)
@$(MAKE) -C nxfonts -f Makefile.sources clean TOPDIR=$(TOPDIR) EXTRADEFINES=$(EXTRADEFINES)
@rm -f $(BIN) *~ .*.swp
$(Q) $(MAKE) -C nxglib -f Makefile.sources clean TOPDIR=$(TOPDIR) EXTRADEFINES=$(EXTRADEFINES)
$(Q) $(MAKE) -C nxfonts -f Makefile.sources clean TOPDIR=$(TOPDIR) EXTRADEFINES=$(EXTRADEFINES)
$(call DELFILE, $(BIN))
$(call CLEAN)
distclean: clean
@$(MAKE) -C nxglib -f Makefile.sources distclean TOPDIR=$(TOPDIR) EXTRADEFINES=$(EXTRADEFINES)
@$(MAKE) -C nxfonts -f Makefile.sources distclean TOPDIR=$(TOPDIR) EXTRADEFINES=$(EXTRADEFINES)
@rm -f Make.dep .depend
$(Q) $(MAKE) -C nxglib -f Makefile.sources distclean TOPDIR=$(TOPDIR) EXTRADEFINES=$(EXTRADEFINES)
$(Q) $(MAKE) -C nxfonts -f Makefile.sources distclean TOPDIR=$(TOPDIR) EXTRADEFINES=$(EXTRADEFINES)
$(call DELFILE, Make.dep)
$(call DELFILE, .depend)
-include Make.dep
nuttx/graphics/nxfonts/Makefile.sources
+7 -7
View File
@@ -33,7 +33,6 @@
#
############################################################################
-include $(TOPDIR)/.config
-include $(TOPDIR)/Make.defs
ifdef NXFONTS_BITSPERPIXEL
@@ -177,13 +176,14 @@ all: $(GEN_CSRC)
.PHONY : clean distclean
$(GEN_CSRC) : $(DEPENDENCY)
@$(call PREPROCESS, $<, $(GEN_TMP))
@cat $(GEN_TMP) | sed -e "/^#/d" >$@
@rm -f $(GEN_TMP)
$(call PREPROCESS, $<, $(GEN_TMP))
$(Q) cat $(GEN_TMP) | sed -e "/^#/d" >$@
$(Q) rm -f $(GEN_TMP)
clean:
@rm -f *~ .*.swp *.i
$(call DELFILE, *.i)
$(call CLEAN)
distclean: clean
@rm -f nxfonts_convert_*bpp.c
@rm -f nxfonts_bitmaps_*.c
$(call DELFILE, nxfonts_convert_*bpp.c)
$(call DELFILE, nxfonts_bitmaps_*.c)
nuttx/graphics/nxglib/Makefile.sources
+26 -26
View File
@@ -33,7 +33,6 @@
#
############################################################################
-include $(TOPDIR)/.config
-include $(TOPDIR)/Make.defs
ifeq ($(NXGLIB_BITSPERPIXEL),1)
@@ -123,53 +122,54 @@ all: $(GEN_CSRCS)
$(SETP_CSRC) : $(BLITDIR)/nxglib_setpixel.c nxglib_bitblit.h
ifneq ($(NXGLIB_BITSPERPIXEL),)
@$(call PREPROCESS, $(BLITDIR)/nxglib_setpixel.c, $(SETP_TMP))
@cat $(SETP_TMP) | sed -e "/^#/d" >$@
@rm -f $(SETP_TMP)
$(call PREPROCESS, $(BLITDIR)/nxglib_setpixel.c, $(SETP_TMP))
$(Q) cat $(SETP_TMP) | sed -e "/^#/d" >$@
$(Q) rm -f $(SETP_TMP)
endif
$(RFILL_CSRC) : $(BLITDIR)/nxglib_fillrectangle.c nxglib_bitblit.h
ifneq ($(NXGLIB_BITSPERPIXEL),)
@$(call PREPROCESS, $(BLITDIR)/nxglib_fillrectangle.c, $(RFILL_TMP))
@cat $(RFILL_TMP) | sed -e "/^#/d" >$@
@rm -f $(RFILL_TMP)
$(call PREPROCESS, $(BLITDIR)/nxglib_fillrectangle.c, $(RFILL_TMP))
$(Q) cat $(RFILL_TMP) | sed -e "/^#/d" >$@
$(Q) rm -f $(RFILL_TMP)
endif
$(RGET_CSRC) : $(BLITDIR)/nxglib_getrectangle.c nxglib_bitblit.h
ifneq ($(NXGLIB_BITSPERPIXEL),)
@$(call PREPROCESS, $(BLITDIR)/nxglib_getrectangle.c, $(RGET_TMP))
@cat $(RGET_TMP) | sed -e "/^#/d" >$@
@rm -f $(RGET_TMP)
$(call PREPROCESS, $(BLITDIR)/nxglib_getrectangle.c, $(RGET_TMP))
$(Q) cat $(RGET_TMP) | sed -e "/^#/d" >$@
$(Q) rm -f $(RGET_TMP)
endif
$(TFILL_CSRC) : $(BLITDIR)/nxglib_filltrapezoid.c nxglib_bitblit.h
ifneq ($(NXGLIB_BITSPERPIXEL),)
@$(call PREPROCESS, $(BLITDIR)/nxglib_filltrapezoid.c, $(TFILL_TMP))
@cat $(TFILL_TMP) | sed -e "/^#/d" >$@
@rm -f $(TFILL_TMP)
$(call PREPROCESS, $(BLITDIR)/nxglib_filltrapezoid.c, $(TFILL_TMP))
$(Q) cat $(TFILL_TMP) | sed -e "/^#/d" >$@
$(Q) rm -f $(TFILL_TMP)
endif
$(RMOVE_CSRC) : $(BLITDIR)/nxglib_moverectangle.c nxglib_bitblit.h
ifneq ($(NXGLIB_BITSPERPIXEL),)
@$(call PREPROCESS, $(BLITDIR)/nxglib_moverectangle.c, $(RMOVE_TMP))
@cat $(RMOVE_TMP) | sed -e "/^#/d" >$@
@rm -f $(RMOVE_TMP)
$(call PREPROCESS, $(BLITDIR)/nxglib_moverectangle.c, $(RMOVE_TMP))
$(Q) cat $(RMOVE_TMP) | sed -e "/^#/d" >$@
$(Q) rm -f $(RMOVE_TMP)
endif
$(RCOPY_CSRC) : $(BLITDIR)/nxglib_copyrectangle.c nxglib_bitblit.h
ifneq ($(NXGLIB_BITSPERPIXEL),)
@$(call PREPROCESS, $(BLITDIR)/nxglib_copyrectangle.c, $(RCOPY_TMP))
@cat $(RCOPY_TMP) | sed -e "/^#/d" >$@
@rm -f $(RCOPY_TMP)
$(call PREPROCESS, $(BLITDIR)/nxglib_copyrectangle.c, $(RCOPY_TMP))
$(Q) cat $(RCOPY_TMP) | sed -e "/^#/d" >$@
$(Q) rm -f $(RCOPY_TMP)
endif
clean:
@rm -f *~ .*.swp *.i
$(call DELFILE, *.i)
$(call CLEAN)
distclean: clean
@rm -f nxglib_setpixel_*bpp.c
@rm -f nxglib_fillrectangle_*bpp.c
@rm -f nxglib_getrectangle_*bpp.c
@rm -f nxglib_filltrapezoid_*bpp.c
@rm -f nxglib_moverectangle_*bpp.c
@rm -f nxglib_copyrectangle_*bpp.c
$(call DELFILE, nxglib_setpixel_*bpp.c)
$(call DELFILE, nxglib_fillrectangle_*bpp.c)
$(call DELFILE, nxglib_getrectangle_*bpp.c)
$(call DELFILE, nxglib_filltrapezoid_*bpp.c)
$(call DELFILE, nxglib_moverectangle_*bpp.c)
$(call DELFILE, nxglib_copyrectangle_*bpp.c)
nuttx/graphics/nxmu/nx_bitmap.c
+28 -1
View File
@@ -100,6 +100,8 @@ int nx_bitmap(NXWINDOW hwnd, FAR const struct nxgl_rect_s *dest,
FAR struct nxbe_window_s *wnd = (FAR struct nxbe_window_s *)hwnd;
struct nxsvrmsg_bitmap_s outmsg;
int i;
int ret;
sem_t sem_done;
#ifdef CONFIG_DEBUG
if (!wnd || !dest || !src || !origin)
@@ -124,7 +126,32 @@ int nx_bitmap(NXWINDOW hwnd, FAR const struct nxgl_rect_s *dest,
outmsg.origin.y = origin->y;
nxgl_rectcopy(&outmsg.dest, dest);
/* Create a semaphore for tracking command completion */
outmsg.sem_done = &sem_done;
ret = sem_init(&sem_done, 0, 0);
if (ret != OK)
{
gdbg("sem_init failed: %d\n", errno);
return ret;
}
/* Forward the fill command to the server */
return nxmu_sendwindow(wnd, &outmsg, sizeof(struct nxsvrmsg_bitmap_s));
ret = nxmu_sendwindow(wnd, &outmsg, sizeof(struct nxsvrmsg_bitmap_s));
/* Wait that the command is completed, so that caller can release the buffer. */
if (ret == OK)
{
ret = sem_wait(&sem_done);
}
/* Destroy the semaphore and return. */
sem_destroy(&sem_done);
return ret;
}
nuttx/graphics/nxmu/nx_block.c
+1 -1
View File
@@ -140,7 +140,7 @@ int nx_block(NXWINDOW hwnd, FAR void *arg)
* that it will not be blocked.
*/
ret = nxmu_sendserver(wnd->conn, &outmsg, sizeof(struct nxbe_window_s));
ret = nxmu_sendserver(wnd->conn, &outmsg, sizeof(struct nxsvrmsg_blocked_s));
}
return ret;
nuttx/graphics/nxmu/nx_getrectangle.c
+28 -2
View File
@@ -98,7 +98,9 @@ int nx_getrectangle(NXWINDOW hwnd, FAR const struct nxgl_rect_s *rect,
{
FAR struct nxbe_window_s *wnd = (FAR struct nxbe_window_s *)hwnd;
struct nxsvrmsg_getrectangle_s outmsg;
int ret;
sem_t sem_done;
#ifdef CONFIG_DEBUG
if (!hwnd || !rect || !dest)
{
@@ -118,7 +120,31 @@ int nx_getrectangle(NXWINDOW hwnd, FAR const struct nxgl_rect_s *rect,
nxgl_rectcopy(&outmsg.rect, rect);
/* Create a semaphore for tracking command completion */
outmsg.sem_done = &sem_done;
ret = sem_init(&sem_done, 0, 0);
if (ret != OK)
{
gdbg("sem_init failed: %d\n", errno);
return ret;
}
/* Forward the fill command to the server */
return nxmu_sendwindow(wnd, &outmsg, sizeof(struct nxsvrmsg_getrectangle_s));
ret = nxmu_sendwindow(wnd, &outmsg, sizeof(struct nxsvrmsg_getrectangle_s));
/* Wait that the command is completed, so that caller can release the buffer. */
if (ret == OK)
{
ret = sem_wait(&sem_done);
}
/* Destroy the semaphore and return. */
sem_destroy(&sem_done);
return ret;
}
nuttx/graphics/nxmu/nxfe.h
+21
View File
@@ -392,6 +392,7 @@ struct nxsvrmsg_getrectangle_s
unsigned int plane; /* The plane number to read */
FAR uint8_t *dest; /* Memory location in which to store the graphics data */
unsigned int deststride; /* Width of the destination memory in bytes */
sem_t *sem_done; /* Semaphore to report when command is done. */
};
/* Fill a trapezoidal region in the window with a color */
@@ -425,6 +426,7 @@ struct nxsvrmsg_bitmap_s
FAR const void *src[CONFIG_NX_NPLANES]; /* The start of the source image. */
struct nxgl_point_s origin; /* Offset into the source image data */
unsigned int stride; /* The width of the full source image in pixels. */
sem_t *sem_done; /* Semaphore to report when command is done. */
};
/* Set the color of the background */
@@ -586,6 +588,25 @@ EXTERN int nxmu_sendwindow(FAR struct nxbe_window_s *wnd, FAR const void *msg,
EXTERN int nxmu_sendclient(FAR struct nxfe_conn_s *conn,
FAR const void *msg, size_t msglen);
/****************************************************************************
* Name: nxmu_sendclientwindow
*
* Description:
* Send a message to the client at NX_CLIMSG_PRIO priority
*
* Input Parameters:
* wnd - A pointer to the back-end window structure
* msg - A pointer to the message to send
* msglen - The length of the message in bytes.
*
* Return:
* OK on success; ERROR on failure with errno set appropriately
*
****************************************************************************/
int nxmu_sendclientwindow(FAR struct nxbe_window_s *wnd, FAR const void *msg,
size_t msglen);
/****************************************************************************
* Name: nxmu_openwindow
*
nuttx/graphics/nxmu/nxmu_kbdin.c
+1 -1
View File
@@ -108,7 +108,7 @@ void nxmu_kbdin(FAR struct nxfe_state_s *fe, uint8_t nch, FAR uint8_t *ch)
outmsg->ch[i] = ch[i];
}
(void)nxmu_sendclient(fe->be.topwnd->conn, outmsg, size);
(void)nxmu_sendclientwindow(fe->be.topwnd, outmsg, size);
free(outmsg);
}
}
nuttx/graphics/nxmu/nxmu_mouse.c
+33 -13
View File
@@ -61,9 +61,10 @@
* Private Data
****************************************************************************/
static struct nxgl_point_s g_mpos;
static struct nxgl_point_s g_mrange;
static uint8_t g_mbutton;
static struct nxgl_point_s g_mpos;
static struct nxgl_point_s g_mrange;
static uint8_t g_mbutton;
static struct nxbe_window_s *g_mwnd;
/****************************************************************************
* Public Data
@@ -129,7 +130,7 @@ int nxmu_mousereport(struct nxbe_window_s *wnd)
outmsg.buttons = g_mbutton;
nxgl_vectsubtract(&outmsg.pos, &g_mpos, &wnd->bounds.pt1);
return nxmu_sendclient(wnd->conn, &outmsg, sizeof(struct nxclimsg_mousein_s));
return nxmu_sendclientwindow(wnd, &outmsg, sizeof(struct nxclimsg_mousein_s));
}
}
@@ -154,6 +155,7 @@ int nxmu_mousein(FAR struct nxfe_state_s *fe,
struct nxbe_window_s *wnd;
nxgl_coord_t x = pos->x;
nxgl_coord_t y = pos->y;
uint8_t oldbuttons;
int ret;
/* Clip x and y to within the bounding rectangle */
@@ -182,20 +184,36 @@ int nxmu_mousein(FAR struct nxfe_state_s *fe,
{
/* Update the mouse value */
g_mpos.x = x;
g_mpos.y = y;
g_mbutton = buttons;
oldbuttons = g_mbutton;
g_mpos.x = x;
g_mpos.y = y;
g_mbutton = buttons;
/* Pick the window to receive the mouse event. Start with
* the top window and go down. Stop with the first window
* that gets the mouse report
/* If a button is already down, regard this as part of a mouse drag
* event. Pass all the following events to the window where the drag
* started in.
*/
if (oldbuttons && g_mwnd && g_mwnd->cb->mousein)
{
struct nxclimsg_mousein_s outmsg;
outmsg.msgid = NX_CLIMSG_MOUSEIN;
outmsg.wnd = g_mwnd;
outmsg.buttons = g_mbutton;
nxgl_vectsubtract(&outmsg.pos, &g_mpos, &g_mwnd->bounds.pt1);
return nxmu_sendclientwindow(g_mwnd, &outmsg, sizeof(struct nxclimsg_mousein_s));
}
/* Pick the window to receive the mouse event. Start with the top
* window and go down. Stop with the first window that gets the mouse
* report
*/
for (wnd = fe->be.topwnd; wnd; wnd = wnd->below)
{
/* The background window normally has no callback structure
* (unless a client has taken control of the background via
* nx_requestbkgd()).
/* The background window normally has no callback structure (unless
* a client has taken control of the background via nx_requestbkgd()).
*/
if (wnd->cb)
@@ -207,6 +225,8 @@ int nxmu_mousein(FAR struct nxfe_state_s *fe,
}
}
}
g_mwnd = wnd;
}
return OK;
nuttx/graphics/nxmu/nxmu_redrawreq.c
+1 -1
View File
@@ -87,7 +87,7 @@ void nxfe_redrawreq(FAR struct nxbe_window_s *wnd, FAR const struct nxgl_rect_s
outmsg.more = false;
nxgl_rectoffset(&outmsg.rect, rect, -wnd->bounds.pt1.x, -wnd->bounds.pt1.y);
(void)nxmu_sendclient(wnd->conn, &outmsg, sizeof(struct nxclimsg_redraw_s));
(void)nxmu_sendclientwindow(wnd, &outmsg, sizeof(struct nxclimsg_redraw_s));
}
nuttx/graphics/nxmu/nxmu_reportposition.c
+1 -1
View File
@@ -100,7 +100,7 @@ void nxfe_reportposition(FAR struct nxbe_window_s *wnd)
/* And provide this to the client */
ret = nxmu_sendclient(wnd->conn, &outmsg, sizeof(struct nxclimsg_newposition_s));
ret = nxmu_sendclientwindow(wnd, &outmsg, sizeof(struct nxclimsg_newposition_s));
if (ret < 0)
{
gdbg("nxmu_sendclient failed: %d\n", errno);
nuttx/graphics/nxmu/nxmu_sendwindow.c
+44
View File
@@ -112,3 +112,47 @@ int nxmu_sendwindow(FAR struct nxbe_window_s *wnd, FAR const void *msg,
return ret;
}
/****************************************************************************
* Name: nxmu_sendclientwindow
*
* Description:
* Send a message to the client at NX_CLIMSG_PRIO priority
*
* Input Parameters:
* wnd - A pointer to the back-end window structure
* msg - A pointer to the message to send
* msglen - The length of the message in bytes.
*
* Return:
* OK on success; ERROR on failure with errno set appropriately
*
****************************************************************************/
int nxmu_sendclientwindow(FAR struct nxbe_window_s *wnd, FAR const void *msg,
size_t msglen)
{
int ret = OK;
/* Sanity checking */
#ifdef CONFIG_DEBUG
if (!wnd || !wnd->conn)
{
errno = EINVAL;
return ERROR;
}
#endif
/* Ignore messages destined to a blocked window (no errors reported) */
if (!NXBE_ISBLOCKED(wnd))
{
/* Send the message to the server */
ret = nxmu_sendclient(wnd->conn, msg, msglen);
}
return ret;
}
nuttx/graphics/nxmu/nxmu_server.c
+10
View File
@@ -451,6 +451,11 @@ int nx_runinstance(FAR const char *mqname, FAR NX_DRIVERTYPE *dev)
{
FAR struct nxsvrmsg_getrectangle_s *getmsg = (FAR struct nxsvrmsg_getrectangle_s *)buffer;
nxbe_getrectangle(getmsg->wnd, &getmsg->rect, getmsg->plane, getmsg->dest, getmsg->deststride);
if (getmsg->sem_done)
{
sem_post(getmsg->sem_done);
}
}
break;
@@ -471,6 +476,11 @@ int nx_runinstance(FAR const char *mqname, FAR NX_DRIVERTYPE *dev)
{
FAR struct nxsvrmsg_bitmap_s *bmpmsg = (FAR struct nxsvrmsg_bitmap_s *)buffer;
nxbe_bitmap(bmpmsg->wnd, &bmpmsg->dest, bmpmsg->src, &bmpmsg->origin, bmpmsg->stride);
if (bmpmsg->sem_done)
{
sem_post(bmpmsg->sem_done);
}
}
break;
nuttx/graphics/nxsu/nx_mousein.c
+24 -6
View File
@@ -62,9 +62,10 @@
* Private Data
****************************************************************************/
static struct nxgl_point_s g_mpos;
static struct nxgl_point_s g_mrange;
static uint8_t g_mbutton;
static struct nxgl_point_s g_mpos;
static struct nxgl_point_s g_mrange;
static uint8_t g_mbutton;
static struct nxbe_window_s *g_mwnd;
/****************************************************************************
* Public Data
@@ -148,6 +149,7 @@ int nx_mousein(NXHANDLE handle, nxgl_coord_t x, nxgl_coord_t y, uint8_t buttons)
{
FAR struct nxfe_state_s *fe = (FAR struct nxfe_state_s *)handle;
struct nxbe_window_s *wnd;
uint8_t oldbuttons;
int ret;
/* Clip x and y to within the bounding rectangle */
@@ -176,13 +178,27 @@ int nx_mousein(NXHANDLE handle, nxgl_coord_t x, nxgl_coord_t y, uint8_t buttons)
{
/* Update the mouse value */
oldbuttons = g_mbutton;
g_mpos.x = x;
g_mpos.y = y;
g_mbutton = buttons;
/* Pick the window to receive the mouse event. Start with
* the top window and go down. Step with the first window
* that gets the mouse report
/* If a button is already down, regard this as part of a mouse drag
* event. Pass all the following events to the window where the drag
* started in.
*/
if (oldbuttons && g_mwnd && g_mwnd->cb->mousein)
{
struct nxgl_point_s relpos;
nxgl_vectsubtract(&relpos, &g_mpos, &g_mwnd->bounds.pt1);
g_mwnd->cb->mousein((NXWINDOW)g_mwnd, &relpos, g_mbutton, g_mwnd->arg);
return OK;
}
/* Pick the window to receive the mouse event. Start with the top
* window and go down. Step with the first window that gets the mouse
* report
*/
for (wnd = fe->be.topwnd; wnd; wnd = wnd->below)
@@ -193,6 +209,8 @@ int nx_mousein(NXHANDLE handle, nxgl_coord_t x, nxgl_coord_t y, uint8_t buttons)
break;
}
}
g_mwnd = wnd;
}
return OK;
}
nuttx/graphics/nxtk/nxtk_events.c
+37 -2
View File
@@ -76,6 +76,9 @@ static void nxtk_mousein(NXWINDOW hwnd, FAR const struct nxgl_point_s *pos,
static void nxtk_kbdin(NXWINDOW hwnd, uint8_t nch, const uint8_t *ch,
FAR void *arg);
#endif
#ifdef CONFIG_NX_MULTIUSER
static void nxtk_blocked(NXWINDOW hwnd, FAR void *arg1, FAR void *arg2);
#endif
/****************************************************************************
* Private Data
@@ -95,6 +98,9 @@ const struct nx_callback_s g_nxtkcb =
#ifdef CONFIG_NX_KBD
, nxtk_kbdin /* kbdin */
#endif
#ifdef CONFIG_NX_MULTIUSER
, nxtk_blocked
#endif
};
/****************************************************************************
@@ -255,9 +261,20 @@ static void nxtk_mousein(NXWINDOW hwnd, FAR const struct nxgl_point_s *pos,
nxgl_vectoradd(&abspos, pos, &fwnd->wnd.bounds.pt1);
/* In order to deliver mouse release events to the same window where the
* mouse down event happened, we store the initial mouse down location.
*/
if (fwnd->mbutton == 0 && buttons != 0)
{
fwnd->mpos = abspos;
}
fwnd->mbutton = buttons;
/* Is the mouse position inside of the client window region? */
if (fwnd->fwcb->mousein && nxgl_rectinside(&fwnd->fwrect, &abspos))
if (fwnd->fwcb->mousein && nxgl_rectinside(&fwnd->fwrect, &fwnd->mpos))
{
nxgl_vectsubtract(&relpos, &abspos, &fwnd->fwrect.pt1);
fwnd->fwcb->mousein((NXTKWINDOW)fwnd, &relpos, buttons, fwnd->fwarg);
@@ -265,7 +282,7 @@ static void nxtk_mousein(NXWINDOW hwnd, FAR const struct nxgl_point_s *pos,
/* If the mouse position inside the toobar region? */
else if (fwnd->tbcb->mousein && nxgl_rectinside(&fwnd->tbrect, &abspos))
else if (fwnd->tbcb->mousein && nxgl_rectinside(&fwnd->tbrect, &fwnd->mpos))
{
nxgl_vectsubtract(&relpos, &abspos, &fwnd->tbrect.pt1);
fwnd->tbcb->mousein((NXTKWINDOW)fwnd, &relpos, buttons, fwnd->tbarg);
@@ -292,6 +309,24 @@ static void nxtk_kbdin(NXWINDOW hwnd, uint8_t nch, const uint8_t *ch,
}
#endif
/****************************************************************************
* Name: nxtk_blocked
****************************************************************************/
#ifdef CONFIG_NX_MULTIUSER
static void nxtk_blocked(NXWINDOW hwnd, FAR void *arg1, FAR void *arg2)
{
FAR struct nxtk_framedwindow_s *fwnd = (FAR struct nxtk_framedwindow_s *)hwnd;
/* Only the client window gets keyboard input */
if (fwnd->fwcb->blocked)
{
fwnd->fwcb->blocked((NXTKWINDOW)fwnd, fwnd->fwarg, arg2);
}
}
#endif
/****************************************************************************
* Public Functions
****************************************************************************/
nuttx/graphics/nxtk/nxtk_internal.h
+5
View File
@@ -72,6 +72,11 @@ struct nxtk_framedwindow_s
struct nxgl_rect_s fwrect;
FAR const struct nx_callback_s *fwcb;
FAR void *fwarg;
/* Initial mouse down location */
uint8_t mbutton;
struct nxgl_point_s mpos;
};
/****************************************************************************
nuttx/include/cxx/cstdbool
+9
View File
@@ -46,4 +46,13 @@
// Namespace
//***************************************************************************
//***************************************************************************
// Namespace
//***************************************************************************
namespace std
{
using ::_Bool8;
}
#endif // __INCLUDE_CXX_CSTDBOOL
nuttx/include/cxx/cstdio
+11 -1
View File
@@ -52,6 +52,8 @@ namespace std
using ::FILE;
using ::fpos_t;
using ::size_t;
using ::clearerr;
using ::fclose;
using ::fflush;
using ::feof;
@@ -69,16 +71,24 @@ namespace std
using ::ftell;
using ::fwrite;
using ::gets;
using ::ungetc;
using ::printf;
using ::puts;
using ::rename;
using ::sprintf;
using ::asprintf;
using ::snprintf;
using ::ungetc;
using ::sscanf;
using ::perror;
using ::vprintf;
using ::vfprintf;
using ::vsprintf;
using ::avsprintf;
using ::vsnprintf;
using ::vsscanf;
using ::fdopen;
using ::statfs;
}
nuttx/include/elf32.h
+352
View File
@@ -0,0 +1,352 @@
/****************************************************************************
* include/elf32.h
*
* Copyright (C) 2012 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Reference: System V Application Binary Interface, Edition 4.1, March 18,
* 1997, The Santa Cruz Operation, Inc.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
#ifndef __INCLUDE_ELF32_H
#define __INCLUDE_ELF32_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Values for Elf32_Ehdr::e_type */
#define ET_NONE 0 /* No file type */
#define ET_REL 1 /* Relocatable file */
#define ET_EXEC 2 /* Executable file */
#define ET_DYN 3 /* Shared object file */
#define ET_CORE 4 /* Core file */
#define ET_LOPROC 0xff00 /* Processor-specific */
#define ET_HIPROC 0xffff /* Processor-specific */
/* Values for Elf32_Ehdr::e_machine (most of this were not included in the
* original SCO document but have been gleaned from elsewhere).
*/
#define EM_NONE 0 /* No machine */
#define EM_M32 1 /* AT&T WE 32100 */
#define EM_SPARC 2 /* SPARC */
#define EM_386 3 /* Intel 80386 */
#define EM_68K 4 /* Motorola 68000 */
#define EM_88K 5 /* Motorola 88000 */
#define EM_486 6 /* Intel 486+ */
#define EM_860 7 /* Intel 80860 */
#define EM_MIPS 8 /* MIPS R3000 Big-Endian */
#define EM_MIPS_RS4_BE 10 /* MIPS R4000 Big-Endian */
#define EM_PARISC 15 /* HPPA */
#define EM_SPARC32PLUS 18 /* Sun's "v8plus" */
#define EM_PPC 20 /* PowerPC */
#define EM_PPC64 21 /* PowerPC64 */
#define EM_ARM 40 /* ARM */
#define EM_SH 42 /* SuperH */
#define EM_SPARCV9 43 /* SPARC v9 64-bit */
#define EM_IA_64 50 /* HP/Intel IA-64 */
#define EM_X86_64 62 /* AMD x86-64 */
#define EM_S390 22 /* IBM S/390 */
#define EM_CRIS 76 /* Axis Communications 32-bit embedded processor */
#define EM_V850 87 /* NEC v850 */
#define EM_M32R 88 /* Renesas M32R */
#define EM_H8_300 46
#define EM_ALPHA 0x9026
#define EM_CYGNUS_V850 0x9080
#define EM_CYGNUS_M32R 0x9041
#define EM_S390_OLD 0xa390
#define EM_FRV 0x5441
/* Values for Elf32_Ehdr::e_version */
#define EV_NONE 0 /* Invalid version */
#define EV_CURRENT 1 /* The current version */
/* Ehe ELF identifier */
#define EI_MAG0 0 /* File identification */
#define EI_MAG1 1 /* " " " " */
#define EI_MAG2 2 /* " " " " */
#define EI_MAG3 3 /* " " " " */
#define EI_CLASS 4 /* File class */
#define EI_DATA 5 /* Data encoding */
#define EI_VERSION 6 /* File version */
#define EI_PAD 7 /* Start of padding bytes */
#define EI_NIDENT 16 /* Size of eident[] */
#define EI_MAGIC_SIZE 4
#define EI_MAGIC {0x7f, 'E', 'L', 'F'}
/* Values for EI_CLASS */
#define ELFCLASSNONE 0 /* Invalid class */
#define ELFCLASS32 1 /* 32-bit objects */
#define ELFCLASS64 2 /* 64-bit objects */
/* Values for EI_DATA */
#define ELFDATANONE 0 /* Invalid data encoding */
#define ELFDATA2LSB 1 /* Least significant byte occupying the lowest address */
#define ELFDATA2MSB 2 /* Most significant byte occupying the lowest address */
/* Figure 4-7: Special Section Indexes */
#define SHN_UNDEF 0
#define SHN_LORESERVE 0xff00
#define SHN_LOPROC 0xff00
#define SHN_HIPROC 0xff1f
#define SHN_ABS 0xfff1
#define SHN_COMMON 0xfff2
#define SHN_HIRESERVE 0xffff
/* Figure 4-9: Section Types, sh_type */
#define SHT_NULL 0
#define SHT_PROGBITS 1
#define SHT_SYMTAB 2
#define SHT_STRTAB 3
#define SHT_RELA 4
#define SHT_HASH 5
#define SHT_DYNAMIC 6
#define SHT_NOTE 7
#define SHT_NOBITS 8
#define SHT_REL 9
#define SHT_SHLIB 10
#define SHT_DYNSYM 11
#define SHT_LOPROC 0x70000000
#define SHT_HIPROC 0x7fffffff
#define SHT_LOUSER 0x80000000
#define SHT_HIUSER 0xffffffff
/* Figure 4-11: Section Attribute Flags, sh_flags */
#define SHF_WRITE 1
#define SHF_ALLOC 2
#define SHF_EXECINSTR 4
#define SHF_MASKPROC 0xf0000000
/* Definitions for Elf32_Sym::st_info */
#define ELF32_ST_BIND(i) ((i) >> 4)
#define ELF32_ST_TYPE(i) ((i) & 0xf)
#define ELF32_ST_INFO(b,t) (((b) << 4) | ((t) & 0xf))
/* Figure 4-16: Symbol Binding, ELF32_ST_BIND */
#define STB_LOCAL 0
#define STB_GLOBAL 1
#define STB_WEAK 2
#define STB_LOPROC 13
#define STB_HIPROC 15
/* Figure 4-17: Symbol Types, ELF32_ST_TYPE */
#define STT_NOTYPE 0
#define STT_OBJECT 1
#define STT_FUNC 2
#define STT_SECTION 3
#define STT_FILE 4
#define STT_LOPROC 13
#define STT_HIPROC 15
/* Definitions for Elf32_Rel*::r_info */
#define ELF32_R_SYM(i) ((i) >> 8)
#define ELF32_R_TYPE(i) ((i) & 0xff)
#define ELF32_R_INFO(s,t) (((s)<< 8) | ((t) & 0xff))
/* Figure 5-2: Segment Types, p_type */
#define PT_NULL 0
#define PT_LOAD 1
#define PT_DYNAMIC 2
#define PT_INTERP 3
#define PT_NOTE 4
#define PT_SHLIB 5
#define PT_PHDR 6
#define PT_LOPROC 0x70000000
#define PT_HIPROC 0x7fffffff
/* Figure 5-3: Segment Flag Bits, p_flags */
#define PF_X 1 /* Execute */
#define PF_W 2 /* Write */
#define PF_R 4 /* Read */
#define PF_MASKPROC 0xf0000000 /* Unspecified */
/* Figure 5-10: Dynamic Array Tags, d_tag */
#define DT_NULL 0 /* d_un=ignored */
#define DT_NEEDED 1 /* d_un=d_val */
#define DT_PLTRELSZ 2 /* d_un=d_val */
#define DT_PLTGOT 3 /* d_un=d_ptr */
#define DT_HASH 4 /* d_un=d_ptr */
#define DT_STRTAB 5 /* d_un=d_ptr */
#define DT_SYMTAB 6 /* d_un=d_ptr */
#define DT_RELA 7 /* d_un=d_ptr */
#define DT_RELASZ 8 /* d_un=d_val */
#define DT_RELAENT 9 /* d_un=d_val */
#define DT_STRSZ 10 /* d_un=d_val */
#define DT_SYMENT 11 /* d_un=d_val */
#define DT_INIT 12 /* d_un=d_ptr */
#define DT_FINI 13 /* d_un=d_ptr */
#define DT_SONAME 14 /* d_un=d_val */
#define DT_RPATH 15 /* d_un=d_val */
#define DT_SYMBOLIC 16 /* d_un=ignored */
#define DT_REL 17 /* d_un=d_ptr */
#define DT_RELSZ 18 /* d_un=d_val */
#define DT_RELENT 19 /* d_un=d_val */
#define DT_PLTREL 20 /* d_un=d_val */
#define DT_DEBUG 21 /* d_un=d_ptr */
#define DT_TEXTREL 22 /* d_un=ignored */
#define DT_JMPREL 23 /* d_un=d_ptr */
#define DT_BINDNOW 24 /* d_un=ignored */
#define DT_LOPROC 0x70000000 /* d_un=unspecified */
#define DT_HIPROC 0x7fffffff /* d_un= unspecified */
/****************************************************************************
* Public Type Definitions
****************************************************************************/
/* Figure 4.2: 32-Bit Data Types */
typedef uint32_t Elf32_Addr; /* Unsigned program address */
typedef uint16_t Elf32_Half; /* Unsigned medium integer */
typedef uint32_t Elf32_Off; /* Unsigned file offset */
typedef int32_t Elf32_Sword; /* Signed large integer */
typedef uint32_t Elf32_Word; /* Unsigned large integer */
/* Figure 4-3: ELF Header */
typedef struct
{
unsigned char e_ident[EI_NIDENT];
Elf32_Half e_type;
Elf32_Half e_machine;
Elf32_Word e_version;
Elf32_Addr e_entry;
Elf32_Off e_phoff;
Elf32_Off e_shoff;
Elf32_Word e_flags;
Elf32_Half e_ehsize;
Elf32_Half e_phentsize;
Elf32_Half e_phnum;
Elf32_Half e_shentsize;
Elf32_Half e_shnum;
Elf32_Half e_shstrndx;
} Elf32_Ehdr;
/* Figure 4-8: Section Header */
typedef struct
{
Elf32_Word sh_name;
Elf32_Word sh_type;
Elf32_Word sh_flags;
Elf32_Addr sh_addr;
Elf32_Off sh_offset;
Elf32_Word sh_size;
Elf32_Word sh_link;
Elf32_Word sh_info;
Elf32_Word sh_addralign;
Elf32_Word sh_entsize;
} Elf32_Shdr;
/* Figure 4-15: Symbol Table Entry */
typedef struct
{
Elf32_Word st_name;
Elf32_Addr st_value;
Elf32_Word st_size;
unsigned char st_info;
unsigned char st_other;
Elf32_Half st_shndx;
} Elf32_Sym;
/* Figure 4-19: Relocation Entries */
typedef struct
{
Elf32_Addr r_offset;
Elf32_Word r_info;
} Elf32_Rel;
typedef struct
{
Elf32_Addr r_offset;
Elf32_Word r_info;
Elf32_Sword r_addend;
} Elf32_Rela;
/* Figure 5-1: Program Header */
typedef struct
{
Elf32_Word p_type;
Elf32_Off p_offset;
Elf32_Addr p_vaddr;
Elf32_Addr p_paddr;
Elf32_Word p_filesz;
Elf32_Word p_memsz;
Elf32_Word p_flags;
Elf32_Word p_align;
} Elf32_Phdr;
/* Figure 5-9: Dynamic Structure */
typedef struct
{
Elf32_Sword d_tag;
union
{
Elf32_Word d_val;
Elf32_Addr d_ptr;
} d_un;
} Elf32_Dyn;
//extern Elf32_Dyn _DYNAMIC[] ;
#endif /* __INCLUDE_ELF32_H */
nuttx/include/net/if.h
+9
View File
@@ -52,6 +52,10 @@
#define IF_NAMESIZE 6 /* Newer naming standard */
#define IFHWADDRLEN 6
#define IFF_RUNNING (1 << 0)
#define IF_FLAG_IFUP (1 << 0)
#define IF_FLAG_IFDOWN (2 << 0)
/*******************************************************************************************
* Public Type Definitions
*******************************************************************************************/
@@ -72,6 +76,7 @@ struct lifreq
struct sockaddr lifru_hwaddr; /* MAC address */
int lifru_count; /* Number of devices */
int lifru_mtu; /* MTU size */
uint8_t lifru_flags; /* Interface flags */
} lifr_ifru;
};
@@ -82,6 +87,7 @@ struct lifreq
#define lifr_hwaddr lifr_ifru.lifru_hwaddr /* MAC address */
#define lifr_mtu lifr_ifru.lifru_mtu /* MTU */
#define lifr_count lifr_ifru.lifru_count /* Number of devices */
#define lifr_flags lifr_ifru.lifru_flags /* interface flags */
/* This is the older I/F request that should only be used with IPv4. However, since
* NuttX only supports IPv4 or 6 (not both), we can force the older structure to
@@ -101,6 +107,7 @@ struct ifreq
struct sockaddr ifru_hwaddr; /* MAC address */
int ifru_count; /* Number of devices */
int ifru_mtu; /* MTU size */
uint8_t ifru_flags; /* Interface flags */
} ifr_ifru;
};
@@ -111,6 +118,7 @@ struct ifreq
#define ifr_hwaddr ifr_ifru.ifru_hwaddr /* MAC address */
#define ifr_mtu ifr_ifru.ifru_mtu /* MTU */
#define ifr_count ifr_ifru.ifru_count /* Number of devices */
#define ifr_flags ifr_ifru.ifru_flags /* interface flags */
#else /* CONFIG_NET_IPv6 */
@@ -123,6 +131,7 @@ struct ifreq
#define ifr_hwaddr lifr_ifru.lifru_hwaddr /* MAC address */
#define ifr_mtu lifr_ifru.lifru_mtu /* MTU */
#define ifr_count lifr_ifru.lifru_count /* Number of devices */
#define ifr_flags lifr_ifru.lifru_flags /* interface flags */
#endif /* CONFIG_NET_IPv6 */
nuttx/include/nuttx/binfmt.h
-209
View File
@@ -1,209 +0,0 @@
/****************************************************************************
* include/nuttx/binfmt.h
*
* Copyright (C) 2009 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
#ifndef __INCLUDE_NUTTX_BINFMT_H
#define __INCLUDE_NUTTX_BINFMT_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <sys/types.h>
#include <nxflat.h>
#include <nuttx/sched.h>
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Public Types
****************************************************************************/
/* This describes the file to be loaded */
struct symtab_s;
struct binary_s
{
/* Information provided to the loader to load and bind a module */
FAR const char *filename; /* Full path to the binary to be loaded */
FAR const char **argv; /* Argument list */
FAR const struct symtab_s *exports; /* Table of exported symbols */
int nexports; /* The number of symbols in exports[] */
/* Information provided from the loader (if successful) describing the
* resources used by the loaded module.
*/
main_t entrypt; /* Entry point into a program module */
FAR void *ispace; /* Memory-mapped, I-space (.text) address */
FAR struct dspace_s *dspace; /* Address of the allocated .data/.bss space */
size_t isize; /* Size of the I-space region (needed for munmap) */
size_t stacksize; /* Size of the stack in bytes (unallocated) */
};
/* This describes one binary format handler */
struct binfmt_s
{
FAR struct binfmt_s *next; /* Supports a singly-linked list */
int (*load)(FAR struct binary_s *bin); /* Verify and load binary into memory */
};
/****************************************************************************
* Public Data
****************************************************************************/
#undef EXTERN
#if defined(__cplusplus)
#define EXTERN extern "C"
extern "C" {
#else
#define EXTERN extern
#endif
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
/****************************************************************************
* Name: register_binfmt
*
* Description:
* Register a loader for a binary format
*
* Returned Value:
* This is a NuttX internal function so it follows the convention that
* 0 (OK) is returned on success and a negated errno is returned on
* failure.
*
****************************************************************************/
EXTERN int register_binfmt(FAR struct binfmt_s *binfmt);
/****************************************************************************
* Name: unregister_binfmt
*
* Description:
* Register a loader for a binary format
*
* Returned Value:
* This is a NuttX internal function so it follows the convention that
* 0 (OK) is returned on success and a negated errno is returned on
* failure.
*
****************************************************************************/
EXTERN int unregister_binfmt(FAR struct binfmt_s *binfmt);
/****************************************************************************
* Name: load_module
*
* Description:
* Load a module into memory, bind it to an exported symbol take, and
* prep the module for execution.
*
* Returned Value:
* This is an end-user function, so it follows the normal convention:
* Returns 0 (OK) on success. On failure, it returns -1 (ERROR) with
* errno set appropriately.
*
****************************************************************************/
EXTERN int load_module(FAR struct binary_s *bin);
/****************************************************************************
* Name: unload_module
*
* Description:
* Unload a (non-executing) module from memory. If the module has
* been started (via exec_module), calling this will be fatal.
*
* Returned Value:
* This is a NuttX internal function so it follows the convention that
* 0 (OK) is returned on success and a negated errno is returned on
* failure.
*
****************************************************************************/
EXTERN int unload_module(FAR const struct binary_s *bin);
/****************************************************************************
* Name: exec_module
*
* Description:
* Execute a module that has been loaded into memory by load_module().
*
* Returned Value:
* This is an end-user function, so it follows the normal convention:
* Returns the PID of the exec'ed module. On failure, it.returns
* -1 (ERROR) and sets errno appropriately.
*
****************************************************************************/
EXTERN int exec_module(FAR const struct binary_s *bin, int priority);
/****************************************************************************
* Name: exec
*
* Description:
* This is a convenience function that wraps load_ and exec_module into
* one call.
*
* Input Parameter:
* filename - Fulll path to the binary to be loaded
* argv - Argument list
* exports - Table of exported symbols
* nexports - The number of symbols in exports
*
* Returned Value:
* This is an end-user function, so it follows the normal convention:
* Returns the PID of the exec'ed module. On failure, it.returns
* -1 (ERROR) and sets errno appropriately.
*
****************************************************************************/
EXTERN int exec(FAR const char *filename, FAR const char **argv,
FAR const struct symtab_s *exports, int nexports);
#undef EXTERN
#if defined(__cplusplus)
}
#endif
#endif /* __INCLUDE_NUTTX_BINFMT_H */
nuttx/include/nuttx/symtab.h → nuttx/include/nuttx/binfmt/symtab.h
+5 -5
View File
@@ -1,5 +1,5 @@
/****************************************************************************
* include/nuttx/symtab.h
* include/nuttx/binfmt/symtab.h
*
* Copyright (C) 2009 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@@ -33,8 +33,8 @@
*
****************************************************************************/
#ifndef __INCLUDE_NUTTX_SYMTAB_H
#define __INCLUDE_NUTTX_SYMTAB_H
#ifndef __INCLUDE_NUTTX_BINFMT_SYMTAB_H
#define __INCLUDE_NUTTX_BINFMT_SYMTAB_H
/****************************************************************************
* Included Files
@@ -54,7 +54,7 @@
* is a fixed size array of struct symtab_s. The information is intentionally
* minimal and supports only:
*
* 1. Function points as sym_values. Of other kinds of values need to be
* 1. Function pointers as sym_values. Of other kinds of values need to be
* supported, then typing information would also need to be included in
* the structure.
*
@@ -159,5 +159,5 @@ symtab_findorderedbyvalue(FAR const struct symtab_s *symtab,
}
#endif
#endif /* __INCLUDE_NUTTX_SYMTAB_H */
#endif /* __INCLUDE_NUTTX_BINFMT_SYMTAB_H */
nuttx/include/nuttx/compiler.h
+18 -5
View File
@@ -87,11 +87,16 @@
# define packed_struct __attribute__ ((packed))
/* GCC does not support the reentrant or naked attributes */
/* GCC does not support the reentrant attribute */
# define reentrant_function
# define naked_function
/* The naked attribute informs GCC that the programmer will take care of
* the function prolog and epilog.
*/
# define naked_function __attribute__ ((naked,no_instrument_function))
/* The inline_function attribute informs GCC that the function should always
* be inlined, regardless of the level of optimization. The noinline_function
* indicates that the function should never be inlined.
@@ -191,8 +196,10 @@
/* GCC supports both types double and long long */
# define CONFIG_HAVE_DOUBLE 1
# define CONFIG_HAVE_LONG_LONG 1
# define CONFIG_HAVE_FLOAT 1
# define CONFIG_HAVE_DOUBLE 1
# define CONFIG_HAVE_LONG_DOUBLE 1
/* Structures and unions can be assigned and passed as values */
@@ -295,7 +302,9 @@
/* SDCC does not support type long long or type double */
# undef CONFIG_HAVE_LONG_LONG
# define CONFIG_HAVE_FLOAT 1
# undef CONFIG_HAVE_DOUBLE
# undef CONFIG_HAVE_LONG_DOUBLE
/* Structures and unions cannot be passed as values or used
* in assignments.
@@ -398,8 +407,10 @@
* simply do not support long long or double.
*/
# undef CONFIG_HAVE_DOUBLE
# undef CONFIG_HAVE_LONG_LONG
# define CONFIG_HAVE_FLOAT 1
# undef CONFIG_HAVE_DOUBLE
# undef CONFIG_HAVE_LONG_DOUBLE
/* Structures and unions can be assigned and passed as values */
@@ -433,9 +444,11 @@
# undef CONFIG_LONG_IS_NOT_INT
# undef CONFIG_PTR_IS_NOT_INT
# undef CONFIG_HAVE_INLINE
# define inline
# define inline 1
# undef CONFIG_HAVE_LONG_LONG
# define CONFIG_HAVE_FLOAT 1
# undef CONFIG_HAVE_DOUBLE
# undef CONFIG_HAVE_LONG_DOUBLE
# undef CONFIG_CAN_PASS_STRUCTS
#endif
nuttx/include/nuttx/float.h
+225
View File
@@ -0,0 +1,225 @@
/****************************************************************************
* include/nuttx/float.h
*
* Copyright (C) 2012 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Reference: http://pubs.opengroup.org/onlinepubs/009695399/basedefs/float.h.html
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
#ifndef __INCLUDE_NUTTX_FLOAT_H
#define __INCLUDE_NUTTX_FLOAT_H
/* TODO: These values could vary with architectures toolchains. This
* logic should be move at least to the include/arch directory.
*/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <nuttx/compiler.h>
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Radix of exponent representation, b. */
#define FLT_RADIX 2
/* Number of base-FLT_RADIX digits in the floating-point significand, p. */
#define FLT_MANT_DIG 24
#if CONFIG_HAVE_DOUBLE
# define DBL_MANT_DIG 53
#else
# define DBL_MANT_DIG FLT_MANT_DIG
#endif
#ifdef CONFIG_HAVE_LONG_DOUBLE
# define LDBL_MANT_DIG DBL_MANT_DIG /* FIX ME */
#else
# define LDBL_MANT_DIG DBL_MANT_DIG
#endif
/* Number of decimal digits, n, such that any floating-point number in the
* widest supported floating type with pmax radix b digits can be rounded
* to a floating-point number with n decimal digits and back again without
* change to the value.
*/
#define DECIMAL_DIG 10
/* Number of decimal digits, q, such that any floating-point number with q
* decimal digits can be rounded into a floating-point number with p radix
* b digits and back again without change to the q decimal digits.
*/
#define FLT_DIG 6
#if CONFIG_HAVE_DOUBLE
# define DBL_DIG 15 /* 10 */
#else
# define DBL_DIG FLT_DIG
#endif
#ifdef CONFIG_HAVE_LONG_DOUBLE
# define LDBL_DIG DBL_DIG /* FIX ME */
#else
# define LDBL_DIG DBL_DIG
#endif
/* Minimum negative integer such that FLT_RADIX raised to that power minus
* 1 is a normalized floating-point number, emin.
*/
#define FLT_MIN_EXP (-125)
#if CONFIG_HAVE_DOUBLE
# define DBL_MIN_EXP (-1021)
#else
# define DBL_MIN_EXP FLT_MIN_EXP
#endif
#ifdef CONFIG_HAVE_LONG_DOUBLE
# define LDBL_MIN_EXP DBL_MIN_EXP /* FIX ME */
#else
# define LDBL_MIN_EXP DBL_MIN_EXP
#endif
/* inimum negative integer such that 10 raised to that power is in the range
* of normalized floating-point numbers.
*/
#define FLT_MIN_10_EXP (-37)
#if CONFIG_HAVE_DOUBLE
# define DBL_MIN_10_EXP (-307) /* -37 */
#else
# define DBL_MIN_10_EXP FLT_MIN_10_EXP
#endif
#ifdef CONFIG_HAVE_LONG_DOUBLE
# define LDBL_MIN_10_EXP DBL_MIN_10_EXP /* FIX ME */
#else
# define LDBL_MIN_10_EXP DBL_MIN_10_EXP
#endif
/* Maximum integer such that FLT_RADIX raised to that power minus 1 is a
* representable finite floating-point number, emax.
*/
#define FLT_MAX_EXP 128
#if CONFIG_HAVE_DOUBLE
# define DBL_MAX_EXP 1024
#else
# define DBL_MAX_EXP FLT_MAX_EXP
#endif
#ifdef CONFIG_HAVE_LONG_DOUBLE
# define LDBL_MAX_EXP DBL_MAX_EXP /* FIX ME */
#else
# define LDBL_MAX_EXP DBL_MAX_EXP
#endif
/* Maximum integer such that 10 raised to that power is in the range of
* representable finite floating-point numbers.
*/
#define FLT_MAX_10_EXP 38 /* 37 */
#if CONFIG_HAVE_DOUBLE
# define DBL_MAX_10_EXP 308 /* 37 */
#else
# define DBL_MAX_10_EXP FLT_MAX_10_EXP
#endif
#ifdef CONFIG_HAVE_LONG_DOUBLE
# define LDBL_MAX_10_EXP DBL_MAX_10_EXP /* FIX ME */
#else
# define LDBL_MAX_10_EXP DBL_MAX_10_EXP
#endif
/* Maximum representable finite floating-point number. */
#define FLT_MAX 3.40282347e+38F /* 1E+37 */
#if CONFIG_HAVE_DOUBLE
# define DBL_MAX 1.7976931348623157e+308 /* 1E+37 */
#else
# define DBL_MAX FLT_MAX
#endif
#ifdef CONFIG_HAVE_LONG_DOUBLE
# define LDBL_MAX DBL_MAX /* FIX ME */
#else
# define LDBL_MAX DBL_MAX
#endif
/* The difference between 1 and the least value greater than 1 that is
* representable in the given floating-point type, b1-p.
*/
#define FLT_EPSILON 1.1920929e-07F /* 1E-5 */
#if CONFIG_HAVE_DOUBLE
# define DBL_EPSILON 2.2204460492503131e-16 /* 1E-9 */
#else
# define DBL_EPSILON FLT_EPSILON
#endif
#ifdef CONFIG_HAVE_LONG_DOUBLE
# define LDBL_EPSILON DBL_EPSILON /* FIX ME */
#else
# define LDBL_EPSILON DBL_EPSILON
#endif
/* Minimum normalized positive floating-point number, bemin -1. */
#define FLT_MIN 1.17549435e-38F /* 1E-37 */
#if CONFIG_HAVE_DOUBLE
#define DBL_MIN 2.2250738585072014e-308 /* 1E-37 */
#else
# define DBL_MIN FLT_MIN
#endif
#ifdef CONFIG_HAVE_LONG_DOUBLE
# define LDBL_MIN DBL_MIN /* FIX ME */
#else
# define LDBL_MIN DBL_MIN
#endif
#endif /* __INCLUDE_NUTTX_FLOAT_H */
nuttx/include/nuttx/fs/fs.h
+10 -5
View File
@@ -51,6 +51,10 @@
/****************************************************************************
* Definitions
****************************************************************************/
/* Stream flags for the fs_flags field of in struct file_struct */
#define __FS_FLAG_EOF (1 << 0) /* EOF detected by a read operation */
#define __FS_FLAG_ERROR (1 << 1) /* Error detected by any operation */
/****************************************************************************
* Type Definitions
@@ -270,11 +274,6 @@ struct filelist
struct file_struct
{
int fs_filedes; /* File descriptor associated with stream */
uint16_t fs_oflags; /* Open mode flags */
#if CONFIG_NUNGET_CHARS > 0
uint8_t fs_nungotten; /* The number of characters buffered for ungetc */
unsigned char fs_ungotten[CONFIG_NUNGET_CHARS];
#endif
#if CONFIG_STDIO_BUFFER_SIZE > 0
sem_t fs_sem; /* For thread safety */
pid_t fs_holder; /* Holder of sem */
@@ -283,6 +282,12 @@ struct file_struct
FAR unsigned char *fs_bufend; /* Pointer to 1 past end of buffer */
FAR unsigned char *fs_bufpos; /* Current position in buffer */
FAR unsigned char *fs_bufread; /* Pointer to 1 past last buffered read char. */
#endif
uint16_t fs_oflags; /* Open mode flags */
uint8_t fs_flags; /* Stream flags */
#if CONFIG_NUNGET_CHARS > 0
uint8_t fs_nungotten; /* The number of characters buffered for ungetc */
unsigned char fs_ungotten[CONFIG_NUNGET_CHARS];
#endif
};
nuttx/include/nuttx/i2c.h
+18 -13
View File
@@ -1,7 +1,7 @@
/****************************************************************************
* include/nuttx/i2c.h
*
* Copyright(C) 2009-2011 Gregory Nutt. All rights reserved.
* Copyright(C) 2009-2012 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@@ -47,6 +47,16 @@
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* If a dynamic timeout is selected, then a non-negative, non-zero micro-
* seconds per byte vale must be provided as well.
*/
#ifdef CONFIG_STM32_I2C_DYNTIMEO
# if CONFIG_STM32_I2C_DYNTIMEO_USECPERBYTE < 1
# warning "Ignoring CONFIG_STM32_I2C_DYNTIMEO because of CONFIG_STM32_I2C_DYNTIMEO_USECPERBYTE"
# undef CONFIG_STM32_I2C_DYNTIMEO
# endif
#endif
/* I2C address calculation. Convert 7- and 10-bit address to 8-bit and
* 16-bit read/write address
@@ -323,24 +333,19 @@ EXTERN FAR struct i2c_dev_s *up_i2cinitialize(int port);
*
****************************************************************************/
EXTERN int up_i2cuninitialize(FAR struct i2c_dev_s * dev);
EXTERN int up_i2cuninitialize(FAR struct i2c_dev_s *dev);
/****************************************************************************
/************************************************************************************
* Name: up_i2creset
*
* Description:
* Reset the port and the associated I2C bus. Useful when the bus or an
* attached slave has become wedged or unresponsive.
* Reset an I2C bus
*
* Input Parameter:
* Device structure as returned by the up_i2cinitalize()
*
* Returned Value:
* OK on success, ERROR if the bus cannot be unwedged.
*
****************************************************************************/
************************************************************************************/
EXTERN int up_i2creset(FAR struct i2c_dev_s * dev);
#ifdef CONFIG_I2C_RESET
EXTERN int up_i2creset(FAR struct i2c_dev_s *dev);
#endif
#undef EXTERN
#if defined(__cplusplus)
nuttx/include/nuttx/input/max11802.h
+175
View File
@@ -0,0 +1,175 @@
/****************************************************************************
* include/nuttx/input/max11802.h
*
* Copyright (C) 2011 Gregory Nutt. All rights reserved.
* Authors: Gregory Nutt <gnutt@nuttx.org>
* Petteri Aimonen <jpa@nx.mail.kapsi.fi>
*
* References:
* "Low-Power, Ultra-Small Resistive Touch-Screen Controllers
* with I2C/SPI Interface" Maxim IC, Rev 3, 10/2010
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
#ifndef __INCLUDE_NUTTX_INPUT_MAX11802_H
#define __INCLUDE_NUTTX_INPUT_MAX11802_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <nuttx/spi.h>
#include <stdbool.h>
#include <nuttx/irq.h>
#if defined(CONFIG_INPUT) && defined(CONFIG_INPUT_MAX11802)
/****************************************************************************
* Pre-Processor Definitions
****************************************************************************/
/* Configuration ************************************************************/
/* SPI Frequency. Default: 100KHz */
#ifndef CONFIG_MAX11802_FREQUENCY
# define CONFIG_MAX11802_FREQUENCY 100000
#endif
/* Maximum number of threads than can be waiting for POLL events */
#ifndef CONFIG_MAX11802_NPOLLWAITERS
# define CONFIG_MAX11802_NPOLLWAITERS 2
#endif
#ifndef CONFIG_MAX11802_SPIMODE
# define CONFIG_MAX11802_SPIMODE SPIDEV_MODE0
#endif
/* Thresholds */
#ifndef CONFIG_MAX11802_THRESHX
# define CONFIG_MAX11802_THRESHX 12
#endif
#ifndef CONFIG_MAX11802_THRESHY
# define CONFIG_MAX11802_THRESHY 12
#endif
/* Check for some required settings. This can save the user a lot of time
* in getting the right configuration.
*/
#ifdef CONFIG_DISABLE_SIGNALS
# error "Signals are required. CONFIG_DISABLE_SIGNALS must not be selected."
#endif
#ifndef CONFIG_SCHED_WORKQUEUE
# error "Work queue support required. CONFIG_SCHED_WORKQUEUE must be selected."
#endif
/****************************************************************************
* Public Types
****************************************************************************/
/* A reference to a structure of this type must be passed to the MAX11802
* driver. This structure provides information about the configuration
* of the MAX11802 and provides some board-specific hooks.
*
* Memory for this structure is provided by the caller. It is not copied
* by the driver and is presumed to persist while the driver is active. The
* memory must be writable because, under certain circumstances, the driver
* may modify frequency or X plate resistance values.
*/
struct max11802_config_s
{
/* Device characterization */
uint32_t frequency; /* SPI frequency */
/* IRQ/GPIO access callbacks. These operations all hidden behind
* callbacks to isolate the MAX11802 driver from differences in GPIO
* interrupt handling by varying boards and MCUs. If possible,
* interrupts should be configured on both rising and falling edges
* so that contact and loss-of-contact events can be detected.
*
* attach - Attach the MAX11802 interrupt handler to the GPIO interrupt
* enable - Enable or disable the GPIO interrupt
* clear - Acknowledge/clear any pending GPIO interrupt
* pendown - Return the state of the pen down GPIO input
*/
int (*attach)(FAR struct max11802_config_s *state, xcpt_t isr);
void (*enable)(FAR struct max11802_config_s *state, bool enable);
void (*clear)(FAR struct max11802_config_s *state);
bool (*pendown)(FAR struct max11802_config_s *state);
};
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
#ifdef __cplusplus
#define EXTERN extern "C"
extern "C" {
#else
#define EXTERN extern
#endif
/****************************************************************************
* Name: max11802_register
*
* Description:
* Configure the MAX11802 to use the provided SPI device instance. This
* will register the driver as /dev/inputN where N is the minor device
* number
*
* Input Parameters:
* spi - An SPI driver instance
* config - Persistent board configuration data
* minor - The input device minor number
*
* Returned Value:
* Zero is returned on success. Otherwise, a negated errno value is
* returned to indicate the nature of the failure.
*
****************************************************************************/
EXTERN int max11802_register(FAR struct spi_dev_s *spi,
FAR struct max11802_config_s *config,
int minor);
#undef EXTERN
#ifdef __cplusplus
}
#endif
#endif /* CONFIG_INPUT && CONFIG_INPUT_MAX11802 */
#endif /* __INCLUDE_NUTTX_INPUT_MAX11802_H */
nuttx/include/nuttx/lcd/ug-2864ambag01.h
+245
View File
@@ -0,0 +1,245 @@
/**************************************************************************************
* include/nuttx/lcd/ug-2864ambag01.h
* Driver for Univision UG-2864AMBAG01 OLED display (wih SH1101A controller) in SPI
* mode
*
* Copyright (C) 2012 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* References:
* 1. Product Specification (Preliminary), Part Name: OEL Display Module, Part ID:
* UG-2864AMBAG01, Doc No: SASI-9015-A, Univision Technology Inc.
* 2. SH1101A, 132 X 64 Dot Matrix OLED/PLED, Preliminary Segment/Common Driver with
* Controller, Sino Wealth
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
**************************************************************************************/
#ifndef __INCLUDE_NUTTX_UG_8264AMBAG01_H
#define __INCLUDE_NUTTX_UG_8264AMBAG01_H
/**************************************************************************************
* Included Files
**************************************************************************************/
#include <nuttx/config.h>
#include <stdbool.h>
#include <nuttx/arch.h>
#ifdef CONFIG_LCD_UG2864AMBAG01
/**************************************************************************************
* Pre-processor Definitions
**************************************************************************************/
/* Configuration **********************************************************************/
/* UG-2864AMBAG01 Configuration Settings:
*
* CONFIG_UG2864AMBAG01_SPIMODE - Controls the SPI mode
* CONFIG_UG2864AMBAG01_FREQUENCY - Define to use a different bus frequency
* CONFIG_UG2864AMBAG01_NINTERFACES - Specifies the number of physical UG-2864AMBAG01
* devices that will be supported.
*
* Required LCD driver settings:
*
* CONFIG_LCD_UG28AMBAG01 - Enable UG-2864AMBAG01 support
* CONFIG_LCD_MAXCONTRAST should be 255, but any value >0 and <=255 will be accepted.
* CONFIG_LCD_MAXPOWER must be 1
*
* Option LCD driver settings:
* CONFIG_LCD_LANDSCAPE, CONFIG_LCD_PORTRAIT, CONFIG_LCD_RLANDSCAPE, and
* CONFIG_LCD_RPORTRAIT - Display orientation.
*
* Required SPI driver settings:
* CONFIG_SPI_CMDDATA - Include support for cmd/data selection.
*/
/* SPI Interface
*
* "The serial interface consists of serial clock SCL, serial data SI, A0 and
* CS . SI is shifted into an 8-bit shift register on every rising edge of
* SCL in the order of D7, D6, … and D0. A0 is sampled on every eighth clock
* and the data byte in the shift register is written to the display data RAM
* or command register in the same clock."
*
* MODE 3:
* Clock polarity: High (CPOL=1)
* Clock phase: Sample on trailing (rising edge) (CPHA 1)
*/
#ifndef CONFIG_UG2864AMBAG01_SPIMODE
# define CONFIG_UG2864AMBAG01_SPIMODE SPIDEV_MODE3
#endif
/* "This module determines whether the input data is interpreted as data or
* command. When A0 = “H”, the inputs at D7 - D0 are interpreted as data and be
* written to display RAM. When A0 = “L”, the inputs at D7 - D0 are interpreted
* as command, they will be decoded and be written to the corresponding command
* registers.
*/
#ifndef CONFIG_SPI_CMDDATA
# error "CONFIG_SPI_CMDDATA must be defined in your NuttX configuration"
#endif
/* CONFIG_UG2864AMBAG01_NINTERFACES determines the number of physical interfaces
* that will be supported.
*/
#ifndef CONFIG_UG2864AMBAG01_NINTERFACES
# define CONFIG_UG2864AMBAG01_NINTERFACES 1
#endif
/* Check contrast selection */
#if !defined(CONFIG_LCD_MAXCONTRAST)
# define CONFIG_LCD_MAXCONTRAST 255
#endif
#if CONFIG_LCD_MAXCONTRAST <= 0|| CONFIG_LCD_MAXCONTRAST > 255
# error "CONFIG_LCD_MAXCONTRAST exceeds supported maximum"
#endif
#if CONFIG_LCD_MAXCONTRAST < 255
# warning "Optimal setting of CONFIG_LCD_MAXCONTRAST is 255"
#endif
/* Check power setting */
#if !defined(CONFIG_LCD_MAXPOWER)
# define CONFIG_LCD_MAXPOWER 1
#endif
#if CONFIG_LCD_MAXPOWER != 1
# warning "CONFIG_LCD_MAXPOWER exceeds supported maximum"
# undef CONFIG_LCD_MAXPOWER
# define CONFIG_LCD_MAXPOWER 1
#endif
/* Color is 1bpp monochrome with leftmost column contained in bits 0 */
#ifdef CONFIG_NX_DISABLE_1BPP
# warning "1 bit-per-pixel support needed"
#endif
/* Orientation */
#if defined(CONFIG_LCD_LANDSCAPE)
# undef CONFIG_LCD_PORTRAIT
# undef CONFIG_LCD_RLANDSCAPE
# undef CONFIG_LCD_RPORTRAIT
#elif defined(CONFIG_LCD_PORTRAIT)
# undef CONFIG_LCD_LANDSCAPE
# undef CONFIG_LCD_RLANDSCAPE
# undef CONFIG_LCD_RPORTRAIT
#elif defined(CONFIG_LCD_RLANDSCAPE)
# undef CONFIG_LCD_LANDSCAPE
# undef CONFIG_LCD_PORTRAIT
# undef CONFIG_LCD_RPORTRAIT
#elif defined(CONFIG_LCD_RPORTRAIT)
# undef CONFIG_LCD_LANDSCAPE
# undef CONFIG_LCD_PORTRAIT
# undef CONFIG_LCD_RLANDSCAPE
#else
# define CONFIG_LCD_LANDSCAPE 1
# warning "Assuming landscape orientation"
#endif
/* Some important "colors" */
#define UG_Y1_BLACK 0
#define UG_Y1_WHITE 1
/**************************************************************************************
* Public Types
**************************************************************************************/
/**************************************************************************************
* Public Data
**************************************************************************************/
#ifdef __cplusplus
extern "C"
{
#endif
/**************************************************************************************
* Public Function Prototypes
**************************************************************************************/
/**************************************************************************************
* Name: ug2864ambag01_initialize
*
* Description:
* Initialize the UG-2864AMBAG01 video hardware. The initial state of the
* OLED is fully initialized, display memory cleared, and the OLED ready
* to use, but with the power setting at 0 (full off == sleep mode).
*
* Input Parameters:
*
* spi - A reference to the SPI driver instance.
* devno - A value in the range of 0 through CONFIG_UG2864AMBAG01_NINTERFACES-1.
* This allows support for multiple OLED devices.
*
* Returned Value:
*
* On success, this function returns a reference to the LCD object for
* the specified OLED. NULL is returned on any failure.
*
**************************************************************************************/
struct lcd_dev_s; /* See include/nuttx/lcd/lcd.h */
struct spi_dev_s; /* See include/nuttx/spi.h */
FAR struct lcd_dev_s *ug2864ambag01_initialize(FAR struct spi_dev_s *spi,
unsigned int devno);
/************************************************************************************************
* Name: ug2864ambag01_fill
*
* Description:
* This non-standard method can be used to clear the entire display by writing one
* color to the display. This is much faster than writing a series of runs.
*
* Input Parameters:
* priv - Reference to private driver structure
*
* Assumptions:
* Caller has selected the OLED section.
*
**************************************************************************************/
void ug2864ambag01_fill(FAR struct lcd_dev_s *dev, uint8_t color);
#ifdef __cplusplus
}
#endif
#endif /* CONFIG_LCD_UG2864AMBAG01 */
#endif /* __INCLUDE_NUTTX_UG_8264AMBAG01_H */
nuttx/include/nuttx/lcd/ug-9664hswag01.h
+5 -10
View File
@@ -3,7 +3,7 @@
* Driver for the Univision UG-9664HSWAG01 Display with the Solomon Systech
* SSD1305 LCD controller.
*
* Copyright (C) 2011 Gregory Nutt. All rights reserved.
* Copyright (C) 2011-2012 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@@ -58,8 +58,6 @@
* CONFIG_UG9664HSWAG01_POWER
* If the hardware supports a controllable OLED a power supply, this
* configuration shold be defined. (See ug_power() below).
* CONFIG_LCD_UGDEBUG - Enable detailed UG-9664HSWAG01 debug output
* (CONFIG_DEBUG and CONFIG_VERBOSE must also be enabled).
*
* Required LCD driver settings:
* CONFIG_LCD_UG9664HSWAG01 - Enable UG-9664HSWAG01 support
@@ -90,10 +88,8 @@
****************************************************************************/
#ifdef __cplusplus
#define EXTERN extern "C"
extern "C" {
#else
#define EXTERN extern
extern "C"
{
#endif
/****************************************************************************
@@ -123,7 +119,7 @@ extern "C" {
struct lcd_dev_s; /* see nuttx/lcd.h */
struct spi_dev_s; /* see nuttx/spi.h */
EXTERN FAR struct lcd_dev_s *ug_initialize(FAR struct spi_dev_s *spi, unsigned int devno);
FAR struct lcd_dev_s *ug_initialize(FAR struct spi_dev_s *spi, unsigned int devno);
/****************************************************************************
* Name: ug_power
@@ -145,12 +141,11 @@ EXTERN FAR struct lcd_dev_s *ug_initialize(FAR struct spi_dev_s *spi, unsigned i
**************************************************************************************/
#ifdef CONFIG_UG9664HSWAG01_POWER
EXTERN void ug_power(unsigned int devno, bool on);
void ug_power(unsigned int devno, bool on);
#else
# define ug_power(a,b)
#endif
#undef EXTERN
#ifdef __cplusplus
}
#endif
nuttx/include/nuttx/net/ioctl.h
+6
View File
@@ -146,9 +146,15 @@
#define SIOCSIWPMKSA _SIOC(0x0036) /* PMKSA cache operation */
/* Interface flags */
#define SIOCSIFFLAGS _SIOC(0x0037) /* Sets the interface flags */
#define SIOCGIFFLAGS _SIOC(0x0038) /* Gets the interface flags */
/****************************************************************************
* Type Definitions
****************************************************************************/
/* See include/net/if.h */
/****************************************************************************

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