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px4fmu-v5: Define UART7 for PX4IO

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This commit is contained in:
David Sidrane
2018-01-16 08:36:51 +01:00
committed by Lorenz Meier
parent 2df5d23ab6
commit e5317ed9b6
2 changed files with 37 additions and 2 deletions
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src/drivers/boards/px4fmu-v5/board_config.h
+14
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@@ -52,6 +52,20 @@
/****************************************************************************************************
* Definitions
****************************************************************************************************/
/* PX4IO connection configuration */
#define BOARD_USES_PX4IO_VERSION 2
#define PX4IO_SERIAL_DEVICE "/dev/ttyS5"
#define PX4IO_SERIAL_TX_GPIO GPIO_UART7_TX
#define PX4IO_SERIAL_RX_GPIO GPIO_UART7_RX
#define PX4IO_SERIAL_BASE STM32_UART7_BASE /* hardwired on the board */
#define PX4IO_SERIAL_VECTOR STM32_IRQ_UART7
#define PX4IO_SERIAL_TX_DMAMAP DMAMAP_UART7_TX
#define PX4IO_SERIAL_RX_DMAMAP DMAMAP_UART7_RX
#define PX4IO_SERIAL_CLOCK STM32_PCLK1_FREQUENCY
#define PX4IO_SERIAL_BITRATE 1500000 /* 1.5Mbps -> max rate for IO */
/* Configuration ************************************************************************************/
/* Un-comment to support some RC00 polarities inversions
src/drivers/px4io/px4io_serial.cpp
+23 -2
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@@ -59,6 +59,23 @@
#include <up_internal.h>
#include <up_arch.h>
#if defined(CONFIG_ARCH_CHIP_STM32F7)
# include <stm32_dma.h>
# include <stm32_uart.h>
# define USART_BRR_MANT_SHIFT 0
# define USART_BRR_FRAC_SHIFT 0
# define USART_SR_TXE 0
# define STM32_USART_DR_OFFSET 0
# define USART_SR_ORE 0
# define USART_SR_RXNE 0
# define USART_SR_NE 0
# define USART_SR_FE 0
# define USART_SR_IDLE 0
# define rSR REG(STM32_USART_ISR_OFFSET)
# define rDR REG(STM32_USART_RDR_OFFSET)
#endif
#include <debug.h>
#include <drivers/device/device.h>
@@ -75,8 +92,12 @@
/* serial register accessors */
#define REG(_x) (*(volatile uint32_t *)(PX4IO_SERIAL_BASE + _x))
#define rSR REG(STM32_USART_SR_OFFSET)
#define rDR REG(STM32_USART_DR_OFFSET)
# if !defined(rSR)
# define rSR REG(STM32_USART_SR_OFFSET)
#endif
# if !defined(rDR)
# define rDR REG(STM32_USART_DR_OFFSET)
#endif
#define rBRR REG(STM32_USART_BRR_OFFSET)
#define rCR1 REG(STM32_USART_CR1_OFFSET)
#define rCR2 REG(STM32_USART_CR2_OFFSET)