Merge branch 'main' into pr-boards_serial_rc

This commit is contained in:
Alex Klimaj
2025-02-18 12:27:40 -07:00
committed by GitHub
1283 changed files with 85038 additions and 14343 deletions
@@ -106,6 +106,13 @@
#define ADC_V5_SCALE (2.0f) // The scale factor defined by HW's resistive divider (Rt+Rb)/ Rb
#endif
#if !defined(ADC_PAYLOAD_V_FULL_SCALE)
#define ADC_PAYLOAD_V_FULL_SCALE (25.3f) // Payload volt Rail full scale voltage
#endif
#if !defined(ADC_PAYLOAD_SCALE)
#define ADC_PAYLOAD_SCALE (7.667f) // The scale factor defined by HW's resistive divider (Rt+Rb)/ Rb
#endif
#if !defined(ADC_3V3_V_FULL_SCALE)
#define ADC_3V3_V_FULL_SCALE (3.6f) // 3.3V volt Rail full scale voltage
#endif
+47
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@@ -356,6 +356,52 @@ static const px4_hw_mft_item_t base_configuration_17[] = {
},
};
// BASE ID 18 Auterion Skynode S
static const px4_hw_mft_item_t base_configuration_18[] = {
{
.id = PX4_MFT_PX4IO,
.present = 0,
.mandatory = 0,
.connection = px4_hw_con_onboard,
},
{
.id = PX4_MFT_USB,
.present = 0,
.mandatory = 0,
.connection = px4_hw_con_unknown,
},
{
.id = PX4_MFT_CAN2,
.present = 0,
.mandatory = 0,
.connection = px4_hw_con_onboard,
},
{
.id = PX4_MFT_CAN3,
.present = 0,
.mandatory = 0,
.connection = px4_hw_con_unknown,
},
{
.id = PX4_MFT_PM2,
.present = 0,
.mandatory = 0,
.connection = px4_hw_con_onboard,
},
{
.id = PX4_MFT_ETHERNET,
.present = 1,
.mandatory = 1,
.connection = px4_hw_con_connector,
},
{
.id = PX4_MFT_T100_ETH,
.present = 1,
.mandatory = 1,
.connection = px4_hw_con_onboard,
},
};
// BASE ID 0x100 Holybro Pixhawk Jetson Baseboard Alaised to ID 0
// BASE ID 0x150 ZeroOne Pixhawk Baseboard Alaised to ID 0
@@ -372,6 +418,7 @@ static px4_hw_mft_list_entry_t mft_lists[] = {
{HW_BASE_ID(10), base_configuration_9, arraySize(base_configuration_9)}, // Auterion Skynode ver 10
{HW_BASE_ID(16), base_configuration_0, arraySize(base_configuration_0)}, // Auterion Skynode ver 16
{HW_BASE_ID(17), base_configuration_17, arraySize(base_configuration_17)}, // Auterion Skynode ver 17
{HW_BASE_ID(18), base_configuration_18, arraySize(base_configuration_18)}, // Auterion Skynode S ver 18
{HW_BASE_ID(0x100), base_configuration_0, arraySize(base_configuration_0)}, // Holybro Pixhawk Jetson Baseboard ver 0x100 Alaised to ID 0
{HW_BASE_ID(0x150), base_configuration_0, arraySize(base_configuration_0)}, // ZeroOne Pixhawk Baseboard ver 0x150
};
+5
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@@ -87,7 +87,12 @@ const px4_spi_bus_t *px4_spi_buses{nullptr};
int px4_find_spi_bus(uint32_t devid)
{
// px4_spi_buses is only NULL on certain targets depending on defines
#pragma GCC diagnostic push
#pragma GCC diagnostic ignored "-Waddress"
for (int i = 0; ((px4_spi_bus_t *) px4_spi_buses) != nullptr && i < SPI_BUS_MAX_BUS_ITEMS; ++i) {
#pragma GCC diagnostic pop
const px4_spi_bus_t &bus_data = px4_spi_buses[i];
if (bus_data.bus == -1) {
@@ -146,7 +146,14 @@ int uORBTest::UnitTest::pubsublatency_main()
pubsubtest_passed = true;
if (mean > 150.0f) {
#if defined(CONFIG_ARCH_BOARD_PX4_SITL)
// relaxed on SITL (non-realtime)
const float kMaxMeanUs = 1000.f; // 1000 microseconds
#else
const float kMaxMeanUs = 150.f; // 150 microseconds
#endif
if (mean > kMaxMeanUs) {
pubsubtest_res = PX4_ERROR;
} else {
+29 -1
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@@ -297,6 +297,29 @@ else()
endif()
# create .hex if configured in NuttX
if (CONFIG_INTELHEX_BINARY)
string(REPLACE ".elf" ".hex" hex_package ${PX4_BINARY_DIR}/${FW_NAME})
add_custom_command(
OUTPUT ${hex_package}
COMMAND
${CMAKE_OBJCOPY} -O ihex
${PX4_BINARY_DIR}/${PX4_CONFIG}.elf
${hex_package}
DEPENDS
${PX4_BINARY_DIR}/${PX4_CONFIG}.bin
airframes_xml
parameters_xml
COMMENT "Creating ${hex_package}"
WORKING_DIRECTORY ${PX4_BINARY_DIR}
)
add_custom_target(px4_hex ALL DEPENDS ${hex_package})
endif()
# create .px4 with parameter and airframe metadata
if (TARGET parameters_xml AND TARGET airframes_xml)
@@ -383,7 +406,7 @@ configure_file(${CMAKE_CURRENT_SOURCE_DIR}/Debug/gdbinit.in ${PX4_BINARY_DIR}/.g
if(NOT NUTTX_DIR MATCHES "external")
if(CONFIG_ARCH_CHIP_MIMXRT1062DVL6A)
set(DEBUG_DEVICE "MIMXRT1062XXX6A")
set(DEBUG_SVD_FILE "MIMXRT1052.svd")
set(DEBUG_SVD_FILE "MIMXRT1062.xml")
elseif(CONFIG_ARCH_CHIP_MIMXRT1176DVMAA)
set(DEBUG_DEVICE "MIMXRT1176DVMAA")
set(DEBUG_SVD_FILE "MIMXRT1176_cm7.xml")
@@ -483,6 +506,11 @@ if(NOT NUTTX_DIR MATCHES "external")
message(STATUS "Found SVD: ${DEBUG_SVD_FILE_PATH}")
endif()
if(NOT CMAKE_GDB)
find_program(CMAKE_GDB gdb-multiarch)
message(STATUS "Found GDB: ${CMAKE_GDB}")
endif()
if(DEBUG_DEVICE)
configure_file(${CMAKE_CURRENT_SOURCE_DIR}/Debug/launch.json.in ${PX4_SOURCE_DIR}/.vscode/launch.json @ONLY)
endif()
+3
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@@ -35,18 +35,21 @@
set(vendorstr_underscore)
set(productstr_underscore)
string(REPLACE " " "_" vendorstr_underscore ${CONFIG_CDCACM_VENDORSTR})
string(REPLACE "," "_" vendorstr_underscore "${vendorstr_underscore}")
string(REPLACE " " "_" productstr_underscore ${CONFIG_CDCACM_PRODUCTSTR})
set(serial_ports)
if(${CMAKE_HOST_SYSTEM_NAME} STREQUAL "Linux")
set(px4_usb_path "${vendorstr_underscore}_${productstr_underscore}")
set(px4_bl_usb_path "${vendorstr_underscore}_BL")
list(APPEND serial_ports
# NuttX vendor + product string
/dev/serial/by-id/*-${px4_usb_path}*
# Bootloader
/dev/serial/by-id/*_${px4_bl_usb_path}*
/dev/serial/by-id/*PX4_BL* # typical bootloader USB device string
/dev/serial/by-id/*BL_FMU*
+5 -3
View File
@@ -153,6 +153,7 @@
#define STATE_ALLOWS_REBOOT (STATE_ALLOWS_ERASE|STATE_PROTO_PROG_MULTI|STATE_PROTO_GET_CRC)
# define SET_BL_STATE(s) bl_state |= (s)
#endif
#define STATE_ALLOWS_BOOTLOADER (STATE_PROTO_GET_SYNC|STATE_PROTO_GET_DEVICE)
static uint8_t bl_type;
static uint8_t last_input;
@@ -1107,9 +1108,10 @@ bootloader(unsigned timeout)
continue;
}
// we got a command worth syncing, so kill the timeout because
// we are probably talking to the uploader
timeout = 0;
// We got a sync command as well as a get_device command, we are very likely talking to the uploader.
if ((bl_state & STATE_ALLOWS_BOOTLOADER) == STATE_ALLOWS_BOOTLOADER) {
timeout = 0;
}
// Set the bootloader port based on the port from which we received the first valid command
if (bl_type == NONE) {
@@ -95,7 +95,7 @@ struct boardinfo board_info = {
.board_type = BOARD_TYPE,
.board_rev = 0,
.fw_size = 0,
.systick_mhz = 480,
.systick_mhz = STM32_CPUCLK_FREQUENCY / 1000000,
};
static void board_init(void);
@@ -35,7 +35,9 @@ px4_add_library(arch_board_reset
board_reset.cpp
)
if (CONFIG_ARCH_FAMILY_IMXRT117x)
target_link_libraries(arch_board_reset PRIVATE arch_board_romapi)
endif()
# up_systemreset
if (NOT DEFINED CONFIG_BUILD_FLAT)
@@ -42,11 +42,12 @@
#include <errno.h>
#include <nuttx/board.h>
#include <arm_internal.h>
#ifdef CONFIG_ARCH_FAMILY_IMXRT117x
#include <hardware/rt117x/imxrt117x_snvs.h>
#include <px4_arch/imxrt_flexspi_nor_flash.h>
#include <px4_arch/imxrt_romapi.h>
#endif
#define BOOT_RTC_SIGNATURE 0xb007b007
#define PX4_IMXRT_RTC_REBOOT_REG 3
@@ -58,9 +59,13 @@
static int board_reset_enter_bootloader()
{
#ifdef CONFIG_ARCH_FAMILY_IMXRT117x
uint32_t regvalue = BOOT_RTC_SIGNATURE;
modifyreg32(IMXRT_SNVS_LPCR, 0, SNVS_LPCR_GPR_Z_DIS);
putreg32(regvalue, PX4_IMXRT_RTC_REBOOT_REG_ADDRESS);
#elif defined(BOARD_HAS_TEENSY_BOOTLOADER)
asm("BKPT #251"); /* Enter Teensy MKL02 bootloader */
#endif
return OK;
}
@@ -68,13 +73,18 @@ int board_reset(int status)
{
if (status == REBOOT_TO_BOOTLOADER) {
board_reset_enter_bootloader();
}
} else if (status == REBOOT_TO_ISP) {
#if defined(BOARD_HAS_ISP_BOOTLOADER)
else if (status == REBOOT_TO_ISP) {
uint32_t arg = 0xeb100000;
ROM_API_Init();
ROM_RunBootloader(&arg);
}
#endif
#if defined(BOARD_HAS_ON_RESET)
board_on_reset(status);
#endif
@@ -68,7 +68,8 @@ typedef enum io_timer_channel_mode_t {
IOTimerChanMode_Dshot = 6,
IOTimerChanMode_LED = 7,
IOTimerChanMode_PPS = 8,
IOTimerChanMode_Other = 9,
IOTimerChanMode_RPM = 9,
IOTimerChanMode_Other = 10,
IOTimerChanModeSize
} io_timer_channel_mode_t;
@@ -61,6 +61,7 @@
#include <chip.h>
#include "hardware/imxrt_tmr.h"
#ifndef BOARD_HAS_CUSTOM_LED_PWM
int led_pwm_servo_set(unsigned channel, uint8_t cvalue)
{
return 0;
@@ -68,8 +69,8 @@ int led_pwm_servo_set(unsigned channel, uint8_t cvalue)
int led_pwm_servo_init(void)
{
return 0;
}
#endif
#if 0 && defined(BOARD_HAS_LED_PWM) || defined(BOARD_HAS_UI_LED_PWM)
@@ -41,15 +41,155 @@
#include <systemlib/px4_macros.h>
#include "chip.h"
#ifdef TONE_ALARM_FLEXPWM
#include "hardware/imxrt_flexpwm.h"
#else
#include "hardware/imxrt_gpt.h"
#endif
#include "imxrt_periphclks.h"
#define CAT4_(A, B, C, D) A##B##C##D
#define CAT4(A, B, C, D) CAT4_(A, B, C, D)
#define CAT3_(A, B, C) A##B##C
#define CAT3(A, B, C) CAT3_(A, B, C)
#define CAT2_(A, B) A##B
#define CAT2(A, B) CAT2_(A, B)
#ifdef TONE_ALARM_FLEXPWM
/*
* Period of the free-running counter, in microseconds.
*/
#define TONE_ALARM_COUNTER_PERIOD 4294967296
/* Tone Alarm configuration */
#define TONE_ALARM_TIMER_CLOCK BOARD_GPT_FREQUENCY /* The input clock frequency to the GPT block */
#define TONE_ALARM_TIMER_BASE CAT3(IMXRT_FLEXPWM, TONE_ALARM_TIMER,_BASE) /* The Base address of the GPT */
#define TONE_ALARM_TIMER_VECTOR CAT4(IMXRT_IRQ_FLEXPWM, TONE_ALARM_TIMER, _, TONE_ALARM_CHANNEL) /* The GPT Interrupt vector */
#if TONE_ALARM_TIMER == 1
# define TONE_ALARM_CLOCK_ALL() imxrt_clockall_pwm1() /* The Clock Gating macro for this PWM */
#elif TONE_ALARM_TIMER == 2
# define TONE_ALARM_CLOCK_ALL() imxrt_clockall_pwm2() /* The Clock Gating macro for this PWM */
#elif TONE_ALARM_TIMER == 3
# define TONE_ALARM_CLOCK_ALL() imxrt_clockall_pwm3() /* The Clock Gating macro for this PWM */
#elif TONE_ALARM_TIMER == 4
# define TONE_ALARM_CLOCK_ALL() imxrt_clockall_pwm4() /* The Clock Gating macro for this PWM */
#endif
# define TONE_ALARM_TIMER_FREQ 1000000
#define SM_SPACING (IMXRT_FLEXPWM_SM1CNT_OFFSET-IMXRT_FLEXPWM_SM0CNT_OFFSET)
/* Register accessors */
#define _REG(_addr) (*(volatile uint16_t *)(_addr))
#define _REG16(_base, _reg) (*(volatile uint16_t *)(_base + _reg))
#define REG(_tmr, _sm, _reg) _REG16(TONE_ALARM_TIMER_BASE + ((_sm) * SM_SPACING), (_reg))
#define rINIT(_tim, _sm) REG(_tim, _sm,IMXRT_FLEXPWM_SM0INIT_OFFSET) /* Initial Count Register */
#define rCTRL(_tim, _sm) REG(_tim, _sm,IMXRT_FLEXPWM_SM0CTRL_OFFSET) /* Control Register */
#define rCTRL2(_tim, _sm) REG(_tim, _sm,IMXRT_FLEXPWM_SM0CTRL2_OFFSET) /* Control 2 Register */
#define rFSTS0(_tim) REG(_tim, 0, IMXRT_FLEXPWM_FSTS0_OFFSET) /* Fault Status Register */
#define rVAL0(_tim, _sm) REG(_tim, _sm,IMXRT_FLEXPWM_SM0VAL0_OFFSET) /* Value Register 0 */
#define rVAL1(_tim, _sm) REG(_tim, _sm,IMXRT_FLEXPWM_SM0VAL1_OFFSET) /* Value Register 1 */
#define rVAL2(_tim, _sm) REG(_tim, _sm,IMXRT_FLEXPWM_SM0VAL2_OFFSET) /* Value Register 2 */
#define rVAL3(_tim, _sm) REG(_tim, _sm,IMXRT_FLEXPWM_SM0VAL3_OFFSET) /* Value Register 3 */
#define rVAL4(_tim, _sm) REG(_tim, _sm,IMXRT_FLEXPWM_SM0VAL4_OFFSET) /* Value Register 4 */
#define rVAL5(_tim, _sm) REG(_tim, _sm,IMXRT_FLEXPWM_SM0VAL5_OFFSET) /* Value Register 5 */
#define rFFILT0(_tim) REG(_tim, 0, IMXRT_FLEXPWM_FFILT0_OFFSET) /* Fault Filter Register */
#define rDISMAP0(_tim, _sm) REG(_tim, _sm,IMXRT_FLEXPWM_SM0DISMAP0_OFFSET) /* Fault Disable Mapping Register 0 */
#define rDISMAP1(_tim, _sm) REG(_tim, _sm,IMXRT_FLEXPWM_SM0DISMAP1_OFFSET) /* Fault Disable Mapping Register 1 */
#define rOUTEN(_tim) REG(_tim, 0, IMXRT_FLEXPWM_OUTEN_OFFSET) /* Output Enable Register */
#define rDTSRCSEL(_tim) REG(_tim, 0, IMXRT_FLEXPWM_DTSRCSEL_OFFSET) /* PWM Source Select Register */
#define rMCTRL(_tim) REG(_tim, 0, IMXRT_FLEXPWM_MCTRL_OFFSET) /* Master Control Register */
namespace ToneAlarmInterface
{
void init()
{
#if defined(TONE_ALARM_TIMER)
/* configure the GPIO to the idle state */
px4_arch_configgpio(GPIO_TONE_ALARM_IDLE);
/* Enable the Module clock */
TONE_ALARM_CLOCK_ALL();
/* Clear all Faults */
rFSTS0(TONE_ALARM_TIMER) = FSTS_FFLAG_MASK;
rMCTRL(TONE_ALARM_TIMER) |= (1 << (TONE_ALARM_CHANNEL + MCTRL_CLDOK_SHIFT));
rCTRL2(TONE_ALARM_TIMER, TONE_ALARM_CHANNEL) = SMCTRL2_CLK_SEL_EXT_CLK | SMCTRL2_DBGEN | SMCTRL2_INDEP;
rCTRL(TONE_ALARM_TIMER, TONE_ALARM_CHANNEL) = SMCTRL_PRSC_DIV16 | SMCTRL_FULL;
/* Edge aligned at 0 */
rINIT(TONE_ALARM_TIMER, TONE_ALARM_CHANNEL) = 0;
rVAL0(TONE_ALARM_TIMER, TONE_ALARM_CHANNEL) = 0;
rVAL2(TONE_ALARM_TIMER, TONE_ALARM_CHANNEL) = 0;
rVAL4(TONE_ALARM_TIMER, TONE_ALARM_CHANNEL) = 0;
rFFILT0(TONE_ALARM_TIMER) &= ~FFILT_FILT_PER_MASK;
rDISMAP0(TONE_ALARM_TIMER, TONE_ALARM_CHANNEL) = 0xf000;
rDISMAP1(TONE_ALARM_TIMER, TONE_ALARM_CHANNEL) = 0xf000;
rOUTEN(TONE_ALARM_TIMER) |= TONE_ALARM_FLEXPWM == PWMA_VAL ? OUTEN_PWMA_EN(1 << TONE_ALARM_CHANNEL)
: OUTEN_PWMB_EN(1 << TONE_ALARM_CHANNEL);
rDTSRCSEL(TONE_ALARM_TIMER) = 0;
rMCTRL(TONE_ALARM_TIMER) |= MCTRL_LDOK(1 << TONE_ALARM_CHANNEL);
#endif /* TONE_ALARM_TIMER */
}
hrt_abstime start_note(unsigned frequency)
{
hrt_abstime time_started = 0;
#if defined(TONE_ALARM_TIMER)
rMCTRL(TONE_ALARM_TIMER) |= (1 << (TONE_ALARM_CHANNEL + MCTRL_CLDOK_SHIFT));
rVAL1(TONE_ALARM_TIMER, TONE_ALARM_CHANNEL) = (TONE_ALARM_TIMER_FREQ / frequency) - 1;
if (TONE_ALARM_FLEXPWM == PWMA_VAL) {
rVAL3(TONE_ALARM_TIMER, TONE_ALARM_CHANNEL) = ((TONE_ALARM_TIMER_FREQ / frequency) / 2);
} else {
rVAL5(TONE_ALARM_TIMER, TONE_ALARM_CHANNEL) = ((TONE_ALARM_TIMER_FREQ / frequency) / 2);
}
rMCTRL(TONE_ALARM_TIMER) |= MCTRL_LDOK(1 << TONE_ALARM_CHANNEL) | MCTRL_RUN(1 << TONE_ALARM_CHANNEL);
// configure the GPIO to enable timer output
irqstate_t flags = enter_critical_section();
time_started = hrt_absolute_time();
px4_arch_configgpio(GPIO_TONE_ALARM);
leave_critical_section(flags);
#endif /* TONE_ALARM_TIMER */
return time_started;
}
void stop_note()
{
#if defined(TONE_ALARM_TIMER)
/* stop the current note */
rMCTRL(TONE_ALARM_TIMER) &= ~MCTRL_RUN(1 << TONE_ALARM_CHANNEL);
/*
* Make sure the GPIO is not driving the speaker.
*/
px4_arch_configgpio(GPIO_TONE_ALARM_IDLE);
#endif /* TONE_ALARM_TIMER */
}
} /* namespace ToneAlarmInterface */
#else
/* Check that tone alarm and HRT timers are different */
#if defined(TONE_ALARM_TIMER) && defined(HRT_TIMER)
# if TONE_ALARM_TIMER == HRT_TIMER
@@ -134,8 +274,6 @@
#define CR_OM CAT3(GPT_CR_OM, TONE_ALARM_CHANNEL,_TOGGLE) /* Output Compare mode */
#define CBRK_BUZZER_KEY 782097
namespace ToneAlarmInterface
{
@@ -215,3 +353,5 @@ void stop_note()
}
} /* namespace ToneAlarmInterface */
#endif
@@ -67,7 +67,8 @@ typedef enum io_timer_channel_mode_t {
IOTimerChanMode_Dshot = 6,
IOTimerChanMode_LED = 7,
IOTimerChanMode_PPS = 8,
IOTimerChanMode_Other = 9,
IOTimerChanMode_RPM = 9,
IOTimerChanMode_Other = 10,
IOTimerChanModeSize
} io_timer_channel_mode_t;
@@ -68,7 +68,8 @@ typedef enum io_timer_channel_mode_t {
IOTimerChanMode_Dshot = 6,
IOTimerChanMode_LED = 7,
IOTimerChanMode_PPS = 8,
IOTimerChanMode_Other = 9,
IOTimerChanMode_RPM = 9,
IOTimerChanMode_Other = 10,
IOTimerChanModeSize
} io_timer_channel_mode_t;
@@ -63,7 +63,8 @@ typedef enum io_timer_channel_mode_t {
IOTimerChanMode_Dshot = 6,
IOTimerChanMode_LED = 7,
IOTimerChanMode_PPS = 8,
IOTimerChanMode_Other = 9,
IOTimerChanMode_RPM = 9,
IOTimerChanMode_Other = 10,
IOTimerChanModeSize
} io_timer_channel_mode_t;
@@ -63,7 +63,8 @@ typedef enum io_timer_channel_mode_t {
IOTimerChanMode_Dshot = 6,
IOTimerChanMode_LED = 7,
IOTimerChanMode_PPS = 8,
IOTimerChanMode_Other = 9,
IOTimerChanMode_RPM = 9,
IOTimerChanMode_Other = 10,
IOTimerChanModeSize
} io_timer_channel_mode_t;
@@ -73,6 +73,10 @@ typedef enum io_timer_channel_mode_t {
IOTimerChanMode_OneShot = 4,
IOTimerChanMode_Trigger = 5,
IOTimerChanMode_Dshot = 6,
IOTimerChanMode_LED = 7,
IOTimerChanMode_PPS = 8,
IOTimerChanMode_RPM = 9,
IOTimerChanMode_Other = 10,
IOTimerChanModeSize
} io_timer_channel_mode_t;
@@ -79,7 +79,8 @@ typedef enum io_timer_channel_mode_t {
IOTimerChanMode_Dshot = 6,
IOTimerChanMode_LED = 7,
IOTimerChanMode_PPS = 8,
IOTimerChanMode_Other = 9,
IOTimerChanMode_RPM = 9,
IOTimerChanMode_Other = 10,
IOTimerChanModeSize
} io_timer_channel_mode_t;
-1
View File
@@ -5,7 +5,6 @@
# tests command arguments
set(tests
atomic_bitset
bezier
bitset
bson
dataman