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Rework the FMU<->IO connection to use a simple fixed-size DMA packet; this should let us reduce overall latency and bump the bitrate up.

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Will still require some tuning.
This commit is contained in:
px4dev
2013-07-03 00:08:12 -07:00
parent 3eb115c821
commit be6ad7af3b
4 changed files with 310 additions and 224 deletions
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src/drivers/boards/px4fmuv2/px4fmu_internal.h
+11
View File
@@ -58,6 +58,17 @@ __BEGIN_DECLS
****************************************************************************************************/
/* Configuration ************************************************************************************/
/* PX4IO connection configuration */
#define PX4IO_SERIAL_TX_GPIO GPIO_USART6_TX
#define PX4IO_SERIAL_RX_GPIO GPIO_USART6_RX
#define PX4IO_SERIAL_BASE STM32_USART6_BASE /* hardwired on the board */
#define PX4IO_SERIAL_VECTOR STM32_IRQ_USART6
#define PX4IO_SERIAL_TX_DMAMAP DMAMAP_USART6_TX_2
#define PX4IO_SERIAL_RX_DMAMAP DMAMAP_USART6_RX_2
#define PX4IO_SERIAL_CLOCK STM32_PCLK2_FREQUENCY
#define PX4IO_SERIAL_BITRATE 1500000 /* 1.5Mbps -> max rate for IO */
/* PX4FMU GPIOs ***********************************************************************************/
/* LEDs */
src/drivers/boards/px4iov2/px4iov2_internal.h
+7 -2
View File
@@ -59,8 +59,13 @@
/******************************************************************************
* Serial
******************************************************************************/
#define SERIAL_BASE STM32_USART1_BASE
#define SERIAL_VECTOR STM32_IRQ_USART1
#define PX4FMU_SERIAL_BASE STM32_USART2_BASE
#define PX4FMU_SERIAL_TX_GPIO GPIO_USART2_TX
#define PX4FMU_SERIAL_RX_GPIO GPIO_USART2_RX
#define PX4FMU_SERIAL_TX_DMA DMACHAN_USART2_TX
#define PX4FMU_SERIAL_RX_DMA DMACHAN_USART2_RX
#define PX4FMU_SERIAL_CLOCK STM32_PCLK1_FREQUENCY
#define PX4FMU_SERIAL_BITRATE 1500000
/******************************************************************************
* GPIOS