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https://gitee.com/mirrors_PX4/PX4-Autopilot.git
synced 2026-05-21 11:57:35 +08:00
bmi055: fixes for on-chip filter
- Accel: use cutoff of 62.5 Hz instead of 500 Hz - Gyro: the cutoff frequency is coupled with the ODR and is fixed to 116 Hz at 1 kHz readout rate. So this patch does not change anything for the gyro.
This commit is contained in:
@@ -62,8 +62,6 @@ protected:
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struct hrt_call _call;
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unsigned _call_interval;
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unsigned _dlpf_freq;
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uint8_t _register_wait;
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uint64_t _reset_wait;
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@@ -60,7 +60,6 @@ BMI055_accel::BMI055_accel(int bus, const char *path_accel, uint32_t device, enu
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_accel_topic(nullptr),
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_accel_orb_class_instance(-1),
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_accel_class_instance(-1),
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_accel_sample_rate(BMI055_ACCEL_DEFAULT_RATE),
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_accel_filter_x(BMI055_ACCEL_DEFAULT_RATE, BMI055_ACCEL_DEFAULT_DRIVER_FILTER_FREQ),
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_accel_filter_y(BMI055_ACCEL_DEFAULT_RATE, BMI055_ACCEL_DEFAULT_DRIVER_FILTER_FREQ),
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_accel_filter_z(BMI055_ACCEL_DEFAULT_RATE, BMI055_ACCEL_DEFAULT_DRIVER_FILTER_FREQ),
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@@ -159,13 +158,12 @@ int BMI055_accel::reset()
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write_reg(BMI055_ACC_SOFTRESET, BMI055_SOFT_RESET);//Soft-reset
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up_udelay(5000);
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write_checked_reg(BMI055_ACC_BW, BMI055_ACCEL_BW_1000); //Write accel bandwidth
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write_checked_reg(BMI055_ACC_BW, BMI055_ACCEL_BW_62_5); //Write accel bandwidth (DLPF)
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write_checked_reg(BMI055_ACC_RANGE, BMI055_ACCEL_RANGE_2_G);//Write range
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write_checked_reg(BMI055_ACC_INT_EN_1, BMI055_ACC_DRDY_INT_EN); //Enable DRDY interrupt
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write_checked_reg(BMI055_ACC_INT_MAP_1, BMI055_ACC_DRDY_INT1); //Map DRDY interrupt on pin INT1
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set_accel_range(BMI055_ACCEL_DEFAULT_RANGE_G);//set accel range
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accel_set_sample_rate(BMI055_ACCEL_DEFAULT_RATE);//set accel ODR
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//Enable Accelerometer in normal mode
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write_reg(BMI055_ACC_PMU_LPW, BMI055_ACCEL_NORMAL);
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@@ -211,54 +209,6 @@ BMI055_accel::probe()
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return -EIO;
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}
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int
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BMI055_accel::accel_set_sample_rate(float frequency)
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{
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uint8_t setbits = 0;
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uint8_t clearbits = BMI055_ACCEL_BW_1000;
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if (frequency < (3125 / 100)) {
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setbits |= BMI055_ACCEL_BW_7_81;
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_accel_sample_rate = 1563 / 100;
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} else if (frequency < (625 / 10)) {
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setbits |= BMI055_ACCEL_BW_15_63;
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_accel_sample_rate = 625 / 10;
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} else if (frequency < (125)) {
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setbits |= BMI055_ACCEL_BW_31_25;
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_accel_sample_rate = 625 / 10;
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} else if (frequency < 250) {
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setbits |= BMI055_ACCEL_BW_62_5;
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_accel_sample_rate = 125;
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} else if (frequency < 500) {
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setbits |= BMI055_ACCEL_BW_125;
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_accel_sample_rate = 250;
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} else if (frequency < 1000) {
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setbits |= BMI055_ACCEL_BW_250;
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_accel_sample_rate = 500;
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} else if (frequency < 2000) {
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setbits |= BMI055_ACCEL_BW_500;
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_accel_sample_rate = 1000;
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} else if (frequency >= 2000) {
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setbits |= BMI055_ACCEL_BW_1000;
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_accel_sample_rate = 2000;
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} else {
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return -EINVAL;
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}
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/* Write accel ODR */
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modify_reg(BMI055_ACC_BW, clearbits, setbits);
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return OK;
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}
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ssize_t
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BMI055_accel::read(struct file *filp, char *buffer, size_t buflen)
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{
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@@ -109,7 +109,7 @@
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// BMI055 Accelerometer Chip-Id
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#define BMI055_ACC_WHO_AM_I 0xFA
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//BMI055_ACC_BW 0x10
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// DLPF filter bandwidth settings
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#define BMI055_ACCEL_BW_7_81 (1<<3) | (0<<2) | (0<<1) | (0<<0)
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#define BMI055_ACCEL_BW_15_63 (1<<3) | (0<<2) | (0<<1) | (1<<0)
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#define BMI055_ACCEL_BW_31_25 (1<<3) | (0<<2) | (1<<1) | (0<<0)
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@@ -191,8 +191,6 @@ private:
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int _accel_orb_class_instance;
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int _accel_class_instance;
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float _accel_sample_rate;
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math::LowPassFilter2p _accel_filter_x;
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math::LowPassFilter2p _accel_filter_y;
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math::LowPassFilter2p _accel_filter_z;
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@@ -279,11 +277,6 @@ private:
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*/
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int self_test();
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/*
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* set accel sample rate
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*/
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int accel_set_sample_rate(float desired_sample_rate_hz);
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/*
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* check that key registers still have the right value
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*/
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@@ -162,13 +162,13 @@ int BMI055_gyro::reset()
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{
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write_reg(BMI055_GYR_SOFTRESET, BMI055_SOFT_RESET);//Soft-reset
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usleep(5000);
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write_checked_reg(BMI055_GYR_BW, 0); // Write Gyro Bandwidth
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write_checked_reg(BMI055_GYR_BW, 0); // Write Gyro Bandwidth (will be overwritten in gyro_set_sample_rate())
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write_checked_reg(BMI055_GYR_RANGE, 0);// Write Gyro range
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write_checked_reg(BMI055_GYR_INT_EN_0, BMI055_GYR_DRDY_INT_EN); //Enable DRDY interrupt
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write_checked_reg(BMI055_GYR_INT_MAP_1, BMI055_GYR_DRDY_INT1); //Map DRDY interrupt on pin INT1
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set_gyro_range(BMI055_GYRO_DEFAULT_RANGE_DPS);// set Gyro range
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gyro_set_sample_rate(BMI055_GYRO_DEFAULT_RATE);// set Gyro ODR
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gyro_set_sample_rate(BMI055_GYRO_DEFAULT_RATE);// set Gyro ODR & Filter Bandwidth
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//Enable Gyroscope in normal mode
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write_reg(BMI055_GYR_LPM1, BMI055_GYRO_NORMAL);
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@@ -221,19 +221,19 @@ BMI055_gyro::gyro_set_sample_rate(float frequency)
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uint8_t clearbits = BMI055_GYRO_BW_MASK;
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if (frequency <= 100) {
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setbits |= BMI055_GYRO_RATE_100;
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setbits |= BMI055_GYRO_RATE_100; /* 32 Hz cutoff */
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_gyro_sample_rate = 100;
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} else if (frequency <= 250) {
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setbits |= BMI055_GYRO_RATE_400;
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setbits |= BMI055_GYRO_RATE_400; /* 47 Hz cutoff */
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_gyro_sample_rate = 400;
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} else if (frequency <= 1000) {
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setbits |= BMI055_GYRO_RATE_1000;
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setbits |= BMI055_GYRO_RATE_1000; /* 116 Hz cutoff */
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_gyro_sample_rate = 1000;
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} else if (frequency > 1000) {
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setbits |= BMI055_GYRO_RATE_2000;
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setbits |= BMI055_GYRO_RATE_2000; /* 230 Hz cutoff */
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_gyro_sample_rate = 2000;
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} else {
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@@ -102,7 +102,7 @@
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// BMI055 Gyroscope Chip-Id
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#define BMI055_GYR_WHO_AM_I 0x0F
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//BMI055_GYR_BW 0x10
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// ODR & DLPF filter bandwidth settings (they are coupled)
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#define BMI055_GYRO_RATE_100 (0<<3) | (1<<2) | (1<<1) | (1<<0)
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#define BMI055_GYRO_RATE_200 (0<<3) | (1<<2) | (1<<1) | (0<<0)
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#define BMI055_GYRO_RATE_400 (0<<3) | (0<<2) | (1<<1) | (1<<0)
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@@ -448,7 +448,6 @@ BMI055::BMI055(const char *name, const char *devname, int bus, uint32_t device,
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_whoami(0),
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_call{},
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_call_interval(0),
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_dlpf_freq(0),
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_register_wait(0),
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_reset_wait(0),
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_rotation(rotation),
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