Added STM32 driver project. Compiles, does nothing; driver itself is not implemented (at all).

libuavcan_drivers/stm32/driver/include.mk

@@ -0,0 +1,9 @@
+#
+# Copyright (C) 2014 Pavel Kirienko <pavel.kirienko@gmail.com>
+#
+
+LIBUAVCAN_STM32_DIR := $(dir $(lastword $(MAKEFILE_LIST)))
+
+LIBUAVCAN_STM32_SRC := $(shell find $(LIBUAVCAN_STM32_DIR)/src/ -type f -name '*.cpp')
+
+LIBUAVCAN_STM32_INC := $(LIBUAVCAN_STM32_DIR)/include/

libuavcan_drivers/stm32/test_stm32f107/.gitignore

@@ -0,0 +1,2 @@
+# Nested repository, we don't need to submodule it
+crdr_chibios

libuavcan_drivers/stm32/test_stm32f107/Makefile

@@ -0,0 +1,42 @@
+#
+# Copyright (C) 2014 Pavel Kirienko <pavel.kirienko@gmail.com>
+#
+
+PROJECT = uavcan_test_stm32f107
+
+#
+# Test application
+#
+
+CPPSRC = src/main.cpp src/dummy.cpp
+
+#
+# UAVCAN library
+#
+
+include ../../../libuavcan/include.mk
+CPPSRC += $(LIBUAVCAN_SRC)
+UINCDIR += $(LIBUAVCAN_INC)
+
+include ../driver/include.mk
+CPPSRC += $(LIBUAVCAN_STM32_SRC)
+UINCDIR += $(LIBUAVCAN_STM32_INC)
+
+# TODO: add target for this
+$(info $(shell $(LIBUAVCAN_DSDLC) $(UAVCAN_DSDL_DIR) -v))
+UINCDIR += dsdlc_generated
+
+#
+# Platform
+#
+
+CSRC += src/sys/board.c
+
+UINCDIR += src/sys
+
+SERIAL_CLI_PORT_NUMBER = 2
+
+RELEASE_OPT = -Os -fomit-frame-pointer
+DEBUG_OPT = -Os -g3
+
+include crdr_chibios/rules_stm32f105_107.mk

libuavcan_drivers/stm32/test_stm32f107/README.md

@@ -0,0 +1,4 @@
+UAVCAN test project for STM32
+-----------------------------
+
+Please checkout/symlink https://github.com/Courierdrone/crdr_chibios into subdirectory `crdr_chibios`; then follow instructions in `crdr_chibios/README.md`.

libuavcan_drivers/stm32/test_stm32f107/src/main.cpp

@@ -0,0 +1,7 @@
+/*
+ * Copyright (C) 2014 Pavel Kirienko <pavel.kirienko@gmail.com>
+ */
+
+int main()
+{
+}

libuavcan_drivers/stm32/test_stm32f107/src/sys/board.c

@@ -0,0 +1,27 @@
+/*
+ * Copyright (C) 2014 Pavel Kirienko <pavel.kirienko@gmail.com>
+ */
+
+#include <ch.h>
+#include <hal.h>
+
+const PALConfig pal_default_config = {
+    { VAL_GPIOAODR, VAL_GPIOACRL, VAL_GPIOACRH },
+    { VAL_GPIOBODR, VAL_GPIOBCRL, VAL_GPIOBCRH },
+    { VAL_GPIOCODR, VAL_GPIOCCRL, VAL_GPIOCCRH },
+    { VAL_GPIODODR, VAL_GPIODCRL, VAL_GPIODCRH },
+    { VAL_GPIOEODR, VAL_GPIOECRL, VAL_GPIOECRH }
+};
+
+void __early_init(void)
+{
+    stm32_clock_init();
+}
+
+void boardInit(void)
+{
+    AFIO->MAPR |=
+        AFIO_MAPR_CAN_REMAP_REMAP3 |
+        AFIO_MAPR_CAN2_REMAP       |
+        AFIO_MAPR_USART2_REMAP;
+}

libuavcan_drivers/stm32/test_stm32f107/src/sys/board.h

@@ -0,0 +1,75 @@
+/*
+ * Copyright (C) 2014 Pavel Kirienko <pavel.kirienko@gmail.com>
+ */
+
+#pragma once
+
+/// Assert is needed for STM32 SPL (if it is being used, that is)
+#include <assert.h>
+#define assert_param(x) assert(x)
+
+#define STM32_LSECLK            32768
+#define STM32_HSECLK            25000000
+
+#define STM32F10X_CL
+
+/*
+ * GPIO
+ */
+// LED
+#define GPIO_PORT_LED    GPIOB
+#define GPIO_PIN_LED     9
+
+/*
+ * I/O ports initial setup, this configuration is established soon after reset
+ * in the initialization code.
+ *
+ * The digits have the following meaning:
+ *   0 - Analog input.
+ *   1 - Push Pull output 10MHz.
+ *   2 - Push Pull output 2MHz.
+ *   3 - Push Pull output 50MHz.
+ *   4 - Digital input.
+ *   5 - Open Drain output 10MHz.
+ *   6 - Open Drain output 2MHz.
+ *   7 - Open Drain output 50MHz.
+ *   8 - Digital input with PullUp or PullDown resistor depending on ODR.
+ *   9 - Alternate Push Pull output 10MHz.
+ *   A - Alternate Push Pull output 2MHz.
+ *   B - Alternate Push Pull output 50MHz.
+ *   C - Reserved.
+ *   D - Alternate Open Drain output 10MHz.
+ *   E - Alternate Open Drain output 2MHz.
+ *   F - Alternate Open Drain output 50MHz.
+ * Please refer to the STM32 Reference Manual for details.
+ */
+
+#define VAL_GPIOACRL            0x88888888      // 7..0
+#define VAL_GPIOACRH            0x88888888      // 15..8
+#define VAL_GPIOAODR            0x00000000
+
+#define VAL_GPIOBCRL            0x8B488888
+#define VAL_GPIOBCRH            0x88888828
+#define VAL_GPIOBODR            0x00000000
+
+#define VAL_GPIOCCRL            0x88888888
+#define VAL_GPIOCCRH            0x88888888
+#define VAL_GPIOCODR            0x00000000
+
+#define VAL_GPIODCRL            0x88b888B4
+#define VAL_GPIODCRH            0x88888888
+#define VAL_GPIODODR            0x00000000
+
+#define VAL_GPIOECRL            0x88888888
+#define VAL_GPIOECRH            0x88888888
+#define VAL_GPIOEODR            0x00000000
+
+#if !defined(_FROM_ASM_)
+#ifdef __cplusplus
+extern "C" {
+#endif
+    void boardInit(void);
+#ifdef __cplusplus
+}
+#endif
+#endif /* _FROM_ASM_ */

libuavcan_drivers/stm32/test_stm32f107/src/sys/chconf.h

@@ -0,0 +1,29 @@
+/*
+ * Copyright (C) 2014 Pavel Kirienko <pavel.kirienko@gmail.com>
+ */
+
+#pragma once
+
+#define CH_FREQUENCY                    1000
+
+#define CH_USE_HEAP                     TRUE
+#define CH_USE_DYNAMIC                  FALSE
+
+#if DEBUG
+#   define CH_OPTIMIZE_SPEED               FALSE
+#   define CH_DBG_SYSTEM_STATE_CHECK       TRUE
+#   define CH_DBG_ENABLE_CHECKS            TRUE
+#   define CH_DBG_ENABLE_ASSERTS           TRUE
+#   define CH_DBG_ENABLE_STACK_CHECK       TRUE
+#   define CH_DBG_FILL_THREADS             TRUE
+#   define CH_DBG_THREADS_PROFILING        TRUE
+#elif defined(RELEASE) && RELEASE
+#   define CH_DBG_THREADS_PROFILING        FALSE
+#else
+#   error "Invalid configuration: Either DEBUG or RELEASE must be true"
+#endif
+
+#define PORT_IDLE_THREAD_STACK_SIZE    64
+#define PORT_INT_REQUIRED_STACK        256
+
+#include <crdr_chibios/sys/chconf_tail.h>

libuavcan_drivers/stm32/test_stm32f107/src/sys/halconf.h

@@ -0,0 +1,32 @@
+/*
+ * Copyright (C) 2014 Pavel Kirienko <pavel.kirienko@gmail.com>
+ */
+
+#pragma once
+
+#include "mcuconf.h"
+
+#define HAL_USE_TM                  TRUE
+#define HAL_USE_PAL                 TRUE
+#define HAL_USE_ADC                 FALSE
+#define HAL_USE_CAN                 FALSE
+#define HAL_USE_DAC                 FALSE
+#define HAL_USE_EXT                 FALSE
+#define HAL_USE_GPT                 FALSE
+#define HAL_USE_I2C                 FALSE
+#define HAL_USE_ICU                 FALSE
+#define HAL_USE_MAC                 FALSE
+#define HAL_USE_MMC_SPI             FALSE
+#define HAL_USE_PWM                 FALSE
+#define HAL_USE_RTC                 FALSE
+#define HAL_USE_SDC                 FALSE
+#define HAL_USE_SERIAL              TRUE
+#define HAL_USE_SERIAL_USB          FALSE
+#define HAL_USE_SPI                 FALSE
+#define HAL_USE_UART                FALSE
+#define HAL_USE_USB                 FALSE
+
+#define SERIAL_DEFAULT_BITRATE      115200
+#define SERIAL_BUFFERS_SIZE         128
+
+#include <crdr_chibios/sys/halconf_tail.h>

libuavcan_drivers/stm32/test_stm32f107/src/sys/mcuconf.h

@@ -0,0 +1,191 @@
+/*
+ * STM32F107 drivers configuration.
+ * The following settings override the default settings present in
+ * the various device driver implementation headers.
+ * Note that the settings for each driver only have effect if the whole
+ * driver is enabled in halconf.h.
+ *
+ * IRQ priorities:
+ * 15...0       Lowest...Highest.
+ *
+ * DMA priorities:
+ * 0...3        Lowest...Highest.
+ */
+
+#define STM32F107_MCUCONF
+
+/*
+ * HAL driver system settings.
+ */
+#define STM32_NO_INIT                       FALSE
+#define STM32_HSI_ENABLED                   TRUE
+#define STM32_LSI_ENABLED                   TRUE
+#define STM32_HSE_ENABLED                   TRUE
+#define STM32_LSE_ENABLED                   FALSE
+#define STM32_SW                            STM32_SW_PLL
+#define STM32_PLLSRC                        STM32_PLLSRC_PREDIV1
+#define STM32_PREDIV1SRC                    STM32_PREDIV1SRC_PLL2
+#define STM32_PREDIV1_VALUE                 5
+#define STM32_PLLMUL_VALUE                  9
+#define STM32_PREDIV2_VALUE                 5
+#define STM32_PLL2MUL_VALUE                 8
+#define STM32_PLL3MUL_VALUE                 10
+#define STM32_HPRE                          STM32_HPRE_DIV1
+#define STM32_PPRE1                         STM32_PPRE1_DIV2
+#define STM32_PPRE2                         STM32_PPRE2_DIV2
+#define STM32_ADCPRE                        STM32_ADCPRE_DIV4
+#define STM32_OTG_CLOCK_REQUIRED            FALSE
+#define STM32_OTGFSPRE                      STM32_OTGFSPRE_DIV3
+#define STM32_I2S_CLOCK_REQUIRED            FALSE
+#define STM32_MCOSEL                        STM32_MCOSEL_PLL3
+#define STM32_RTCSEL                        STM32_RTCSEL_HSEDIV
+#define STM32_PVD_ENABLE                    FALSE
+#define STM32_PLS                           STM32_PLS_LEV0
+
+/*
+ * ADC driver system settings.
+ */
+#define STM32_ADC_USE_ADC1                  FALSE
+#define STM32_ADC_ADC1_DMA_PRIORITY         2
+#define STM32_ADC_ADC1_IRQ_PRIORITY         6
+
+/*
+ * CAN driver system settings.
+ */
+#define STM32_CAN_USE_CAN1                  FALSE
+#define STM32_CAN_USE_CAN2                  FALSE
+#define STM32_CAN_CAN1_IRQ_PRIORITY         4
+#define STM32_CAN_CAN2_IRQ_PRIORITY         4
+
+/*
+ * EXT driver system settings.
+ */
+#define STM32_EXT_EXTI0_IRQ_PRIORITY        6
+#define STM32_EXT_EXTI1_IRQ_PRIORITY        6
+#define STM32_EXT_EXTI2_IRQ_PRIORITY        6
+#define STM32_EXT_EXTI3_IRQ_PRIORITY        6
+#define STM32_EXT_EXTI4_IRQ_PRIORITY        6
+#define STM32_EXT_EXTI5_9_IRQ_PRIORITY      6
+#define STM32_EXT_EXTI10_15_IRQ_PRIORITY    6
+#define STM32_EXT_EXTI16_IRQ_PRIORITY       6
+#define STM32_EXT_EXTI17_IRQ_PRIORITY       6
+#define STM32_EXT_EXTI18_IRQ_PRIORITY       6
+#define STM32_EXT_EXTI19_IRQ_PRIORITY       6
+
+/*
+ * GPT driver system settings.
+ */
+#define STM32_GPT_USE_TIM1                  FALSE
+#define STM32_GPT_USE_TIM2                  FALSE
+#define STM32_GPT_USE_TIM3                  FALSE
+#define STM32_GPT_USE_TIM4                  FALSE
+#define STM32_GPT_USE_TIM5                  FALSE
+#define STM32_GPT_USE_TIM8                  FALSE
+#define STM32_GPT_TIM1_IRQ_PRIORITY         7
+#define STM32_GPT_TIM2_IRQ_PRIORITY         7
+#define STM32_GPT_TIM3_IRQ_PRIORITY         7
+#define STM32_GPT_TIM4_IRQ_PRIORITY         7
+#define STM32_GPT_TIM5_IRQ_PRIORITY         7
+#define STM32_GPT_TIM8_IRQ_PRIORITY         7
+
+/*
+ * I2C driver system settings.
+ */
+#define STM32_I2C_USE_I2C1                  FALSE
+#define STM32_I2C_USE_I2C2                  FALSE
+#define STM32_I2C_I2C1_IRQ_PRIORITY         5
+#define STM32_I2C_I2C2_IRQ_PRIORITY         5
+#define STM32_I2C_I2C1_DMA_PRIORITY         3
+#define STM32_I2C_I2C2_DMA_PRIORITY         3
+#define STM32_I2C_I2C1_DMA_ERROR_HOOK()     chSysHalt()
+#define STM32_I2C_I2C2_DMA_ERROR_HOOK()     chSysHalt()
+
+/*
+ * ICU driver system settings.
+ */
+#define STM32_ICU_USE_TIM1                  FALSE
+#define STM32_ICU_USE_TIM2                  FALSE
+#define STM32_ICU_USE_TIM3                  FALSE
+#define STM32_ICU_USE_TIM4                  FALSE
+#define STM32_ICU_USE_TIM5                  FALSE
+#define STM32_ICU_USE_TIM8                  FALSE
+#define STM32_ICU_TIM1_IRQ_PRIORITY         7
+#define STM32_ICU_TIM2_IRQ_PRIORITY         7
+#define STM32_ICU_TIM3_IRQ_PRIORITY         7
+#define STM32_ICU_TIM4_IRQ_PRIORITY         7
+#define STM32_ICU_TIM5_IRQ_PRIORITY         7
+#define STM32_ICU_TIM8_IRQ_PRIORITY         7
+
+/*
+ * PWM driver system settings.
+ */
+#define STM32_PWM_USE_ADVANCED              FALSE
+#define STM32_PWM_USE_TIM1                  TRUE
+#define STM32_PWM_USE_TIM2                  FALSE
+#define STM32_PWM_USE_TIM3                  FALSE
+#define STM32_PWM_USE_TIM4                  FALSE
+#define STM32_PWM_USE_TIM5                  FALSE
+#define STM32_PWM_USE_TIM8                  FALSE
+#define STM32_PWM_TIM1_IRQ_PRIORITY         7
+#define STM32_PWM_TIM2_IRQ_PRIORITY         7
+#define STM32_PWM_TIM3_IRQ_PRIORITY         7
+#define STM32_PWM_TIM4_IRQ_PRIORITY         7
+#define STM32_PWM_TIM5_IRQ_PRIORITY         7
+#define STM32_PWM_TIM8_IRQ_PRIORITY         7
+
+/*
+ * RTC driver system settings.
+ */
+#define STM32_RTC_IRQ_PRIORITY              15
+
+/*
+ * SERIAL driver system settings.
+ */
+#define STM32_SERIAL_USE_USART1             FALSE
+#define STM32_SERIAL_USE_USART2             TRUE
+#define STM32_SERIAL_USE_USART3             FALSE
+#define STM32_SERIAL_USE_UART4              FALSE
+#define STM32_SERIAL_USE_UART5              FALSE
+#define STM32_SERIAL_USART1_PRIORITY        12
+#define STM32_SERIAL_USART2_PRIORITY        12
+#define STM32_SERIAL_USART3_PRIORITY        12
+#define STM32_SERIAL_UART4_PRIORITY         12
+#define STM32_SERIAL_UART5_PRIORITY         12
+
+/*
+ * SPI driver system settings.
+ */
+#define STM32_SPI_USE_SPI1                  FALSE
+#define STM32_SPI_USE_SPI2                  FALSE
+#define STM32_SPI_USE_SPI3                  FALSE
+#define STM32_SPI_SPI1_DMA_PRIORITY         1
+#define STM32_SPI_SPI2_DMA_PRIORITY         1
+#define STM32_SPI_SPI3_DMA_PRIORITY         1
+#define STM32_SPI_SPI1_IRQ_PRIORITY         10
+#define STM32_SPI_SPI2_IRQ_PRIORITY         10
+#define STM32_SPI_SPI3_IRQ_PRIORITY         10
+#define STM32_SPI_DMA_ERROR_HOOK(spip)      chSysHalt()
+
+/*
+ * UART driver system settings.
+ */
+#define STM32_UART_USE_USART1               FALSE
+#define STM32_UART_USE_USART2               FALSE
+#define STM32_UART_USE_USART3               FALSE
+#define STM32_UART_USART1_IRQ_PRIORITY      12
+#define STM32_UART_USART2_IRQ_PRIORITY      12
+#define STM32_UART_USART3_IRQ_PRIORITY      12
+#define STM32_UART_USART1_DMA_PRIORITY      0
+#define STM32_UART_USART2_DMA_PRIORITY      0
+#define STM32_UART_USART3_DMA_PRIORITY      0
+#define STM32_UART_DMA_ERROR_HOOK(uartp)    chSysHalt()
+
+/*
+ * USB driver system settings.
+ */
+#define STM32_USB_USE_OTG1                  FALSE
+#define STM32_USB_OTG1_IRQ_PRIORITY         14
+#define STM32_USB_OTG1_RX_FIFO_SIZE         512
+#define STM32_USB_OTG_THREAD_PRIO           LOWPRIO
+#define STM32_USB_OTG_THREAD_STACK_SIZE     128
+#define STM32_USB_OTGFIFO_FILL_BASEPRI      0