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fmu-v5: fix timer config
This commit is contained in:
committed by
David Sidrane
parent
a00441ecf4
commit
ada48571d7
@@ -82,26 +82,25 @@ __EXPORT const io_timers_t io_timers[MAX_IO_TIMERS] = {
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.handler = io_timer_handler2,
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.vectorno = STM32_IRQ_TIM12,
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},
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{
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.base = STM32_TIM2_BASE,
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.clock_register = STM32_RCC_APB1ENR,
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.clock_bit = RCC_APB1ENR_TIM2EN,
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.clock_freq = STM32_APB1_TIM2_CLKIN,
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.first_channel_index = 8,
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.last_channel_index = 10,
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.handler = io_timer_handler3,
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.vectorno = STM32_IRQ_TIM2,
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},
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{
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.base = STM32_TIM9_BASE,
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.clock_register = STM32_RCC_APB2ENR,
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.clock_bit = RCC_APB2ENR_TIM9EN,
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.clock_freq = STM32_APB2_TIM9_CLKIN,
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.first_channel_index = 8,
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.last_channel_index = 8,
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.handler = io_timer_handler3,
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.vectorno = STM32_IRQ_TIM9,
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},
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{
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.base = STM32_TIM2_BASE,
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.clock_register = STM32_RCC_APB1ENR,
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.clock_bit = RCC_APB2ENR_TIM2EN,
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.clock_freq = STM32_APB2_TIM2_CLKIN,
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.first_channel_index = 9,
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.last_channel_index = 9,
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.first_channel_index = 11,
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.last_channel_index = 11,
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.handler = io_timer_handler4,
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.vectorno = STM32_IRQ_TIM2,
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.vectorno = STM32_IRQ_TIM9,
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}
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};
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@@ -232,6 +232,12 @@ int io_timer_handler3(int irq, void *context)
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}
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int io_timer_handler4(int irq, void *context)
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{
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return io_timer_handler(4);
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}
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static inline int validate_timer_index(unsigned timer)
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{
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return (timer < MAX_IO_TIMERS && io_timers[timer].base != 0) ? 0 : -EINVAL;
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@@ -45,7 +45,7 @@
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#pragma once
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__BEGIN_DECLS
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/* configuration limits */
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#define MAX_IO_TIMERS 4
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#define MAX_IO_TIMERS 5
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#define MAX_TIMER_IO_CHANNELS 8
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#define MAX_LED_TIMERS 2
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@@ -112,6 +112,7 @@ __EXPORT int io_timer_handler0(int irq, void *context);
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__EXPORT int io_timer_handler1(int irq, void *context);
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__EXPORT int io_timer_handler2(int irq, void *context);
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__EXPORT int io_timer_handler3(int irq, void *context);
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__EXPORT int io_timer_handler4(int irq, void *context);
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__EXPORT int io_timer_channel_init(unsigned channel, io_timer_channel_mode_t mode,
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channel_handler_t channel_handler, void *context);
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