Intial Commit NXP FMURT1170

nxp/rt117x:Fix Pin IRQ

nxp/rt117x:Support 4 i2c busses

nxp/rt117x:Add px4io_serial support

nxp/imxrt:Expand ToneAlarmInterface to GPT 3 & 4

nxp_fmurt1170-v1:Using imxrt_flexspi_nor_octal

nxp_fmurt1170-v1:Entry is start

nxp_fmurt1170-v1:Add Proper MTD

nxp_fmurt1170-v1:Set I2C Buses

nxp_fmurt1170-v1:Proper SPI usage

nxpfmurt1170-v1:Adjust memory Map to use the 2 MB

nxp_fmurt1170:Bring in ROMAPI

nxp_fmurt1170-v1:Push FLASH to 200Mhz

nxp_fmurt1170-v1:Use BOARD_I2C_LATEINIT

nxp_fmurt1170-v1:Clock Config remove unused devices

nxp_fmurt1170-v1:Remove EVK SDRAM IO

nxp_fmurt1170-v1:Enable SE550 using HW_VER_REV_DRIVE

nxp_fmurt1170-v1:Use MTD to mount FRAM on Flex SPI

nxp_fmurt1170-v1:Manifest

nxpi_fmurt1170-v1:Restore board_peripheral_reset

nxp_fmurt1170-v1:Set I2C buss Interna/Externa and startup

nxp/rt117x:Set 6 I2C busses

nxp_fmurt1170-v1:Correct Clock Sources and Freqency Settings

nxp_fmurt1170-v1:Correct ADC Settings

Tune FlexSPI config and sync header with debug variant Linker prep for rodata ahb partitioning

FlexSPI prefetch partition split .text and .rodata

   Current config
     1KB Prefetch .rodata
     3KB Prefetch .text

nxp_fmurt1170-v1:Run imxrt_flash_setup_prefetch_partition from ram with barriers

nxp_fmurt1170-v1:Use All OCTL setting from FLASH g_flash_config SANS lookupTable

Octal spi boot/debug problem bypass

nxp_fmurt1170-v1:Add PWM test

Fix clockconfig and USB vbus sense

fmurt1170-v1: Use TCM

nxp_fmurt1170-v1: Ethernet bringup

imxrt: use unique_id register for board_identity

fmurt7: update ITCM mapping, todo proper trap on pc hitting 0x0

fmurt7: correct rotation icm42688p onboard imu

rt117x: Add SSARC HP RAM driver for memory dumps

nxp_fmurt1170-v1: Enable hardfault_log

nxp_fmurt1170-v1: Enable DMA pool

fmurt1170-v1: fix uart mapping

nxp_fmurt1170-v1: enable SocketCAN & DroneCAN

nxp_fmurt1170-v1:Command line history TAB completion

nxp_fmurt1170-v1:Fix pinning duplication

nxp_fmurt1170-v1:Support conditional PHY address based on selected PHY

nxp_fmurt1170-v1:Add Pull Downs on CTS, use GPIO for RTS

nxp_fmurt1170-v1:Set TelemN TX Slew rate and Drive Strenth to max

nxp_fmurt1170-v:Set TELEM Buffers add HW HS

nxp_fmurt1170-v1:Turn off DMA poll

nxp_fmurt1170-v1:RC_SERIAL_PORT needed to be px4io to disable rc_input using TELEM2!

imxrt1170 bootloader (#22228)

* imxrt:Add bootloader support
* bootloader:imxrt clear BOOT_RTC_SIGNATURE
* nxp_fmurt1170-v1:Add bootloader
* nxp_fmurt1170-v1:bootloader removed ADC
* nxp_fmurt1170-v1:bootloader base bootloader script off of script.ld
* nxp_fmurt1170-v1:add _bootdelay_signature & change entry from 0x30000000 to 0x30040000
* fmurt1170-v1:hw_config Bootloader has to have 12 bytes

nxp_fmurt1170-v1:Default to use LAN8742A PHY
This commit is contained in:
David Sidrane
2023-10-25 04:06:39 -07:00
parent 8f48b6acda
commit ad00e02c3c
68 changed files with 11126 additions and 237 deletions
+22 -10
View File
@@ -294,13 +294,13 @@ void
jump_to_app()
{
const uint32_t *app_base = (const uint32_t *)APP_LOAD_ADDRESS;
const uint32_t *vec_base = (const uint32_t *)app_base;
const uint32_t *vec_base = (const uint32_t *)app_base + APP_VECTOR_OFFSET;
/*
* We refuse to program the first word of the app until the upload is marked
* complete by the host. So if it's not 0xffffffff, we should try booting it.
*/
if (app_base[0] == 0xffffffff) {
if (app_base[APP_VECTOR_OFFSET_WORDS] == 0xffffffff) {
return;
}
@@ -382,11 +382,11 @@ jump_to_app()
* The second word of the app is the entrypoint; it must point within the
* flash area (or we have a bad flash).
*/
if (app_base[1] < APP_LOAD_ADDRESS) {
if (app_base[APP_VECTOR_OFFSET_WORDS + 1] < APP_LOAD_ADDRESS) {
return;
}
if (app_base[1] >= (APP_LOAD_ADDRESS + board_info.fw_size)) {
if (app_base[APP_VECTOR_OFFSET_WORDS + 1] >= (APP_LOAD_ADDRESS + board_info.fw_size)) {
return;
}
@@ -816,15 +816,17 @@ bootloader(unsigned timeout)
goto cmd_bad;
}
if (address == 0) {
#if APP_VECTOR_OFFSET == 0
#if defined(TARGET_HW_PX4_FMU_V4)
if (address == APP_VECTOR_OFFSET) {
# if defined(TARGET_HW_PX4_FMU_V4)
if (check_silicon()) {
goto bad_silicon;
}
#endif
# endif
// save the first word and don't program it until everything else is done
first_word = flash_buffer.w[0];
@@ -832,10 +834,20 @@ bootloader(unsigned timeout)
flash_buffer.w[0] = 0xffffffff;
}
#endif
arg /= 4;
for (int i = 0; i < arg; i++) {
#if APP_VECTOR_OFFSET != 0
if (address == APP_VECTOR_OFFSET) {
// save the first word from vector table and don't program it until everything else is done
first_word = flash_buffer.w[i];
// replace first word with bits we can overwrite later
flash_buffer.w[i] = 0xffffffff;
}
#endif
// program the word
flash_func_write_word(address, flash_buffer.w[i]);
@@ -869,7 +881,7 @@ bootloader(unsigned timeout)
for (unsigned p = 0; p < board_info.fw_size; p += 4) {
uint32_t bytes;
if ((p == 0) && (first_word != 0xffffffff)) {
if ((p == APP_VECTOR_OFFSET) && (first_word != 0xffffffff)) {
bytes = first_word;
} else {
@@ -1032,9 +1044,9 @@ bootloader(unsigned timeout)
// program the deferred first word
if (first_word != 0xffffffff) {
flash_func_write_word(0, first_word);
flash_func_write_word(APP_VECTOR_OFFSET, first_word);
if (flash_func_read_word(0) != first_word) {
if (flash_func_read_word(APP_VECTOR_OFFSET) != first_word) {
goto cmd_fail;
}
@@ -129,3 +129,8 @@ extern void cinit(void *config, uint8_t interface);
extern void cfini(void);
extern int cin(uint32_t devices);
extern void cout(uint8_t *buf, unsigned len);
#if !defined(APP_VECTOR_OFFSET)
# define APP_VECTOR_OFFSET 0
#endif
#define APP_VECTOR_OFFSET_WORDS (APP_VECTOR_OFFSET/sizeof(uint32_t))
@@ -32,10 +32,13 @@
****************************************************************************/
#include <string.h>
#include "flash_cache.h"
#include "hw_config.h"
#include "bl.h"
#include <nuttx/progmem.h>
extern ssize_t arch_flash_write(uintptr_t address, const void *buffer, size_t buflen);
@@ -54,7 +57,7 @@ inline void fc_reset(void)
fcl_reset(&flash_cache[w]);
}
flash_cache[0].start_address = APP_LOAD_ADDRESS;
flash_cache[0].start_address = APP_LOAD_ADDRESS + APP_VECTOR_OFFSET;
}
static inline flash_cache_line_t *fc_line_select(uintptr_t address)
@@ -104,7 +107,7 @@ int fc_write(uintptr_t address, uint32_t word)
// Are we back writing the first word?
if (fc == &flash_cache[0] && index == 0 && fc->index == 7) {
if (fc == &flash_cache[0] && index == 0 && fc->index == FC_LAST_WORD) {
if (fc_is_dirty(fc1)) {
@@ -46,10 +46,15 @@
* *writes to the first 8 words of flash at APP_LOAD_ADDRESS
* are buffered until the "first word" is written with the real value (not 0xffffffff)
*
* On a imxrt the ROM API supports 256 byte writes.
*/
#define FC_NUMBER_LINES 2 // Number of cache lines.
#if defined(CONFIG_ARCH_CHIP_IMXRT)
#define FC_NUMBER_WORDS 64 // Number of words per page
#else
#define FC_NUMBER_WORDS 8 // Number of words per cache line.
#endif
#define FC_NUMBER_LINES 2 // Number of cache lines.
#define FC_LAST_WORD FC_NUMBER_WORDS-1 // The index of the last word in cache line.
#define FC_ADDRESS_MASK ~(sizeof(flash_cache[0].words)-1) // Cache tag from address
#define FC_ADDR2INDX(a) (((a) / sizeof(flash_cache[0].words[0])) % FC_NUMBER_WORDS) // index from address