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px4nucleoF767ZI-v1 Refreshed nuttx SDIO changes for 7.19+

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This commit is contained in:
David Sidrane 2017-01-31 11:11:04 -10:00 committed by Daniel Agar
parent f9aa9f29e3
commit 91f14435d7
2 changed files with 6 additions and 4 deletions
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4
nuttx-configs/px4nucleoF767ZI-v1/include/board.h
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@ -228,7 +228,7 @@
* DMA OFF: SDMMCCLK=48MHz, SDMMC_CK=SDMMCCLK/(2+2)=12 MHz
*/
#ifdef CONFIG_SDIO_DMA
#ifdef CONFIG_STM32_SDIO_DMA
# define STM32_SDMMC_MMCXFR_CLKDIV (1 << STM32_SDMMC_CLKCR_CLKDIV_SHIFT)
#else
# define STM32_SDMMC_MMCXFR_CLKDIV (2 << STM32_SDMMC_CLKCR_CLKDIV_SHIFT)
@ -239,7 +239,7 @@
*/
//TODO #warning "Check Freq for 24mHz"
#ifdef CONFIG_SDIO_DMA
#ifdef CONFIG_STM32_SDIO_DMA
# define STM32_SDMMC_SDXFR_CLKDIV (1 << STM32_SDMMC_CLKCR_CLKDIV_SHIFT)
#else
# define STM32_SDMMC_SDXFR_CLKDIV (2 << STM32_SDMMC_CLKCR_CLKDIV_SHIFT)

6
nuttx-configs/px4nucleoF767ZI-v1/nsh/defconfig
View File

@ -393,9 +393,9 @@ CONFIG_STM32F7_SDMMC_DMA=y
#
# SDMMC1 Configuration
#
CONFIG_SDMMC1_DMA=y
CONFIG_SDMMC1_DMAPRIO=0x00010000
CONFIG_STM32F7_SDMMC1_DMAPRIO=0x00010000
# CONFIG_SDMMC1_WIDTH_D1_ONLY is not set
# CONFIG_SDMMC2_WIDTH_D1_ONLY is not set
CONFIG_STM32F7_BBSRAM=y
CONFIG_STM32F7_BBSRAM_FILES=5
CONFIG_STM32F7_SAVE_CRASHDUMP=y
@ -729,11 +729,13 @@ CONFIG_MMCSD_MULTIBLOCK_DISABLE=y
# CONFIG_MMCSD_HAVECARDDETECT is not set
# CONFIG_MMCSD_SPI is not set
CONFIG_ARCH_HAVE_SDIO=y
CONFIG_SDIO_DMA=y
CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE=y
CONFIG_MMCSD_SDIO=y
CONFIG_SDIO_PREFLIGHT=y
# CONFIG_SDIO_MUXBUS is not set
CONFIG_MMCSD_SDIOWAIT_WRCOMPLETE=y
# CONFIG_SDIO_WIDTH_D1_ONLY is not set
# CONFIG_SDIO_BLOCKSETUP is not set
# CONFIG_MODEM is not set
CONFIG_MTD=y