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Update I/O for revB

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This commit is contained in:
Peter van der Perk
2025-05-23 09:11:56 +02:00
parent 2d52a8d7bb
commit 78d44cb331
4 changed files with 17 additions and 8 deletions
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boards/nxp/mr-tropic/nuttx-config/include/board.h
+8 -2
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@@ -319,9 +319,9 @@
#define GPIO_LPUART3_RTS (GPIO_PORT1 | GPIO_PIN21 | GPIO_OUTPUT | GPIO_OUTPUT_ZERO | IOMUX_UART_DEFAULT) /* GPIO_AD_B1_05 GPIO1_IO21 (GPIO only, no HW Flow control) */
//TODO check RT7 partial HW handshake
/* RC INPUT single wire mode on TX, RX is not used */
/* RC INPUT single wire mode on Input on TX, for CRSF use TX and RX */
#define GPIO_LPUART8_RX (GPIO_LPUART8_RX_2 | LPUART_IOMUX) /* WRONG!! */
#define GPIO_LPUART8_RX (GPIO_LPUART8_RX_1 | LPUART_IOMUX) /* GPIO_AD_B1_11 */
#define GPIO_LPUART8_TX (GPIO_LPUART8_TX_1 | LPUART_IOMUX) /* GPIO_AD_B1_10 */
/* CAN
@@ -360,6 +360,12 @@
#define GPIO_LPI2C1_SDA_RESET (GPIO_PORT1 | GPIO_PIN17 | GPIO_OUTPUT | GPIO_OUTPUT_ONE | LPI2C_IO_IOMUX) /* GPIO_AD_B1_01 GPIO1_IO17 */
#define GPIO_LPI2C1_SCL_RESET (GPIO_PORT1 | GPIO_PIN16 | GPIO_OUTPUT | GPIO_OUTPUT_ONE | LPI2C_IO_IOMUX) /* GPIO_AD_B1_00 GPIO1_IO16 */
#define GPIO_LPI2C3_SDA (GPIO_LPI2C3_SDA_2 | LPI2C_IOMUX) /* GPIO_EMC_21 */
#define GPIO_LPI2C3_SCL (GPIO_LPI2C3_SCL_2 | LPI2C_IOMUX) /* GPIO_EMC_22 */
#define GPIO_LPI2C3_SDA_RESET (GPIO_PORT4 | GPIO_PIN21 | GPIO_OUTPUT | GPIO_OUTPUT_ONE | LPI2C_IO_IOMUX) /* GPIO_EMC_21 */
#define GPIO_LPI2C3_SCL_RESET (GPIO_PORT4 | GPIO_PIN22 | GPIO_OUTPUT | GPIO_OUTPUT_ONE | LPI2C_IO_IOMUX) /* GPIO_EMC_22 */
#define GPIO_LPI2C4_SDA (GPIO_LPI2C4_SDA_1 | LPI2C_IOMUX) /* GPIO_AD_B0_13 */
#define GPIO_LPI2C4_SCL (GPIO_LPI2C4_SCL_1 | LPI2C_IOMUX) /* GPIO_AD_B0_12 */
boards/nxp/mr-tropic/nuttx-config/nsh/defconfig
+2
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@@ -92,6 +92,7 @@ CONFIG_IMXRT_GPIO_IRQ=y
CONFIG_IMXRT_INIT_FLEXRAM=y
CONFIG_IMXRT_ITCM=384
CONFIG_IMXRT_LPI2C1=y
CONFIG_IMXRT_LPI2C3=y
CONFIG_IMXRT_LPI2C4=y
CONFIG_IMXRT_LPI2C_DMA=y
CONFIG_IMXRT_LPI2C_DMA_MAXMSG=16
@@ -125,6 +126,7 @@ CONFIG_IPCFG_PATH="/fs/nor"
CONFIG_LIBC_MAX_EXITFUNS=1
CONFIG_LIBC_STRERROR=y
CONFIG_LPI2C1_DMA=y
CONFIG_LPI2C3_DMA=y
CONFIG_LPI2C4_DMA=y
CONFIG_LPUART2_RXDMA=y
CONFIG_LPUART2_TXDMA=y
boards/nxp/mr-tropic/src/board_config.h
+6 -6
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@@ -120,11 +120,11 @@
/* Define GPIO pins used as ADC N.B. Channel numbers are for reference, */
#define PX4_ADC_GPIO \
/* ADC_5V_RAIL_SENSE GPIO_AD_B1_11 GPIO1 Pin 27 */ ADC1_GPIO(0, 27)
/* ADC_5V_RAIL_SENSE GPIO_AD_B1_08 GPIO1 Pin 24 */ ADC1_GPIO(0, 24)
/* Define Channel numbers must match above GPIO pin IN(n)*/
#define ADC_5V_RAIL_SENSE /* GPIO_AD_B1_11 GPIO1 Pin 27 */ ADC1_CH(0)
#define ADC_5V_RAIL_SENSE /* GPIO_AD_B1_08 GPIO1 Pin 24 */ ADC1_CH(13)
#define ADC_CHANNELS (1 << ADC_5V_RAIL_SENSE)
@@ -165,13 +165,13 @@
//FIXME FlexPWM TONE DRIVER
#define TONE_ALARM_FLEXPWM PWMA_VAL
#define TONE_ALARM_TIMER 3 /* FlexPWM 3 */
#define TONE_ALARM_CHANNEL 1 /* GPIO_EMC_31 PWM3_PWMA01 */
#define TONE_ALARM_TIMER 1 /* FlexPWM 3 */
#define TONE_ALARM_CHANNEL 0 /* GPIO_EMC_23 PWM1_PWMA00 */
#define GPIO_BUZZER_1 /* GPIO_EMC_31 GPIO4_IO31 */ (GPIO_PORT4 | GPIO_PIN31 | GPIO_OUTPUT | GPIO_OUTPUT_ZERO | GENERAL_OUTPUT_IOMUX)
#define GPIO_BUZZER_1 /* GPIO_EMC_23 GPIO4_IO23 */ (GPIO_PORT4 | GPIO_PIN23 | GPIO_OUTPUT | GPIO_OUTPUT_ZERO | GENERAL_OUTPUT_IOMUX)
#define GPIO_TONE_ALARM_IDLE GPIO_BUZZER_1
#define GPIO_TONE_ALARM (GPIO_FLEXPWM3_PWMA01_1 | GENERAL_OUTPUT_IOMUX)
#define GPIO_TONE_ALARM (GPIO_FLEXPWM1_PWMA00_1 | GENERAL_OUTPUT_IOMUX)
/* USB OTG FS
*
boards/nxp/mr-tropic/src/i2c.cpp
+1
View File
@@ -35,5 +35,6 @@
constexpr px4_i2c_bus_t px4_i2c_buses[I2C_BUS_MAX_BUS_ITEMS] = {
initI2CBusExternal(1),
initI2CBusInternal(3),
initI2CBusInternal(4),
};