Updated PX4 use / API of low level GPIO and other hardware-centric system facilities

This commit is contained in:
Lorenz Meier
2016-05-28 14:56:17 +02:00
parent c2e2645c82
commit 7398164fcc
89 changed files with 1294 additions and 1087 deletions
+2 -2
View File
@@ -542,7 +542,7 @@ ppm_input(uint16_t *values, uint16_t *num_values, uint16_t *frame_len)
}
/* avoid racing with PPM updates */
irqstate_t state = irqsave();
irqstate_t state = px4_enter_critical_section();
/*
* If we have received a new PPM frame within the last 200ms, accept it
@@ -571,7 +571,7 @@ ppm_input(uint16_t *values, uint16_t *num_values, uint16_t *frame_len)
result = (*num_values > 0);
}
irqrestore(state);
px4_leave_critical_section(state);
return result;
}
+4 -4
View File
@@ -112,8 +112,8 @@ interface_init(void)
modifyreg32(STM32_RCC_APB1RSTR, RCC_APB1RSTR_I2C1RST, 0);
/* configure the i2c GPIOs */
stm32_configgpio(GPIO_I2C1_SCL);
stm32_configgpio(GPIO_I2C1_SDA);
px4_arch_configgpio(GPIO_I2C1_SCL);
px4_arch_configgpio(GPIO_I2C1_SDA);
/* soft-reset the block */
rCR1 |= I2C_CR1_SWRST;
@@ -301,12 +301,12 @@ i2c_rx_complete(void)
}
/* disable interrupts while reconfiguring DMA for the selected registers */
irqstate_t flags = irqsave();
irqstate_t flags = px4_enter_critical_section();
stm32_dmastop(tx_dma);
i2c_tx_setup();
irqrestore(flags);
px4_leave_critical_section(flags);
}
}
+14 -14
View File
@@ -151,22 +151,22 @@ extern pwm_limit_t pwm_limit;
/*
* GPIO handling.
*/
#define LED_BLUE(_s) stm32_gpiowrite(GPIO_LED1, !(_s))
#define LED_AMBER(_s) stm32_gpiowrite(GPIO_LED2, !(_s))
#define LED_SAFETY(_s) stm32_gpiowrite(GPIO_LED3, !(_s))
#define LED_RING(_s) stm32_gpiowrite(GPIO_LED4, (_s))
#define LED_BLUE(_s) px4_arch_gpiowrite(GPIO_LED1, !(_s))
#define LED_AMBER(_s) px4_arch_gpiowrite(GPIO_LED2, !(_s))
#define LED_SAFETY(_s) px4_arch_gpiowrite(GPIO_LED3, !(_s))
#define LED_RING(_s) px4_arch_gpiowrite(GPIO_LED4, (_s))
#ifdef CONFIG_ARCH_BOARD_PX4IO_V1
# define PX4IO_RELAY_CHANNELS 4
# define POWER_SERVO(_s) stm32_gpiowrite(GPIO_SERVO_PWR_EN, (_s))
# define POWER_ACC1(_s) stm32_gpiowrite(GPIO_ACC1_PWR_EN, (_s))
# define POWER_ACC2(_s) stm32_gpiowrite(GPIO_ACC2_PWR_EN, (_s))
# define POWER_RELAY1(_s) stm32_gpiowrite(GPIO_RELAY1_EN, (_s))
# define POWER_RELAY2(_s) stm32_gpiowrite(GPIO_RELAY2_EN, (_s))
# define POWER_SERVO(_s) px4_arch_gpiowrite(GPIO_SERVO_PWR_EN, (_s))
# define POWER_ACC1(_s) px4_arch_gpiowrite(GPIO_ACC1_PWR_EN, (_s))
# define POWER_ACC2(_s) px4_arch_gpiowrite(GPIO_ACC2_PWR_EN, (_s))
# define POWER_RELAY1(_s) px4_arch_gpiowrite(GPIO_RELAY1_EN, (_s))
# define POWER_RELAY2(_s) px4_arch_gpiowrite(GPIO_RELAY2_EN, (_s))
# define OVERCURRENT_ACC (!stm32_gpioread(GPIO_ACC_OC_DETECT))
# define OVERCURRENT_SERVO (!stm32_gpioread(GPIO_SERVO_OC_DETECT))
# define OVERCURRENT_ACC (!px4_arch_gpioread(GPIO_ACC_OC_DETECT))
# define OVERCURRENT_SERVO (!px4_arch_gpioread(GPIO_SERVO_OC_DETECT))
# define PX4IO_ADC_CHANNEL_COUNT 2
# define ADC_VBATT 4
@@ -177,9 +177,9 @@ extern pwm_limit_t pwm_limit;
#ifdef CONFIG_ARCH_BOARD_PX4IO_V2
# define PX4IO_RELAY_CHANNELS 0
# define ENABLE_SBUS_OUT(_s) stm32_gpiowrite(GPIO_SBUS_OENABLE, !(_s))
# define ENABLE_SBUS_OUT(_s) px4_arch_gpiowrite(GPIO_SBUS_OENABLE, !(_s))
# define VDD_SERVO_FAULT (!stm32_gpioread(GPIO_SERVO_FAULT_DETECT))
# define VDD_SERVO_FAULT (!px4_arch_gpioread(GPIO_SERVO_FAULT_DETECT))
# define PX4IO_ADC_CHANNEL_COUNT 2
# define ADC_VSERVO 4
@@ -187,7 +187,7 @@ extern pwm_limit_t pwm_limit;
#endif
#define BUTTON_SAFETY stm32_gpioread(GPIO_BTN_SAFETY)
#define BUTTON_SAFETY px4_arch_gpioread(GPIO_BTN_SAFETY)
#define CONTROL_PAGE_INDEX(_group, _channel) (_group * PX4IO_CONTROL_CHANNELS + _channel)
+2 -2
View File
@@ -104,8 +104,8 @@ interface_init(void)
rx_dma = stm32_dmachannel(PX4FMU_SERIAL_RX_DMA);
/* configure pins for serial use */
stm32_configgpio(PX4FMU_SERIAL_TX_GPIO);
stm32_configgpio(PX4FMU_SERIAL_RX_GPIO);
px4_arch_configgpio(PX4FMU_SERIAL_TX_GPIO);
px4_arch_configgpio(PX4FMU_SERIAL_RX_GPIO);
/* reset and configure the UART */
rCR1 = 0;