mirror of
https://gitee.com/mirrors_PX4/PX4-Autopilot.git
synced 2026-10-24 17:03:33 +08:00
Updated PX4 use / API of low level GPIO and other hardware-centric system facilities
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@@ -542,7 +542,7 @@ ppm_input(uint16_t *values, uint16_t *num_values, uint16_t *frame_len)
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}
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/* avoid racing with PPM updates */
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irqstate_t state = irqsave();
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irqstate_t state = px4_enter_critical_section();
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/*
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* If we have received a new PPM frame within the last 200ms, accept it
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@@ -571,7 +571,7 @@ ppm_input(uint16_t *values, uint16_t *num_values, uint16_t *frame_len)
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result = (*num_values > 0);
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}
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irqrestore(state);
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px4_leave_critical_section(state);
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return result;
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}
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@@ -112,8 +112,8 @@ interface_init(void)
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modifyreg32(STM32_RCC_APB1RSTR, RCC_APB1RSTR_I2C1RST, 0);
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/* configure the i2c GPIOs */
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stm32_configgpio(GPIO_I2C1_SCL);
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stm32_configgpio(GPIO_I2C1_SDA);
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px4_arch_configgpio(GPIO_I2C1_SCL);
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px4_arch_configgpio(GPIO_I2C1_SDA);
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/* soft-reset the block */
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rCR1 |= I2C_CR1_SWRST;
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@@ -301,12 +301,12 @@ i2c_rx_complete(void)
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}
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/* disable interrupts while reconfiguring DMA for the selected registers */
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irqstate_t flags = irqsave();
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irqstate_t flags = px4_enter_critical_section();
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stm32_dmastop(tx_dma);
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i2c_tx_setup();
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irqrestore(flags);
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px4_leave_critical_section(flags);
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}
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}
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@@ -151,22 +151,22 @@ extern pwm_limit_t pwm_limit;
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/*
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* GPIO handling.
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*/
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#define LED_BLUE(_s) stm32_gpiowrite(GPIO_LED1, !(_s))
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#define LED_AMBER(_s) stm32_gpiowrite(GPIO_LED2, !(_s))
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#define LED_SAFETY(_s) stm32_gpiowrite(GPIO_LED3, !(_s))
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#define LED_RING(_s) stm32_gpiowrite(GPIO_LED4, (_s))
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#define LED_BLUE(_s) px4_arch_gpiowrite(GPIO_LED1, !(_s))
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#define LED_AMBER(_s) px4_arch_gpiowrite(GPIO_LED2, !(_s))
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#define LED_SAFETY(_s) px4_arch_gpiowrite(GPIO_LED3, !(_s))
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#define LED_RING(_s) px4_arch_gpiowrite(GPIO_LED4, (_s))
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#ifdef CONFIG_ARCH_BOARD_PX4IO_V1
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# define PX4IO_RELAY_CHANNELS 4
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# define POWER_SERVO(_s) stm32_gpiowrite(GPIO_SERVO_PWR_EN, (_s))
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# define POWER_ACC1(_s) stm32_gpiowrite(GPIO_ACC1_PWR_EN, (_s))
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# define POWER_ACC2(_s) stm32_gpiowrite(GPIO_ACC2_PWR_EN, (_s))
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# define POWER_RELAY1(_s) stm32_gpiowrite(GPIO_RELAY1_EN, (_s))
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# define POWER_RELAY2(_s) stm32_gpiowrite(GPIO_RELAY2_EN, (_s))
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# define POWER_SERVO(_s) px4_arch_gpiowrite(GPIO_SERVO_PWR_EN, (_s))
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# define POWER_ACC1(_s) px4_arch_gpiowrite(GPIO_ACC1_PWR_EN, (_s))
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# define POWER_ACC2(_s) px4_arch_gpiowrite(GPIO_ACC2_PWR_EN, (_s))
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# define POWER_RELAY1(_s) px4_arch_gpiowrite(GPIO_RELAY1_EN, (_s))
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# define POWER_RELAY2(_s) px4_arch_gpiowrite(GPIO_RELAY2_EN, (_s))
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# define OVERCURRENT_ACC (!stm32_gpioread(GPIO_ACC_OC_DETECT))
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# define OVERCURRENT_SERVO (!stm32_gpioread(GPIO_SERVO_OC_DETECT))
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# define OVERCURRENT_ACC (!px4_arch_gpioread(GPIO_ACC_OC_DETECT))
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# define OVERCURRENT_SERVO (!px4_arch_gpioread(GPIO_SERVO_OC_DETECT))
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# define PX4IO_ADC_CHANNEL_COUNT 2
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# define ADC_VBATT 4
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@@ -177,9 +177,9 @@ extern pwm_limit_t pwm_limit;
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#ifdef CONFIG_ARCH_BOARD_PX4IO_V2
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# define PX4IO_RELAY_CHANNELS 0
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# define ENABLE_SBUS_OUT(_s) stm32_gpiowrite(GPIO_SBUS_OENABLE, !(_s))
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# define ENABLE_SBUS_OUT(_s) px4_arch_gpiowrite(GPIO_SBUS_OENABLE, !(_s))
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# define VDD_SERVO_FAULT (!stm32_gpioread(GPIO_SERVO_FAULT_DETECT))
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# define VDD_SERVO_FAULT (!px4_arch_gpioread(GPIO_SERVO_FAULT_DETECT))
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# define PX4IO_ADC_CHANNEL_COUNT 2
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# define ADC_VSERVO 4
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@@ -187,7 +187,7 @@ extern pwm_limit_t pwm_limit;
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#endif
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#define BUTTON_SAFETY stm32_gpioread(GPIO_BTN_SAFETY)
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#define BUTTON_SAFETY px4_arch_gpioread(GPIO_BTN_SAFETY)
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#define CONTROL_PAGE_INDEX(_group, _channel) (_group * PX4IO_CONTROL_CHANNELS + _channel)
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@@ -104,8 +104,8 @@ interface_init(void)
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rx_dma = stm32_dmachannel(PX4FMU_SERIAL_RX_DMA);
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/* configure pins for serial use */
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stm32_configgpio(PX4FMU_SERIAL_TX_GPIO);
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stm32_configgpio(PX4FMU_SERIAL_RX_GPIO);
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px4_arch_configgpio(PX4FMU_SERIAL_TX_GPIO);
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px4_arch_configgpio(PX4FMU_SERIAL_RX_GPIO);
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/* reset and configure the UART */
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rCR1 = 0;
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