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Updated PX4 use / API of low level GPIO and other hardware-centric system facilities

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This commit is contained in:
Lorenz Meier
2016-05-28 14:56:17 +02:00
parent c2e2645c82
commit 7398164fcc
89 changed files with 1294 additions and 1087 deletions
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src/drivers/airspeed/airspeed.cpp
+3 -3
View File
@@ -255,14 +255,14 @@ Airspeed::ioctl(struct file *filp, int cmd, unsigned long arg)
return -EINVAL;
}
irqstate_t flags = irqsave();
irqstate_t flags = px4_enter_critical_section();
if (!_reports->resize(arg)) {
irqrestore(flags);
px4_leave_critical_section(flags);
return -ENOMEM;
}
irqrestore(flags);
px4_leave_critical_section(flags);
return OK;
}
src/drivers/bma180/bma180.cpp
+3 -3
View File
@@ -465,14 +465,14 @@ BMA180::ioctl(struct file *filp, int cmd, unsigned long arg)
return -EINVAL;
}
irqstate_t flags = irqsave();
irqstate_t flags = px4_enter_critical_section();
if (!_reports->resize(arg)) {
irqrestore(flags);
px4_leave_critical_section(flags);
return -ENOMEM;
}
irqrestore(flags);
px4_leave_critical_section(flags);
return OK;
}
src/drivers/bmi160/bmi160.cpp
+6 -6
View File
@@ -741,14 +741,14 @@ BMI160::ioctl(struct file *filp, int cmd, unsigned long arg)
return -EINVAL;
}
irqstate_t flags = irqsave();
irqstate_t flags = px4_enter_critical_section();
if (!_accel_reports->resize(arg)) {
irqrestore(flags);
px4_leave_critical_section(flags);
return -ENOMEM;
}
irqrestore(flags);
px4_leave_critical_section(flags);
return OK;
}
@@ -837,14 +837,14 @@ BMI160::gyro_ioctl(struct file *filp, int cmd, unsigned long arg)
return -EINVAL;
}
irqstate_t flags = irqsave();
irqstate_t flags = px4_enter_critical_section();
if (!_gyro_reports->resize(arg)) {
irqrestore(flags);
px4_leave_critical_section(flags);
return -ENOMEM;
}
irqrestore(flags);
px4_leave_critical_section(flags);
return OK;
}
src/drivers/bmp280/bmp280.cpp
+3 -3
View File
@@ -394,14 +394,14 @@ BMP280::ioctl(struct file *filp, int cmd, unsigned long arg)
return -EINVAL;
}
irqstate_t flags = irqsave();
irqstate_t flags = px4_enter_critical_section();
if (!_reports->resize(arg)) {
irqrestore(flags);
px4_leave_critical_section(flags);
return -ENOMEM;
}
irqrestore(flags);
px4_leave_critical_section(flags);
return OK;
}
src/drivers/boards/aerocore/aerocore_init.c
+6 -6
View File
@@ -225,10 +225,10 @@ __EXPORT int nsh_archinitialize(void)
{
/* configure ADC pins */
stm32_configgpio(GPIO_ADC1_IN10); /* used by VBUS valid */
stm32_configgpio(GPIO_ADC1_IN11); /* J1 breakout */
stm32_configgpio(GPIO_ADC1_IN12); /* J1 breakout */
stm32_configgpio(GPIO_ADC1_IN13); /* J1 breakout */
px4_arch_configgpio(GPIO_ADC1_IN10); /* used by VBUS valid */
px4_arch_configgpio(GPIO_ADC1_IN11); /* J1 breakout */
px4_arch_configgpio(GPIO_ADC1_IN12); /* J1 breakout */
px4_arch_configgpio(GPIO_ADC1_IN13); /* J1 breakout */
/* configure the high-resolution time/callout interface */
hrt_init();
@@ -263,7 +263,7 @@ __EXPORT int nsh_archinitialize(void)
led_off(LED_AMBER);
/* Configure Sensors on SPI bus #3 */
spi3 = up_spiinitialize(3);
spi3 = px4_spibus_initialize(3);
if (!spi3) {
message("[boot] FAILED to initialize SPI port 3\n");
@@ -282,7 +282,7 @@ __EXPORT int nsh_archinitialize(void)
message("[boot] Initialized SPI port 3 (SENSORS)\n");
/* Configure FRAM on SPI bus #4 */
spi4 = up_spiinitialize(4);
spi4 = px4_spibus_initialize(4);
if (!spi4) {
message("[boot] FAILED to initialize SPI port 4\n");
src/drivers/boards/aerocore/aerocore_led.c
+12 -12
View File
@@ -63,19 +63,19 @@ __END_DECLS
__EXPORT void led_init()
{
stm32_configgpio(GPIO_LED0);
stm32_configgpio(GPIO_LED1);
px4_arch_configgpio(GPIO_LED0);
px4_arch_configgpio(GPIO_LED1);
}
__EXPORT void led_on(int led)
{
switch (led) {
case 0:
stm32_gpiowrite(GPIO_LED0, true);
px4_arch_gpiowrite(GPIO_LED0, true);
break;
case 1:
stm32_gpiowrite(GPIO_LED1, true);
px4_arch_gpiowrite(GPIO_LED1, true);
break;
default:
@@ -87,11 +87,11 @@ __EXPORT void led_off(int led)
{
switch (led) {
case 0:
stm32_gpiowrite(GPIO_LED0, false);
px4_arch_gpiowrite(GPIO_LED0, false);
break;
case 1:
stm32_gpiowrite(GPIO_LED1, false);
px4_arch_gpiowrite(GPIO_LED1, false);
break;
default:
@@ -103,21 +103,21 @@ __EXPORT void led_toggle(int led)
{
switch (led) {
case 0:
if (stm32_gpioread(GPIO_LED0)) {
stm32_gpiowrite(GPIO_LED0, false);
if (px4_arch_gpioread(GPIO_LED0)) {
px4_arch_gpiowrite(GPIO_LED0, false);
} else {
stm32_gpiowrite(GPIO_LED0, true);
px4_arch_gpiowrite(GPIO_LED0, true);
}
break;
case 1:
if (stm32_gpioread(GPIO_LED1)) {
stm32_gpiowrite(GPIO_LED1, false);
if (px4_arch_gpioread(GPIO_LED1)) {
px4_arch_gpiowrite(GPIO_LED1, false);
} else {
stm32_gpiowrite(GPIO_LED1, true);
px4_arch_gpiowrite(GPIO_LED1, true);
}
break;
src/drivers/boards/aerocore/aerocore_spi.c
+27 -27
View File
@@ -70,36 +70,36 @@
__EXPORT void stm32_spiinitialize(void)
{
#ifdef CONFIG_STM32_SPI1
stm32_configgpio(GPIO_SPI1_NSS);
stm32_gpiowrite(GPIO_SPI1_NSS, 1);
px4_arch_configgpio(GPIO_SPI1_NSS);
px4_arch_gpiowrite(GPIO_SPI1_NSS, 1);
#endif
#ifdef CONFIG_STM32_SPI2
stm32_configgpio(GPIO_SPI2_NSS);
stm32_gpiowrite(GPIO_SPI2_NSS, 1);
px4_arch_configgpio(GPIO_SPI2_NSS);
px4_arch_gpiowrite(GPIO_SPI2_NSS, 1);
#endif
#ifdef CONFIG_STM32_SPI3
stm32_configgpio(GPIO_SPI_CS_GYRO);
stm32_configgpio(GPIO_SPI_CS_ACCEL_MAG);
stm32_configgpio(GPIO_SPI_CS_BARO);
px4_arch_configgpio(GPIO_SPI_CS_GYRO);
px4_arch_configgpio(GPIO_SPI_CS_ACCEL_MAG);
px4_arch_configgpio(GPIO_SPI_CS_BARO);
/* De-activate all peripherals,
* required for some peripheral
* state machines
*/
stm32_gpiowrite(GPIO_SPI_CS_GYRO, 1);
stm32_gpiowrite(GPIO_SPI_CS_ACCEL_MAG, 1);
stm32_gpiowrite(GPIO_SPI_CS_BARO, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_GYRO, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_ACCEL_MAG, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_BARO, 1);
stm32_configgpio(GPIO_EXTI_GYRO_DRDY);
stm32_configgpio(GPIO_EXTI_MAG_DRDY);
stm32_configgpio(GPIO_EXTI_ACCEL_DRDY);
px4_arch_configgpio(GPIO_EXTI_GYRO_DRDY);
px4_arch_configgpio(GPIO_EXTI_MAG_DRDY);
px4_arch_configgpio(GPIO_EXTI_ACCEL_DRDY);
#endif
#ifdef CONFIG_STM32_SPI4
stm32_configgpio(GPIO_SPI4_NSS);
stm32_gpiowrite(GPIO_SPI4_NSS, 1);
px4_arch_configgpio(GPIO_SPI4_NSS);
px4_arch_gpiowrite(GPIO_SPI4_NSS, 1);
#endif
}
@@ -107,7 +107,7 @@ __EXPORT void stm32_spiinitialize(void)
__EXPORT void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
{
/* there is only one device broken-out so select it */
stm32_gpiowrite(GPIO_SPI1_NSS, !selected);
px4_arch_gpiowrite(GPIO_SPI1_NSS, !selected);
}
__EXPORT uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
@@ -120,7 +120,7 @@ __EXPORT uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devi
__EXPORT void stm32_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
{
/* there is only one device broken-out so select it */
stm32_gpiowrite(GPIO_SPI2_NSS, !selected);
px4_arch_gpiowrite(GPIO_SPI2_NSS, !selected);
}
__EXPORT uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
@@ -137,23 +137,23 @@ __EXPORT void stm32_spi3select(FAR struct spi_dev_s *dev, enum spi_dev_e devid,
switch (devid) {
case PX4_SPIDEV_GYRO:
/* Making sure the other peripherals are not selected */
stm32_gpiowrite(GPIO_SPI_CS_GYRO, !selected);
stm32_gpiowrite(GPIO_SPI_CS_ACCEL_MAG, 1);
stm32_gpiowrite(GPIO_SPI_CS_BARO, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_GYRO, !selected);
px4_arch_gpiowrite(GPIO_SPI_CS_ACCEL_MAG, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_BARO, 1);
break;
case PX4_SPIDEV_ACCEL_MAG:
/* Making sure the other peripherals are not selected */
stm32_gpiowrite(GPIO_SPI_CS_GYRO, 1);
stm32_gpiowrite(GPIO_SPI_CS_ACCEL_MAG, !selected);
stm32_gpiowrite(GPIO_SPI_CS_BARO, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_GYRO, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_ACCEL_MAG, !selected);
px4_arch_gpiowrite(GPIO_SPI_CS_BARO, 1);
break;
case PX4_SPIDEV_BARO:
/* Making sure the other peripherals are not selected */
stm32_gpiowrite(GPIO_SPI_CS_GYRO, 1);
stm32_gpiowrite(GPIO_SPI_CS_ACCEL_MAG, 1);
stm32_gpiowrite(GPIO_SPI_CS_BARO, !selected);
px4_arch_gpiowrite(GPIO_SPI_CS_GYRO, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_ACCEL_MAG, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_BARO, !selected);
break;
default:
@@ -172,7 +172,7 @@ __EXPORT uint8_t stm32_spi3status(FAR struct spi_dev_s *dev, enum spi_dev_e devi
__EXPORT void stm32_spi4select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
{
/* there can only be one device on this bus, so always select it */
stm32_gpiowrite(GPIO_SPI4_NSS, !selected);
px4_arch_gpiowrite(GPIO_SPI4_NSS, !selected);
}
__EXPORT uint8_t stm32_spi4status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
src/drivers/boards/aerocore/board_config.h
+18
View File
@@ -174,6 +174,21 @@ __BEGIN_DECLS
#define BOARD_NAME "AEROCORE"
#define BOARD_HAS_PWM 8
/* AeroCore breaks out User GPIOs on J11 */
#define BOARD_FMU_GPIO_TAB { \
{GPIO_GPIO0_INPUT, GPIO_GPIO0_OUTPUT, 0}, \
{GPIO_GPIO1_INPUT, GPIO_GPIO1_OUTPUT, 0}, \
{GPIO_GPIO3_INPUT, GPIO_GPIO3_OUTPUT, 0}, \
{GPIO_GPIO4_INPUT, GPIO_GPIO4_OUTPUT, 0}, \
{GPIO_GPIO5_INPUT, GPIO_GPIO5_OUTPUT, 0}, \
{GPIO_GPIO6_INPUT, GPIO_GPIO6_OUTPUT, 0}, \
{GPIO_GPIO7_INPUT, GPIO_GPIO7_OUTPUT, 0}, \
{GPIO_GPIO8_INPUT, GPIO_GPIO8_OUTPUT, 0}, \
{GPIO_GPIO9_INPUT, GPIO_GPIO9_OUTPUT, 0}, \
{GPIO_GPIO10_INPUT, GPIO_GPIO10_OUTPUT, 0}, \
{GPIO_GPIO11_INPUT, GPIO_GPIO11_OUTPUT, 0}, }
/****************************************************************************************************
* Public Types
****************************************************************************************************/
@@ -197,6 +212,9 @@ __BEGIN_DECLS
****************************************************************************************************/
extern void stm32_spiinitialize(void);
#define board_spi_reset(ms)
#define board_peripheral_reset(ms)
/****************************************************************************
* Name: nsh_archinitialize
src/drivers/boards/mindpx-v2/board_config.h
+33 -1
View File
@@ -43,7 +43,7 @@
* Included Files
****************************************************************************************************/
#include <nuttx/config.h>
#include <px4_config.h>
#include <nuttx/compiler.h>
#include <stdint.h>
@@ -292,6 +292,34 @@ __BEGIN_DECLS
#define BOARD_NAME "MINDPX_V2"
/* By Providing BOARD_ADC_USB_CONNECTED this board support the ADC
* system_power interface, and therefore provides the true logic
* GPIO BOARD_ADC_xxxx macros.
*/
#define BOARD_ADC_USB_CONNECTED (px4_arch_gpioread(GPIO_OTGFS_VBUS))
#define BOARD_ADC_BRICK_VALID (1)
#define BOARD_ADC_SERVO_VALID (1)
#define BOARD_ADC_PERIPH_5V_OC (0)
#define BOARD_ADC_HIPOWER_5V_OC (0)
#define BOARD_HAS_PWM DIRECT_PWM_OUTPUT_CHANNELS
#define BOARD_FMU_GPIO_TAB { \
{GPIO_GPIO0_INPUT, GPIO_GPIO0_OUTPUT, 0}, \
{GPIO_GPIO1_INPUT, GPIO_GPIO1_OUTPUT, 0}, \
{GPIO_GPIO2_INPUT, GPIO_GPIO2_OUTPUT, 0}, \
{GPIO_GPIO3_INPUT, GPIO_GPIO3_OUTPUT, 0}, \
{GPIO_GPIO4_INPUT, GPIO_GPIO4_OUTPUT, 0}, \
{GPIO_GPIO5_INPUT, GPIO_GPIO5_OUTPUT, 0}, \
{GPIO_GPIO6_INPUT, GPIO_GPIO6_OUTPUT, 0}, \
{GPIO_GPIO7_INPUT, GPIO_GPIO7_OUTPUT, 0}, \
{GPIO_GPIO8_INPUT, GPIO_GPIO8_OUTPUT, 0}, \
{GPIO_GPIO9_INPUT, GPIO_GPIO9_OUTPUT, 0}, \
{GPIO_GPIO10_INPUT, GPIO_GPIO10_OUTPUT, 0}, \
{GPIO_GPIO11_INPUT, GPIO_GPIO11_OUTPUT, 0}, \
{GPIO_GPIO12_INPUT, GPIO_GPIO12_OUTPUT, 0}, }
/****************************************************************************************************
* Public Types
****************************************************************************************************/
@@ -315,9 +343,13 @@ __BEGIN_DECLS
****************************************************************************************************/
extern void stm32_spiinitialize(void);
void board_spi_reset(int ms);
extern void stm32_usbinitialize(void);
#define board_peripheral_reset(ms)
/****************************************************************************
* Name: nsh_archinitialize
*
src/drivers/boards/mindpx-v2/mindpx2_init.c
+23 -23
View File
@@ -45,7 +45,7 @@
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <px4_config.h>
#include <stdbool.h>
#include <stdio.h>
@@ -230,23 +230,23 @@ __EXPORT int nsh_archinitialize(void)
{
/* configure ADC pins */
stm32_configgpio(GPIO_ADC1_IN3); /* BATT_VOLTAGE_SENS */
stm32_configgpio(GPIO_ADC1_IN2); /* BATT_CURRENT_SENS */
stm32_configgpio(GPIO_ADC1_IN4); /* VDD_5V_SENS */
stm32_configgpio(GPIO_ADC1_IN10); /* used by VBUS valid */
// stm32_configgpio(GPIO_ADC1_IN11); /* unused */
// stm32_configgpio(GPIO_ADC1_IN12); /* used by MPU6000 CS */
stm32_configgpio(GPIO_ADC1_IN13); /* FMU_AUX_ADC_1 */
stm32_configgpio(GPIO_ADC1_IN14); /* FMU_AUX_ADC_2 */
stm32_configgpio(GPIO_ADC1_IN15); /* PRESSURE_SENS */
px4_arch_configgpio(GPIO_ADC1_IN3); /* BATT_VOLTAGE_SENS */
px4_arch_configgpio(GPIO_ADC1_IN2); /* BATT_CURRENT_SENS */
px4_arch_configgpio(GPIO_ADC1_IN4); /* VDD_5V_SENS */
px4_arch_configgpio(GPIO_ADC1_IN10); /* used by VBUS valid */
// px4_arch_configgpio(GPIO_ADC1_IN11); /* unused */
// px4_arch_configgpio(GPIO_ADC1_IN12); /* used by MPU6000 CS */
px4_arch_configgpio(GPIO_ADC1_IN13); /* FMU_AUX_ADC_1 */
px4_arch_configgpio(GPIO_ADC1_IN14); /* FMU_AUX_ADC_2 */
px4_arch_configgpio(GPIO_ADC1_IN15); /* PRESSURE_SENS */
/* configure power supply control/sense pins */
// stm32_configgpio(GPIO_VDD_5V_PERIPH_EN);
// stm32_configgpio(GPIO_VDD_3V3_SENSORS_EN);
// stm32_configgpio(GPIO_VDD_BRICK_VALID);
// stm32_configgpio(GPIO_VDD_SERVO_VALID);
// stm32_configgpio(GPIO_VDD_5V_HIPOWER_OC);
// stm32_configgpio(GPIO_VDD_5V_PERIPH_OC);
// px4_arch_configgpio(GPIO_VDD_5V_PERIPH_EN);
// px4_arch_configgpio(GPIO_VDD_3V3_SENSORS_EN);
// px4_arch_configgpio(GPIO_VDD_BRICK_VALID);
// px4_arch_configgpio(GPIO_VDD_SERVO_VALID);
// px4_arch_configgpio(GPIO_VDD_5V_HIPOWER_OC);
// px4_arch_configgpio(GPIO_VDD_5V_PERIPH_OC);
/* configure the high-resolution time/callout interface */
hrt_init();
@@ -282,7 +282,7 @@ __EXPORT int nsh_archinitialize(void)
/* Configure SPI-based devices */
message("[boot] Initialized SPI port 4 (SENSORS)\n");
spi4 = up_spiinitialize(4);
spi4 = px4_spibus_initialize(4);
if (!spi4) {
message("[boot] FAILED to initialize SPI port 4\n");
@@ -303,7 +303,7 @@ __EXPORT int nsh_archinitialize(void)
/* Get the SPI port for the FRAM */
message("[boot] Initialized SPI port 1 (RAMTRON FRAM)\n");
spi1 = up_spiinitialize(1);
spi1 = px4_spibus_initialize(1);
if (!spi1) {
message("[boot] FAILED to initialize SPI port 1\n");
@@ -324,7 +324,7 @@ __EXPORT int nsh_archinitialize(void)
message("[boot] Initialized SPI port 2 (nRF24 and ext)\n");
spi2 = up_spiinitialize(2);
spi2 = px4_spibus_initialize(2);
/* Default SPI2 to 10MHz and de-assert the known chip selects. */
SPI_SETFREQUENCY(spi2, 10000000);
@@ -360,12 +360,12 @@ __EXPORT int nsh_archinitialize(void)
#endif
stm32_configgpio(GPIO_I2C2_SCL);
stm32_configgpio(GPIO_I2C2_SDA);
px4_arch_configgpio(GPIO_I2C2_SCL);
px4_arch_configgpio(GPIO_I2C2_SDA);
message("[boot] Initialized ext I2C Port\n");
stm32_configgpio(GPIO_I2C1_SCL);
stm32_configgpio(GPIO_I2C1_SDA);
px4_arch_configgpio(GPIO_I2C1_SCL);
px4_arch_configgpio(GPIO_I2C1_SDA);
message("[boot] Initialized onboard I2C Port\n");
src/drivers/boards/mindpx-v2/mindpx2_led.c
+7 -7
View File
@@ -37,7 +37,7 @@
* PX4FMU LED backend.
*/
#include <nuttx/config.h>
#include <px4_config.h>
#include <stdbool.h>
@@ -64,14 +64,14 @@ __EXPORT void led_init()
{
/* Configure LED1 GPIO for output */
stm32_configgpio(GPIO_LED1);
px4_arch_configgpio(GPIO_LED1);
}
__EXPORT void led_on(int led)
{
if (led == 1) {
/* Pull down to switch on */
stm32_gpiowrite(GPIO_LED1, false);
px4_arch_gpiowrite(GPIO_LED1, false);
}
}
@@ -79,18 +79,18 @@ __EXPORT void led_off(int led)
{
if (led == 1) {
/* Pull up to switch off */
stm32_gpiowrite(GPIO_LED1, true);
px4_arch_gpiowrite(GPIO_LED1, true);
}
}
__EXPORT void led_toggle(int led)
{
if (led == 1) {
if (stm32_gpioread(GPIO_LED1)) {
stm32_gpiowrite(GPIO_LED1, false);
if (px4_arch_gpioread(GPIO_LED1)) {
px4_arch_gpiowrite(GPIO_LED1, false);
} else {
stm32_gpiowrite(GPIO_LED1, true);
px4_arch_gpiowrite(GPIO_LED1, true);
}
}
}
src/drivers/boards/mindpx-v2/mindpx_can.c
+1 -1
View File
@@ -41,7 +41,7 @@
* Included Files
************************************************************************************/
#include <nuttx/config.h>
#include <px4_config.h>
#include <errno.h>
#include <debug.h>
src/drivers/boards/mindpx-v2/mindpx_spi.c
+142 -61
View File
@@ -41,7 +41,7 @@
* Included Files
************************************************************************************/
#include <nuttx/config.h>
#include <px4_config.h>
#include <stdint.h>
#include <stdbool.h>
@@ -54,6 +54,7 @@
#include <chip.h>
#include <stm32.h>
#include "board_config.h"
#include <systemlib/err.h>
/************************************************************************************
* Public Functions
@@ -70,42 +71,42 @@
__EXPORT void weak_function stm32_spiinitialize(void)
{
#ifdef CONFIG_STM32_SPI4
stm32_configgpio(GPIO_SPI_CS_GYRO);
stm32_configgpio(GPIO_SPI_CS_ACCEL_MAG);
stm32_configgpio(GPIO_SPI_CS_BARO);
// stm32_configgpio(GPIO_SPI_CS_FRAM);
stm32_configgpio(GPIO_SPI_CS_MPU);
px4_arch_configgpio(GPIO_SPI_CS_GYRO);
px4_arch_configgpio(GPIO_SPI_CS_ACCEL_MAG);
px4_arch_configgpio(GPIO_SPI_CS_BARO);
// px4_arch_configgpio(GPIO_SPI_CS_FRAM);
px4_arch_configgpio(GPIO_SPI_CS_MPU);
/* De-activate all peripherals,
* required for some peripheral
* state machines
*/
stm32_gpiowrite(GPIO_SPI_CS_GYRO, 1);
stm32_gpiowrite(GPIO_SPI_CS_ACCEL_MAG, 1);
stm32_gpiowrite(GPIO_SPI_CS_BARO, 1);
// stm32_gpiowrite(GPIO_SPI_CS_FRAM,1);
stm32_gpiowrite(GPIO_SPI_CS_MPU, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_GYRO, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_ACCEL_MAG, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_BARO, 1);
// px4_arch_gpiowrite(GPIO_SPI_CS_FRAM,1);
px4_arch_gpiowrite(GPIO_SPI_CS_MPU, 1);
stm32_configgpio(GPIO_EXTI_GYRO_DRDY);
stm32_configgpio(GPIO_EXTI_MAG_DRDY);
stm32_configgpio(GPIO_EXTI_ACCEL_DRDY);
stm32_configgpio(GPIO_EXTI_MPU_DRDY);
px4_arch_configgpio(GPIO_EXTI_GYRO_DRDY);
px4_arch_configgpio(GPIO_EXTI_MAG_DRDY);
px4_arch_configgpio(GPIO_EXTI_ACCEL_DRDY);
px4_arch_configgpio(GPIO_EXTI_MPU_DRDY);
#endif
#ifdef CONFIG_STM32_SPI1
stm32_configgpio(GPIO_SPI_CS_FRAM);
stm32_gpiowrite(GPIO_SPI_CS_FRAM, 1);
px4_arch_configgpio(GPIO_SPI_CS_FRAM);
px4_arch_gpiowrite(GPIO_SPI_CS_FRAM, 1);
#endif
#ifdef CONFIG_STM32_SPI2
stm32_configgpio(GPIO_SPI_CS_EXT0);
stm32_configgpio(GPIO_SPI_CS_EXT1);
stm32_configgpio(GPIO_SPI_CS_EXT2);
stm32_configgpio(GPIO_SPI_CS_EXT3);
stm32_gpiowrite(GPIO_SPI_CS_EXT0, 1);
stm32_gpiowrite(GPIO_SPI_CS_EXT1, 1);
stm32_gpiowrite(GPIO_SPI_CS_EXT2, 1);
stm32_gpiowrite(GPIO_SPI_CS_EXT3, 1);
px4_arch_configgpio(GPIO_SPI_CS_EXT0);
px4_arch_configgpio(GPIO_SPI_CS_EXT1);
px4_arch_configgpio(GPIO_SPI_CS_EXT2);
px4_arch_configgpio(GPIO_SPI_CS_EXT3);
px4_arch_gpiowrite(GPIO_SPI_CS_EXT0, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_EXT1, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_EXT2, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_EXT3, 1);
#endif
}
@@ -116,40 +117,40 @@ __EXPORT void stm32_spi4select(FAR struct spi_dev_s *dev, enum spi_dev_e devid,
switch (devid) {
case PX4_SPIDEV_GYRO:
/* Making sure the other peripherals are not selected */
stm32_gpiowrite(GPIO_SPI_CS_GYRO, !selected);
stm32_gpiowrite(GPIO_SPI_CS_ACCEL_MAG, 1);
stm32_gpiowrite(GPIO_SPI_CS_BARO, 1);
stm32_gpiowrite(GPIO_SPI_CS_MPU, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_GYRO, !selected);
px4_arch_gpiowrite(GPIO_SPI_CS_ACCEL_MAG, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_BARO, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_MPU, 1);
break;
case PX4_SPIDEV_ACCEL_MAG:
/* Making sure the other peripherals are not selected */
stm32_gpiowrite(GPIO_SPI_CS_GYRO, 1);
stm32_gpiowrite(GPIO_SPI_CS_ACCEL_MAG, !selected);
stm32_gpiowrite(GPIO_SPI_CS_BARO, 1);
stm32_gpiowrite(GPIO_SPI_CS_MPU, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_GYRO, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_ACCEL_MAG, !selected);
px4_arch_gpiowrite(GPIO_SPI_CS_BARO, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_MPU, 1);
break;
case PX4_SPIDEV_BARO:
/* Making sure the other peripherals are not selected */
stm32_gpiowrite(GPIO_SPI_CS_GYRO, 1);
stm32_gpiowrite(GPIO_SPI_CS_ACCEL_MAG, 1);
stm32_gpiowrite(GPIO_SPI_CS_BARO, !selected);
// stm32_gpiowrite(GPIO_SPI_CS_FRAM,1);
stm32_gpiowrite(GPIO_SPI_CS_MPU, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_GYRO, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_ACCEL_MAG, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_BARO, !selected);
// px4_arch_gpiowrite(GPIO_SPI_CS_FRAM,1);
px4_arch_gpiowrite(GPIO_SPI_CS_MPU, 1);
break;
// case PX4_SPIDEV_FLASH:
// stm32_gpiowrite(GPIO_SPI_CS_BARO,1);
// stm32_gpiowrite(GPIO_SPI_CS_FRAM,!selected);
// px4_arch_gpiowrite(GPIO_SPI_CS_BARO,1);
// px4_arch_gpiowrite(GPIO_SPI_CS_FRAM,!selected);
// break;
case PX4_SPIDEV_MPU:
/* Making sure the other peripherals are not selected */
stm32_gpiowrite(GPIO_SPI_CS_GYRO, 1);
stm32_gpiowrite(GPIO_SPI_CS_ACCEL_MAG, 1);
stm32_gpiowrite(GPIO_SPI_CS_BARO, 1);
stm32_gpiowrite(GPIO_SPI_CS_MPU, !selected);
px4_arch_gpiowrite(GPIO_SPI_CS_GYRO, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_ACCEL_MAG, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_BARO, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_MPU, !selected);
break;
default:
@@ -167,7 +168,7 @@ __EXPORT uint8_t stm32_spi4status(FAR struct spi_dev_s *dev, enum spi_dev_e devi
__EXPORT void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
{
/* there can only be one device on this bus, so always select it */
stm32_gpiowrite(GPIO_SPI_CS_FRAM, !selected);
px4_arch_gpiowrite(GPIO_SPI_CS_FRAM, !selected);
}
__EXPORT uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
@@ -184,34 +185,34 @@ __EXPORT void stm32_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid,
switch (devid) {
case PX4_SPIDEV_EXT0:
/* Making sure the other peripherals are not selected */
stm32_gpiowrite(GPIO_SPI_CS_EXT0, !selected);
stm32_gpiowrite(GPIO_SPI_CS_EXT1, 1);
stm32_gpiowrite(GPIO_SPI_CS_EXT2, 1);
stm32_gpiowrite(GPIO_SPI_CS_EXT3, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_EXT0, !selected);
px4_arch_gpiowrite(GPIO_SPI_CS_EXT1, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_EXT2, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_EXT3, 1);
break;
case PX4_SPIDEV_EXT1:
/* Making sure the other peripherals are not selected */
stm32_gpiowrite(GPIO_SPI_CS_EXT0, 1);
stm32_gpiowrite(GPIO_SPI_CS_EXT1, !selected);
stm32_gpiowrite(GPIO_SPI_CS_EXT2, 1);
stm32_gpiowrite(GPIO_SPI_CS_EXT3, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_EXT0, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_EXT1, !selected);
px4_arch_gpiowrite(GPIO_SPI_CS_EXT2, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_EXT3, 1);
break;
case PX4_SPIDEV_EXT2:
/* Making sure the other peripherals are not selected */
stm32_gpiowrite(GPIO_SPI_CS_EXT0, 1);
stm32_gpiowrite(GPIO_SPI_CS_EXT1, 1);
stm32_gpiowrite(GPIO_SPI_CS_EXT2, !selected);
stm32_gpiowrite(GPIO_SPI_CS_EXT3, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_EXT0, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_EXT1, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_EXT2, !selected);
px4_arch_gpiowrite(GPIO_SPI_CS_EXT3, 1);
break;
case PX4_SPIDEV_EXT3:
/* Making sure the other peripherals are not selected */
stm32_gpiowrite(GPIO_SPI_CS_EXT0, 1);
stm32_gpiowrite(GPIO_SPI_CS_EXT1, 1);
stm32_gpiowrite(GPIO_SPI_CS_EXT2, 1);
stm32_gpiowrite(GPIO_SPI_CS_EXT3, !selected);
px4_arch_gpiowrite(GPIO_SPI_CS_EXT0, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_EXT1, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_EXT2, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_EXT3, !selected);
break;
default:
@@ -224,3 +225,83 @@ __EXPORT uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devi
{
return SPI_STATUS_PRESENT;
}
__EXPORT void board_spi_reset(int ms)
{
/* disable SPI bus */
px4_arch_configgpio(GPIO_SPI_CS_GYRO_OFF);
px4_arch_configgpio(GPIO_SPI_CS_ACCEL_MAG_OFF);
px4_arch_configgpio(GPIO_SPI_CS_BARO_OFF);
// px4_arch_configgpio(GPIO_SPI_CS_FRAM_OFF);
px4_arch_configgpio(GPIO_SPI_CS_MPU_OFF);
px4_arch_gpiowrite(GPIO_SPI_CS_GYRO_OFF, 0);
px4_arch_gpiowrite(GPIO_SPI_CS_ACCEL_MAG_OFF, 0);
px4_arch_gpiowrite(GPIO_SPI_CS_BARO_OFF, 0);
// px4_arch_gpiowrite(GPIO_SPI_CS_FRAM_OFF,0);
px4_arch_gpiowrite(GPIO_SPI_CS_MPU_OFF, 0);
px4_arch_configgpio(GPIO_SPI4_SCK_OFF);
px4_arch_configgpio(GPIO_SPI4_MISO_OFF);
px4_arch_configgpio(GPIO_SPI4_MOSI_OFF);
px4_arch_gpiowrite(GPIO_SPI4_SCK_OFF, 0);
px4_arch_gpiowrite(GPIO_SPI4_MISO_OFF, 0);
px4_arch_gpiowrite(GPIO_SPI4_MOSI_OFF, 0);
px4_arch_configgpio(GPIO_GYRO_DRDY_OFF);
px4_arch_configgpio(GPIO_MAG_DRDY_OFF);
px4_arch_configgpio(GPIO_ACCEL_DRDY_OFF);
px4_arch_configgpio(GPIO_EXTI_MPU_DRDY_OFF);
px4_arch_gpiowrite(GPIO_GYRO_DRDY_OFF, 0);
px4_arch_gpiowrite(GPIO_MAG_DRDY_OFF, 0);
px4_arch_gpiowrite(GPIO_ACCEL_DRDY_OFF, 0);
px4_arch_gpiowrite(GPIO_EXTI_MPU_DRDY_OFF, 0);
// /* set the sensor rail off */
// px4_arch_configgpio(GPIO_VDD_3V3_SENSORS_EN);
// px4_arch_gpiowrite(GPIO_VDD_3V3_SENSORS_EN, 0);
//
/* wait for the sensor rail to reach GND */
usleep(ms * 1000);
warnx("reset done, %d ms", ms);
//
// /* re-enable power */
//
// /* switch the sensor rail back on */
// px4_arch_gpiowrite(GPIO_VDD_3V3_SENSORS_EN, 1);
//
/* wait a bit before starting SPI, different times didn't influence results */
usleep(100);
/* reconfigure the SPI pins */
#ifdef CONFIG_STM32_SPI4
px4_arch_configgpio(GPIO_SPI_CS_GYRO);
px4_arch_configgpio(GPIO_SPI_CS_ACCEL_MAG);
px4_arch_configgpio(GPIO_SPI_CS_BARO);
// px4_arch_configgpio(GPIO_SPI_CS_FRAM);
px4_arch_configgpio(GPIO_SPI_CS_MPU);
/* De-activate all peripherals,
* required for some peripheral
* state machines
*/
px4_arch_gpiowrite(GPIO_SPI_CS_GYRO, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_ACCEL_MAG, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_BARO, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_FRAM, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_MPU, 1);
px4_arch_configgpio(GPIO_SPI4_SCK);
px4_arch_configgpio(GPIO_SPI4_MISO);
px4_arch_configgpio(GPIO_SPI4_MOSI);
// // XXX bring up the EXTI pins again
// px4_arch_configgpio(GPIO_GYRO_DRDY);
// px4_arch_configgpio(GPIO_MAG_DRDY);
// px4_arch_configgpio(GPIO_ACCEL_DRDY);
#endif
}
src/drivers/boards/mindpx-v2/mindpx_usb.c
+4 -4
View File
@@ -41,7 +41,7 @@
* Included Files
************************************************************************************/
#include <nuttx/config.h>
#include <px4_config.h>
#include <sys/types.h>
#include <stdint.h>
@@ -82,10 +82,10 @@ __EXPORT void stm32_usbinitialize(void)
/* Configure the OTG FS VBUS sensing GPIO, Power On, and Overcurrent GPIOs */
#ifdef CONFIG_STM32_OTGFS
stm32_configgpio(GPIO_OTGFS_VBUS);
px4_arch_configgpio(GPIO_OTGFS_VBUS);
/* XXX We only support device mode
stm32_configgpio(GPIO_OTGFS_PWRON);
stm32_configgpio(GPIO_OTGFS_OVER);
px4_arch_configgpio(GPIO_OTGFS_PWRON);
px4_arch_configgpio(GPIO_OTGFS_OVER);
*/
#endif
}
src/drivers/boards/px4-stm32f4discovery/board_config.h
+1 -1
View File
@@ -43,7 +43,7 @@
* Included Files
****************************************************************************************************/
#include <nuttx/config.h>
#include <px4_config.h>
#include <nuttx/compiler.h>
#include <stdint.h>
src/drivers/boards/px4-stm32f4discovery/px4discovery_init.c
+1 -1
View File
@@ -45,7 +45,7 @@
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <px4_config.h>
#include <stdbool.h>
#include <stdio.h>
src/drivers/boards/px4-stm32f4discovery/px4discovery_led.c
+7 -7
View File
@@ -37,7 +37,7 @@
* PX4-stm32f4discovery LED backend.
*/
#include <nuttx/config.h>
#include <px4_config.h>
#include <stdbool.h>
@@ -64,14 +64,14 @@ __EXPORT void led_init()
{
/* Configure LED1 GPIO for output */
stm32_configgpio(GPIO_LED1);
px4_arch_configgpio(GPIO_LED1);
}
__EXPORT void led_on(int led)
{
if (led == 1) {
/* Pull down to switch on */
stm32_gpiowrite(GPIO_LED1, false);
px4_arch_gpiowrite(GPIO_LED1, false);
}
}
@@ -79,18 +79,18 @@ __EXPORT void led_off(int led)
{
if (led == 1) {
/* Pull up to switch off */
stm32_gpiowrite(GPIO_LED1, true);
px4_arch_gpiowrite(GPIO_LED1, true);
}
}
__EXPORT void led_toggle(int led)
{
if (led == 1) {
if (stm32_gpioread(GPIO_LED1)) {
stm32_gpiowrite(GPIO_LED1, false);
if (px4_arch_gpioread(GPIO_LED1)) {
px4_arch_gpiowrite(GPIO_LED1, false);
} else {
stm32_gpiowrite(GPIO_LED1, true);
px4_arch_gpiowrite(GPIO_LED1, true);
}
}
}
src/drivers/boards/px4-stm32f4discovery/px4discovery_usb.c
+4 -4
View File
@@ -41,7 +41,7 @@
* Included Files
************************************************************************************/
#include <nuttx/config.h>
#include <px4_config.h>
#include <sys/types.h>
#include <stdint.h>
@@ -82,10 +82,10 @@ __EXPORT void stm32_usbinitialize(void)
/* Configure the OTG FS VBUS sensing GPIO, Power On, and Overcurrent GPIOs */
#ifdef CONFIG_STM32_OTGFS
stm32_configgpio(GPIO_OTGFS_VBUS);
px4_arch_configgpio(GPIO_OTGFS_VBUS);
/* XXX We only support device mode
stm32_configgpio(GPIO_OTGFS_PWRON);
stm32_configgpio(GPIO_OTGFS_OVER);
px4_arch_configgpio(GPIO_OTGFS_PWRON);
px4_arch_configgpio(GPIO_OTGFS_OVER);
*/
#endif
}
src/drivers/boards/px4fmu-v1/board_config.h
+22 -1
View File
@@ -155,7 +155,7 @@ __BEGIN_DECLS
#define GPIO_GPIO6_OUTPUT (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTB|GPIO_PIN13)
#define GPIO_GPIO7_OUTPUT (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTB|GPIO_PIN12)
#define GPIO_GPIO_DIR (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTC|GPIO_PIN13)
#define BOARD_GPIO_SHARED_BUFFERED_BITS 3
/*
* Tone alarm output
*/
@@ -206,6 +206,24 @@ __BEGIN_DECLS
#define BOARD_NAME "PX4FMU_V1"
#define BOARD_HAS_PWM DIRECT_PWM_OUTPUT_CHANNELS
#define BOARD_FMU_GPIO_TAB { \
{GPIO_GPIO0_INPUT, GPIO_GPIO0_OUTPUT, 0}, \
{GPIO_GPIO1_INPUT, GPIO_GPIO1_OUTPUT, 0}, \
{GPIO_GPIO2_INPUT, GPIO_GPIO2_OUTPUT, GPIO_USART2_CTS_1}, \
{GPIO_GPIO3_INPUT, GPIO_GPIO3_OUTPUT, GPIO_USART2_RTS_1}, \
{GPIO_GPIO4_INPUT, GPIO_GPIO4_OUTPUT, GPIO_USART2_TX_1}, \
{GPIO_GPIO5_INPUT, GPIO_GPIO5_OUTPUT, GPIO_USART2_RX_1}, \
{GPIO_GPIO6_INPUT, GPIO_GPIO6_OUTPUT, GPIO_CAN2_TX_2}, \
{GPIO_GPIO7_INPUT, GPIO_GPIO7_OUTPUT, GPIO_CAN2_RX_2}, }
/* BOARD_HAS_MULTI_PURPOSE_GPIO defined because the board
* has alternate uses for GPIO as noted in that the third
* column above has entries.
*/
#define BOARD_HAS_MULTI_PURPOSE_GPIO 1
/****************************************************************************************************
* Public Types
****************************************************************************************************/
@@ -229,9 +247,12 @@ __BEGIN_DECLS
****************************************************************************************************/
extern void stm32_spiinitialize(void);
#define board_spi_reset(ms)
extern void stm32_usbinitialize(void);
#define board_peripheral_reset(ms)
/****************************************************************************
* Name: nsh_archinitialize
*
src/drivers/boards/px4fmu-v1/px4fmu_init.c
+7 -7
View File
@@ -150,8 +150,8 @@ __EXPORT int nsh_archinitialize(void)
int result;
/* configure always-on ADC pins */
stm32_configgpio(GPIO_ADC1_IN10);
stm32_configgpio(GPIO_ADC1_IN11);
px4_arch_configgpio(GPIO_ADC1_IN10);
px4_arch_configgpio(GPIO_ADC1_IN11);
/* IN12 and IN13 further below */
/* configure the high-resolution time/callout interface */
@@ -187,7 +187,7 @@ __EXPORT int nsh_archinitialize(void)
/* Configure SPI-based devices */
spi1 = up_spiinitialize(1);
spi1 = px4_spibus_initialize(1);
if (!spi1) {
message("[boot] FAILED to initialize SPI port 1\r\n");
@@ -210,7 +210,7 @@ __EXPORT int nsh_archinitialize(void)
*/
#ifdef CONFIG_STM32_SPI2
spi2 = up_spiinitialize(2);
spi2 = px4_spibus_initialize(2);
/* Default SPI2 to 1MHz and de-assert the known chip selects. */
SPI_SETFREQUENCY(spi2, 10000000);
SPI_SETBITS(spi2, 8);
@@ -223,13 +223,13 @@ __EXPORT int nsh_archinitialize(void)
spi2 = NULL;
message("[boot] Enabling IN12/13 instead of SPI2\n");
/* no SPI2, use pins for ADC */
stm32_configgpio(GPIO_ADC1_IN12);
stm32_configgpio(GPIO_ADC1_IN13); // jumperable to MPU6000 DRDY on some boards
px4_arch_configgpio(GPIO_ADC1_IN12);
px4_arch_configgpio(GPIO_ADC1_IN13); // jumperable to MPU6000 DRDY on some boards
#endif
/* Get the SPI port for the microSD slot */
spi3 = up_spiinitialize(3);
spi3 = px4_spibus_initialize(3);
if (!spi3) {
message("[boot] FAILED to initialize SPI port 3\n");
src/drivers/boards/px4fmu-v1/px4fmu_led.c
+12 -12
View File
@@ -64,20 +64,20 @@ __EXPORT void led_init(void)
{
/* Configure LED1-2 GPIOs for output */
stm32_configgpio(GPIO_LED1);
stm32_configgpio(GPIO_LED2);
px4_arch_configgpio(GPIO_LED1);
px4_arch_configgpio(GPIO_LED2);
}
__EXPORT void led_on(int led)
{
if (led == 0) {
/* Pull down to switch on */
stm32_gpiowrite(GPIO_LED1, false);
px4_arch_gpiowrite(GPIO_LED1, false);
}
if (led == 1) {
/* Pull down to switch on */
stm32_gpiowrite(GPIO_LED2, false);
px4_arch_gpiowrite(GPIO_LED2, false);
}
}
@@ -85,32 +85,32 @@ __EXPORT void led_off(int led)
{
if (led == 0) {
/* Pull up to switch off */
stm32_gpiowrite(GPIO_LED1, true);
px4_arch_gpiowrite(GPIO_LED1, true);
}
if (led == 1) {
/* Pull up to switch off */
stm32_gpiowrite(GPIO_LED2, true);
px4_arch_gpiowrite(GPIO_LED2, true);
}
}
__EXPORT void led_toggle(int led)
{
if (led == 0) {
if (stm32_gpioread(GPIO_LED1)) {
stm32_gpiowrite(GPIO_LED1, false);
if (px4_arch_gpioread(GPIO_LED1)) {
px4_arch_gpiowrite(GPIO_LED1, false);
} else {
stm32_gpiowrite(GPIO_LED1, true);
px4_arch_gpiowrite(GPIO_LED1, true);
}
}
if (led == 1) {
if (stm32_gpioread(GPIO_LED2)) {
stm32_gpiowrite(GPIO_LED2, false);
if (px4_arch_gpioread(GPIO_LED2)) {
px4_arch_gpiowrite(GPIO_LED2, false);
} else {
stm32_gpiowrite(GPIO_LED2, true);
px4_arch_gpiowrite(GPIO_LED2, true);
}
}
}
src/drivers/boards/px4fmu-v1/px4fmu_spi.c
+18 -18
View File
@@ -69,19 +69,19 @@
__EXPORT void stm32_spiinitialize(void)
{
stm32_configgpio(GPIO_SPI_CS_GYRO);
stm32_configgpio(GPIO_SPI_CS_ACCEL);
stm32_configgpio(GPIO_SPI_CS_MPU);
stm32_configgpio(GPIO_SPI_CS_SDCARD);
px4_arch_configgpio(GPIO_SPI_CS_GYRO);
px4_arch_configgpio(GPIO_SPI_CS_ACCEL);
px4_arch_configgpio(GPIO_SPI_CS_MPU);
px4_arch_configgpio(GPIO_SPI_CS_SDCARD);
/* De-activate all peripherals,
* required for some peripheral
* state machines
*/
stm32_gpiowrite(GPIO_SPI_CS_GYRO, 1);
stm32_gpiowrite(GPIO_SPI_CS_ACCEL, 1);
stm32_gpiowrite(GPIO_SPI_CS_MPU, 1);
stm32_gpiowrite(GPIO_SPI_CS_SDCARD, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_GYRO, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_ACCEL, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_MPU, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_SDCARD, 1);
}
__EXPORT void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
@@ -91,23 +91,23 @@ __EXPORT void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid,
switch (devid) {
case PX4_SPIDEV_GYRO:
/* Making sure the other peripherals are not selected */
stm32_gpiowrite(GPIO_SPI_CS_GYRO, !selected);
stm32_gpiowrite(GPIO_SPI_CS_MPU, 1);
stm32_gpiowrite(GPIO_SPI_CS_ACCEL, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_GYRO, !selected);
px4_arch_gpiowrite(GPIO_SPI_CS_MPU, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_ACCEL, 1);
break;
case PX4_SPIDEV_ACCEL:
/* Making sure the other peripherals are not selected */
stm32_gpiowrite(GPIO_SPI_CS_ACCEL, !selected);
stm32_gpiowrite(GPIO_SPI_CS_MPU, 1);
stm32_gpiowrite(GPIO_SPI_CS_GYRO, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_ACCEL, !selected);
px4_arch_gpiowrite(GPIO_SPI_CS_MPU, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_GYRO, 1);
break;
case PX4_SPIDEV_MPU:
/* Making sure the other peripherals are not selected */
stm32_gpiowrite(GPIO_SPI_CS_ACCEL, 1);
stm32_gpiowrite(GPIO_SPI_CS_GYRO, 1);
stm32_gpiowrite(GPIO_SPI_CS_MPU, !selected);
px4_arch_gpiowrite(GPIO_SPI_CS_ACCEL, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_GYRO, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_MPU, !selected);
break;
default:
@@ -143,7 +143,7 @@ __EXPORT uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devi
__EXPORT void stm32_spi3select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
{
/* there can only be one device on this bus, so always select it */
stm32_gpiowrite(GPIO_SPI_CS_SDCARD, !selected);
px4_arch_gpiowrite(GPIO_SPI_CS_SDCARD, !selected);
}
__EXPORT uint8_t stm32_spi3status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
src/drivers/boards/px4fmu-v1/px4fmu_usb.c
+3 -3
View File
@@ -82,10 +82,10 @@ __EXPORT void stm32_usbinitialize(void)
/* Configure the OTG FS VBUS sensing GPIO, Power On, and Overcurrent GPIOs */
#ifdef CONFIG_STM32_OTGFS
stm32_configgpio(GPIO_OTGFS_VBUS);
px4_arch_configgpio(GPIO_OTGFS_VBUS);
/* XXX We only support device mode
stm32_configgpio(GPIO_OTGFS_PWRON);
stm32_configgpio(GPIO_OTGFS_OVER);
px4_arch_configgpio(GPIO_OTGFS_PWRON);
px4_arch_configgpio(GPIO_OTGFS_OVER);
*/
#endif
}
src/drivers/boards/px4fmu-v2/board_config.h
+29
View File
@@ -244,6 +244,32 @@ __BEGIN_DECLS
#define BOARD_NAME "PX4FMU_V2"
/* By Providing BOARD_ADC_USB_CONNECTED this board support the ADC
* system_power interface, and therefore provides the true logic
* GPIO BOARD_ADC_xxxx macros.
*/
#define BOARD_ADC_USB_CONNECTED (px4_arch_gpioread(GPIO_OTGFS_VBUS))
#define BOARD_ADC_BRICK_VALID (!px4_arch_gpioread(GPIO_VDD_BRICK_VALID))
#define BOARD_ADC_SERVO_VALID (!px4_arch_gpioread(GPIO_VDD_SERVO_VALID))
#define BOARD_ADC_PERIPH_5V_OC (!px4_arch_gpioread(GPIO_VDD_5V_PERIPH_OC))
#define BOARD_ADC_HIPOWER_5V_OC (!px4_arch_gpioread(GPIO_VDD_5V_HIPOWER_OC))
#define BOARD_HAS_PWM DIRECT_PWM_OUTPUT_CHANNELS
#define BOARD_FMU_GPIO_TAB { \
{GPIO_GPIO0_INPUT, GPIO_GPIO0_OUTPUT, 0}, \
{GPIO_GPIO1_INPUT, GPIO_GPIO1_OUTPUT, 0}, \
{GPIO_GPIO2_INPUT, GPIO_GPIO2_OUTPUT, 0}, \
{GPIO_GPIO3_INPUT, GPIO_GPIO3_OUTPUT, 0}, \
{GPIO_GPIO4_INPUT, GPIO_GPIO4_OUTPUT, 0}, \
{GPIO_GPIO5_INPUT, GPIO_GPIO5_OUTPUT, 0}, \
{0, GPIO_VDD_5V_PERIPH_EN, 0}, \
{0, GPIO_VDD_3V3_SENSORS_EN, 0}, \
{GPIO_VDD_BRICK_VALID, 0, 0}, \
{GPIO_VDD_SERVO_VALID, 0, 0}, \
{GPIO_VDD_5V_HIPOWER_OC, 0, 0}, \
{GPIO_VDD_5V_PERIPH_OC, 0, 0}, }
/****************************************************************************************************
* Public Types
****************************************************************************************************/
@@ -267,9 +293,12 @@ __BEGIN_DECLS
****************************************************************************************************/
extern void stm32_spiinitialize(void);
extern void board_spi_reset(int ms);
extern void stm32_usbinitialize(void);
extern void board_peripheral_reset(int ms);
/****************************************************************************
* Name: nsh_archinitialize
*
src/drivers/boards/px4fmu-v2/px4fmu2_init.c
+47 -24
View File
@@ -71,6 +71,7 @@
#include <systemlib/cpuload.h>
#include <systemlib/perf_counter.h>
#include <systemlib/err.h>
/****************************************************************************
* Pre-Processor Definitions
@@ -177,6 +178,28 @@ fat_dma_free(FAR void *memory, size_t size)
#endif
/************************************************************************************
* Name: board_peripheral_reset
*
* Description:
*
************************************************************************************/
__EXPORT void board_peripheral_reset(int ms)
{
/* set the peripheral rails off */
px4_arch_configgpio(GPIO_VDD_5V_PERIPH_EN);
px4_arch_gpiowrite(GPIO_VDD_5V_PERIPH_EN, 1);
/* wait for the peripheral rail to reach GND */
usleep(ms * 1000);
warnx("reset done, %d ms", ms);
/* re-enable power */
/* switch the peripheral rail back on */
px4_arch_gpiowrite(GPIO_VDD_5V_PERIPH_EN, 0);
}
/************************************************************************************
* Name: stm32_boardinitialize
*
@@ -216,31 +239,31 @@ __EXPORT int nsh_archinitialize(void)
{
/* configure ADC pins */
stm32_configgpio(GPIO_ADC1_IN2); /* BATT_VOLTAGE_SENS */
stm32_configgpio(GPIO_ADC1_IN3); /* BATT_CURRENT_SENS */
stm32_configgpio(GPIO_ADC1_IN4); /* VDD_5V_SENS */
// stm32_configgpio(GPIO_ADC1_IN10); /* used by VBUS valid */
// stm32_configgpio(GPIO_ADC1_IN11); /* unused */
// stm32_configgpio(GPIO_ADC1_IN12); /* used by MPU6000 CS */
stm32_configgpio(GPIO_ADC1_IN13); /* FMU_AUX_ADC_1 */
stm32_configgpio(GPIO_ADC1_IN14); /* FMU_AUX_ADC_2 */
stm32_configgpio(GPIO_ADC1_IN15); /* PRESSURE_SENS */
px4_arch_configgpio(GPIO_ADC1_IN2); /* BATT_VOLTAGE_SENS */
px4_arch_configgpio(GPIO_ADC1_IN3); /* BATT_CURRENT_SENS */
px4_arch_configgpio(GPIO_ADC1_IN4); /* VDD_5V_SENS */
// px4_arch_configgpio(GPIO_ADC1_IN10); /* used by VBUS valid */
// px4_arch_configgpio(GPIO_ADC1_IN11); /* unused */
// px4_arch_configgpio(GPIO_ADC1_IN12); /* used by MPU6000 CS */
px4_arch_configgpio(GPIO_ADC1_IN13); /* FMU_AUX_ADC_1 */
px4_arch_configgpio(GPIO_ADC1_IN14); /* FMU_AUX_ADC_2 */
px4_arch_configgpio(GPIO_ADC1_IN15); /* PRESSURE_SENS */
/* configure power supply control/sense pins */
stm32_configgpio(GPIO_VDD_5V_PERIPH_EN);
stm32_configgpio(GPIO_VDD_3V3_SENSORS_EN);
stm32_configgpio(GPIO_VDD_BRICK_VALID);
stm32_configgpio(GPIO_VDD_SERVO_VALID);
stm32_configgpio(GPIO_VDD_5V_HIPOWER_OC);
stm32_configgpio(GPIO_VDD_5V_PERIPH_OC);
px4_arch_configgpio(GPIO_VDD_5V_PERIPH_EN);
px4_arch_configgpio(GPIO_VDD_3V3_SENSORS_EN);
px4_arch_configgpio(GPIO_VDD_BRICK_VALID);
px4_arch_configgpio(GPIO_VDD_SERVO_VALID);
px4_arch_configgpio(GPIO_VDD_5V_HIPOWER_OC);
px4_arch_configgpio(GPIO_VDD_5V_PERIPH_OC);
/* configure the GPIO pins to outputs and keep them low */
stm32_configgpio(GPIO_GPIO0_OUTPUT);
stm32_configgpio(GPIO_GPIO1_OUTPUT);
stm32_configgpio(GPIO_GPIO2_OUTPUT);
stm32_configgpio(GPIO_GPIO3_OUTPUT);
stm32_configgpio(GPIO_GPIO4_OUTPUT);
stm32_configgpio(GPIO_GPIO5_OUTPUT);
px4_arch_configgpio(GPIO_GPIO0_OUTPUT);
px4_arch_configgpio(GPIO_GPIO1_OUTPUT);
px4_arch_configgpio(GPIO_GPIO2_OUTPUT);
px4_arch_configgpio(GPIO_GPIO3_OUTPUT);
px4_arch_configgpio(GPIO_GPIO4_OUTPUT);
px4_arch_configgpio(GPIO_GPIO5_OUTPUT);
/* configure the high-resolution time/callout interface */
hrt_init();
@@ -276,7 +299,7 @@ __EXPORT int nsh_archinitialize(void)
/* Configure SPI-based devices */
spi1 = up_spiinitialize(1);
spi1 = px4_spibus_initialize(1);
if (!spi1) {
message("[boot] FAILED to initialize SPI port 1\n");
@@ -296,7 +319,7 @@ __EXPORT int nsh_archinitialize(void)
/* Get the SPI port for the FRAM */
spi2 = up_spiinitialize(2);
spi2 = px4_spibus_initialize(2);
if (!spi2) {
message("[boot] FAILED to initialize SPI port 2\n");
@@ -313,7 +336,7 @@ __EXPORT int nsh_archinitialize(void)
SPI_SETMODE(spi2, SPIDEV_MODE3);
SPI_SELECT(spi2, SPIDEV_FLASH, false);
spi4 = up_spiinitialize(4);
spi4 = px4_spibus_initialize(4);
/* Default SPI4 to 1MHz and de-assert the known chip selects. */
SPI_SETFREQUENCY(spi4, 10000000);
src/drivers/boards/px4fmu-v2/px4fmu2_led.c
+6 -6
View File
@@ -64,14 +64,14 @@ __EXPORT void led_init()
{
/* Configure LED1 GPIO for output */
stm32_configgpio(GPIO_LED1);
px4_arch_configgpio(GPIO_LED1);
}
__EXPORT void led_on(int led)
{
if (led == 1) {
/* Pull down to switch on */
stm32_gpiowrite(GPIO_LED1, false);
px4_arch_gpiowrite(GPIO_LED1, false);
}
}
@@ -79,18 +79,18 @@ __EXPORT void led_off(int led)
{
if (led == 1) {
/* Pull up to switch off */
stm32_gpiowrite(GPIO_LED1, true);
px4_arch_gpiowrite(GPIO_LED1, true);
}
}
__EXPORT void led_toggle(int led)
{
if (led == 1) {
if (stm32_gpioread(GPIO_LED1)) {
stm32_gpiowrite(GPIO_LED1, false);
if (px4_arch_gpioread(GPIO_LED1)) {
px4_arch_gpiowrite(GPIO_LED1, false);
} else {
stm32_gpiowrite(GPIO_LED1, true);
px4_arch_gpiowrite(GPIO_LED1, true);
}
}
}
src/drivers/boards/px4fmu-v2/px4fmu_spi.c
+149 -72
View File
@@ -46,7 +46,7 @@
#include <stdint.h>
#include <stdbool.h>
#include <debug.h>
#include <unistd.h>
#include <nuttx/spi.h>
#include <arch/board/board.h>
@@ -54,6 +54,7 @@
#include <chip.h>
#include <stm32.h>
#include "board_config.h"
#include <systemlib/err.h>
/************************************************************************************
* Public Functions
@@ -70,42 +71,42 @@
__EXPORT void stm32_spiinitialize(void)
{
#ifdef CONFIG_STM32_SPI1
stm32_configgpio(GPIO_SPI_CS_GYRO);
stm32_configgpio(GPIO_SPI_CS_ACCEL_MAG);
stm32_configgpio(GPIO_SPI_CS_BARO);
stm32_configgpio(GPIO_SPI_CS_HMC);
stm32_configgpio(GPIO_SPI_CS_MPU);
px4_arch_configgpio(GPIO_SPI_CS_GYRO);
px4_arch_configgpio(GPIO_SPI_CS_ACCEL_MAG);
px4_arch_configgpio(GPIO_SPI_CS_BARO);
px4_arch_configgpio(GPIO_SPI_CS_HMC);
px4_arch_configgpio(GPIO_SPI_CS_MPU);
/* De-activate all peripherals,
* required for some peripheral
* state machines
*/
stm32_gpiowrite(GPIO_SPI_CS_GYRO, 1);
stm32_gpiowrite(GPIO_SPI_CS_ACCEL_MAG, 1);
stm32_gpiowrite(GPIO_SPI_CS_BARO, 1);
stm32_gpiowrite(GPIO_SPI_CS_HMC, 1);
stm32_gpiowrite(GPIO_SPI_CS_MPU, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_GYRO, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_ACCEL_MAG, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_BARO, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_HMC, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_MPU, 1);
stm32_configgpio(GPIO_EXTI_GYRO_DRDY);
stm32_configgpio(GPIO_EXTI_MAG_DRDY);
stm32_configgpio(GPIO_EXTI_ACCEL_DRDY);
stm32_configgpio(GPIO_EXTI_MPU_DRDY);
px4_arch_configgpio(GPIO_EXTI_GYRO_DRDY);
px4_arch_configgpio(GPIO_EXTI_MAG_DRDY);
px4_arch_configgpio(GPIO_EXTI_ACCEL_DRDY);
px4_arch_configgpio(GPIO_EXTI_MPU_DRDY);
#endif
#ifdef CONFIG_STM32_SPI2
stm32_configgpio(GPIO_SPI_CS_FRAM);
stm32_gpiowrite(GPIO_SPI_CS_FRAM, 1);
px4_arch_configgpio(GPIO_SPI_CS_FRAM);
px4_arch_gpiowrite(GPIO_SPI_CS_FRAM, 1);
#endif
#ifdef CONFIG_STM32_SPI4
stm32_configgpio(GPIO_SPI_CS_EXT0);
stm32_configgpio(GPIO_SPI_CS_EXT1);
stm32_configgpio(GPIO_SPI_CS_EXT2);
stm32_configgpio(GPIO_SPI_CS_EXT3);
stm32_gpiowrite(GPIO_SPI_CS_EXT0, 1);
stm32_gpiowrite(GPIO_SPI_CS_EXT1, 1);
stm32_gpiowrite(GPIO_SPI_CS_EXT2, 1);
stm32_gpiowrite(GPIO_SPI_CS_EXT3, 1);
px4_arch_configgpio(GPIO_SPI_CS_EXT0);
px4_arch_configgpio(GPIO_SPI_CS_EXT1);
px4_arch_configgpio(GPIO_SPI_CS_EXT2);
px4_arch_configgpio(GPIO_SPI_CS_EXT3);
px4_arch_gpiowrite(GPIO_SPI_CS_EXT0, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_EXT1, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_EXT2, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_EXT3, 1);
#endif
}
@@ -116,56 +117,56 @@ __EXPORT void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid,
switch (devid) {
case PX4_SPIDEV_GYRO:
/* Making sure the other peripherals are not selected */
stm32_gpiowrite(GPIO_SPI_CS_GYRO, !selected);
stm32_gpiowrite(GPIO_SPI_CS_ACCEL_MAG, 1);
stm32_gpiowrite(GPIO_SPI_CS_BARO, 1);
stm32_gpiowrite(GPIO_SPI_CS_HMC, 1);
stm32_gpiowrite(GPIO_SPI_CS_MPU, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_GYRO, !selected);
px4_arch_gpiowrite(GPIO_SPI_CS_ACCEL_MAG, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_BARO, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_HMC, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_MPU, 1);
break;
case PX4_SPIDEV_ACCEL_MAG:
/* Making sure the other peripherals are not selected */
stm32_gpiowrite(GPIO_SPI_CS_GYRO, 1);
stm32_gpiowrite(GPIO_SPI_CS_ACCEL_MAG, !selected);
stm32_gpiowrite(GPIO_SPI_CS_BARO, 1);
stm32_gpiowrite(GPIO_SPI_CS_HMC, 1);
stm32_gpiowrite(GPIO_SPI_CS_MPU, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_GYRO, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_ACCEL_MAG, !selected);
px4_arch_gpiowrite(GPIO_SPI_CS_BARO, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_HMC, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_MPU, 1);
break;
case PX4_SPIDEV_BARO:
/* Making sure the other peripherals are not selected */
stm32_gpiowrite(GPIO_SPI_CS_GYRO, 1);
stm32_gpiowrite(GPIO_SPI_CS_ACCEL_MAG, 1);
stm32_gpiowrite(GPIO_SPI_CS_BARO, !selected);
stm32_gpiowrite(GPIO_SPI_CS_HMC, 1);
stm32_gpiowrite(GPIO_SPI_CS_MPU, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_GYRO, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_ACCEL_MAG, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_BARO, !selected);
px4_arch_gpiowrite(GPIO_SPI_CS_HMC, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_MPU, 1);
break;
case PX4_SPIDEV_HMC:
/* Making sure the other peripherals are not selected */
stm32_gpiowrite(GPIO_SPI_CS_GYRO, 1);
stm32_gpiowrite(GPIO_SPI_CS_ACCEL_MAG, 1);
stm32_gpiowrite(GPIO_SPI_CS_BARO, 1);
stm32_gpiowrite(GPIO_SPI_CS_HMC, !selected);
stm32_gpiowrite(GPIO_SPI_CS_MPU, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_GYRO, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_ACCEL_MAG, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_BARO, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_HMC, !selected);
px4_arch_gpiowrite(GPIO_SPI_CS_MPU, 1);
break;
case PX4_SPIDEV_LIS:
/* Making sure the other peripherals are not selected */
stm32_gpiowrite(GPIO_SPI_CS_GYRO, 1);
stm32_gpiowrite(GPIO_SPI_CS_ACCEL_MAG, 1);
stm32_gpiowrite(GPIO_SPI_CS_BARO, 1);
stm32_gpiowrite(GPIO_SPI_CS_LIS, !selected);
stm32_gpiowrite(GPIO_SPI_CS_MPU, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_GYRO, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_ACCEL_MAG, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_BARO, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_LIS, !selected);
px4_arch_gpiowrite(GPIO_SPI_CS_MPU, 1);
break;
case PX4_SPIDEV_MPU:
/* Making sure the other peripherals are not selected */
stm32_gpiowrite(GPIO_SPI_CS_GYRO, 1);
stm32_gpiowrite(GPIO_SPI_CS_ACCEL_MAG, 1);
stm32_gpiowrite(GPIO_SPI_CS_BARO, 1);
stm32_gpiowrite(GPIO_SPI_CS_HMC, 1);
stm32_gpiowrite(GPIO_SPI_CS_MPU, !selected);
px4_arch_gpiowrite(GPIO_SPI_CS_GYRO, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_ACCEL_MAG, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_BARO, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_HMC, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_MPU, !selected);
break;
default:
@@ -183,7 +184,7 @@ __EXPORT uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devi
__EXPORT void stm32_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
{
/* there can only be one device on this bus, so always select it */
stm32_gpiowrite(GPIO_SPI_CS_FRAM, !selected);
px4_arch_gpiowrite(GPIO_SPI_CS_FRAM, !selected);
}
__EXPORT uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
@@ -200,34 +201,34 @@ __EXPORT void stm32_spi4select(FAR struct spi_dev_s *dev, enum spi_dev_e devid,
switch (devid) {
case PX4_SPIDEV_EXT0:
/* Making sure the other peripherals are not selected */
stm32_gpiowrite(GPIO_SPI_CS_EXT0, !selected);
stm32_gpiowrite(GPIO_SPI_CS_EXT1, 1);
stm32_gpiowrite(GPIO_SPI_CS_EXT2, 1);
stm32_gpiowrite(GPIO_SPI_CS_EXT3, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_EXT0, !selected);
px4_arch_gpiowrite(GPIO_SPI_CS_EXT1, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_EXT2, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_EXT3, 1);
break;
case PX4_SPIDEV_EXT1:
/* Making sure the other peripherals are not selected */
stm32_gpiowrite(GPIO_SPI_CS_EXT0, 1);
stm32_gpiowrite(GPIO_SPI_CS_EXT1, !selected);
stm32_gpiowrite(GPIO_SPI_CS_EXT2, 1);
stm32_gpiowrite(GPIO_SPI_CS_EXT3, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_EXT0, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_EXT1, !selected);
px4_arch_gpiowrite(GPIO_SPI_CS_EXT2, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_EXT3, 1);
break;
case PX4_SPIDEV_EXT2:
/* Making sure the other peripherals are not selected */
stm32_gpiowrite(GPIO_SPI_CS_EXT0, 1);
stm32_gpiowrite(GPIO_SPI_CS_EXT1, 1);
stm32_gpiowrite(GPIO_SPI_CS_EXT2, !selected);
stm32_gpiowrite(GPIO_SPI_CS_EXT3, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_EXT0, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_EXT1, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_EXT2, !selected);
px4_arch_gpiowrite(GPIO_SPI_CS_EXT3, 1);
break;
case PX4_SPIDEV_EXT3:
/* Making sure the other peripherals are not selected */
stm32_gpiowrite(GPIO_SPI_CS_EXT0, 1);
stm32_gpiowrite(GPIO_SPI_CS_EXT1, 1);
stm32_gpiowrite(GPIO_SPI_CS_EXT2, 1);
stm32_gpiowrite(GPIO_SPI_CS_EXT3, !selected);
px4_arch_gpiowrite(GPIO_SPI_CS_EXT0, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_EXT1, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_EXT2, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_EXT3, !selected);
break;
default:
@@ -240,3 +241,79 @@ __EXPORT uint8_t stm32_spi4status(FAR struct spi_dev_s *dev, enum spi_dev_e devi
{
return SPI_STATUS_PRESENT;
}
__EXPORT void board_spi_reset(int ms)
{
/* disable SPI bus */
px4_arch_configgpio(GPIO_SPI_CS_GYRO_OFF);
px4_arch_configgpio(GPIO_SPI_CS_ACCEL_MAG_OFF);
px4_arch_configgpio(GPIO_SPI_CS_BARO_OFF);
px4_arch_configgpio(GPIO_SPI_CS_MPU_OFF);
px4_arch_gpiowrite(GPIO_SPI_CS_GYRO_OFF, 0);
px4_arch_gpiowrite(GPIO_SPI_CS_ACCEL_MAG_OFF, 0);
px4_arch_gpiowrite(GPIO_SPI_CS_BARO_OFF, 0);
px4_arch_gpiowrite(GPIO_SPI_CS_MPU_OFF, 0);
px4_arch_configgpio(GPIO_SPI1_SCK_OFF);
px4_arch_configgpio(GPIO_SPI1_MISO_OFF);
px4_arch_configgpio(GPIO_SPI1_MOSI_OFF);
px4_arch_gpiowrite(GPIO_SPI1_SCK_OFF, 0);
px4_arch_gpiowrite(GPIO_SPI1_MISO_OFF, 0);
px4_arch_gpiowrite(GPIO_SPI1_MOSI_OFF, 0);
px4_arch_configgpio(GPIO_GYRO_DRDY_OFF);
px4_arch_configgpio(GPIO_MAG_DRDY_OFF);
px4_arch_configgpio(GPIO_ACCEL_DRDY_OFF);
px4_arch_configgpio(GPIO_EXTI_MPU_DRDY_OFF);
px4_arch_gpiowrite(GPIO_GYRO_DRDY_OFF, 0);
px4_arch_gpiowrite(GPIO_MAG_DRDY_OFF, 0);
px4_arch_gpiowrite(GPIO_ACCEL_DRDY_OFF, 0);
px4_arch_gpiowrite(GPIO_EXTI_MPU_DRDY_OFF, 0);
/* set the sensor rail off */
px4_arch_configgpio(GPIO_VDD_3V3_SENSORS_EN);
px4_arch_gpiowrite(GPIO_VDD_3V3_SENSORS_EN, 0);
/* wait for the sensor rail to reach GND */
usleep(ms * 1000);
warnx("reset done, %d ms", ms);
/* re-enable power */
/* switch the sensor rail back on */
px4_arch_gpiowrite(GPIO_VDD_3V3_SENSORS_EN, 1);
/* wait a bit before starting SPI, different times didn't influence results */
usleep(100);
/* reconfigure the SPI pins */
#ifdef CONFIG_STM32_SPI1
px4_arch_configgpio(GPIO_SPI_CS_GYRO);
px4_arch_configgpio(GPIO_SPI_CS_ACCEL_MAG);
px4_arch_configgpio(GPIO_SPI_CS_BARO);
px4_arch_configgpio(GPIO_SPI_CS_MPU);
/* De-activate all peripherals,
* required for some peripheral
* state machines
*/
px4_arch_gpiowrite(GPIO_SPI_CS_GYRO, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_ACCEL_MAG, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_BARO, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_MPU, 1);
px4_arch_configgpio(GPIO_SPI1_SCK);
px4_arch_configgpio(GPIO_SPI1_MISO);
px4_arch_configgpio(GPIO_SPI1_MOSI);
// // XXX bring up the EXTI pins again
// px4_arch_configgpio(GPIO_GYRO_DRDY);
// px4_arch_configgpio(GPIO_MAG_DRDY);
// px4_arch_configgpio(GPIO_ACCEL_DRDY);
// px4_arch_configgpio(GPIO_EXTI_MPU_DRDY);
#endif
}
src/drivers/boards/px4fmu-v2/px4fmu_usb.c
+3 -3
View File
@@ -82,10 +82,10 @@ __EXPORT void stm32_usbinitialize(void)
/* Configure the OTG FS VBUS sensing GPIO, Power On, and Overcurrent GPIOs */
#ifdef CONFIG_STM32_OTGFS
stm32_configgpio(GPIO_OTGFS_VBUS);
px4_arch_configgpio(GPIO_OTGFS_VBUS);
/* XXX We only support device mode
stm32_configgpio(GPIO_OTGFS_PWRON);
stm32_configgpio(GPIO_OTGFS_OVER);
px4_arch_configgpio(GPIO_OTGFS_PWRON);
px4_arch_configgpio(GPIO_OTGFS_OVER);
*/
#endif
}
src/drivers/boards/px4fmu-v4/board_config.h
+33 -6
View File
@@ -251,10 +251,10 @@ __BEGIN_DECLS
#define GPIO_PERIPH_3V3_EN (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_SET|GPIO_PORTC|GPIO_PIN5)
/* for R07, this signal is active low */
//#define GPIO_SBUS_INV (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTC|GPIO_PIN13)
//#define INVERT_RC_INPUT(_s) stm32_gpiowrite(GPIO_SBUS_INV, 1-_s);
//#define INVERT_RC_INPUT(_s) px4_arch_gpiowrite(GPIO_SBUS_INV, 1-_s);
/* for R12, this signal is active high */
#define GPIO_SBUS_INV (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_SET|GPIO_PORTC|GPIO_PIN13)
#define INVERT_RC_INPUT(_s) stm32_gpiowrite(GPIO_SBUS_INV, _s);
#define INVERT_RC_INPUT(_s) px4_arch_gpiowrite(GPIO_SBUS_INV, _s);
#define GPIO_8266_GPIO0 (GPIO_INPUT|GPIO_PULLUP|GPIO_PORTE|GPIO_PIN2)
#define GPIO_SPEKTRUM_PWR_EN (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTE|GPIO_PIN4)
@@ -263,18 +263,41 @@ __BEGIN_DECLS
/* Power switch controls ******************************************************/
#define POWER_SPEKTRUM(_s) stm32_gpiowrite(GPIO_SPEKTRUM_PWR_EN, (1-_s))
#define POWER_SPEKTRUM(_s) px4_arch_gpiowrite(GPIO_SPEKTRUM_PWR_EN, (1-_s))
//#define GPIO_USART1_RX_SPEKTRUM (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_SET|GPIO_PORTC|GPIO_PIN7)
#define SPEKTRUM_RX_AS_UART() stm32_configgpio(GPIO_USART1_RX)
#define SPEKTRUM_RX_AS_UART() px4_arch_configgpio(GPIO_USART1_RX)
// FMUv4 has a separate GPIO for serial RC output
#define GPIO_RC_OUT (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTC|GPIO_PIN6)
#define SPEKTRUM_RX_AS_GPIO() stm32_configgpio(GPIO_RC_OUT)
#define SPEKTRUM_RX_HIGH(_s) stm32_gpiowrite(GPIO_RC_OUT, (_s))
#define SPEKTRUM_RX_AS_GPIO() px4_arch_configgpio(GPIO_RC_OUT)
#define SPEKTRUM_RX_HIGH(_s) px4_arch_gpiowrite(GPIO_RC_OUT, (_s))
#define BOARD_NAME "PX4FMU_V4"
/* By Providing BOARD_ADC_USB_CONNECTED this board support the ADC
* system_power interface, and herefore provides the true logic
* GPIO BOARD_ADC_xxxx macros.
*/
#define BOARD_ADC_USB_CONNECTED (px4_arch_gpioread(GPIO_OTGFS_VBUS))
#define BOARD_ADC_BRICK_VALID (px4_arch_gpioread(GPIO_VDD_BRICK_VALID))
#define BOARD_ADC_SERVO_VALID (1)
#define BOARD_ADC_PERIPH_5V_OC (0)
#define BOARD_ADC_HIPOWER_5V_OC (0)
#define BOARD_HAS_PWM DIRECT_PWM_OUTPUT_CHANNELS
#define BOARD_FMU_GPIO_TAB { \
{GPIO_GPIO0_INPUT, GPIO_GPIO0_OUTPUT, 0}, \
{GPIO_GPIO1_INPUT, GPIO_GPIO1_OUTPUT, 0}, \
{GPIO_GPIO2_INPUT, GPIO_GPIO2_OUTPUT, 0}, \
{GPIO_GPIO3_INPUT, GPIO_GPIO3_OUTPUT, 0}, \
{GPIO_GPIO4_INPUT, GPIO_GPIO4_OUTPUT, 0}, \
{GPIO_GPIO5_INPUT, GPIO_GPIO5_OUTPUT, 0}, \
{0, GPIO_VDD_3V3_SENSORS_EN, 0}, \
{GPIO_VDD_BRICK_VALID, 0, 0}, }
/****************************************************************************************************
* Public Types
****************************************************************************************************/
@@ -298,9 +321,13 @@ __BEGIN_DECLS
****************************************************************************************************/
extern void stm32_spiinitialize(void);
void board_spi_reset(int ms);
extern void stm32_usbinitialize(void);
extern void board_peripheral_reset(int ms);
/****************************************************************************
* Name: nsh_archinitialize
*
src/drivers/boards/px4fmu-v4/px4fmu_init.c
+52 -22
View File
@@ -71,6 +71,7 @@
#include <systemlib/cpuload.h>
#include <systemlib/perf_counter.h>
#include <systemlib/err.h>
/****************************************************************************
* Pre-Processor Definitions
@@ -177,6 +178,35 @@ fat_dma_free(FAR void *memory, size_t size)
#endif
/************************************************************************************
* Name: board_peripheral_reset
*
* Description:
*
************************************************************************************/
__EXPORT void board_peripheral_reset(int ms)
{
/* set the peripheral rails off */
px4_arch_configgpio(GPIO_PERIPH_3V3_EN);
px4_arch_gpiowrite(GPIO_PERIPH_3V3_EN, 0);
bool last = px4_arch_gpioread(GPIO_SPEKTRUM_PWR_EN);
/* Keep Spektum on to discharge rail*/
px4_arch_gpiowrite(GPIO_SPEKTRUM_PWR_EN, 1);
/* wait for the peripheral rail to reach GND */
usleep(ms * 1000);
warnx("reset done, %d ms", ms);
/* re-enable power */
/* switch the peripheral rail back on */
px4_arch_gpiowrite(GPIO_SPEKTRUM_PWR_EN, last);
px4_arch_gpiowrite(GPIO_PERIPH_3V3_EN, 1);
}
/************************************************************************************
* Name: stm32_boardinitialize
*
@@ -215,34 +245,34 @@ __EXPORT int nsh_archinitialize(void)
{
/* configure ADC pins */
stm32_configgpio(GPIO_ADC1_IN2); /* BATT_VOLTAGE_SENS */
stm32_configgpio(GPIO_ADC1_IN3); /* BATT_CURRENT_SENS */
stm32_configgpio(GPIO_ADC1_IN4); /* VDD_5V_SENS */
stm32_configgpio(GPIO_ADC1_IN11); /* RSSI analog in */
px4_arch_configgpio(GPIO_ADC1_IN2); /* BATT_VOLTAGE_SENS */
px4_arch_configgpio(GPIO_ADC1_IN3); /* BATT_CURRENT_SENS */
px4_arch_configgpio(GPIO_ADC1_IN4); /* VDD_5V_SENS */
px4_arch_configgpio(GPIO_ADC1_IN11); /* RSSI analog in */
/* configure power supply control/sense pins */
stm32_configgpio(GPIO_PERIPH_3V3_EN);
stm32_configgpio(GPIO_VDD_BRICK_VALID);
px4_arch_configgpio(GPIO_PERIPH_3V3_EN);
px4_arch_configgpio(GPIO_VDD_BRICK_VALID);
stm32_configgpio(GPIO_SBUS_INV);
stm32_configgpio(GPIO_8266_GPIO0);
stm32_configgpio(GPIO_SPEKTRUM_PWR_EN);
stm32_configgpio(GPIO_8266_PD);
stm32_configgpio(GPIO_8266_RST);
stm32_configgpio(GPIO_BTN_SAFETY);
px4_arch_configgpio(GPIO_SBUS_INV);
px4_arch_configgpio(GPIO_8266_GPIO0);
px4_arch_configgpio(GPIO_SPEKTRUM_PWR_EN);
px4_arch_configgpio(GPIO_8266_PD);
px4_arch_configgpio(GPIO_8266_RST);
px4_arch_configgpio(GPIO_BTN_SAFETY);
#ifdef GPIO_RC_OUT
stm32_configgpio(GPIO_RC_OUT); /* Serial RC output pin */
stm32_gpiowrite(GPIO_RC_OUT, 1); /* set it high to pull RC input up */
px4_arch_configgpio(GPIO_RC_OUT); /* Serial RC output pin */
px4_arch_gpiowrite(GPIO_RC_OUT, 1); /* set it high to pull RC input up */
#endif
/* configure the GPIO pins to outputs and keep them low */
stm32_configgpio(GPIO_GPIO0_OUTPUT);
stm32_configgpio(GPIO_GPIO1_OUTPUT);
stm32_configgpio(GPIO_GPIO2_OUTPUT);
stm32_configgpio(GPIO_GPIO3_OUTPUT);
stm32_configgpio(GPIO_GPIO4_OUTPUT);
stm32_configgpio(GPIO_GPIO5_OUTPUT);
px4_arch_configgpio(GPIO_GPIO0_OUTPUT);
px4_arch_configgpio(GPIO_GPIO1_OUTPUT);
px4_arch_configgpio(GPIO_GPIO2_OUTPUT);
px4_arch_configgpio(GPIO_GPIO3_OUTPUT);
px4_arch_configgpio(GPIO_GPIO4_OUTPUT);
px4_arch_configgpio(GPIO_GPIO5_OUTPUT);
/* configure the high-resolution time/callout interface */
hrt_init();
@@ -280,7 +310,7 @@ __EXPORT int nsh_archinitialize(void)
/* Configure SPI-based devices */
spi1 = up_spiinitialize(1);
spi1 = px4_spibus_initialize(1);
if (!spi1) {
message("[boot] FAILED to initialize SPI port 1\n");
@@ -299,7 +329,7 @@ __EXPORT int nsh_archinitialize(void)
/* Get the SPI port for the FRAM */
spi2 = up_spiinitialize(2);
spi2 = px4_spibus_initialize(2);
if (!spi2) {
message("[boot] FAILED to initialize SPI port 2\n");
src/drivers/boards/px4fmu-v4/px4fmu_led.c
+3 -3
View File
@@ -73,20 +73,20 @@ __EXPORT void led_init(void)
{
/* Configure LED GPIOs for output */
for (size_t l = 0; l < (sizeof(g_ledmap) / sizeof(g_ledmap[0])); l++) {
stm32_configgpio(g_ledmap[l]);
px4_arch_configgpio(g_ledmap[l]);
}
}
static void phy_set_led(int led, bool state)
{
/* Pull Down to switch on */
stm32_gpiowrite(g_ledmap[led], !state);
px4_arch_gpiowrite(g_ledmap[led], !state);
}
static bool phy_get_led(int led)
{
return !stm32_gpioread(g_ledmap[led]);
return !px4_arch_gpioread(g_ledmap[led]);
}
__EXPORT void led_on(int led)
src/drivers/boards/px4fmu-v4/px4fmu_spi.c
+110 -33
View File
@@ -46,6 +46,7 @@
#include <stdint.h>
#include <stdbool.h>
#include <debug.h>
#include <unistd.h>
#include <nuttx/spi.h>
#include <arch/board/board.h>
@@ -54,6 +55,7 @@
#include <chip.h>
#include <stm32.h>
#include "board_config.h"
#include <systemlib/err.h>
/************************************************************************************
* Public Functions
@@ -70,28 +72,28 @@
__EXPORT void stm32_spiinitialize(void)
{
#ifdef CONFIG_STM32_SPI1
stm32_configgpio(GPIO_SPI_CS_MPU9250);
stm32_configgpio(GPIO_SPI_CS_HMC5983);
stm32_configgpio(GPIO_SPI_CS_MS5611);
stm32_configgpio(GPIO_SPI_CS_ICM_20608_G);
px4_arch_configgpio(GPIO_SPI_CS_MPU9250);
px4_arch_configgpio(GPIO_SPI_CS_HMC5983);
px4_arch_configgpio(GPIO_SPI_CS_MS5611);
px4_arch_configgpio(GPIO_SPI_CS_ICM_20608_G);
/* De-activate all peripherals,
* required for some peripheral
* state machines
*/
stm32_gpiowrite(GPIO_SPI_CS_MPU9250, 1);
stm32_gpiowrite(GPIO_SPI_CS_HMC5983, 1);
stm32_gpiowrite(GPIO_SPI_CS_MS5611, 1);
stm32_gpiowrite(GPIO_SPI_CS_ICM_20608_G, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_MPU9250, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_HMC5983, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_MS5611, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_ICM_20608_G, 1);
stm32_configgpio(GPIO_DRDY_MPU9250);
stm32_configgpio(GPIO_DRDY_HMC5983);
stm32_configgpio(GPIO_DRDY_ICM_20608_G);
px4_arch_configgpio(GPIO_DRDY_MPU9250);
px4_arch_configgpio(GPIO_DRDY_HMC5983);
px4_arch_configgpio(GPIO_DRDY_ICM_20608_G);
#endif
#ifdef CONFIG_STM32_SPI2
stm32_configgpio(GPIO_SPI_CS_FRAM);
stm32_gpiowrite(GPIO_SPI_CS_FRAM, 1);
px4_arch_configgpio(GPIO_SPI_CS_FRAM);
px4_arch_gpiowrite(GPIO_SPI_CS_FRAM, 1);
#endif
}
@@ -103,10 +105,10 @@ __EXPORT void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid,
switch (devid) {
case PX4_SPIDEV_ICM:
/* Making sure the other peripherals are not selected */
stm32_gpiowrite(GPIO_SPI_CS_MPU9250, 1);
stm32_gpiowrite(GPIO_SPI_CS_HMC5983, 1);
stm32_gpiowrite(GPIO_SPI_CS_MS5611, 1);
stm32_gpiowrite(GPIO_SPI_CS_ICM_20608_G, !selected);
px4_arch_gpiowrite(GPIO_SPI_CS_MPU9250, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_HMC5983, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_MS5611, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_ICM_20608_G, !selected);
break;
case PX4_SPIDEV_ACCEL_MAG:
@@ -115,26 +117,26 @@ __EXPORT void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid,
case PX4_SPIDEV_BARO:
/* Making sure the other peripherals are not selected */
stm32_gpiowrite(GPIO_SPI_CS_MPU9250, 1);
stm32_gpiowrite(GPIO_SPI_CS_HMC5983, 1);
stm32_gpiowrite(GPIO_SPI_CS_MS5611, !selected);
stm32_gpiowrite(GPIO_SPI_CS_ICM_20608_G, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_MPU9250, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_HMC5983, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_MS5611, !selected);
px4_arch_gpiowrite(GPIO_SPI_CS_ICM_20608_G, 1);
break;
case PX4_SPIDEV_HMC:
/* Making sure the other peripherals are not selected */
stm32_gpiowrite(GPIO_SPI_CS_MPU9250, 1);
stm32_gpiowrite(GPIO_SPI_CS_HMC5983, !selected);
stm32_gpiowrite(GPIO_SPI_CS_MS5611, 1);
stm32_gpiowrite(GPIO_SPI_CS_ICM_20608_G, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_MPU9250, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_HMC5983, !selected);
px4_arch_gpiowrite(GPIO_SPI_CS_MS5611, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_ICM_20608_G, 1);
break;
case PX4_SPIDEV_MPU:
/* Making sure the other peripherals are not selected */
stm32_gpiowrite(GPIO_SPI_CS_MPU9250, !selected);
stm32_gpiowrite(GPIO_SPI_CS_HMC5983, 1);
stm32_gpiowrite(GPIO_SPI_CS_MS5611, 1);
stm32_gpiowrite(GPIO_SPI_CS_ICM_20608_G, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_MPU9250, !selected);
px4_arch_gpiowrite(GPIO_SPI_CS_HMC5983, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_MS5611, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_ICM_20608_G, 1);
break;
default:
@@ -156,14 +158,14 @@ __EXPORT void stm32_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid,
switch (devid) {
case SPIDEV_FLASH:
/* Making sure the other peripherals are not selected */
stm32_gpiowrite(GPIO_SPI_CS_MS5611, 1);
stm32_gpiowrite(GPIO_SPI_CS_FRAM, !selected);
px4_arch_gpiowrite(GPIO_SPI_CS_MS5611, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_FRAM, !selected);
break;
case PX4_SPIDEV_BARO:
/* Making sure the other peripherals are not selected */
stm32_gpiowrite(GPIO_SPI_CS_FRAM, 1);
stm32_gpiowrite(GPIO_SPI_CS_MS5611, !selected);
px4_arch_gpiowrite(GPIO_SPI_CS_FRAM, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_MS5611, !selected);
break;
default:
@@ -177,3 +179,78 @@ __EXPORT uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devi
return SPI_STATUS_PRESENT;
}
#endif
__EXPORT void board_spi_reset(int ms)
{
/* disable SPI bus */
px4_arch_configgpio(GPIO_SPI_CS_OFF_MPU9250);
px4_arch_configgpio(GPIO_SPI_CS_OFF_HMC5983);
px4_arch_configgpio(GPIO_SPI_CS_OFF_MS5611);
px4_arch_configgpio(GPIO_SPI_CS_OFF_ICM_20608_G);
px4_arch_gpiowrite(GPIO_SPI_CS_OFF_MPU9250, 0);
px4_arch_gpiowrite(GPIO_SPI_CS_OFF_HMC5983, 0);
px4_arch_gpiowrite(GPIO_SPI_CS_OFF_MS5611, 0);
px4_arch_gpiowrite(GPIO_SPI_CS_OFF_ICM_20608_G, 0);
px4_arch_configgpio(GPIO_SPI1_SCK_OFF);
px4_arch_configgpio(GPIO_SPI1_MISO_OFF);
px4_arch_configgpio(GPIO_SPI1_MOSI_OFF);
px4_arch_gpiowrite(GPIO_SPI1_SCK_OFF, 0);
px4_arch_gpiowrite(GPIO_SPI1_MISO_OFF, 0);
px4_arch_gpiowrite(GPIO_SPI1_MOSI_OFF, 0);
px4_arch_configgpio(GPIO_DRDY_OFF_MPU9250);
px4_arch_configgpio(GPIO_DRDY_OFF_HMC5983);
px4_arch_configgpio(GPIO_DRDY_OFF_ICM_20608_G);
px4_arch_gpiowrite(GPIO_DRDY_OFF_MPU9250, 0);
px4_arch_gpiowrite(GPIO_DRDY_OFF_HMC5983, 0);
px4_arch_gpiowrite(GPIO_DRDY_OFF_ICM_20608_G, 0);
/* set the sensor rail off */
px4_arch_configgpio(GPIO_VDD_3V3_SENSORS_EN);
px4_arch_gpiowrite(GPIO_VDD_3V3_SENSORS_EN, 0);
/* wait for the sensor rail to reach GND */
usleep(ms * 1000);
warnx("reset done, %d ms", ms);
/* re-enable power */
/* switch the sensor rail back on */
px4_arch_gpiowrite(GPIO_VDD_3V3_SENSORS_EN, 1);
/* wait a bit before starting SPI, different times didn't influence results */
usleep(100);
/* reconfigure the SPI pins */
#ifdef CONFIG_STM32_SPI1
px4_arch_configgpio(GPIO_SPI_CS_MPU9250);
px4_arch_configgpio(GPIO_SPI_CS_HMC5983);
px4_arch_configgpio(GPIO_SPI_CS_MS5611);
px4_arch_configgpio(GPIO_SPI_CS_ICM_20608_G);
/* De-activate all peripherals,
* required for some peripheral
* state machines
*/
px4_arch_gpiowrite(GPIO_SPI_CS_MPU9250, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_HMC5983, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_MS5611, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_ICM_20608_G, 1);
px4_arch_configgpio(GPIO_SPI1_SCK);
px4_arch_configgpio(GPIO_SPI1_MISO);
px4_arch_configgpio(GPIO_SPI1_MOSI);
// // XXX bring up the EXTI pins again
// px4_arch_configgpio(GPIO_GYRO_DRDY);
// px4_arch_configgpio(GPIO_MAG_DRDY);
// px4_arch_configgpio(GPIO_ACCEL_DRDY);
// px4_arch_configgpio(GPIO_EXTI_MPU_DRDY);
#endif
}
src/drivers/boards/px4fmu-v4/px4fmu_usb.c
+3 -3
View File
@@ -82,10 +82,10 @@ __EXPORT void stm32_usbinitialize(void)
/* Configure the OTG FS VBUS sensing GPIO, Power On, and Overcurrent GPIOs */
#ifdef CONFIG_STM32_OTGFS
stm32_configgpio(GPIO_OTGFS_VBUS);
px4_arch_configgpio(GPIO_OTGFS_VBUS);
/* XXX We only support device mode
stm32_configgpio(GPIO_OTGFS_PWRON);
stm32_configgpio(GPIO_OTGFS_OVER);
px4_arch_configgpio(GPIO_OTGFS_PWRON);
px4_arch_configgpio(GPIO_OTGFS_OVER);
*/
#endif
}
src/drivers/boards/px4io-v1/board_config.h
+4 -4
View File
@@ -84,11 +84,11 @@
#define GPIO_RELAY2_EN (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTA|GPIO_PIN11)
#define GPIO_SPEKTRUM_PWR_EN GPIO_RELAY1_EN
#define POWER_SPEKTRUM(_s) stm32_gpiowrite(GPIO_RELAY1_EN, (_s))
#define POWER_SPEKTRUM(_s) px4_arch_gpiowrite(GPIO_RELAY1_EN, (_s))
#define SPEKTRUM_RX_HIGH(_s) stm32_gpiowrite(GPIO_USART1_RX_SPEKTRUM, (_s))
#define SPEKTRUM_RX_AS_UART() stm32_configgpio(GPIO_USART1_RX)
#define SPEKTRUM_RX_AS_GPIO() stm32_configgpio(GPIO_USART1_RX_SPEKTRUM)
#define SPEKTRUM_RX_HIGH(_s) px4_arch_gpiowrite(GPIO_USART1_RX_SPEKTRUM, (_s))
#define SPEKTRUM_RX_AS_UART() px4_arch_configgpio(GPIO_USART1_RX)
#define SPEKTRUM_RX_AS_GPIO() px4_arch_configgpio(GPIO_USART1_RX_SPEKTRUM)
/* Analog inputs ********************************************************************/
src/drivers/boards/px4io-v1/px4io_init.c
+16 -16
View File
@@ -81,26 +81,26 @@
__EXPORT void stm32_boardinitialize(void)
{
/* configure GPIOs */
stm32_configgpio(GPIO_ACC1_PWR_EN);
stm32_configgpio(GPIO_ACC2_PWR_EN);
stm32_configgpio(GPIO_SERVO_PWR_EN);
stm32_configgpio(GPIO_RELAY1_EN);
stm32_configgpio(GPIO_RELAY2_EN);
px4_arch_configgpio(GPIO_ACC1_PWR_EN);
px4_arch_configgpio(GPIO_ACC2_PWR_EN);
px4_arch_configgpio(GPIO_SERVO_PWR_EN);
px4_arch_configgpio(GPIO_RELAY1_EN);
px4_arch_configgpio(GPIO_RELAY2_EN);
/* turn off - all leds are active low */
stm32_gpiowrite(GPIO_LED1, true);
stm32_gpiowrite(GPIO_LED2, true);
stm32_gpiowrite(GPIO_LED3, true);
px4_arch_gpiowrite(GPIO_LED1, true);
px4_arch_gpiowrite(GPIO_LED2, true);
px4_arch_gpiowrite(GPIO_LED3, true);
/* LED config */
stm32_configgpio(GPIO_LED1);
stm32_configgpio(GPIO_LED2);
stm32_configgpio(GPIO_LED3);
px4_arch_configgpio(GPIO_LED1);
px4_arch_configgpio(GPIO_LED2);
px4_arch_configgpio(GPIO_LED3);
stm32_configgpio(GPIO_ACC_OC_DETECT);
stm32_configgpio(GPIO_SERVO_OC_DETECT);
stm32_configgpio(GPIO_BTN_SAFETY);
px4_arch_configgpio(GPIO_ACC_OC_DETECT);
px4_arch_configgpio(GPIO_SERVO_OC_DETECT);
px4_arch_configgpio(GPIO_BTN_SAFETY);
stm32_configgpio(GPIO_ADC_VBATT);
stm32_configgpio(GPIO_ADC_IN5);
px4_arch_configgpio(GPIO_ADC_VBATT);
px4_arch_configgpio(GPIO_ADC_IN5);
}
src/drivers/boards/px4io-v2/board_config.h
+4 -4
View File
@@ -88,11 +88,11 @@
/* Power switch controls ******************************************************/
#define GPIO_SPEKTRUM_PWR_EN (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|GPIO_OUTPUT_SET|GPIO_PORTC|GPIO_PIN13)
#define POWER_SPEKTRUM(_s) stm32_gpiowrite(GPIO_SPEKTRUM_PWR_EN, (_s))
#define POWER_SPEKTRUM(_s) px4_arch_gpiowrite(GPIO_SPEKTRUM_PWR_EN, (_s))
#define SPEKTRUM_RX_HIGH(_s) stm32_gpiowrite(GPIO_USART1_RX_SPEKTRUM, (_s))
#define SPEKTRUM_RX_AS_UART() stm32_configgpio(GPIO_USART1_RX)
#define SPEKTRUM_RX_AS_GPIO() stm32_configgpio(GPIO_USART1_RX_SPEKTRUM)
#define SPEKTRUM_RX_HIGH(_s) px4_arch_gpiowrite(GPIO_USART1_RX_SPEKTRUM, (_s))
#define SPEKTRUM_RX_AS_UART() px4_arch_configgpio(GPIO_USART1_RX)
#define SPEKTRUM_RX_AS_GPIO() px4_arch_configgpio(GPIO_USART1_RX_SPEKTRUM)
#define GPIO_SERVO_FAULT_DETECT (GPIO_INPUT|GPIO_CNF_INPULLUP|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN15)
src/drivers/boards/px4io-v2/px4io_init.c
+31 -31
View File
@@ -105,55 +105,55 @@ __EXPORT void stm32_boardinitialize(void)
/* configure GPIOs */
/* LEDS - default to off */
stm32_configgpio(GPIO_LED1);
stm32_configgpio(GPIO_LED2);
stm32_configgpio(GPIO_LED3);
stm32_configgpio(GPIO_LED4);
px4_arch_configgpio(GPIO_LED1);
px4_arch_configgpio(GPIO_LED2);
px4_arch_configgpio(GPIO_LED3);
px4_arch_configgpio(GPIO_LED4);
stm32_configgpio(GPIO_BTN_SAFETY);
px4_arch_configgpio(GPIO_BTN_SAFETY);
/* spektrum power enable is active high - enable it by default */
stm32_configgpio(GPIO_SPEKTRUM_PWR_EN);
px4_arch_configgpio(GPIO_SPEKTRUM_PWR_EN);
stm32_configgpio(GPIO_SERVO_FAULT_DETECT);
px4_arch_configgpio(GPIO_SERVO_FAULT_DETECT);
/* RSSI inputs */
stm32_configgpio(GPIO_TIM_RSSI); /* xxx alternate function */
stm32_configgpio(GPIO_ADC_RSSI);
px4_arch_configgpio(GPIO_TIM_RSSI); /* xxx alternate function */
px4_arch_configgpio(GPIO_ADC_RSSI);
/* servo rail voltage */
stm32_configgpio(GPIO_ADC_VSERVO);
px4_arch_configgpio(GPIO_ADC_VSERVO);
stm32_configgpio(GPIO_SBUS_INPUT); /* xxx alternate function */
stm32_configgpio(GPIO_SBUS_OUTPUT);
px4_arch_configgpio(GPIO_SBUS_INPUT); /* xxx alternate function */
px4_arch_configgpio(GPIO_SBUS_OUTPUT);
/* sbus output enable is active low - disable it by default */
stm32_gpiowrite(GPIO_SBUS_OENABLE, true);
stm32_configgpio(GPIO_SBUS_OENABLE);
px4_arch_gpiowrite(GPIO_SBUS_OENABLE, true);
px4_arch_configgpio(GPIO_SBUS_OENABLE);
stm32_configgpio(GPIO_PPM); /* xxx alternate function */
px4_arch_configgpio(GPIO_PPM); /* xxx alternate function */
stm32_gpiowrite(GPIO_PWM1, true);
stm32_configgpio(GPIO_PWM1);
px4_arch_gpiowrite(GPIO_PWM1, true);
px4_arch_configgpio(GPIO_PWM1);
stm32_gpiowrite(GPIO_PWM2, true);
stm32_configgpio(GPIO_PWM2);
px4_arch_gpiowrite(GPIO_PWM2, true);
px4_arch_configgpio(GPIO_PWM2);
stm32_gpiowrite(GPIO_PWM3, true);
stm32_configgpio(GPIO_PWM3);
px4_arch_gpiowrite(GPIO_PWM3, true);
px4_arch_configgpio(GPIO_PWM3);
stm32_gpiowrite(GPIO_PWM4, true);
stm32_configgpio(GPIO_PWM4);
px4_arch_gpiowrite(GPIO_PWM4, true);
px4_arch_configgpio(GPIO_PWM4);
stm32_gpiowrite(GPIO_PWM5, true);
stm32_configgpio(GPIO_PWM5);
px4_arch_gpiowrite(GPIO_PWM5, true);
px4_arch_configgpio(GPIO_PWM5);
stm32_gpiowrite(GPIO_PWM6, true);
stm32_configgpio(GPIO_PWM6);
px4_arch_gpiowrite(GPIO_PWM6, true);
px4_arch_configgpio(GPIO_PWM6);
stm32_gpiowrite(GPIO_PWM7, true);
stm32_configgpio(GPIO_PWM7);
px4_arch_gpiowrite(GPIO_PWM7, true);
px4_arch_configgpio(GPIO_PWM7);
stm32_gpiowrite(GPIO_PWM8, true);
stm32_configgpio(GPIO_PWM8);
px4_arch_gpiowrite(GPIO_PWM8, true);
px4_arch_configgpio(GPIO_PWM8);
}
src/drivers/camera_trigger/camera_trigger.cpp
+3 -3
View File
@@ -283,8 +283,8 @@ CameraTrigger::start()
{
for (unsigned i = 0; i < sizeof(_pins) / sizeof(_pins[0]); i++) {
stm32_configgpio(_gpios[_pins[i]]);
stm32_gpiowrite(_gpios[_pins[i]], !_polarity);
px4_arch_configgpio(_gpios[_pins[i]]);
px4_arch_gpiowrite(_gpios[_pins[i]], !_polarity);
}
// enable immediate if configured that way
@@ -448,7 +448,7 @@ CameraTrigger::trigger(CameraTrigger *trig, bool trigger)
for (unsigned i = 0; i < sizeof(trig->_pins) / sizeof(trig->_pins[0]); i++) {
if (trig->_pins[i] >= 0) {
// ACTIVE_LOW == 1
stm32_gpiowrite(trig->_gpios[trig->_pins[i]], trigger);
px4_arch_gpiowrite(trig->_gpios[trig->_pins[i]], trigger);
}
}
}
src/drivers/device/cdev.cpp
+2 -2
View File
@@ -339,14 +339,14 @@ void
CDev::poll_notify(pollevent_t events)
{
/* lock against poll() as well as other wakeups */
irqstate_t state = irqsave();
irqstate_t state = px4_enter_critical_section();
for (unsigned i = 0; i < _max_pollwaiters; i++)
if (nullptr != _pollset[i]) {
poll_notify_one(_pollset[i], events);
}
irqrestore(state);
px4_leave_critical_section(state);
}
void
src/drivers/device/i2c_nuttx.cpp
+4 -4
View File
@@ -75,7 +75,7 @@ I2C::I2C(const char *name,
I2C::~I2C()
{
if (_dev) {
up_i2cuninitialize(_dev);
px4_i2cbus_uninitialize(_dev);
_dev = nullptr;
}
}
@@ -105,7 +105,7 @@ I2C::init()
unsigned bus_index;
// attach to the i2c bus
_dev = up_i2cinitialize(_bus);
_dev = px4_i2cbus_initialize(_bus);
if (_dev == nullptr) {
DEVICE_DEBUG("failed to init I2C");
@@ -120,7 +120,7 @@ I2C::init()
// abort if the max frequency we allow (the frequency we ask)
// is smaller than the bus frequency
if (_bus_clocks[bus_index] > _frequency) {
(void)up_i2cuninitialize(_dev);
(void)px4_i2cbus_uninitialize(_dev);
_dev = nullptr;
DEVICE_LOG("FAIL: too slow for bus #%u: %u KHz, device max: %u KHz)",
_bus, _bus_clocks[bus_index] / 1000, _frequency / 1000);
@@ -168,7 +168,7 @@ I2C::init()
out:
if ((ret != OK) && (_dev != nullptr)) {
up_i2cuninitialize(_dev);
px4_i2cbus_uninitialize(_dev);
_dev = nullptr;
}
src/drivers/device/spi.cpp
+3 -3
View File
@@ -95,7 +95,7 @@ SPI::init()
/* attach to the spi bus */
if (_dev == nullptr) {
_dev = up_spiinitialize(_bus);
_dev = px4_spibus_initialize(_bus);
}
if (_dev == nullptr) {
@@ -152,9 +152,9 @@ SPI::transfer(uint8_t *send, uint8_t *recv, unsigned len)
switch (mode) {
default:
case LOCK_PREEMPTION: {
irqstate_t state = irqsave();
irqstate_t state = px4_enter_critical_section();
result = _transfer(send, recv, len);
irqrestore(state);
px4_leave_critical_section(state);
}
break;
src/drivers/gps/gps.cpp
+3 -3
View File
@@ -910,10 +910,10 @@ GPS::cmd_reset()
{
#ifdef GPIO_GPS_NRESET
PX4_WARN("Toggling GPS reset pin");
stm32_configgpio(GPIO_GPS_NRESET);
stm32_gpiowrite(GPIO_GPS_NRESET, 0);
px4_arch_configgpio(GPIO_GPS_NRESET);
px4_arch_gpiowrite(GPIO_GPS_NRESET, 0);
usleep(100);
stm32_gpiowrite(GPIO_GPS_NRESET, 1);
px4_arch_gpiowrite(GPIO_GPS_NRESET, 1);
PX4_WARN("Toggled GPS reset pin");
#endif
}
src/drivers/hc_sr04/hc_sr04.cpp
+8 -8
View File
@@ -297,9 +297,9 @@ HC_SR04::init()
/* init echo port : */
for (unsigned i = 0; i <= _sonars; i++) {
stm32_configgpio(_gpio_tab[i].trig_port);
stm32_gpiowrite(_gpio_tab[i].trig_port, false);
stm32_configgpio(_gpio_tab[i].echo_port);
px4_arch_configgpio(_gpio_tab[i].trig_port);
px4_arch_gpiowrite(_gpio_tab[i].trig_port, false);
px4_arch_configgpio(_gpio_tab[i].echo_port);
_latest_sonar_measurements.push_back(0);
}
@@ -441,14 +441,14 @@ HC_SR04::ioctl(struct file *filp, int cmd, unsigned long arg)
return -EINVAL;
}
irqstate_t flags = irqsave();
irqstate_t flags = px4_enter_critical_section();
if (!_reports->resize(arg)) {
irqrestore(flags);
px4_leave_critical_section(flags);
return -ENOMEM;
}
irqrestore(flags);
px4_leave_critical_section(flags);
return OK;
}
@@ -546,9 +546,9 @@ HC_SR04::measure()
/*
* Send a plus begin a measurement.
*/
stm32_gpiowrite(_gpio_tab[_cycle_counter].trig_port, true);
px4_arch_gpiowrite(_gpio_tab[_cycle_counter].trig_port, true);
usleep(10); // 10us
stm32_gpiowrite(_gpio_tab[_cycle_counter].trig_port, false);
px4_arch_gpiowrite(_gpio_tab[_cycle_counter].trig_port, false);
stm32_gpiosetevent(_gpio_tab[_cycle_counter].echo_port, true, true, false, sonar_isr);
_status = 0;
src/drivers/hmc5883/hmc5883.cpp
+3 -3
View File
@@ -698,14 +698,14 @@ HMC5883::ioctl(struct file *filp, int cmd, unsigned long arg)
return -EINVAL;
}
irqstate_t flags = irqsave();
irqstate_t flags = px4_enter_critical_section();
if (!_reports->resize(arg)) {
irqrestore(flags);
px4_leave_critical_section(flags);
return -ENOMEM;
}
irqrestore(flags);
px4_leave_critical_section(flags);
return OK;
}
src/drivers/l3gd20/l3gd20.cpp
+3 -3
View File
@@ -666,14 +666,14 @@ L3GD20::ioctl(struct file *filp, int cmd, unsigned long arg)
return -EINVAL;
}
irqstate_t flags = irqsave();
irqstate_t flags = px4_enter_critical_section();
if (!_reports->resize(arg)) {
irqrestore(flags);
px4_leave_critical_section(flags);
return -ENOMEM;
}
irqrestore(flags);
px4_leave_critical_section(flags);
return OK;
}
src/drivers/lis3mdl/lis3mdl.cpp
+3 -3
View File
@@ -706,14 +706,14 @@ LIS3MDL::ioctl(struct file *filp, int cmd, unsigned long arg)
return -EINVAL;
}
irqstate_t flags = irqsave();
irqstate_t flags = px4_enter_critical_section();
if (!_reports->resize(arg)) {
irqrestore(flags);
px4_leave_critical_section(flags);
return -ENOMEM;
}
irqrestore(flags);
px4_leave_critical_section(flags);
return OK;
}
src/drivers/ll40ls/LidarLiteI2C.cpp
+3 -3
View File
@@ -216,14 +216,14 @@ int LidarLiteI2C::ioctl(struct file *filp, int cmd, unsigned long arg)
return -EINVAL;
}
irqstate_t flags = irqsave();
irqstate_t flags = px4_enter_critical_section();
if (!_reports->resize(arg)) {
irqrestore(flags);
px4_leave_critical_section(flags);
return -ENOMEM;
}
irqrestore(flags);
px4_leave_critical_section(flags);
return OK;
}
src/drivers/lsm303d/lsm303d.cpp
+6 -6
View File
@@ -928,14 +928,14 @@ LSM303D::ioctl(struct file *filp, int cmd, unsigned long arg)
return -EINVAL;
}
irqstate_t flags = irqsave();
irqstate_t flags = px4_enter_critical_section();
if (!_accel_reports->resize(arg)) {
irqrestore(flags);
px4_leave_critical_section(flags);
return -ENOMEM;
}
irqrestore(flags);
px4_leave_critical_section(flags);
return OK;
}
@@ -1063,14 +1063,14 @@ LSM303D::mag_ioctl(struct file *filp, int cmd, unsigned long arg)
return -EINVAL;
}
irqstate_t flags = irqsave();
irqstate_t flags = px4_enter_critical_section();
if (!_mag_reports->resize(arg)) {
irqrestore(flags);
px4_leave_critical_section(flags);
return -ENOMEM;
}
irqrestore(flags);
px4_leave_critical_section(flags);
return OK;
}
src/drivers/mb12xx/mb12xx.cpp
+3 -3
View File
@@ -431,14 +431,14 @@ MB12XX::ioctl(struct file *filp, int cmd, unsigned long arg)
return -EINVAL;
}
irqstate_t flags = irqsave();
irqstate_t flags = px4_enter_critical_section();
if (!_reports->resize(arg)) {
irqrestore(flags);
px4_leave_critical_section(flags);
return -ENOMEM;
}
irqrestore(flags);
px4_leave_critical_section(flags);
return OK;
}
src/drivers/mpu6000/mpu6000.cpp
+8 -8
View File
@@ -737,7 +737,7 @@ int MPU6000::reset()
while (--tries != 0) {
irqstate_t state;
state = irqsave();
state = px4_enter_critical_section();
write_reg(MPUREG_PWR_MGMT_1, BIT_H_RESET);
up_udelay(10000);
@@ -750,7 +750,7 @@ int MPU6000::reset()
// Disable I2C bus (recommended on datasheet)
write_checked_reg(MPUREG_USER_CTRL, BIT_I2C_IF_DIS);
irqrestore(state);
px4_leave_critical_section(state);
if (read_reg(MPUREG_PWR_MGMT_1) == MPU_CLK_SEL_PLLGYROZ) {
break;
@@ -1364,14 +1364,14 @@ MPU6000::ioctl(struct file *filp, int cmd, unsigned long arg)
return -EINVAL;
}
irqstate_t flags = irqsave();
irqstate_t flags = px4_enter_critical_section();
if (!_accel_reports->resize(arg)) {
irqrestore(flags);
px4_leave_critical_section(flags);
return -ENOMEM;
}
irqrestore(flags);
px4_leave_critical_section(flags);
return OK;
}
@@ -1449,14 +1449,14 @@ MPU6000::gyro_ioctl(struct file *filp, int cmd, unsigned long arg)
return -EINVAL;
}
irqstate_t flags = irqsave();
irqstate_t flags = px4_enter_critical_section();
if (!_gyro_reports->resize(arg)) {
irqrestore(flags);
px4_leave_critical_section(flags);
return -ENOMEM;
}
irqrestore(flags);
px4_leave_critical_section(flags);
return OK;
}
src/drivers/mpu6500/mpu6500.cpp
+8 -8
View File
@@ -703,7 +703,7 @@ int MPU6500::reset()
while (--tries != 0) {
irqstate_t state;
state = irqsave();
state = px4_enter_critical_section();
write_reg(MPUREG_PWR_MGMT_1, BIT_H_RESET);
up_udelay(10000);
@@ -716,7 +716,7 @@ int MPU6500::reset()
// Disable I2C bus (recommended on datasheet)
write_checked_reg(MPUREG_USER_CTRL, BIT_I2C_IF_DIS);
irqrestore(state);
px4_leave_critical_section(state);
if (read_reg(MPUREG_PWR_MGMT_1) == MPU_CLK_SEL_PLLGYROZ) {
break;
@@ -1292,14 +1292,14 @@ MPU6500::ioctl(struct file *filp, int cmd, unsigned long arg)
return -EINVAL;
}
irqstate_t flags = irqsave();
irqstate_t flags = px4_enter_critical_section();
if (!_accel_reports->resize(arg)) {
irqrestore(flags);
px4_leave_critical_section(flags);
return -ENOMEM;
}
irqrestore(flags);
px4_leave_critical_section(flags);
return OK;
}
@@ -1377,14 +1377,14 @@ MPU6500::gyro_ioctl(struct file *filp, int cmd, unsigned long arg)
return -EINVAL;
}
irqstate_t flags = irqsave();
irqstate_t flags = px4_enter_critical_section();
if (!_gyro_reports->resize(arg)) {
irqrestore(flags);
px4_leave_critical_section(flags);
return -ENOMEM;
}
irqrestore(flags);
px4_leave_critical_section(flags);
return OK;
}
src/drivers/mpu9250/mag.cpp
+3 -3
View File
@@ -412,14 +412,14 @@ MPU9250_mag::ioctl(struct file *filp, int cmd, unsigned long arg)
return -EINVAL;
}
irqstate_t flags = irqsave();
irqstate_t flags = px4_enter_critical_section();
if (!_mag_reports->resize(arg)) {
irqrestore(flags);
px4_leave_critical_section(flags);
return -ENOMEM;
}
irqrestore(flags);
px4_leave_critical_section(flags);
return OK;
}
src/drivers/mpu9250/mpu9250.cpp
+6 -6
View File
@@ -876,14 +876,14 @@ MPU9250::ioctl(struct file *filp, int cmd, unsigned long arg)
return -EINVAL;
}
irqstate_t flags = irqsave();
irqstate_t flags = px4_enter_critical_section();
if (!_accel_reports->resize(arg)) {
irqrestore(flags);
px4_leave_critical_section(flags);
return -ENOMEM;
}
irqrestore(flags);
px4_leave_critical_section(flags);
return OK;
}
@@ -972,14 +972,14 @@ MPU9250::gyro_ioctl(struct file *filp, int cmd, unsigned long arg)
return -EINVAL;
}
irqstate_t flags = irqsave();
irqstate_t flags = px4_enter_critical_section();
if (!_gyro_reports->resize(arg)) {
irqrestore(flags);
px4_leave_critical_section(flags);
return -ENOMEM;
}
irqrestore(flags);
px4_leave_critical_section(flags);
return OK;
}
src/drivers/ms5611/ms5611_nuttx.cpp
+3 -3
View File
@@ -486,14 +486,14 @@ MS5611::ioctl(struct file *filp, int cmd, unsigned long arg)
return -EINVAL;
}
irqstate_t flags = irqsave();
irqstate_t flags = px4_enter_critical_section();
if (!_reports->resize(arg)) {
irqrestore(flags);
px4_leave_critical_section(flags);
return -ENOMEM;
}
irqrestore(flags);
px4_leave_critical_section(flags);
return OK;
}
src/drivers/ms5611/ms5611_spi.cpp
-5
View File
@@ -152,11 +152,6 @@ MS5611_SPI::init()
goto out;
}
/* sharing a bus with NuttX drivers */
#if defined (CONFIG_ARCH_BOARD_PX4FMU_V4)
//set_lockmode(SPI::LOCK_THREADS);
#endif
/* send reset command */
ret = _reset();
src/drivers/pwm_input/pwm_input.cpp
+9 -9
View File
@@ -321,14 +321,14 @@ void PWMIN::_timer_init(void)
{
/* run with interrupts disabled in case the timer is already
* setup. We don't want it firing while we are doing the setup */
irqstate_t flags = irqsave();
irqstate_t flags = px4_enter_critical_section();
/* configure input pin */
stm32_configgpio(GPIO_PWM_IN);
px4_arch_configgpio(GPIO_PWM_IN);
// XXX refactor this out of this driver
/* configure reset pin */
stm32_configgpio(GPIO_VDD_RANGEFINDER_EN);
px4_arch_configgpio(GPIO_VDD_RANGEFINDER_EN);
/* claim our interrupt vector */
irq_attach(PWMIN_TIMER_VECTOR, pwmin_tim_isr);
@@ -373,7 +373,7 @@ void PWMIN::_timer_init(void)
/* enable interrupts */
up_enable_irq(PWMIN_TIMER_VECTOR);
irqrestore(flags);
px4_leave_critical_section(flags);
_timer_started = true;
}
@@ -392,14 +392,14 @@ PWMIN::_freeze_test()
void
PWMIN::_turn_on()
{
stm32_gpiowrite(GPIO_VDD_RANGEFINDER_EN, 1);
px4_arch_gpiowrite(GPIO_VDD_RANGEFINDER_EN, 1);
}
// XXX refactor this out of this driver
void
PWMIN::_turn_off()
{
stm32_gpiowrite(GPIO_VDD_RANGEFINDER_EN, 0);
px4_arch_gpiowrite(GPIO_VDD_RANGEFINDER_EN, 0);
}
// XXX refactor this out of this driver
@@ -444,14 +444,14 @@ PWMIN::ioctl(struct file *filp, int cmd, unsigned long arg)
return -EINVAL;
}
irqstate_t flags = irqsave();
irqstate_t flags = px4_enter_critical_section();
if (!_reports->resize(arg)) {
irqrestore(flags);
px4_leave_critical_section(flags);
return -ENOMEM;
}
irqrestore(flags);
px4_leave_critical_section(flags);
return OK;
}
src/drivers/px4flow/px4flow.cpp
+3 -3
View File
@@ -364,14 +364,14 @@ PX4FLOW::ioctl(struct file *filp, int cmd, unsigned long arg)
return -EINVAL;
}
irqstate_t flags = irqsave();
irqstate_t flags = px4_enter_critical_section();
if (!_reports->resize(arg)) {
irqrestore(flags);
px4_leave_critical_section(flags);
return -ENOMEM;
}
irqrestore(flags);
px4_leave_critical_section(flags);
return OK;
}
src/drivers/px4fmu/fmu.cpp
+76 -415
View File
@@ -63,6 +63,7 @@
#include <board_config.h>
#include <systemlib/px4_macros.h>
#include <systemlib/systemlib.h>
#include <systemlib/err.h>
#include <systemlib/mixer/mixer.h>
@@ -94,7 +95,7 @@
#define SCHEDULE_INTERVAL 2000 /**< The schedule interval in usec (500 Hz) */
#define NAN_VALUE (0.0f/0.0f) /**< NaN value for throttle lock mode */
#define BUTTON_SAFETY stm32_gpioread(GPIO_BTN_SAFETY)
#define BUTTON_SAFETY px4_arch_gpioread(GPIO_BTN_SAFETY)
#define CYCLE_COUNT 10 /* safety switch must be held for 1 second to activate */
/*
@@ -106,6 +107,9 @@
#define LED_PATTERN_FMU_ARMED 0x5500 /**< long off, then quad blink */
#define LED_PATTERN_IO_FMU_ARMED 0xffff /**< constantly on */
#if !defined(BOARD_HAS_PWM)
# error "board_config.h needs to define BOARD_HAS_PWM"
#endif
class PX4FMU : public device::CDev
{
public:
@@ -271,76 +275,9 @@ private:
void safety_check_button(void);
};
const PX4FMU::GPIOConfig PX4FMU::_gpio_tab[] = {
#if defined(CONFIG_ARCH_BOARD_PX4FMU_V1)
{GPIO_GPIO0_INPUT, GPIO_GPIO0_OUTPUT, 0},
{GPIO_GPIO1_INPUT, GPIO_GPIO1_OUTPUT, 0},
{GPIO_GPIO2_INPUT, GPIO_GPIO2_OUTPUT, GPIO_USART2_CTS_1},
{GPIO_GPIO3_INPUT, GPIO_GPIO3_OUTPUT, GPIO_USART2_RTS_1},
{GPIO_GPIO4_INPUT, GPIO_GPIO4_OUTPUT, GPIO_USART2_TX_1},
{GPIO_GPIO5_INPUT, GPIO_GPIO5_OUTPUT, GPIO_USART2_RX_1},
{GPIO_GPIO6_INPUT, GPIO_GPIO6_OUTPUT, GPIO_CAN2_TX_2},
{GPIO_GPIO7_INPUT, GPIO_GPIO7_OUTPUT, GPIO_CAN2_RX_2},
#endif
#if defined(CONFIG_ARCH_BOARD_PX4FMU_V2)
{GPIO_GPIO0_INPUT, GPIO_GPIO0_OUTPUT, 0},
{GPIO_GPIO1_INPUT, GPIO_GPIO1_OUTPUT, 0},
{GPIO_GPIO2_INPUT, GPIO_GPIO2_OUTPUT, 0},
{GPIO_GPIO3_INPUT, GPIO_GPIO3_OUTPUT, 0},
{GPIO_GPIO4_INPUT, GPIO_GPIO4_OUTPUT, 0},
{GPIO_GPIO5_INPUT, GPIO_GPIO5_OUTPUT, 0},
const PX4FMU::GPIOConfig PX4FMU::_gpio_tab[] = BOARD_FMU_GPIO_TAB;
{0, GPIO_VDD_5V_PERIPH_EN, 0},
{0, GPIO_VDD_3V3_SENSORS_EN, 0},
{GPIO_VDD_BRICK_VALID, 0, 0},
{GPIO_VDD_SERVO_VALID, 0, 0},
{GPIO_VDD_5V_HIPOWER_OC, 0, 0},
{GPIO_VDD_5V_PERIPH_OC, 0, 0},
#endif
#if defined(CONFIG_ARCH_BOARD_PX4FMU_V4)
{GPIO_GPIO0_INPUT, GPIO_GPIO0_OUTPUT, 0},
{GPIO_GPIO1_INPUT, GPIO_GPIO1_OUTPUT, 0},
{GPIO_GPIO2_INPUT, GPIO_GPIO2_OUTPUT, 0},
{GPIO_GPIO3_INPUT, GPIO_GPIO3_OUTPUT, 0},
{GPIO_GPIO4_INPUT, GPIO_GPIO4_OUTPUT, 0},
{GPIO_GPIO5_INPUT, GPIO_GPIO5_OUTPUT, 0},
{0, GPIO_VDD_3V3_SENSORS_EN, 0},
{GPIO_VDD_BRICK_VALID, 0, 0},
#endif
#if defined(CONFIG_ARCH_BOARD_AEROCORE)
/* AeroCore breaks out User GPIOs on J11 */
{GPIO_GPIO0_INPUT, GPIO_GPIO0_OUTPUT, 0},
{GPIO_GPIO1_INPUT, GPIO_GPIO1_OUTPUT, 0},
{GPIO_GPIO3_INPUT, GPIO_GPIO3_OUTPUT, 0},
{GPIO_GPIO4_INPUT, GPIO_GPIO4_OUTPUT, 0},
{GPIO_GPIO5_INPUT, GPIO_GPIO5_OUTPUT, 0},
{GPIO_GPIO6_INPUT, GPIO_GPIO6_OUTPUT, 0},
{GPIO_GPIO7_INPUT, GPIO_GPIO7_OUTPUT, 0},
{GPIO_GPIO8_INPUT, GPIO_GPIO8_OUTPUT, 0},
{GPIO_GPIO9_INPUT, GPIO_GPIO9_OUTPUT, 0},
{GPIO_GPIO10_INPUT, GPIO_GPIO10_OUTPUT, 0},
{GPIO_GPIO11_INPUT, GPIO_GPIO11_OUTPUT, 0},
#endif
#if defined(CONFIG_ARCH_BOARD_MINDPX_V2)
{GPIO_GPIO0_INPUT, GPIO_GPIO0_OUTPUT, 0},
{GPIO_GPIO1_INPUT, GPIO_GPIO1_OUTPUT, 0},
{GPIO_GPIO2_INPUT, GPIO_GPIO2_OUTPUT, 0},
{GPIO_GPIO3_INPUT, GPIO_GPIO3_OUTPUT, 0},
{GPIO_GPIO4_INPUT, GPIO_GPIO4_OUTPUT, 0},
{GPIO_GPIO5_INPUT, GPIO_GPIO5_OUTPUT, 0},
{GPIO_GPIO6_INPUT, GPIO_GPIO6_OUTPUT, 0},
{GPIO_GPIO7_INPUT, GPIO_GPIO7_OUTPUT, 0},
{GPIO_GPIO8_INPUT, GPIO_GPIO8_OUTPUT, 0},
{GPIO_GPIO9_INPUT, GPIO_GPIO9_OUTPUT, 0},
{GPIO_GPIO10_INPUT, GPIO_GPIO10_OUTPUT, 0},
{GPIO_GPIO11_INPUT, GPIO_GPIO11_OUTPUT, 0},
{GPIO_GPIO12_INPUT, GPIO_GPIO12_OUTPUT, 0},
{0, 0, 0},
#endif
};
const unsigned PX4FMU::_ngpio = sizeof(PX4FMU::_gpio_tab) / sizeof(PX4FMU::_gpio_tab[0]);
const unsigned PX4FMU::_ngpio = arraySize(PX4FMU::_gpio_tab);
pwm_limit_t PX4FMU::_pwm_limit;
actuator_armed_s PX4FMU::_armed = {};
@@ -408,7 +345,7 @@ PX4FMU::PX4FMU() :
#ifdef GPIO_SBUS_INV
// this board has a GPIO to control SBUS inversion
stm32_configgpio(GPIO_SBUS_INV);
px4_arch_configgpio(GPIO_SBUS_INV);
#endif
// If there is no safety button, disable it on boot.
@@ -540,7 +477,7 @@ PX4FMU:: safety_check_button(void)
}
/* Turn the LED on if we have a 1 at the current bit position */
stm32_gpiowrite(GPIO_LED_SAFETY, !(pattern & (1 << blink_counter++)));
px4_arch_gpiowrite(GPIO_LED_SAFETY, !(pattern & (1 << blink_counter++)));
if (blink_counter > 15) {
blink_counter = 0;
@@ -608,7 +545,9 @@ PX4FMU::set_mode(Mode mode)
break;
case MODE_6PWM: // v2 PWMs as 6 PWM outs
#if defined(BOARD_HAS_PWM) && BOARD_HAS_PWM >= 6
case MODE_6PWM:
DEVICE_DEBUG("MODE_6PWM");
/* default output rates */
@@ -619,8 +558,9 @@ PX4FMU::set_mode(Mode mode)
_pwm_initialized = false;
break;
#endif
#ifdef CONFIG_ARCH_BOARD_AEROCORE
#if defined(BOARD_HAS_PWM) && BOARD_HAS_PWM >= 8
case MODE_8PWM: // AeroCore PWMs as 8 PWM outs
DEVICE_DEBUG("MODE_8PWM");
@@ -901,7 +841,7 @@ void PX4FMU::rc_io_invert(bool invert)
if (!invert) {
// set FMU_RC_OUTPUT high to pull RC_INPUT up
stm32_gpiowrite(GPIO_RC_OUT, 1);
px4_arch_gpiowrite(GPIO_RC_OUT, 1);
}
}
#endif
@@ -951,7 +891,7 @@ PX4FMU::cycle()
// assume SBUS input
sbus_config(_rcs_fd, false);
// disable CPPM input by mapping it away from the timer capture input
stm32_unconfiggpio(GPIO_PPM_IN);
px4_arch_unconfiggpio(GPIO_PPM_IN);
#endif
_initialized = true;
@@ -1122,7 +1062,7 @@ PX4FMU::cycle()
if (_safety_disabled) {
/* safety switch disabled, turn LED on solid */
stm32_gpiowrite(GPIO_LED_SAFETY, 0);
px4_arch_gpiowrite(GPIO_LED_SAFETY, 0);
_safety_off = true;
} else {
@@ -1391,7 +1331,7 @@ PX4FMU::cycle()
if (_rc_scan_begin == 0) {
_rc_scan_begin = _cycle_timestamp;
// Configure timer input pin for CPPM
stm32_configgpio(GPIO_PPM_IN);
px4_arch_configgpio(GPIO_PPM_IN);
rc_io_invert(false);
} else if (_rc_scan_locked
@@ -1412,7 +1352,7 @@ PX4FMU::cycle()
} else {
// disable CPPM input by mapping it away from the timer capture input
stm32_unconfiggpio(GPIO_PPM_IN);
px4_arch_unconfiggpio(GPIO_PPM_IN);
// Scan the next protocol
set_rc_scan_state(RC_SCAN_SBUS);
}
@@ -1548,8 +1488,10 @@ PX4FMU::ioctl(file *filp, int cmd, unsigned long arg)
case MODE_4PWM:
case MODE_2PWM2CAP:
case MODE_3PWM1CAP:
#if defined(BOARD_HAS_PWM) && BOARD_HAS_PWM >= 6
case MODE_6PWM:
#ifdef CONFIG_ARCH_BOARD_AEROCORE
#endif
#if defined(BOARD_HAS_PWM) && BOARD_HAS_PWM >= 8
case MODE_8PWM:
#endif
ret = pwm_ioctl(filp, cmd, arg);
@@ -1792,7 +1734,7 @@ PX4FMU::pwm_ioctl(file *filp, int cmd, unsigned long arg)
break;
}
#ifdef CONFIG_ARCH_BOARD_AEROCORE
#if defined(BOARD_HAS_PWM) && BOARD_HAS_PWM >= 8
case PWM_SERVO_SET(7):
case PWM_SERVO_SET(6):
@@ -1803,6 +1745,8 @@ PX4FMU::pwm_ioctl(file *filp, int cmd, unsigned long arg)
#endif
#if defined(BOARD_HAS_PWM) && BOARD_HAS_PWM >= 6
case PWM_SERVO_SET(5):
case PWM_SERVO_SET(4):
if (_mode < MODE_6PWM) {
@@ -1810,6 +1754,8 @@ PX4FMU::pwm_ioctl(file *filp, int cmd, unsigned long arg)
break;
}
#endif
/* FALLTHROUGH */
case PWM_SERVO_SET(3):
if (_mode < MODE_4PWM) {
@@ -1836,7 +1782,7 @@ PX4FMU::pwm_ioctl(file *filp, int cmd, unsigned long arg)
break;
#ifdef CONFIG_ARCH_BOARD_AEROCORE
#if defined(BOARD_HAS_PWM) && BOARD_HAS_PWM >= 8
case PWM_SERVO_GET(7):
case PWM_SERVO_GET(6):
@@ -1847,6 +1793,8 @@ PX4FMU::pwm_ioctl(file *filp, int cmd, unsigned long arg)
#endif
#if defined(BOARD_HAS_PWM) && BOARD_HAS_PWM >= 6
case PWM_SERVO_GET(5):
case PWM_SERVO_GET(4):
if (_mode < MODE_6PWM) {
@@ -1854,6 +1802,8 @@ PX4FMU::pwm_ioctl(file *filp, int cmd, unsigned long arg)
break;
}
#endif
/* FALLTHROUGH */
case PWM_SERVO_GET(3):
if (_mode < MODE_4PWM) {
@@ -1878,9 +1828,11 @@ PX4FMU::pwm_ioctl(file *filp, int cmd, unsigned long arg)
case PWM_SERVO_GET_RATEGROUP(1):
case PWM_SERVO_GET_RATEGROUP(2):
case PWM_SERVO_GET_RATEGROUP(3):
#if defined(BOARD_HAS_PWM) && BOARD_HAS_PWM >= 6
case PWM_SERVO_GET_RATEGROUP(4):
case PWM_SERVO_GET_RATEGROUP(5):
#ifdef CONFIG_ARCH_BOARD_AEROCORE
#endif
#if defined(BOARD_HAS_PWM) && BOARD_HAS_PWM >= 8
case PWM_SERVO_GET_RATEGROUP(6):
case PWM_SERVO_GET_RATEGROUP(7):
#endif
@@ -1890,16 +1842,20 @@ PX4FMU::pwm_ioctl(file *filp, int cmd, unsigned long arg)
case PWM_SERVO_GET_COUNT:
case MIXERIOCGETOUTPUTCOUNT:
switch (_mode) {
#ifdef CONFIG_ARCH_BOARD_AEROCORE
#if defined(BOARD_HAS_PWM) && BOARD_HAS_PWM >= 8
case MODE_8PWM:
*(unsigned *)arg = 8;
break;
#endif
#if defined(BOARD_HAS_PWM) && BOARD_HAS_PWM >= 6
case MODE_6PWM:
*(unsigned *)arg = 6;
break;
#endif
case MODE_4PWM:
*(unsigned *)arg = 4;
@@ -1947,14 +1903,14 @@ PX4FMU::pwm_ioctl(file *filp, int cmd, unsigned long arg)
set_mode(MODE_4PWM);
break;
#if defined(CONFIG_ARCH_BOARD_PX4FMU_V2) || defined(CONFIG_ARCH_BOARD_PX4FMU_V4) \
|| defined(CONFIG_ARCH_BOARD_MINDPX_V2)
#if defined(BOARD_HAS_PWM) && BOARD_HAS_PWM >=6
case 6:
set_mode(MODE_6PWM);
break;
#endif
#if defined(CONFIG_ARCH_BOARD_AEROCORE)
#if defined(BOARD_HAS_PWM) && BOARD_HAS_PWM >=8
case 8:
set_mode(MODE_8PWM);
@@ -2138,22 +2094,11 @@ PX4FMU::write(file *filp, const char *buffer, size_t len)
unsigned count = len / 2;
uint16_t values[8];
#ifdef CONFIG_ARCH_BOARD_AEROCORE
if (count > 8) {
// we have at most 8 outputs
count = 8;
if (count > BOARD_HAS_PWM) {
// we have at most BOARD_HAS_PWM outputs
count = BOARD_HAS_PWM;
}
#else
if (count > 6) {
// we have at most 6 outputs
count = 6;
}
#endif
// allow for misaligned values
memcpy(values, buffer, count * 2);
@@ -2169,301 +2114,21 @@ PX4FMU::write(file *filp, const char *buffer, size_t len)
void
PX4FMU::sensor_reset(int ms)
{
#if defined(CONFIG_ARCH_BOARD_PX4FMU_V2)
if (ms < 1) {
ms = 1;
}
/* disable SPI bus */
stm32_configgpio(GPIO_SPI_CS_GYRO_OFF);
stm32_configgpio(GPIO_SPI_CS_ACCEL_MAG_OFF);
stm32_configgpio(GPIO_SPI_CS_BARO_OFF);
stm32_configgpio(GPIO_SPI_CS_MPU_OFF);
stm32_gpiowrite(GPIO_SPI_CS_GYRO_OFF, 0);
stm32_gpiowrite(GPIO_SPI_CS_ACCEL_MAG_OFF, 0);
stm32_gpiowrite(GPIO_SPI_CS_BARO_OFF, 0);
stm32_gpiowrite(GPIO_SPI_CS_MPU_OFF, 0);
stm32_configgpio(GPIO_SPI1_SCK_OFF);
stm32_configgpio(GPIO_SPI1_MISO_OFF);
stm32_configgpio(GPIO_SPI1_MOSI_OFF);
stm32_gpiowrite(GPIO_SPI1_SCK_OFF, 0);
stm32_gpiowrite(GPIO_SPI1_MISO_OFF, 0);
stm32_gpiowrite(GPIO_SPI1_MOSI_OFF, 0);
stm32_configgpio(GPIO_GYRO_DRDY_OFF);
stm32_configgpio(GPIO_MAG_DRDY_OFF);
stm32_configgpio(GPIO_ACCEL_DRDY_OFF);
stm32_configgpio(GPIO_EXTI_MPU_DRDY_OFF);
stm32_gpiowrite(GPIO_GYRO_DRDY_OFF, 0);
stm32_gpiowrite(GPIO_MAG_DRDY_OFF, 0);
stm32_gpiowrite(GPIO_ACCEL_DRDY_OFF, 0);
stm32_gpiowrite(GPIO_EXTI_MPU_DRDY_OFF, 0);
/* set the sensor rail off */
stm32_configgpio(GPIO_VDD_3V3_SENSORS_EN);
stm32_gpiowrite(GPIO_VDD_3V3_SENSORS_EN, 0);
/* wait for the sensor rail to reach GND */
usleep(ms * 1000);
warnx("reset done, %d ms", ms);
/* re-enable power */
/* switch the sensor rail back on */
stm32_gpiowrite(GPIO_VDD_3V3_SENSORS_EN, 1);
/* wait a bit before starting SPI, different times didn't influence results */
usleep(100);
/* reconfigure the SPI pins */
#ifdef CONFIG_STM32_SPI1
stm32_configgpio(GPIO_SPI_CS_GYRO);
stm32_configgpio(GPIO_SPI_CS_ACCEL_MAG);
stm32_configgpio(GPIO_SPI_CS_BARO);
stm32_configgpio(GPIO_SPI_CS_MPU);
/* De-activate all peripherals,
* required for some peripheral
* state machines
*/
stm32_gpiowrite(GPIO_SPI_CS_GYRO, 1);
stm32_gpiowrite(GPIO_SPI_CS_ACCEL_MAG, 1);
stm32_gpiowrite(GPIO_SPI_CS_BARO, 1);
stm32_gpiowrite(GPIO_SPI_CS_MPU, 1);
stm32_configgpio(GPIO_SPI1_SCK);
stm32_configgpio(GPIO_SPI1_MISO);
stm32_configgpio(GPIO_SPI1_MOSI);
// // XXX bring up the EXTI pins again
// stm32_configgpio(GPIO_GYRO_DRDY);
// stm32_configgpio(GPIO_MAG_DRDY);
// stm32_configgpio(GPIO_ACCEL_DRDY);
// stm32_configgpio(GPIO_EXTI_MPU_DRDY);
#endif
#endif
#if defined(CONFIG_ARCH_BOARD_PX4FMU_V4)
if (ms < 1) {
ms = 1;
}
/* disable SPI bus */
stm32_configgpio(GPIO_SPI_CS_OFF_MPU9250);
stm32_configgpio(GPIO_SPI_CS_OFF_HMC5983);
stm32_configgpio(GPIO_SPI_CS_OFF_MS5611);
stm32_configgpio(GPIO_SPI_CS_OFF_ICM_20608_G);
stm32_gpiowrite(GPIO_SPI_CS_OFF_MPU9250, 0);
stm32_gpiowrite(GPIO_SPI_CS_OFF_HMC5983, 0);
stm32_gpiowrite(GPIO_SPI_CS_OFF_MS5611, 0);
stm32_gpiowrite(GPIO_SPI_CS_OFF_ICM_20608_G, 0);
stm32_configgpio(GPIO_SPI1_SCK_OFF);
stm32_configgpio(GPIO_SPI1_MISO_OFF);
stm32_configgpio(GPIO_SPI1_MOSI_OFF);
stm32_gpiowrite(GPIO_SPI1_SCK_OFF, 0);
stm32_gpiowrite(GPIO_SPI1_MISO_OFF, 0);
stm32_gpiowrite(GPIO_SPI1_MOSI_OFF, 0);
stm32_configgpio(GPIO_DRDY_OFF_MPU9250);
stm32_configgpio(GPIO_DRDY_OFF_HMC5983);
stm32_configgpio(GPIO_DRDY_OFF_ICM_20608_G);
stm32_gpiowrite(GPIO_DRDY_OFF_MPU9250, 0);
stm32_gpiowrite(GPIO_DRDY_OFF_HMC5983, 0);
stm32_gpiowrite(GPIO_DRDY_OFF_ICM_20608_G, 0);
/* set the sensor rail off */
stm32_configgpio(GPIO_VDD_3V3_SENSORS_EN);
stm32_gpiowrite(GPIO_VDD_3V3_SENSORS_EN, 0);
/* wait for the sensor rail to reach GND */
usleep(ms * 1000);
warnx("reset done, %d ms", ms);
/* re-enable power */
/* switch the sensor rail back on */
stm32_gpiowrite(GPIO_VDD_3V3_SENSORS_EN, 1);
/* wait a bit before starting SPI, different times didn't influence results */
usleep(100);
/* reconfigure the SPI pins */
#ifdef CONFIG_STM32_SPI1
stm32_configgpio(GPIO_SPI_CS_MPU9250);
stm32_configgpio(GPIO_SPI_CS_HMC5983);
stm32_configgpio(GPIO_SPI_CS_MS5611);
stm32_configgpio(GPIO_SPI_CS_ICM_20608_G);
/* De-activate all peripherals,
* required for some peripheral
* state machines
*/
stm32_gpiowrite(GPIO_SPI_CS_MPU9250, 1);
stm32_gpiowrite(GPIO_SPI_CS_HMC5983, 1);
stm32_gpiowrite(GPIO_SPI_CS_MS5611, 1);
stm32_gpiowrite(GPIO_SPI_CS_ICM_20608_G, 1);
stm32_configgpio(GPIO_SPI1_SCK);
stm32_configgpio(GPIO_SPI1_MISO);
stm32_configgpio(GPIO_SPI1_MOSI);
// // XXX bring up the EXTI pins again
// stm32_configgpio(GPIO_GYRO_DRDY);
// stm32_configgpio(GPIO_MAG_DRDY);
// stm32_configgpio(GPIO_ACCEL_DRDY);
// stm32_configgpio(GPIO_EXTI_MPU_DRDY);
#endif
#endif
#if defined(CONFIG_ARCH_BOARD_MINDPX_V2)
if (ms < 1) {
ms = 1;
}
/* disable SPI bus */
stm32_configgpio(GPIO_SPI_CS_GYRO_OFF);
stm32_configgpio(GPIO_SPI_CS_ACCEL_MAG_OFF);
stm32_configgpio(GPIO_SPI_CS_BARO_OFF);
// stm32_configgpio(GPIO_SPI_CS_FRAM_OFF);
stm32_configgpio(GPIO_SPI_CS_MPU_OFF);
stm32_gpiowrite(GPIO_SPI_CS_GYRO_OFF, 0);
stm32_gpiowrite(GPIO_SPI_CS_ACCEL_MAG_OFF, 0);
stm32_gpiowrite(GPIO_SPI_CS_BARO_OFF, 0);
// stm32_gpiowrite(GPIO_SPI_CS_FRAM_OFF,0);
stm32_gpiowrite(GPIO_SPI_CS_MPU_OFF, 0);
stm32_configgpio(GPIO_SPI4_SCK_OFF);
stm32_configgpio(GPIO_SPI4_MISO_OFF);
stm32_configgpio(GPIO_SPI4_MOSI_OFF);
stm32_gpiowrite(GPIO_SPI4_SCK_OFF, 0);
stm32_gpiowrite(GPIO_SPI4_MISO_OFF, 0);
stm32_gpiowrite(GPIO_SPI4_MOSI_OFF, 0);
stm32_configgpio(GPIO_GYRO_DRDY_OFF);
stm32_configgpio(GPIO_MAG_DRDY_OFF);
stm32_configgpio(GPIO_ACCEL_DRDY_OFF);
stm32_configgpio(GPIO_EXTI_MPU_DRDY_OFF);
stm32_gpiowrite(GPIO_GYRO_DRDY_OFF, 0);
stm32_gpiowrite(GPIO_MAG_DRDY_OFF, 0);
stm32_gpiowrite(GPIO_ACCEL_DRDY_OFF, 0);
stm32_gpiowrite(GPIO_EXTI_MPU_DRDY_OFF, 0);
// /* set the sensor rail off */
// stm32_configgpio(GPIO_VDD_3V3_SENSORS_EN);
// stm32_gpiowrite(GPIO_VDD_3V3_SENSORS_EN, 0);
//
/* wait for the sensor rail to reach GND */
usleep(ms * 1000);
warnx("reset done, %d ms", ms);
//
// /* re-enable power */
//
// /* switch the sensor rail back on */
// stm32_gpiowrite(GPIO_VDD_3V3_SENSORS_EN, 1);
//
/* wait a bit before starting SPI, different times didn't influence results */
usleep(100);
/* reconfigure the SPI pins */
#ifdef CONFIG_STM32_SPI4
stm32_configgpio(GPIO_SPI_CS_GYRO);
stm32_configgpio(GPIO_SPI_CS_ACCEL_MAG);
stm32_configgpio(GPIO_SPI_CS_BARO);
// stm32_configgpio(GPIO_SPI_CS_FRAM);
stm32_configgpio(GPIO_SPI_CS_MPU);
/* De-activate all peripherals,
* required for some peripheral
* state machines
*/
stm32_gpiowrite(GPIO_SPI_CS_GYRO, 1);
stm32_gpiowrite(GPIO_SPI_CS_ACCEL_MAG, 1);
stm32_gpiowrite(GPIO_SPI_CS_BARO, 1);
stm32_gpiowrite(GPIO_SPI_CS_FRAM, 1);
stm32_gpiowrite(GPIO_SPI_CS_MPU, 1);
stm32_configgpio(GPIO_SPI4_SCK);
stm32_configgpio(GPIO_SPI4_MISO);
stm32_configgpio(GPIO_SPI4_MOSI);
// // XXX bring up the EXTI pins again
// stm32_configgpio(GPIO_GYRO_DRDY);
// stm32_configgpio(GPIO_MAG_DRDY);
// stm32_configgpio(GPIO_ACCEL_DRDY);
#endif
#endif
board_spi_reset(ms);
}
void
PX4FMU::peripheral_reset(int ms)
{
#if defined(CONFIG_ARCH_BOARD_PX4FMU_V2)
if (ms < 1) {
ms = 10;
}
/* set the peripheral rails off */
stm32_configgpio(GPIO_VDD_5V_PERIPH_EN);
stm32_gpiowrite(GPIO_VDD_5V_PERIPH_EN, 1);
/* wait for the peripheral rail to reach GND */
usleep(ms * 1000);
warnx("reset done, %d ms", ms);
/* re-enable power */
/* switch the peripheral rail back on */
stm32_gpiowrite(GPIO_VDD_5V_PERIPH_EN, 0);
#endif
#if defined(CONFIG_ARCH_BOARD_PX4FMU_V4)
if (ms < 1) {
ms = 10;
}
/* set the peripheral rails off */
stm32_configgpio(GPIO_PERIPH_3V3_EN);
stm32_gpiowrite(GPIO_PERIPH_3V3_EN, 0);
bool last = stm32_gpioread(GPIO_SPEKTRUM_PWR_EN);
/* Keep Spektum on to discharge rail*/
stm32_gpiowrite(GPIO_SPEKTRUM_PWR_EN, 1);
/* wait for the peripheral rail to reach GND */
usleep(ms * 1000);
warnx("reset done, %d ms", ms);
/* re-enable power */
/* switch the peripheral rail back on */
stm32_gpiowrite(GPIO_SPEKTRUM_PWR_EN, last);
stm32_gpiowrite(GPIO_PERIPH_3V3_EN, 1);
#endif
#if defined(CONFIG_ARCH_BOARD_MINDPX_V2)
if (ms < 1) {
ms = 10;
}
#endif
board_peripheral_reset(ms);
}
void
@@ -2475,37 +2140,37 @@ PX4FMU::gpio_reset(void)
*/
for (unsigned i = 0; i < _ngpio; i++) {
if (_gpio_tab[i].input != 0) {
stm32_configgpio(_gpio_tab[i].input);
px4_arch_configgpio(_gpio_tab[i].input);
} else if (_gpio_tab[i].output != 0) {
stm32_configgpio(_gpio_tab[i].output);
px4_arch_configgpio(_gpio_tab[i].output);
}
}
#if defined(CONFIG_ARCH_BOARD_PX4FMU_V1)
#if defined(GPIO_GPIO_DIR)
/* if we have a GPIO direction control, set it to zero (input) */
stm32_gpiowrite(GPIO_GPIO_DIR, 0);
stm32_configgpio(GPIO_GPIO_DIR);
px4_arch_gpiowrite(GPIO_GPIO_DIR, 0);
px4_arch_configgpio(GPIO_GPIO_DIR);
#endif
}
void
PX4FMU::gpio_set_function(uint32_t gpios, int function)
{
#if defined(CONFIG_ARCH_BOARD_PX4FMU_V1)
#if defined(BOARD_GPIO_SHARED_BUFFERED_BITS) && defined(GPIO_GPIO_DIR)
/*
* GPIOs 0 and 1 must have the same direction as they are buffered
* by a shared 2-port driver. Any attempt to set either sets both.
*/
if (gpios & 3) {
gpios |= 3;
if (gpios & BOARD_GPIO_SHARED_BUFFERED_BITS) {
gpios |= BOARD_GPIO_SHARED_BUFFERED_BITS;
/* flip the buffer to output mode if required */
if (GPIO_SET_OUTPUT == function ||
GPIO_SET_OUTPUT_LOW == function ||
GPIO_SET_OUTPUT_HIGH == function) {
stm32_gpiowrite(GPIO_GPIO_DIR, 1);
px4_arch_gpiowrite(GPIO_GPIO_DIR, 1);
}
}
@@ -2516,24 +2181,24 @@ PX4FMU::gpio_set_function(uint32_t gpios, int function)
if (gpios & (1 << i)) {
switch (function) {
case GPIO_SET_INPUT:
stm32_configgpio(_gpio_tab[i].input);
px4_arch_configgpio(_gpio_tab[i].input);
break;
case GPIO_SET_OUTPUT:
stm32_configgpio(_gpio_tab[i].output);
px4_arch_configgpio(_gpio_tab[i].output);
break;
case GPIO_SET_OUTPUT_LOW:
stm32_configgpio((_gpio_tab[i].output & ~(GPIO_OUTPUT_SET)) | GPIO_OUTPUT_CLEAR);
px4_arch_configgpio((_gpio_tab[i].output & ~(GPIO_OUTPUT_SET)) | GPIO_OUTPUT_CLEAR);
break;
case GPIO_SET_OUTPUT_HIGH:
stm32_configgpio((_gpio_tab[i].output & ~(GPIO_OUTPUT_CLEAR)) | GPIO_OUTPUT_SET);
px4_arch_configgpio((_gpio_tab[i].output & ~(GPIO_OUTPUT_CLEAR)) | GPIO_OUTPUT_SET);
break;
case GPIO_SET_ALT_1:
if (_gpio_tab[i].alt != 0) {
stm32_configgpio(_gpio_tab[i].alt);
px4_arch_configgpio(_gpio_tab[i].alt);
}
break;
@@ -2541,11 +2206,11 @@ PX4FMU::gpio_set_function(uint32_t gpios, int function)
}
}
#if defined(CONFIG_ARCH_BOARD_PX4FMU_V1)
#if defined(BOARD_GPIO_SHARED_BUFFERED_BITS) && defined(GPIO_GPIO_DIR)
/* flip buffer to input mode if required */
if ((GPIO_SET_INPUT == function) && (gpios & 3)) {
stm32_gpiowrite(GPIO_GPIO_DIR, 0);
if ((GPIO_SET_INPUT == function) && (gpios & BOARD_GPIO_SHARED_BUFFERED_BITS)) {
px4_arch_gpiowrite(GPIO_GPIO_DIR, 0);
}
#endif
@@ -2558,7 +2223,7 @@ PX4FMU::gpio_write(uint32_t gpios, int function)
for (unsigned i = 0; i < _ngpio; i++)
if (gpios & (1 << i)) {
stm32_gpiowrite(_gpio_tab[i].output, value);
px4_arch_gpiowrite(_gpio_tab[i].output, value);
}
}
@@ -2568,7 +2233,7 @@ PX4FMU::gpio_read(void)
uint32_t bits = 0;
for (unsigned i = 0; i < _ngpio; i++)
if (stm32_gpioread(_gpio_tab[i].input)) {
if (px4_arch_gpioread(_gpio_tab[i].input)) {
bits |= (1 << i);
}
@@ -2814,21 +2479,19 @@ fmu_new_mode(PortMode new_mode)
break;
case PORT_FULL_PWM:
#if defined(CONFIG_ARCH_BOARD_PX4FMU_V1)
#if defined(BOARD_HAS_PWM) && BOARD_HAS_PWM == 4
/* select 4-pin PWM mode */
servo_mode = PX4FMU::MODE_4PWM;
#endif
#if defined(CONFIG_ARCH_BOARD_PX4FMU_V2) || defined(CONFIG_ARCH_BOARD_PX4FMU_V4) \
|| defined(CONFIG_ARCH_BOARD_MINDPX_V2)
#if defined(BOARD_HAS_PWM) && BOARD_HAS_PWM == 6
servo_mode = PX4FMU::MODE_6PWM;
#endif
#if defined(CONFIG_ARCH_BOARD_AEROCORE)
#if defined(BOARD_HAS_PWM) && BOARD_HAS_PWM == 8
servo_mode = PX4FMU::MODE_8PWM;
#endif
break;
#if defined(CONFIG_ARCH_BOARD_PX4FMU_V2) || defined(CONFIG_ARCH_BOARD_PX4FMU_V4) \
|| defined(CONFIG_ARCH_BOARD_MINDPX_V2)
#if defined(BOARD_HAS_PWM) && BOARD_HAS_PWM >= 6
case PORT_PWM4:
/* select 4-pin PWM mode */
@@ -2859,7 +2522,7 @@ fmu_new_mode(PortMode new_mode)
#endif
/* mixed modes supported on v1 board only */
#if defined(CONFIG_ARCH_BOARD_PX4FMU_V1)
#if defined(BOARD_HAS_MULTI_PURPOSE_GPIO)
case PORT_FULL_SERIAL:
/* set all multi-GPIOs to serial mode */
@@ -3261,8 +2924,7 @@ fmu_main(int argc, char *argv[])
} else if (!strcmp(verb, "mode_pwm")) {
new_mode = PORT_FULL_PWM;
#if defined(CONFIG_ARCH_BOARD_PX4FMU_V2) || defined(CONFIG_ARCH_BOARD_PX4FMU_V4) \
|| defined(CONFIG_ARCH_BOARD_MINDPX_V2)
#if defined(BOARD_HAS_PWM) && BOARD_HAS_PWM >= 6
} else if (!strcmp(verb, "mode_pwm4")) {
new_mode = PORT_PWM4;
@@ -3279,7 +2941,7 @@ fmu_main(int argc, char *argv[])
} else if (!strcmp(verb, "mode_pwm2cap2")) {
new_mode = PORT_PWM2CAP2;
#endif
#if defined(CONFIG_ARCH_BOARD_PX4FMU_V1)
#if defined(BOARD_HAS_MULTI_PURPOSE_GPIO)
} else if (!strcmp(verb, "mode_serial")) {
new_mode = PORT_FULL_SERIAL;
@@ -3350,11 +3012,10 @@ fmu_main(int argc, char *argv[])
}
fprintf(stderr, "FMU: unrecognised command %s, try:\n", verb);
#if defined(CONFIG_ARCH_BOARD_PX4FMU_V1)
#if defined(BOARD_HAS_MULTI_PURPOSE_GPIO)
fprintf(stderr,
" mode_gpio, mode_serial, mode_pwm, mode_gpio_serial, mode_pwm_serial, mode_pwm_gpio, test, fake, sensor_reset, id\n");
#elif defined(CONFIG_ARCH_BOARD_PX4FMU_V2) || defined(CONFIG_ARCH_BOARD_PX4FMU_V4) || defined(CONFIG_ARCH_BOARD_AEROCORE) \
|| defined(CONFIG_ARCH_BOARD_MINDPX_V2)
#elif defined(BOARD_HAS_PWM) && BOARD_HAS_PWM >= 6
fprintf(stderr, " mode_gpio, mode_pwm, mode_pwm4, test, sensor_reset [milliseconds], i2c <bus> <hz>\n");
#endif
exit(1);
src/drivers/px4io/px4io_serial.cpp
+4 -4
View File
@@ -228,8 +228,8 @@ PX4IO_serial::~PX4IO_serial()
irq_detach(PX4IO_SERIAL_VECTOR);
/* restore the GPIOs */
stm32_unconfiggpio(PX4IO_SERIAL_TX_GPIO);
stm32_unconfiggpio(PX4IO_SERIAL_RX_GPIO);
px4_arch_unconfiggpio(PX4IO_SERIAL_TX_GPIO);
px4_arch_unconfiggpio(PX4IO_SERIAL_RX_GPIO);
/* and kill our semaphores */
px4_sem_destroy(&_completion_semaphore);
@@ -264,8 +264,8 @@ PX4IO_serial::init()
}
/* configure pins for serial use */
stm32_configgpio(PX4IO_SERIAL_TX_GPIO);
stm32_configgpio(PX4IO_SERIAL_RX_GPIO);
px4_arch_configgpio(PX4IO_SERIAL_TX_GPIO);
px4_arch_configgpio(PX4IO_SERIAL_RX_GPIO);
/* reset & configure the UART */
rCR1 = 0;
src/drivers/rgbled_pwm/drv_led_pwm.cpp
+1 -1
View File
@@ -216,7 +216,7 @@ led_pwm_channel_init(unsigned channel)
unsigned timer = led_pwm_channels[channel].timer_index;
/* configure the GPIO first */
stm32_configgpio(led_pwm_channels[channel].gpio_out);
px4_arch_configgpio(led_pwm_channels[channel].gpio_out);
/* configure the channel */
switch (led_pwm_channels[channel].timer_channel) {
src/drivers/rgbled_pwm/rgbled_pwm.cpp
-4
View File
@@ -170,11 +170,9 @@ RGBLED_PWM::init()
{
/* switch off LED on start */
CDev::init();
#if defined(CONFIG_ARCH_BOARD_MINDPX_V2)
led_pwm_servo_init();
send_led_enable(false);
send_led_rgb();
#endif
return OK;
}
void
@@ -536,7 +534,6 @@ RGBLED_PWM::send_led_enable(bool enable)
int
RGBLED_PWM::send_led_rgb()
{
#if defined(CONFIG_ARCH_BOARD_MINDPX_V2)
if (_enable) {
led_pwm_servo_set(0, _r);
@@ -549,7 +546,6 @@ RGBLED_PWM::send_led_rgb()
led_pwm_servo_set(2, 0);
}
#endif
return (OK);
}
src/drivers/sf0x/sf0x.cpp
+3 -3
View File
@@ -423,14 +423,14 @@ SF0X::ioctl(struct file *filp, int cmd, unsigned long arg)
return -EINVAL;
}
irqstate_t flags = irqsave();
irqstate_t flags = px4_enter_critical_section();
if (!_reports->resize(arg)) {
irqrestore(flags);
px4_leave_critical_section(flags);
return -ENOMEM;
}
irqrestore(flags);
px4_leave_critical_section(flags);
return OK;
}
src/drivers/sf10a/sf10a.cpp
+3 -3
View File
@@ -386,14 +386,14 @@ SF10A::ioctl(struct file *filp, int cmd, unsigned long arg)
return -EINVAL;
}
irqstate_t flags = irqsave();
irqstate_t flags = px4_enter_critical_section();
if (!_reports->resize(arg)) {
irqrestore(flags);
px4_leave_critical_section(flags);
return -ENOMEM;
}
irqrestore(flags);
px4_leave_critical_section(flags);
return OK;
}
src/drivers/srf02/srf02.cpp
+3 -3
View File
@@ -430,14 +430,14 @@ SRF02::ioctl(struct file *filp, int cmd, unsigned long arg)
return -EINVAL;
}
irqstate_t flags = irqsave();
irqstate_t flags = px4_enter_critical_section();
if (!_reports->resize(arg)) {
irqrestore(flags);
px4_leave_critical_section(flags);
return -ENOMEM;
}
irqrestore(flags);
px4_leave_critical_section(flags);
return OK;
}
src/drivers/srf02_i2c/srf02_i2c.cpp
+3 -3
View File
@@ -432,14 +432,14 @@ SRF02_I2C::ioctl(struct file *filp, int cmd, unsigned long arg)
return -EINVAL;
}
irqstate_t flags = irqsave();
irqstate_t flags = px4_enter_critical_section();
if (!_reports->resize(arg)) {
irqrestore(flags);
px4_leave_critical_section(flags);
return -ENOMEM;
}
irqrestore(flags);
px4_leave_critical_section(flags);
return OK;
}
src/drivers/stm32/adc/adc.cpp
+12 -30
View File
@@ -273,9 +273,9 @@ ADC::read(file *filp, char *buffer, size_t len)
}
/* block interrupts while copying samples to avoid racing with an update */
irqstate_t flags = irqsave();
irqstate_t flags = px4_enter_critical_section();
memcpy(buffer, _samples, len);
irqrestore(flags);
px4_leave_critical_section(flags);
return len;
}
@@ -343,9 +343,7 @@ ADC::update_adc_report(hrt_abstime now)
void
ADC::update_system_power(hrt_abstime now)
{
#if defined (CONFIG_ARCH_BOARD_PX4FMU_V2) || \
defined (CONFIG_ARCH_BOARD_MINDPX_V2) || \
defined (CONFIG_ARCH_BOARD_PX4FMU_V4)
#if defined (BOARD_ADC_USB_CONNECTED)
system_power_s system_power = {};
system_power.timestamp = now;
@@ -358,35 +356,19 @@ ADC::update_system_power(hrt_abstime now)
}
}
/* Note once the board_config.h provides BOARD_ADC_USB_CONNECTED,
* It must provide the true logic GPIO BOARD_ADC_xxxx macros.
*/
// these are not ADC related, but it is convenient to
// publish these to the same topic
system_power.usb_connected = stm32_gpioread(GPIO_OTGFS_VBUS);
system_power.usb_connected = BOARD_ADC_USB_CONNECTED;
#if defined (CONFIG_ARCH_BOARD_MINDPX_V2)
// note that the valid pins are active low
system_power.brick_valid = 1;
system_power.servo_valid = 1;
system_power.brick_valid = BOARD_ADC_BRICK_VALID;
system_power.servo_valid = BOARD_ADC_SERVO_VALID;
// OC pins are active low
system_power.periph_5V_OC = 1;
system_power.hipower_5V_OC = 1;
#elif defined (CONFIG_ARCH_BOARD_PX4FMU_V4)
// note that the valid pins are active high
system_power.brick_valid = stm32_gpioread(GPIO_VDD_BRICK_VALID);
system_power.servo_valid = 1;
// OC pins are not supported
system_power.periph_5V_OC = 0;
system_power.hipower_5V_OC = 0;
#else
// note that the valid pins are active low
system_power.brick_valid = !stm32_gpioread(GPIO_VDD_BRICK_VALID);
system_power.servo_valid = !stm32_gpioread(GPIO_VDD_SERVO_VALID);
// OC pins are active low
system_power.periph_5V_OC = !stm32_gpioread(GPIO_VDD_5V_PERIPH_OC);
system_power.hipower_5V_OC = !stm32_gpioread(GPIO_VDD_5V_HIPOWER_OC);
#endif
system_power.periph_5V_OC = BOARD_ADC_PERIPH_5V_OC;
system_power.hipower_5V_OC = BOARD_ADC_HIPOWER_5V_OC;
/* lazily publish */
if (_to_system_power != nullptr) {
@@ -396,7 +378,7 @@ ADC::update_system_power(hrt_abstime now)
_to_system_power = orb_advertise(ORB_ID(system_power), &system_power);
}
#endif // CONFIG_ARCH_BOARD_PX4FMU_V2
#endif // BOARD_ADC_USB_CONNECTED
}
uint16_t
src/drivers/stm32/drv_hrt.c
+11 -11
View File
@@ -667,7 +667,7 @@ hrt_absolute_time(void)
static volatile uint32_t last_count;
/* prevent re-entry */
flags = irqsave();
flags = px4_enter_critical_section();
/* get the current counter value */
count = rCNT;
@@ -689,7 +689,7 @@ hrt_absolute_time(void)
/* compute the current time */
abstime = HRT_COUNTER_SCALE(base_time + count);
irqrestore(flags);
px4_leave_critical_section(flags);
return abstime;
}
@@ -725,11 +725,11 @@ abstime_to_ts(struct timespec *ts, hrt_abstime abstime)
hrt_abstime
hrt_elapsed_time(const volatile hrt_abstime *then)
{
irqstate_t flags = irqsave();
irqstate_t flags = px4_enter_critical_section();
hrt_abstime delta = hrt_absolute_time() - *then;
irqrestore(flags);
px4_leave_critical_section(flags);
return delta;
}
@@ -740,11 +740,11 @@ hrt_elapsed_time(const volatile hrt_abstime *then)
hrt_abstime
hrt_store_absolute_time(volatile hrt_abstime *now)
{
irqstate_t flags = irqsave();
irqstate_t flags = px4_enter_critical_section();
hrt_abstime ts = hrt_absolute_time();
irqrestore(flags);
px4_leave_critical_section(flags);
return ts;
}
@@ -760,7 +760,7 @@ hrt_init(void)
#ifdef HRT_PPM_CHANNEL
/* configure the PPM input pin */
stm32_configgpio(GPIO_PPM_IN);
px4_arch_configgpio(GPIO_PPM_IN);
#endif
}
@@ -802,7 +802,7 @@ hrt_call_every(struct hrt_call *entry, hrt_abstime delay, hrt_abstime interval,
static void
hrt_call_internal(struct hrt_call *entry, hrt_abstime deadline, hrt_abstime interval, hrt_callout callout, void *arg)
{
irqstate_t flags = irqsave();
irqstate_t flags = px4_enter_critical_section();
/* if the entry is currently queued, remove it */
/* note that we are using a potentially uninitialised
@@ -823,7 +823,7 @@ hrt_call_internal(struct hrt_call *entry, hrt_abstime deadline, hrt_abstime inte
hrt_call_enter(entry);
irqrestore(flags);
px4_leave_critical_section(flags);
}
/**
@@ -843,7 +843,7 @@ hrt_called(struct hrt_call *entry)
void
hrt_cancel(struct hrt_call *entry)
{
irqstate_t flags = irqsave();
irqstate_t flags = px4_enter_critical_section();
sq_rem(&entry->link, &callout_queue);
entry->deadline = 0;
@@ -853,7 +853,7 @@ hrt_cancel(struct hrt_call *entry)
*/
entry->period = 0;
irqrestore(flags);
px4_leave_critical_section(flags);
}
static void
src/drivers/stm32/drv_input_capture.c
+11 -11
View File
@@ -107,7 +107,7 @@ static void input_capture_chan_handler(void *context, const io_timers_t *timer,
hrt_abstime isrs_time , uint16_t isrs_rcnt)
{
uint16_t capture = _REG32(timer, chan->ccr_offset);
channel_stats[chan_index].last_edge = stm32_gpioread(chan->gpio_in);
channel_stats[chan_index].last_edge = px4_arch_gpioread(chan->gpio_in);
if ((isrs_rcnt - capture) > channel_stats[chan_index].latnecy) {
channel_stats[chan_index].latnecy = (isrs_rcnt - capture);
@@ -133,10 +133,10 @@ static void input_capture_chan_handler(void *context, const io_timers_t *timer,
static void input_capture_bind(unsigned channel, capture_callback_t callback, void *context)
{
irqstate_t flags = irqsave();
irqstate_t flags = px4_enter_critical_section();
channel_handlers[channel].callback = callback;
channel_handlers[channel].context = context;
irqrestore(flags);
px4_leave_critical_section(flags);
}
static void input_capture_unbind(unsigned channel)
@@ -258,7 +258,7 @@ int up_input_capture_set_filter(unsigned channel, capture_filter_t filter)
uint32_t timer = timer_io_channels[channel].timer_index;
uint16_t rvalue;
irqstate_t flags = irqsave();
irqstate_t flags = px4_enter_critical_section();
switch (timer_io_channels[channel].timer_channel) {
@@ -290,7 +290,7 @@ int up_input_capture_set_filter(unsigned channel, capture_filter_t filter)
rv = -EIO;
}
irqrestore(flags);
px4_leave_critical_section(flags);
}
}
@@ -401,7 +401,7 @@ int up_input_capture_set_trigger(unsigned channel, input_capture_edge edge)
uint16_t rvalue;
rv = OK;
irqstate_t flags = irqsave();
irqstate_t flags = px4_enter_critical_section();
switch (timer_io_channels[channel].timer_channel) {
@@ -437,7 +437,7 @@ int up_input_capture_set_trigger(unsigned channel, input_capture_edge edge)
rv = -EIO;
}
irqrestore(flags);
px4_leave_critical_section(flags);
}
}
@@ -456,10 +456,10 @@ int up_input_capture_get_callback(unsigned channel, capture_callback_t *callback
if (io_timer_get_channel_mode(channel) == IOTimerChanMode_Capture) {
irqstate_t flags = irqsave();
irqstate_t flags = px4_enter_critical_section();
*callback = channel_handlers[channel].callback;
*context = channel_handlers[channel].context;
irqrestore(flags);
px4_leave_critical_section(flags);
rv = OK;
}
}
@@ -492,14 +492,14 @@ int up_input_capture_get_stats(unsigned channel, input_capture_stats_t *stats, b
int rv = io_timer_validate_channel_index(channel);
if (rv == 0) {
irqstate_t flags = irqsave();
irqstate_t flags = px4_enter_critical_section();
*stats = channel_stats[channel];
if (clear) {
memset(&channel_stats[channel], 0, sizeof(*stats));
}
irqrestore(flags);
px4_leave_critical_section(flags);
}
return rv;
src/drivers/stm32/drv_io_timer.c
+8 -8
View File
@@ -397,7 +397,7 @@ static int io_timer_init_timer(unsigned timer)
if (rv == 0) {
irqstate_t flags = irqsave();
irqstate_t flags = px4_enter_critical_section();
set_timer_initalized(timer);
@@ -448,7 +448,7 @@ static int io_timer_init_timer(unsigned timer)
up_enable_irq(io_timers[timer].vectorno);
irqrestore(flags);
px4_leave_critical_section(flags);
}
return rv;
@@ -520,11 +520,11 @@ int io_timer_channel_init(unsigned channel, io_timer_channel_mode_t mode,
io_timer_init_timer(channels_timer(channel));
irqstate_t flags = irqsave();
irqstate_t flags = px4_enter_critical_section();
/* Set up IO */
if (gpio) {
stm32_configgpio(gpio);
px4_arch_configgpio(gpio);
}
@@ -570,7 +570,7 @@ int io_timer_channel_init(unsigned channel, io_timer_channel_mode_t mode,
channel_handlers[channel].callback = channel_handler;
channel_handlers[channel].context = context;
rDIER(timer) |= dier_setbits << shifts;
irqrestore(flags);
px4_leave_critical_section(flags);
}
return rv;
@@ -643,7 +643,7 @@ int io_timer_set_enable(bool state, io_timer_channel_mode_t mode, io_timer_chann
}
}
irqstate_t flags = irqsave();
irqstate_t flags = px4_enter_critical_section();
for (unsigned actions = 0; actions < arraySize(action_cache) && action_cache[actions].base != 0 ; actions++) {
uint32_t rvalue = _REG32(action_cache[actions].base, STM32_GTIM_CCER_OFFSET);
@@ -667,7 +667,7 @@ int io_timer_set_enable(bool state, io_timer_channel_mode_t mode, io_timer_chann
for (unsigned chan = 0; chan < arraySize(action_cache[actions].gpio); chan++) {
if (action_cache[actions].gpio[chan]) {
stm32_configgpio(action_cache[actions].gpio[chan]);
px4_arch_configgpio(action_cache[actions].gpio[chan]);
action_cache[actions].gpio[chan] = 0;
}
}
@@ -681,7 +681,7 @@ int io_timer_set_enable(bool state, io_timer_channel_mode_t mode, io_timer_chann
}
}
irqrestore(flags);
px4_leave_critical_section(flags);
return 0;
}
src/drivers/stm32/tone_alarm/tone_alarm.cpp
+5 -5
View File
@@ -439,7 +439,7 @@ ToneAlarm::init()
}
/* configure the GPIO to the idle state */
stm32_configgpio(GPIO_TONE_ALARM_IDLE);
px4_arch_configgpio(GPIO_TONE_ALARM_IDLE);
/* clock/power on our timer */
modifyreg32(TONE_ALARM_CLOCK_POWER_REG, 0, TONE_ALARM_CLOCK_ENABLE);
@@ -571,7 +571,7 @@ ToneAlarm::start_note(unsigned note)
rCCER |= TONE_CCER; // enable the output
// configure the GPIO to enable timer output
stm32_configgpio(GPIO_TONE_ALARM);
px4_arch_configgpio(GPIO_TONE_ALARM);
}
void
@@ -583,7 +583,7 @@ ToneAlarm::stop_note()
/*
* Make sure the GPIO is not driving the speaker.
*/
stm32_configgpio(GPIO_TONE_ALARM_IDLE);
px4_arch_configgpio(GPIO_TONE_ALARM_IDLE);
}
void
@@ -876,7 +876,7 @@ ToneAlarm::ioctl(file *filp, int cmd, unsigned long arg)
DEVICE_DEBUG("ioctl %i %u", cmd, arg);
// irqstate_t flags = irqsave();
// irqstate_t flags = px4_enter_critical_section();
/* decide whether to increase the alarm level to cmd or leave it alone */
switch (cmd) {
@@ -911,7 +911,7 @@ ToneAlarm::ioctl(file *filp, int cmd, unsigned long arg)
break;
}
// irqrestore(flags);
// px4_leave_critical_section(flags);
/* give it to the superclass if we didn't like it */
if (result == -ENOTTY) {
src/drivers/test_ppm/test_ppm.cpp
+3 -3
View File
@@ -118,7 +118,7 @@ TEST_PPM::~TEST_PPM()
int
TEST_PPM::init()
{
stm32_configgpio(TEST_PPM_PIN);
px4_arch_configgpio(TEST_PPM_PIN);
start();
return OK;
}
@@ -148,11 +148,11 @@ void
TEST_PPM::do_out(void)
{
if ((_call_times % 2) == 0) {
stm32_gpiowrite(TEST_PPM_PIN, false);
px4_arch_gpiowrite(TEST_PPM_PIN, false);
hrt_call_after(&_call, _values[_call_times / 2] - _plus_width, (hrt_callout)&TEST_PPM::loops, this);
} else {
stm32_gpiowrite(TEST_PPM_PIN, true);
px4_arch_gpiowrite(TEST_PPM_PIN, true);
hrt_call_after(&_call, _plus_width, (hrt_callout)&TEST_PPM::loops, this);
}
src/drivers/trone/trone.cpp
+3 -3
View File
@@ -442,14 +442,14 @@ TRONE::ioctl(struct file *filp, int cmd, unsigned long arg)
return -EINVAL;
}
irqstate_t flags = irqsave();
irqstate_t flags = px4_enter_critical_section();
if (!_reports->resize(arg)) {
irqrestore(flags);
px4_leave_critical_section(flags);
return -ENOMEM;
}
irqrestore(flags);
px4_leave_critical_section(flags);
return OK;
}
src/modules/commander/state_machine_helper.cpp
+3 -2
View File
@@ -39,6 +39,7 @@
* @author Julian Oes <julian@oes.ch>
* @author Sander Smeets <sander@droneslab.com>
*/
#include <px4_config.h>
#include <stdio.h>
#include <unistd.h>
@@ -167,7 +168,7 @@ transition_result_t arming_state_transition(struct vehicle_status_s *status,
* Perform an atomic state update
*/
#ifdef __PX4_NUTTX
irqstate_t flags = irqsave();
irqstate_t flags = px4_enter_critical_section();
#endif
/* enforce lockdown in HIL */
@@ -306,7 +307,7 @@ transition_result_t arming_state_transition(struct vehicle_status_s *status,
/* end of atomic state update */
#ifdef __PX4_NUTTX
irqrestore(flags);
px4_leave_critical_section(flags);
#endif
}
src/modules/px4iofirmware/controls.c
+2 -2
View File
@@ -542,7 +542,7 @@ ppm_input(uint16_t *values, uint16_t *num_values, uint16_t *frame_len)
}
/* avoid racing with PPM updates */
irqstate_t state = irqsave();
irqstate_t state = px4_enter_critical_section();
/*
* If we have received a new PPM frame within the last 200ms, accept it
@@ -571,7 +571,7 @@ ppm_input(uint16_t *values, uint16_t *num_values, uint16_t *frame_len)
result = (*num_values > 0);
}
irqrestore(state);
px4_leave_critical_section(state);
return result;
}
src/modules/px4iofirmware/i2c.c
+4 -4
View File
@@ -112,8 +112,8 @@ interface_init(void)
modifyreg32(STM32_RCC_APB1RSTR, RCC_APB1RSTR_I2C1RST, 0);
/* configure the i2c GPIOs */
stm32_configgpio(GPIO_I2C1_SCL);
stm32_configgpio(GPIO_I2C1_SDA);
px4_arch_configgpio(GPIO_I2C1_SCL);
px4_arch_configgpio(GPIO_I2C1_SDA);
/* soft-reset the block */
rCR1 |= I2C_CR1_SWRST;
@@ -301,12 +301,12 @@ i2c_rx_complete(void)
}
/* disable interrupts while reconfiguring DMA for the selected registers */
irqstate_t flags = irqsave();
irqstate_t flags = px4_enter_critical_section();
stm32_dmastop(tx_dma);
i2c_tx_setup();
irqrestore(flags);
px4_leave_critical_section(flags);
}
}
src/modules/px4iofirmware/px4io.h
+14 -14
View File
@@ -151,22 +151,22 @@ extern pwm_limit_t pwm_limit;
/*
* GPIO handling.
*/
#define LED_BLUE(_s) stm32_gpiowrite(GPIO_LED1, !(_s))
#define LED_AMBER(_s) stm32_gpiowrite(GPIO_LED2, !(_s))
#define LED_SAFETY(_s) stm32_gpiowrite(GPIO_LED3, !(_s))
#define LED_RING(_s) stm32_gpiowrite(GPIO_LED4, (_s))
#define LED_BLUE(_s) px4_arch_gpiowrite(GPIO_LED1, !(_s))
#define LED_AMBER(_s) px4_arch_gpiowrite(GPIO_LED2, !(_s))
#define LED_SAFETY(_s) px4_arch_gpiowrite(GPIO_LED3, !(_s))
#define LED_RING(_s) px4_arch_gpiowrite(GPIO_LED4, (_s))
#ifdef CONFIG_ARCH_BOARD_PX4IO_V1
# define PX4IO_RELAY_CHANNELS 4
# define POWER_SERVO(_s) stm32_gpiowrite(GPIO_SERVO_PWR_EN, (_s))
# define POWER_ACC1(_s) stm32_gpiowrite(GPIO_ACC1_PWR_EN, (_s))
# define POWER_ACC2(_s) stm32_gpiowrite(GPIO_ACC2_PWR_EN, (_s))
# define POWER_RELAY1(_s) stm32_gpiowrite(GPIO_RELAY1_EN, (_s))
# define POWER_RELAY2(_s) stm32_gpiowrite(GPIO_RELAY2_EN, (_s))
# define POWER_SERVO(_s) px4_arch_gpiowrite(GPIO_SERVO_PWR_EN, (_s))
# define POWER_ACC1(_s) px4_arch_gpiowrite(GPIO_ACC1_PWR_EN, (_s))
# define POWER_ACC2(_s) px4_arch_gpiowrite(GPIO_ACC2_PWR_EN, (_s))
# define POWER_RELAY1(_s) px4_arch_gpiowrite(GPIO_RELAY1_EN, (_s))
# define POWER_RELAY2(_s) px4_arch_gpiowrite(GPIO_RELAY2_EN, (_s))
# define OVERCURRENT_ACC (!stm32_gpioread(GPIO_ACC_OC_DETECT))
# define OVERCURRENT_SERVO (!stm32_gpioread(GPIO_SERVO_OC_DETECT))
# define OVERCURRENT_ACC (!px4_arch_gpioread(GPIO_ACC_OC_DETECT))
# define OVERCURRENT_SERVO (!px4_arch_gpioread(GPIO_SERVO_OC_DETECT))
# define PX4IO_ADC_CHANNEL_COUNT 2
# define ADC_VBATT 4
@@ -177,9 +177,9 @@ extern pwm_limit_t pwm_limit;
#ifdef CONFIG_ARCH_BOARD_PX4IO_V2
# define PX4IO_RELAY_CHANNELS 0
# define ENABLE_SBUS_OUT(_s) stm32_gpiowrite(GPIO_SBUS_OENABLE, !(_s))
# define ENABLE_SBUS_OUT(_s) px4_arch_gpiowrite(GPIO_SBUS_OENABLE, !(_s))
# define VDD_SERVO_FAULT (!stm32_gpioread(GPIO_SERVO_FAULT_DETECT))
# define VDD_SERVO_FAULT (!px4_arch_gpioread(GPIO_SERVO_FAULT_DETECT))
# define PX4IO_ADC_CHANNEL_COUNT 2
# define ADC_VSERVO 4
@@ -187,7 +187,7 @@ extern pwm_limit_t pwm_limit;
#endif
#define BUTTON_SAFETY stm32_gpioread(GPIO_BTN_SAFETY)
#define BUTTON_SAFETY px4_arch_gpioread(GPIO_BTN_SAFETY)
#define CONTROL_PAGE_INDEX(_group, _channel) (_group * PX4IO_CONTROL_CHANNELS + _channel)
src/modules/px4iofirmware/serial.c
+2 -2
View File
@@ -104,8 +104,8 @@ interface_init(void)
rx_dma = stm32_dmachannel(PX4FMU_SERIAL_RX_DMA);
/* configure pins for serial use */
stm32_configgpio(PX4FMU_SERIAL_TX_GPIO);
stm32_configgpio(PX4FMU_SERIAL_RX_GPIO);
px4_arch_configgpio(PX4FMU_SERIAL_TX_GPIO);
px4_arch_configgpio(PX4FMU_SERIAL_RX_GPIO);
/* reset and configure the UART */
rCR1 = 0;
src/modules/systemlib/param/param.c
+3 -3
View File
@@ -807,17 +807,17 @@ param_bus_lock(bool lock)
// XXX this would be the preferred locking method
// if (dev == nullptr) {
// dev = up_spiinitialize(PX4_SPI_BUS_BARO);
// dev = px4_spibus_initialize(PX4_SPI_BUS_BARO);
// }
// SPI_LOCK(dev, lock);
// we lock like this for Pixracer for now
if (lock) {
irq_state = irqsave();
irq_state = px4_enter_critical_section();
} else {
irqrestore(irq_state);
px4_leave_critical_section(irq_state);
}
#endif
src/modules/systemlib/px4_macros.h
+103
View File
@@ -0,0 +1,103 @@
/****************************************************************************
*
* Copyright (C) 2014 PX4 Development Team. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name PX4 nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/**
* @file px4_macros.h
*
* A set of useful macros for enhanced runtime and compile time
* error detection and warning suppression.
*
* Define NO_BLOAT to reduce bloat from file name inclusion.
*
* The arraySize() will compute the size of an array regardless
* it's type
*
* INVALID_CASE(c) should be used is case statements to ferret out
* unintended behavior
*
* UNUSED(var) will suppress compile time warnings of unused
* variables
*
* CCASSERT(predicate) Will generate a compile time error it the
* predicate is false
*/
#include <assert.h>
#ifndef _PX4_MACROS_H
#define _PX4_MACROS_H
#if !defined(arraySize)
#define arraySize(a) (sizeof((a))/sizeof((a[0])))
#endif
#if !defined(NO_BLOAT)
#if defined(__BASE_FILE__)
#define _FILE_NAME_ __BASE_FILE__
#else
#define _FILE_NAME_ __FILE__
#endif
#else
#define _FILE_NAME_ ""
#endif
#if !defined(INVALID_CASE)
#define INVALID_CASE(c) printf("Invalid Case %d, %s:%d",(c),__BASE_FILE__,__LINE__) /* todo use PANIC */
#endif
#if !defined(UNUSED)
#define UNUSED(var) (void)(var)
#endif
#if !defined(CAT)
#if !defined(_CAT)
#define _CAT(a, b) a ## b
#endif
#define CAT(a, b) _CAT(a, b)
#endif
#if !defined(CCASSERT)
#if defined(static_assert)
# define CCASSERT(predicate) static_assert(predicate)
# else
# define CCASSERT(predicate) _x_CCASSERT_LINE(predicate, __LINE__)
# if !defined(_x_CCASSERT_LINE)
# define _x_CCASSERT_LINE(predicate, line) typedef char CAT(constraint_violated_on_line_,line)[2*((predicate)!=0)-1] __attribute__ ((unused)) ;
# endif
# endif
#endif
#define DO_PRAGMA(x) _Pragma (#x)
#define TODO(x) DO_PRAGMA(message ("TODO - " #x))
#endif /* _PX4_MACROS_H */
src/modules/uORB/uORBDevices_nuttx.cpp
+8 -8
View File
@@ -183,7 +183,7 @@ uORB::DeviceNode::read(struct file *filp, char *buffer, size_t buflen)
/*
* Perform an atomic copy & state update
*/
irqstate_t flags = irqsave();
irqstate_t flags = px4_enter_critical_section();
/* if the caller doesn't want the data, don't give it to them */
if (nullptr != buffer) {
@@ -202,7 +202,7 @@ uORB::DeviceNode::read(struct file *filp, char *buffer, size_t buflen)
*/
sd->update_reported = false;
irqrestore(flags);
px4_leave_critical_section(flags);
return _meta->o_size;
}
@@ -244,7 +244,7 @@ uORB::DeviceNode::write(struct file *filp, const char *buffer, size_t buflen)
}
/* Perform an atomic copy. */
irqstate_t flags = irqsave();
irqstate_t flags = px4_enter_critical_section();
memcpy(_data, buffer, _meta->o_size);
/* update the timestamp and generation count */
@@ -253,7 +253,7 @@ uORB::DeviceNode::write(struct file *filp, const char *buffer, size_t buflen)
_published = true;
irqrestore(flags);
px4_leave_critical_section(flags);
/* notify any poll waiters */
poll_notify(POLLIN);
@@ -268,9 +268,9 @@ uORB::DeviceNode::ioctl(struct file *filp, int cmd, unsigned long arg)
switch (cmd) {
case ORBIOCLASTUPDATE: {
irqstate_t state = irqsave();
irqstate_t state = px4_enter_critical_section();
*(hrt_abstime *)arg = _last_update;
irqrestore(state);
px4_leave_critical_section(state);
return OK;
}
@@ -400,7 +400,7 @@ uORB::DeviceNode::appears_updated(SubscriberData *sd)
bool ret = false;
/* avoid racing between interrupt and non-interrupt context calls */
irqstate_t state = irqsave();
irqstate_t state = px4_enter_critical_section();
/* check if this topic has been published yet, if not bail out */
if (_data == nullptr) {
@@ -466,7 +466,7 @@ uORB::DeviceNode::appears_updated(SubscriberData *sd)
}
out:
irqrestore(state);
px4_leave_critical_section(state);
/* consider it updated */
return ret;
src/modules/uavcan/sensors/baro.cpp
+3 -3
View File
@@ -123,14 +123,14 @@ int UavcanBarometerBridge::ioctl(struct file *filp, int cmd, unsigned long arg)
return -EINVAL;
}
irqstate_t flags = irqsave();
irqstate_t flags = px4_enter_critical_section();
if (!_reports.resize(arg)) {
irqrestore(flags);
px4_leave_critical_section(flags);
return -ENOMEM;
}
irqrestore(flags);
px4_leave_critical_section(flags);
return OK;
}
src/modules/uavcan/uavcan_main.cpp
+4 -4
View File
@@ -537,12 +537,12 @@ int UavcanNode::start(uavcan::NodeID node_id, uint32_t bitrate)
* fail during initialization.
*/
#if defined(GPIO_CAN1_RX)
stm32_configgpio(GPIO_CAN1_RX);
stm32_configgpio(GPIO_CAN1_TX);
px4_arch_configgpio(GPIO_CAN1_RX);
px4_arch_configgpio(GPIO_CAN1_TX);
#endif
#if defined(GPIO_CAN2_RX)
stm32_configgpio(GPIO_CAN2_RX | GPIO_PULLUP);
stm32_configgpio(GPIO_CAN2_TX);
px4_arch_configgpio(GPIO_CAN2_RX | GPIO_PULLUP);
px4_arch_configgpio(GPIO_CAN2_TX);
#endif
#if !defined(GPIO_CAN1_RX) && !defined(GPIO_CAN2_RX)
# error "Need to define GPIO_CAN1_RX and/or GPIO_CAN2_RX"
src/platforms/posix/drivers/airspeedsim/airspeedsim.cpp
+3 -3
View File
@@ -251,13 +251,13 @@ AirspeedSim::ioctl(device::file_t *filp, int cmd, unsigned long arg)
return -EINVAL;
}
//irqstate_t flags = irqsave();
//irqstate_t flags = px4_enter_critical_section();
if (!_reports->resize(arg)) {
//irqrestore(flags);
//px4_leave_critical_section(flags);
return -ENOMEM;
}
//irqrestore(flags);
//px4_leave_critical_section(flags);
return OK;
}
src/platforms/px4_config.h
+1
View File
@@ -43,6 +43,7 @@
#include <nuttx/config.h>
#include <board_config.h>
#include "px4_micro_hal.h"
#elif defined (__PX4_POSIX)
src/platforms/px4_micro_hal.h
+53
View File
@@ -0,0 +1,53 @@
/****************************************************************************
*
* Copyright (c) 2016 PX4 Development Team. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name PX4 nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
#pragma once
/*
* This file is a shim to bridge to nuttx_v3
*/
#ifdef __PX4_NUTTX
# define px4_enter_critical_section() irqsave()
# define px4_leave_critical_section(flags) irqrestore(flags)
# define px4_spibus_initialize(port_1based) up_spiinitialize(port_1based)
# define px4_i2cbus_initialize(bus_num_1based) up_i2cinitialize(bus_num_1based)
# define px4_i2cbus_uninitialize(pdev) up_i2cuninitialize(pdev)
# if defined(CONFIG_STM32_VALUELINE) || defined(CONFIG_STM32_STM32F40XX)
# define px4_arch_configgpio(pinset) stm32_configgpio(pinset)
# define px4_arch_unconfiggpio(pinset) stm32_unconfiggpio(pinset)
# define px4_arch_gpioread(pinset) stm32_gpioread(pinset)
# define px4_arch_gpiowrite(pinset, value) stm32_gpiowrite(pinset, value)
# endif
#endif
src/systemcmds/i2c/i2c.c
+1 -1
View File
@@ -73,7 +73,7 @@ static struct i2c_dev_s *i2c;
int i2c_main(int argc, char *argv[])
{
/* find the right I2C */
i2c = up_i2cinitialize(PX4_I2C_BUS_ONBOARD);
i2c = px4_i2cbus_initialize(PX4_I2C_BUS_ONBOARD);
if (i2c == NULL) {
errx(1, "failed to locate I2C bus");
src/systemcmds/mtd/mtd.c
+2 -2
View File
@@ -177,7 +177,7 @@ static void
ramtron_attach(void)
{
/* initialize the right spi */
struct spi_dev_s *spi = up_spiinitialize(PX4_SPI_BUS_RAMTRON);
struct spi_dev_s *spi = px4_spibus_initialize(PX4_SPI_BUS_RAMTRON);
/* this resets the spi bus, set correct bus speed again */
SPI_SETFREQUENCY(spi, 10 * 1000 * 1000);
@@ -225,7 +225,7 @@ static void
at24xxx_attach(void)
{
/* find the right I2C */
struct i2c_dev_s *i2c = up_i2cinitialize(PX4_I2C_BUS_ONBOARD);
struct i2c_dev_s *i2c = px4_i2cbus_initialize(PX4_I2C_BUS_ONBOARD);
/* this resets the I2C bus, set correct bus speed again */
I2C_SETFREQUENCY(i2c, 400000);
src/systemcmds/tests/test_time.c
+4 -4
View File
@@ -121,12 +121,12 @@ int test_time(int argc, char *argv[])
delta = 0;
for (unsigned i = 0; i < 100; i++) {
uint32_t flags = irqsave();
uint32_t flags = px4_enter_critical_section();
h = hrt_absolute_time();
c = cycletime();
irqrestore(flags);
px4_leave_critical_section(flags);
delta += h - c;
}
@@ -138,12 +138,12 @@ int test_time(int argc, char *argv[])
usleep(rand());
uint32_t flags = irqsave();
uint32_t flags = px4_enter_critical_section();
c = cycletime();
h = hrt_absolute_time();
irqrestore(flags);
px4_leave_critical_section(flags);
delta = abs(h - c);
deltadelta = abs(delta - lowdelta);
src/systemcmds/usb_connected/usb_connected.c
+1 -1
View File
@@ -52,5 +52,5 @@ __EXPORT int usb_connected_main(int argc, char *argv[]);
int
usb_connected_main(int argc, char *argv[])
{
return stm32_gpioread(GPIO_OTGFS_VBUS) ? 0 : 1;
return px4_arch_gpioread(GPIO_OTGFS_VBUS) ? 0 : 1;
}