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Merge branch 'main' into wip_new_uart_api

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This commit is contained in:
Eric Katzfey
2024-03-05 08:56:53 -08:00
parent ff133660c0 d1ae242a91
commit 635d4557f7
526 changed files with 20747 additions and 8647 deletions
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platforms/nuttx/src/px4/common/include/px4_platform/board_determine_hw_info.h
+4
View File
@@ -36,6 +36,10 @@
__BEGIN_DECLS
#define HW_INFO_SUFFIX "%0" STRINGIFY(HW_INFO_VER_DIGITS) "x%0" STRINGIFY(HW_INFO_REV_DIGITS) "x"
#if defined(BOARD_HAS_HW_SPLIT_VERSIONING)
# define HW_INFO_FMUM_SUFFIX "%0" STRINGIFY(HW_INFO_REV_DIGITS) "x"
# define HW_INFO_BASE_SUFFIX "%0" STRINGIFY(HW_INFO_VER_DIGITS) "x"
#endif
/************************************************************************************
* Name: board_determine_hw_info
*
platforms/nuttx/src/px4/common/px4_manifest.cpp
+7
View File
@@ -104,6 +104,13 @@ __EXPORT int px4_mft_query(const px4_mft_s *mft, px4_manifest_types_e type,
break;
case MFT:
if (mft->mfts[m]->pmft != nullptr) {
system_query_func_t query = (system_query_func_t) mft->mfts[m]->pmft;
return query(sub, val, nullptr);
}
break;
default:
rv = -ENODATA;
break;
platforms/nuttx/src/px4/nxp/imxrt/board_hw_info/board_hw_rev_ver.c
+30 -1
View File
@@ -50,7 +50,7 @@
#include <lib/crc/crc.h>
#include <lib/systemlib/px4_macros.h>
#if defined(BOARD_HAS_HW_VERSIONING)
#if defined(BOARD_HAS_HW_VERSIONING) || defined(BOARD_HAS_HW_SPLIT_VERSIONING)
# if defined(GPIO_HW_VER_REV_DRIVE)
# define GPIO_HW_REV_DRIVE GPIO_HW_VER_REV_DRIVE
@@ -66,6 +66,9 @@
static int hw_version = 0;
static int hw_revision = 0;
static char hw_info[HW_INFO_SIZE] = {0};
#if defined(BOARD_HAS_HW_SPLIT_VERSIONING)
static char hw_base_info[HW_INFO_SIZE] = {0};
#endif
/****************************************************************************
* Protected Functions
@@ -279,6 +282,27 @@ __EXPORT const char *board_get_hw_type_name()
return (const char *) hw_info;
}
#if defined(BOARD_HAS_HW_SPLIT_VERSIONING)
/************************************************************************************
* Name: board_get_hw_base_type_name
*
* Description:
* Optional returns a 0 terminated string defining the base type.
*
* Input Parameters:
* None
*
* Returned Value:
* a 0 terminated string defining the HW type. This my be a 0 length string ""
*
************************************************************************************/
__EXPORT const char *board_get_hw_base_type_name()
{
return (const char *) hw_base_info;
}
#endif
/************************************************************************************
* Name: board_get_hw_version
*
@@ -380,7 +404,12 @@ int board_determine_hw_info()
}
if (rv == OK) {
#if defined(BOARD_HAS_HW_SPLIT_VERSIONING)
snprintf(hw_info, sizeof(hw_info), HW_INFO_INIT_PREFIX HW_INFO_FMUM_SUFFIX, GET_HW_FMUM_ID());
snprintf(hw_base_info, sizeof(hw_info), HW_INFO_BASE_SUFFIX, GET_HW_BASE_ID());
#else
snprintf(hw_info, sizeof(hw_info), HW_INFO_INIT_PREFIX HW_INFO_SUFFIX, hw_version, hw_revision);
#endif
}
return rv;
platforms/nuttx/src/px4/nxp/imxrt/board_reset/CMakeLists.txt
+2
View File
@@ -35,6 +35,8 @@ px4_add_library(arch_board_reset
board_reset.cpp
)
target_link_libraries(arch_board_reset PRIVATE arch_board_romapi)
# up_systemreset
if (NOT DEFINED CONFIG_BUILD_FLAT)
target_link_libraries(arch_board_reset PRIVATE nuttx_karch)
platforms/nuttx/src/px4/nxp/imxrt/board_reset/board_reset.cpp
+9
View File
@@ -44,6 +44,10 @@
#include <arm_internal.h>
#include <hardware/rt117x/imxrt117x_snvs.h>
#include <px4_arch/imxrt_flexspi_nor_flash.h>
#include <px4_arch/imxrt_romapi.h>
#define BOOT_RTC_SIGNATURE 0xb007b007
#define PX4_IMXRT_RTC_REBOOT_REG 3
#define PX4_IMXRT_RTC_REBOOT_REG_ADDRESS IMXRT_SNVS_LPGPR3
@@ -64,6 +68,11 @@ int board_reset(int status)
{
if (status == REBOOT_TO_BOOTLOADER) {
board_reset_enter_bootloader();
} else if (status == REBOOT_TO_ISP) {
uint32_t arg = 0xeb100000;
ROM_API_Init();
ROM_RunBootloader(&arg);
}
#if defined(BOARD_HAS_ON_RESET)
platforms/nuttx/src/px4/nxp/rt117x/include/px4_arch/spi_hw_description.h
+101 -2
View File
@@ -40,6 +40,57 @@
#include <imxrt_gpio.h>
constexpr bool validateSPIConfig(const px4_spi_bus_t spi_busses_conf[SPI_BUS_MAX_BUS_ITEMS])
{
const bool nuttx_enabled_spi_buses[] = {
#ifdef CONFIG_IMXRT_LPSPI1
true,
#else
false,
#endif
#ifdef CONFIG_IMXRT_LPSPI2
true,
#else
false,
#endif
#ifdef CONFIG_IMXRT_LPSPI3
true,
#else
false,
#endif
#ifdef CONFIG_IMXRT_LPSPI4
true,
#else
false,
#endif
#ifdef CONFIG_IMXRT_LPSPI5
true,
#else
false,
#endif
#ifdef CONFIG_IMXRT_LPSPI6
true,
#else
false,
#endif
};
for (unsigned i = 0; i < sizeof(nuttx_enabled_spi_buses) / sizeof(nuttx_enabled_spi_buses[0]); ++i) {
bool found_bus = false;
for (int j = 0; j < SPI_BUS_MAX_BUS_ITEMS; ++j) {
if (spi_busses_conf[j].bus == (int)i + 1) {
found_bus = true;
}
}
// Either the bus is enabled in NuttX and configured in spi_busses_conf, or disabled and not configured
constexpr_assert(found_bus == nuttx_enabled_spi_buses[i], "SPI bus config mismatch (CONFIG_STM32H7_SPIx)");
}
return false;
}
static inline constexpr px4_spi_bus_device_t initSPIDevice(uint32_t devid, SPI::CS cs_gpio, SPI::DRDY drdy_gpio = {})
{
px4_spi_bus_device_t ret{};
@@ -132,8 +183,56 @@ static inline constexpr SPI::bus_device_external_cfg_t initSPIConfigExternal(SPI
return ret;
}
constexpr bool validateSPIConfig(const px4_spi_bus_t spi_busses_conf[SPI_BUS_MAX_BUS_ITEMS])
struct px4_spi_bus_array_t {
px4_spi_bus_t item[SPI_BUS_MAX_BUS_ITEMS];
};
#if defined(BOARD_HAS_HW_SPLIT_VERSIONING)
static inline constexpr px4_spi_bus_all_hw_t initSPIFmumID(hw_fmun_id_t hw_fmun_id,
const px4_spi_bus_array_t &bus_items)
{
return true;
px4_spi_bus_all_hw_t ret{};
for (int i = 0; i < SPI_BUS_MAX_BUS_ITEMS; ++i) {
ret.buses[i] = bus_items.item[i];
}
ret.board_hw_fmun_id = hw_fmun_id;
return ret;
}
#else
static inline constexpr px4_spi_bus_all_hw_t initSPIHWVersion(int hw_version_revision,
const px4_spi_bus_array_t &bus_items)
{
px4_spi_bus_all_hw_t ret{};
for (int i = 0; i < SPI_BUS_MAX_BUS_ITEMS; ++i) {
ret.buses[i] = bus_items.item[i];
}
ret.board_hw_version_revision = hw_version_revision;
return ret;
}
#endif
constexpr bool validateSPIConfig(const px4_spi_bus_t spi_buses_conf[SPI_BUS_MAX_BUS_ITEMS]);
constexpr bool validateSPIConfig(const px4_spi_bus_all_hw_t spi_buses_conf[BOARD_NUM_SPI_CFG_HW_VERSIONS])
{
for (int ver = 0; ver < BOARD_NUM_SPI_CFG_HW_VERSIONS; ++ver) {
validateSPIConfig(spi_buses_conf[ver].buses);
}
for (int ver = 1; ver < BOARD_NUM_SPI_CFG_HW_VERSIONS; ++ver) {
for (int i = 0; i < SPI_BUS_MAX_BUS_ITEMS; ++i) {
const bool equal_power_enable_gpio = spi_buses_conf[ver].buses[i].power_enable_gpio == spi_buses_conf[ver -
1].buses[i].power_enable_gpio;
// currently board_control_spi_sensors_power_configgpio() depends on that - this restriction can be removed
// by ensuring board_control_spi_sensors_power_configgpio() is called after the hw version is determined
// and SPI config is initialized.
constexpr_assert(equal_power_enable_gpio, "All HW versions must define the same power enable GPIO");
}
}
return false;
}
#endif // CONFIG_SPI
platforms/nuttx/src/px4/stm/stm32_common/board_hw_info/board_hw_rev_ver.c
+30 -2
View File
@@ -51,7 +51,7 @@
#include <lib/crc/crc.h>
#include <lib/systemlib/px4_macros.h>
#if defined(BOARD_HAS_HW_VERSIONING)
#if defined(BOARD_HAS_HW_VERSIONING) || defined(BOARD_HAS_HW_SPLIT_VERSIONING)
# if defined(GPIO_HW_VER_REV_DRIVE)
# define GPIO_HW_REV_DRIVE GPIO_HW_VER_REV_DRIVE
@@ -67,7 +67,9 @@
static int hw_version = 0;
static int hw_revision = 0;
static char hw_info[HW_INFO_SIZE] = {0};
#if defined(BOARD_HAS_HW_SPLIT_VERSIONING)
static char hw_base_info[HW_INFO_SIZE] = {0};
#endif
/****************************************************************************
* Protected Functions
****************************************************************************/
@@ -366,6 +368,27 @@ __EXPORT const char *board_get_hw_type_name()
return (const char *) hw_info;
}
#if defined(BOARD_HAS_HW_SPLIT_VERSIONING)
/************************************************************************************
* Name: board_get_hw_base_type_name
*
* Description:
* Optional returns a 0 terminated string defining the base type.
*
* Input Parameters:
* None
*
* Returned Value:
* a 0 terminated string defining the HW type. This my be a 0 length string ""
*
************************************************************************************/
__EXPORT const char *board_get_hw_base_type_name()
{
return (const char *) hw_base_info;
}
#endif
/************************************************************************************
* Name: board_get_hw_version
*
@@ -467,7 +490,12 @@ int board_determine_hw_info()
}
if (rv == OK) {
#if defined(BOARD_HAS_HW_SPLIT_VERSIONING)
snprintf(hw_info, sizeof(hw_info), HW_INFO_INIT_PREFIX HW_INFO_FMUM_SUFFIX, GET_HW_FMUM_ID());
snprintf(hw_base_info, sizeof(hw_info), HW_INFO_BASE_SUFFIX, GET_HW_BASE_ID());
#else
snprintf(hw_info, sizeof(hw_info), HW_INFO_INIT_PREFIX HW_INFO_SUFFIX, hw_version, hw_revision);
#endif
}
return rv;
platforms/nuttx/src/px4/stm/stm32_common/include/px4_arch/spi_hw_description.h
+16
View File
@@ -136,6 +136,21 @@ static inline constexpr SPI::bus_device_external_cfg_t initSPIConfigExternal(SPI
struct px4_spi_bus_array_t {
px4_spi_bus_t item[SPI_BUS_MAX_BUS_ITEMS];
};
#if defined(BOARD_HAS_HW_SPLIT_VERSIONING)
static inline constexpr px4_spi_bus_all_hw_t initSPIFmumID(hw_fmun_id_t hw_fmun_id,
const px4_spi_bus_array_t &bus_items)
{
px4_spi_bus_all_hw_t ret{};
for (int i = 0; i < SPI_BUS_MAX_BUS_ITEMS; ++i) {
ret.buses[i] = bus_items.item[i];
}
ret.board_hw_fmun_id = hw_fmun_id;
return ret;
}
#else
static inline constexpr px4_spi_bus_all_hw_t initSPIHWVersion(int hw_version_revision,
const px4_spi_bus_array_t &bus_items)
{
@@ -148,6 +163,7 @@ static inline constexpr px4_spi_bus_all_hw_t initSPIHWVersion(int hw_version_rev
ret.board_hw_version_revision = hw_version_revision;
return ret;
}
#endif
constexpr bool validateSPIConfig(const px4_spi_bus_t spi_buses_conf[SPI_BUS_MAX_BUS_ITEMS]);
constexpr bool validateSPIConfig(const px4_spi_bus_all_hw_t spi_buses_conf[BOARD_NUM_SPI_CFG_HW_VERSIONS])
platforms/nuttx/src/px4/stm/stm32h7/adc/adc.cpp
+130 -29
View File
@@ -37,6 +37,7 @@
#include <drivers/drv_hrt.h>
#include <px4_arch/adc.h>
#include "stm32_dbgmcu.h"
#include <stm32_adc.h>
#include <stm32_gpio.h>
@@ -96,35 +97,123 @@
#define ADC_MAX_FADC 36000000
#if STM32_PLL2P_FREQUENCY <= ADC_MAX_FADC
# define ADC_CCR_PRESC_DIV ADC_CCR_PRESC_NOT_DIV
#elif STM32_PLL2P_FREQUENCY/2 <= ADC_MAX_FADC
# define ADC_CCR_PRESC_DIV ADC_CCR_PRESC_DIV2
#elif STM32_PLL2P_FREQUENCY/4 <= ADC_MAX_FADC
# define ADC_CCR_PRESC_DIV ADC_CCR_PRESC_DIV4
#elif STM32_PLL2P_FREQUENCY/6 <= ADC_MAX_FADC
# define ADC_CCR_PRESC_DIV ADC_CCR_PRESC_DIV6
#elif STM32_PLL2P_FREQUENCY/8 <= ADC_MAX_FADC
# define ADC_CCR_PRESC_DIV ADC_CCR_PRESC_DIV8
#elif STM32_PLL2P_FREQUENCY/10 <= ADC_MAX_FADC
# define ADC_CCR_PRESC_DIV ADC_CCR_PRESC_DIV10
#elif STM32_PLL2P_FREQUENCY/12 <= ADC_MAX_FADC
# define ADC_CCR_PRESC_DIV ADC_CCR_PRESC_DIV12
#elif STM32_PLL2P_FREQUENCY/16 <= ADC_MAX_FADC
# define ADC_CCR_PRESC_DIV ADC_CCR_PRESC_DIV16
#elif STM32_PLL2P_FREQUENCY/32 <= ADC_MAX_FADC
# define ADC_CCR_PRESC_DIV ADC_CCR_PRESC_DIV32
#elif STM32_PLL2P_FREQUENCY/64 <= ADC_MAX_FADC
# define ADC_CCR_PRESC_DIV ADC_CCR_PRESC_DIV64
#elif STM32_PLL2P_FREQUENCY/128 <= ADC_MAX_FADC
# define ADC_CCR_PRESC_DIV ADC_CCR_PRESC_DIV128
#elif STM32_PLL2P_FREQUENCY/256 <= ADC_MAX_FADC
# define ADC_CCR_PRESC_DIV ADC_CCR_PRESC_DIV256
#else
# error "ADC STM32_PLL2P_FREQUENCY too high - no divisor found "
#define ADC3_INTERNAL_TEMP_SENSOR_CHANNEL 18 //define to map the internal temperature channel.
/****************************************************************************
* Name: adc_getclocks
****************************************************************************/
static int adc_getclocks(uint32_t *prescaler, uint32_t *boost)
{
uint32_t max_clock = ADC_MAX_FADC;
uint32_t src_clock = STM32_PLL2P_FREQUENCY;
uint32_t adc_clock;
int rv = OK;
#if STM32_RCC_D3CCIPR_ADCSRC == RCC_D3CCIPR_ADCSEL_PLL3
src_clock = STM32_PLL3R_FREQUENCY;
#elif STM32_RCC_D3CCIPR_ADCSRC == RCC_D3CCIPR_ADCSEL_PER
# error ADCSEL_PER not supported
#endif
#define ADC3_INTERNAL_TEMP_SENSOR_CHANNEL 18 //define to map the internal temperature channel.
/* The maximum clock is different for rev Y devices and rev V devices.
* rev V can support an ADC clock of up to 50MHz. rev Y only supports
* up to 36MHz.
*/
if ((getreg32(STM32_DEBUGMCU_BASE) & DBGMCU_IDCODE_REVID_MASK) ==
STM32_IDCODE_REVID_V) {
/* The max fadc is 50MHz, but there is an always-present /2 divider
* after the configurable prescaler. Therefore, the max clock out of
* the prescaler block is 2*50=100MHz
*/
max_clock = 100000000;
}
if (src_clock <= max_clock) {
*prescaler = ADC_CCR_PRESC_NOT_DIV;
adc_clock = src_clock;
} else if (src_clock / 2 <= max_clock) {
*prescaler = ADC_CCR_PRESC_DIV2;
adc_clock = src_clock / 2;
} else if (src_clock / 4 <= max_clock) {
*prescaler = ADC_CCR_PRESC_DIV4;
adc_clock = src_clock / 4;
} else if (src_clock / 6 <= max_clock) {
*prescaler = ADC_CCR_PRESC_DIV6;
adc_clock = src_clock / 6;
} else if (src_clock / 8 <= max_clock) {
*prescaler = ADC_CCR_PRESC_DIV8;
adc_clock = src_clock / 8;
} else if (src_clock / 10 <= max_clock) {
*prescaler = ADC_CCR_PRESC_DIV10;
adc_clock = src_clock / 10;
} else if (src_clock / 12 <= max_clock) {
*prescaler = ADC_CCR_PRESC_DIV12;
adc_clock = src_clock / 12;
} else if (src_clock / 16 <= max_clock) {
*prescaler = ADC_CCR_PRESC_DIV16;
adc_clock = src_clock / 16;
} else if (src_clock / 32 <= max_clock) {
*prescaler = ADC_CCR_PRESC_DIV32;
adc_clock = src_clock / 32;
} else if (src_clock / 64 <= max_clock) {
*prescaler = ADC_CCR_PRESC_DIV64;
adc_clock = src_clock / 64;
} else if (src_clock / 128 <= max_clock) {
*prescaler = ADC_CCR_PRESC_DIV128;
adc_clock = src_clock / 128;
} else if (src_clock / 256 <= max_clock) {
*prescaler = ADC_CCR_PRESC_DIV256;
adc_clock = src_clock / 256;
} else {
rv = -1;
}
if ((getreg32(STM32_DEBUGMCU_BASE) & DBGMCU_IDCODE_REVID_MASK) ==
STM32_IDCODE_REVID_V) {
if (adc_clock >= 25000000) {
*boost = ADC_CR_BOOST_50_MHZ;
} else if (adc_clock >= 12500000) {
*boost = ADC_CR_BOOST_25_MHZ;
} else if (adc_clock >= 6250000) {
*boost = ADC_CR_BOOST_12p5_MHZ;
} else {
*boost = ADC_CR_BOOST_6p25_MHZ;
}
} else {
if (adc_clock >= 20000000) {
*boost = ADC_CR_BOOST;
} else {
*boost = 0;
}
}
return rv;
}
/****************************************************************************
* Name: px4_arch_adc_init
****************************************************************************/
int px4_arch_adc_init(uint32_t base_address)
{
@@ -158,9 +247,21 @@ int px4_arch_adc_init(uint32_t base_address)
*free = base_address;
/* Get cloking for this version of Siicon */
uint32_t boost = ADC_CR_BOOST;
uint32_t prescaler = ADC_CCR_PRESC_DIV256;
if (adc_getclocks(&prescaler, &boost) != OK) {
/* ERROR: source clock too high */
PANIC();
}
/* do calibration if supported */
rCR(base_address) = ADC_CR_ADVREGEN | ADC_CR_BOOST;
rCR(base_address) = ADC_CR_ADVREGEN | boost;
/* Wait for voltage regulator to power up */
@@ -169,7 +270,7 @@ int px4_arch_adc_init(uint32_t base_address)
/* enable the temperature sensor, VREFINT channel and VBAT */
rCCR(base_address) = (ADC_CCR_VREFEN | ADC_CCR_VSENSEEN | ADC_CCR_VBATEN |
ADC_CCR_CKMODE_ASYCH | ADC_CCR_PRESC_DIV);
ADC_CCR_CKMODE_ASYCH | prescaler);
/* Enable ADC calibration. ADCALDIF == 0 so this is only for
* single-ended conversions, not for differential ones.