Merge branch 'main' into wip_new_uart_api

platforms/common/CMakeLists.txt

@@ -51,6 +51,7 @@ add_library(px4_platform STATIC
 	px4_cli.cpp
 	shutdown.cpp
 	spi.cpp
+	pab_manifest.c
 	${SRCS}
 )
 target_link_libraries(px4_platform prebuild_targets px4_work_queue)

platforms/common/include/px4_platform_common/board_common.h

@@ -269,6 +269,18 @@
 #  define HW_VER_REV(v,r)       ((uint32_t)((v) & 0xffff) << 16) | ((uint32_t)(r) & 0xffff)
 #endif
 
+#if defined(BOARD_HAS_HW_SPLIT_VERSIONING)
+typedef uint16_t hw_fmun_id_t;
+typedef uint16_t hw_base_id_t;
+// Original Signals GPIO_HW_REV_SENSE/GPIO_HW_VER_REV_DRIVE is used to ID the FMUM
+// Original Signals GPIO_HW_VER_SENSE/GPIO_HW_VER_REV_DRIVE is used to ID the BASE
+#  define BOARD_HAS_VERSIONING 1
+#  define HW_FMUM_ID(rev)       ((hw_fmun_id_t)(rev) & 0xffff)
+#  define HW_BASE_ID(ver)       ((hw_base_id_t)(ver) & 0xffff)
+#  define GET_HW_FMUM_ID()      (HW_FMUM_ID(board_get_hw_revision()))
+#  define GET_HW_BASE_ID()      (HW_BASE_ID(board_get_hw_version()))
+#endif
+
 #define HW_INFO_REV_DIGITS    3
 #define HW_INFO_VER_DIGITS    3
 
@@ -458,6 +470,15 @@ static inline bool board_rc_singlewire(const char *device) { return false; }
  *   A board may define RC_SERIAL_SWAP_RXTX, so that RC_SERIAL_PORT is configured
  *   as UART with RX/TX swapped.
  *
+ *   It can optionaly define RC_SERIAL_SWAP_USING_SINGLEWIRE If the board is wired
+ *   with TX to the input (Swapped) and the SoC does not support U[S]ART level
+ *   HW swapping, then use onewire to do the swap if and only if:
+ *
+ *    RC_SERIAL_SWAP_USING_SINGLEWIRE   is defined
+ *    RC_SERIAL_SWAP_RXTX               is defined
+ *    TIOCSSWAP                         is defined and retuns !OK
+ *    TIOCSSINGLEWIRE                   is defined
+ *
  * Input Parameters:
  *   device: serial device, e.g. "/dev/ttyS0"
  *
@@ -659,20 +680,51 @@ bool board_booted_by_px4(void);
  ************************************************************************************/
 
 typedef enum {
-	PX4_MFT_PX4IO = 0,
-	PX4_MFT_USB   = 1,
-	PX4_MFT_CAN2  = 2,
-	PX4_MFT_CAN3  = 3,
+	PX4_MFT_PX4IO      = 0,
+	PX4_MFT_USB        = 1,
+	PX4_MFT_CAN2       = 2,
+	PX4_MFT_CAN3       = 3,
+	PX4_MFT_PM2        = 4,
+	PX4_MFT_ETHERNET   = 5,
+	PX4_MFT_T1_ETH     = 6,
+	PX4_MFT_T100_ETH   = 7,
+	PX4_MFT_T1000_ETH  = 8,
 } px4_hw_mft_item_id_t;
 
+typedef int (*system_query_func_t)(const char *sub,  const char *val, void *out);
+
+#define PX4_MFT_MFT_TYPES  { \
+		PX4_MFT_PX4IO,           \
+		PX4_MFT_USB,             \
+		PX4_MFT_CAN2,            \
+		PX4_MFT_CAN3,            \
+		PX4_MFT_PM2,             \
+		PX4_MFT_ETHERNET,        \
+		PX4_MFT_T1_ETH,          \
+		PX4_MFT_T100_ETH,        \
+		PX4_MFT_T1000_ETH }
+
+#define PX4_MFT_MFT_STR_TYPES  { \
+		"MFT_PX4IO",             \
+		"MFT_USB",               \
+		"MFT_CAN2",              \
+		"MFT_CAN3",              \
+		"MFT_PM2",               \
+		"MFT_ETHERNET",          \
+		"MFT_T1_ETH",            \
+		"MFT_T100_ETH",          \
+		"MFT_T1000_ETH",         \
+		"MFT_T1000_ETH"}
+
 typedef enum {
-	px4_hw_con_unknown  = 0,
-	px4_hw_con_onboard  = 1,
+	px4_hw_con_unknown   = 0,
+	px4_hw_con_onboard   = 1,
 	px4_hw_con_connector = 3,
 } px4_hw_connection_t;
 
 
 typedef struct {
+	unsigned int id:         16;  /* The id px4_hw_mft_item_id_t */
 	unsigned int present:    1;   /* 1 if this board have this item */
 	unsigned int mandatory:  1;   /* 1 if this item has to be present and working */
 	unsigned int connection: 2;   /* See px4_hw_connection_t */
@@ -684,7 +736,7 @@ typedef const px4_hw_mft_item_t  *px4_hw_mft_item;
 
 #if defined(BOARD_HAS_VERSIONING)
 __EXPORT px4_hw_mft_item board_query_manifest(px4_hw_mft_item_id_t id);
-
+__EXPORT int system_query_manifest(const char *sub,  const char *val, void *out);
 #  define PX4_MFT_HW_SUPPORTED(ID)           (board_query_manifest((ID))->present)
 #  define PX4_MFT_HW_REQUIRED(ID)            (board_query_manifest((ID))->mandatory)
 #  define PX4_MFT_HW_IS_ONBOARD(ID)          (board_query_manifest((ID))->connection == px4_hw_con_onboard)
@@ -757,6 +809,26 @@ __EXPORT const char *board_get_hw_type_name(void);
 #define board_get_hw_type_name() ""
 #endif
 
+/************************************************************************************
+ * Name: board_get_hw_base_type_name
+ *
+ * Description:
+ *   Optional returns a 0 terminated string defining the HW type.
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   a 0 terminated string defining the HW type. This may be a 0 length string ""
+ *
+ ************************************************************************************/
+
+#if defined(BOARD_HAS_HW_SPLIT_VERSIONING)
+__EXPORT const char *board_get_hw_base_type_name(void);
+#else
+#define board_get_hw_base_type_name() ""
+#endif
+
 /************************************************************************************
  * Name: board_get_hw_version
  *

platforms/common/include/px4_platform_common/spi.h

@@ -73,7 +73,11 @@ struct px4_spi_bus_t {
 
 struct px4_spi_bus_all_hw_t {
 	px4_spi_bus_t buses[SPI_BUS_MAX_BUS_ITEMS];
-	int board_hw_version_revision{-1}; ///< 0=default, >0 for a specific revision (see board_get_hw_version & board_get_hw_revision), -1=unused
+#if defined(BOARD_HAS_HW_SPLIT_VERSIONING)
+	hw_fmun_id_t board_hw_fmun_id {USHRT_MAX};
+#else
+	int board_hw_version_revision {-1}; ///< 0=default, >0 for a specific revision (see board_get_hw_version & board_get_hw_revision), -1=unused
+#endif
 };
 
 #if BOARD_NUM_SPI_CFG_HW_VERSIONS > 1

platforms/common/pab_manifest.c

@@ -0,0 +1,446 @@
+/****************************************************************************
+ *
+ *   Copyright (c) 2024 PX4 Development Team. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name PX4 nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/**
+ * @file pab_manifest.c
+ *
+ * This module supplies the interface to the manifest of hardware that is
+ * optional and dependent on the HW_BASE_ID
+ *
+ * The manifest allows the system to know whether a hardware option
+ * say for example the PX4IO is an no-pop option vs it is broken.
+ *
+ */
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <board_config.h>
+
+#if defined(BOARD_HAS_HW_SPLIT_VERSIONING)
+
+#include <inttypes.h>
+#include <stdbool.h>
+#include <syslog.h>
+
+#include "systemlib/px4_macros.h"
+
+/****************************************************************************
+ * Pre-Processor Definitions
+ ****************************************************************************/
+
+typedef struct {
+	hw_base_id_t             hw_base_id; /* The ID of the Base */
+	const px4_hw_mft_item_t *mft;        /* The first entry */
+	uint32_t                 entries;    /* the lenght of the list */
+} px4_hw_mft_list_entry_t;
+
+typedef px4_hw_mft_list_entry_t *px4_hw_mft_list_entry;
+#define px4_hw_mft_list_uninitialized (px4_hw_mft_list_entry) -1
+
+static const px4_hw_mft_item_t device_unsupported = {0, 0, 0};
+
+// List of components on a specific base board configuration
+// The ids of those components is given by the enum (px4_hw_mft_item_id_t)
+// declared in board_common.h
+
+// BASE ID 0 Auterion vXx base board
+static const px4_hw_mft_item_t base_configuration_0[] = {
+	{
+		.id          =  PX4_MFT_PX4IO,
+		.present     = 1,
+		.mandatory   = 1,
+		.connection  = px4_hw_con_onboard,
+	},
+	{
+		.id          = PX4_MFT_USB,
+		.present     = 1,
+		.mandatory   = 1,
+		.connection  = px4_hw_con_onboard,
+	},
+	{
+		.id          = PX4_MFT_CAN2,
+		.present     = 1,
+		.mandatory   = 1,
+		.connection  = px4_hw_con_onboard,
+	},
+	{
+		.id          = PX4_MFT_CAN3,
+		.present     = 0,
+		.mandatory   = 0,
+		.connection  = px4_hw_con_unknown,
+	},
+	{
+		.id          =  PX4_MFT_PM2,
+		.present     = 1,
+		.mandatory   = 1,
+		.connection  = px4_hw_con_onboard,
+	},
+	{
+		.id          = PX4_MFT_ETHERNET,
+		.present     = 1,
+		.mandatory   = 1,
+		.connection  = px4_hw_con_connector,
+	},
+	{
+		.id          = PX4_MFT_T100_ETH,
+		.present     = 1,
+		.mandatory   = 1,
+		.connection  = px4_hw_con_connector,
+	},
+};
+
+// BASE ID 1 vXx base without px4io
+static const px4_hw_mft_item_t base_configuration_1[] = {
+	{
+		.id          = PX4_MFT_PX4IO,
+		.present     = 0,
+		.mandatory   = 0,
+		.connection  = px4_hw_con_unknown,
+	},
+	{
+		.id          = PX4_MFT_USB,
+		.present     = 1,
+		.mandatory   = 1,
+		.connection  = px4_hw_con_onboard,
+	},
+	{
+		.id          = PX4_MFT_CAN2,
+		.present     = 1,
+		.mandatory   = 1,
+		.connection  = px4_hw_con_onboard,
+	},
+	{
+		.id          = PX4_MFT_CAN3,
+		.present     = 0,
+		.mandatory   = 0,
+		.connection  = px4_hw_con_unknown,
+	},
+	{
+		.id          =  PX4_MFT_PM2,
+		.present     = 1,
+		.mandatory   = 1,
+		.connection  = px4_hw_con_onboard,
+	},
+	{
+		.id          = PX4_MFT_ETHERNET,
+		.present     = 1,
+		.mandatory   = 1,
+		.connection  = px4_hw_con_connector,
+	},
+	{
+		.id          = PX4_MFT_T100_ETH,
+		.present     = 1,
+		.mandatory   = 1,
+		.connection  = px4_hw_con_connector,
+	},
+};
+
+// BASE ID 2 Modal AI Alaised to ID 0
+
+// BASE ID 3 NXP T1 PHY
+static const px4_hw_mft_item_t base_configuration_3[] = {
+	{
+		.id          = PX4_MFT_PX4IO,
+		.present     = 0,
+		.mandatory   = 0,
+		.connection  = px4_hw_con_unknown,
+	},
+	{
+		.id          = PX4_MFT_USB,
+		.present     = 1,
+		.mandatory   = 1,
+		.connection  = px4_hw_con_onboard,
+	},
+	{
+		.id          = PX4_MFT_CAN2,
+		.present     = 1,
+		.mandatory   = 1,
+		.connection  = px4_hw_con_onboard,
+	},
+	{
+		.id          = PX4_MFT_CAN3,
+		.present     = 1,
+		.mandatory   = 1,
+		.connection  = px4_hw_con_onboard,
+	},
+	{
+		.id          =  PX4_MFT_PM2,
+		.present     = 1,
+		.mandatory   = 1,
+		.connection  = px4_hw_con_onboard,
+	},
+	{
+		.id          = PX4_MFT_ETHERNET,
+		.present     = 1,
+		.mandatory   = 1,
+		.connection  = px4_hw_con_connector,
+	},
+	{
+		.id          = PX4_MFT_T1_ETH,
+		.present     = 1,
+		.mandatory   = 1,
+		.connection  = px4_hw_con_connector,
+	},
+};
+
+// BASE ID 4 HB CM4 Alaised to ID 0
+
+// BASE ID 5  HB min
+static const px4_hw_mft_item_t base_configuration_5[] = {
+	{
+		.id          = PX4_MFT_PX4IO,
+		.present     = 1,
+		.mandatory   = 1,
+		.connection  = px4_hw_con_onboard,
+	},
+	{
+		.id          = PX4_MFT_USB,
+		.present     = 1,
+		.mandatory   = 1,
+		.connection  = px4_hw_con_onboard,
+	},
+	{
+		.id          = PX4_MFT_CAN2,
+		.present     = 0,
+		.mandatory   = 0,
+		.connection  = px4_hw_con_unknown,
+	},
+	{
+		.id          = PX4_MFT_CAN3,
+		.present     = 0,
+		.mandatory   = 0,
+		.connection  = px4_hw_con_unknown,
+	},
+	{
+		.id          = PX4_MFT_ETHERNET,
+		.present     = 1,
+		.mandatory   = 1,
+		.connection  = px4_hw_con_connector,
+	},
+	{
+		.id          = PX4_MFT_T100_ETH,
+		.present     = 1,
+		.mandatory   = 1,
+		.connection  = px4_hw_con_connector,
+	},
+};
+
+// BASE ID 6  Not allocated
+// BASE ID 7  Read from EEPROM
+// BASE ID 8  Skynode QS with USB - Alaised to ID 0
+
+// BASE ID 9  Auterion Skynode base RC9 & older (no usb
+static const px4_hw_mft_item_t base_configuration_9[] = {
+	{
+		.id          =  PX4_MFT_PX4IO,
+		.present     = 1,
+		.mandatory   = 1,
+		.connection  = px4_hw_con_onboard,
+	},
+	{
+		.id          = PX4_MFT_USB,
+		.present     = 0,
+		.mandatory   = 0,
+		.connection  = px4_hw_con_unknown,
+	},
+	{
+		.id          = PX4_MFT_CAN2,
+		.present     = 1,
+		.mandatory   = 1,
+		.connection  = px4_hw_con_onboard,
+	},
+	{
+		.id          = PX4_MFT_CAN3,
+		.present     = 0,
+		.mandatory   = 0,
+		.connection  = px4_hw_con_unknown,
+	},
+	{
+		.id          =  PX4_MFT_PM2,
+		.present     = 1,
+		.mandatory   = 1,
+		.connection  = px4_hw_con_onboard,
+	},
+	{
+		.id          = PX4_MFT_ETHERNET,
+		.present     = 1,
+		.mandatory   = 1,
+		.connection  = px4_hw_con_connector,
+	},
+	{
+		.id          = PX4_MFT_T100_ETH,
+		.present     = 1,
+		.mandatory   = 1,
+		.connection  = px4_hw_con_onboard,
+	},
+};
+
+// BASE ID 10  Skynode QS no USB Alaised to ID 9
+// BASE ID 16  Auterion Skynode RC10, RC11, RC12, RC13 Alaised to ID 0
+
+// BASE ID 17  Auterion Skynode RC13 with many parts removed
+static const px4_hw_mft_item_t base_configuration_17[] = {
+	{
+		.id          = PX4_MFT_PX4IO,
+		.present     = 0,
+		.mandatory   = 0,
+		.connection  = px4_hw_con_onboard,
+	},
+	{
+		.id          = PX4_MFT_USB,
+		.present     = 1,
+		.mandatory   = 1,
+		.connection  = px4_hw_con_unknown,
+	},
+	{
+		.id          = PX4_MFT_CAN2,
+		.present     = 0,
+		.mandatory   = 0,
+		.connection  = px4_hw_con_onboard,
+	},
+	{
+		.id          = PX4_MFT_CAN3,
+		.present     = 0,
+		.mandatory   = 0,
+		.connection  = px4_hw_con_unknown,
+	},
+	{
+		.id          = PX4_MFT_PM2,
+		.present     = 0,
+		.mandatory   = 0,
+		.connection  = px4_hw_con_onboard,
+	},
+	{
+		.id          = PX4_MFT_ETHERNET,
+		.present     = 1,
+		.mandatory   = 1,
+		.connection  = px4_hw_con_connector,
+	},
+	{
+		.id          = PX4_MFT_T100_ETH,
+		.present     = 1,
+		.mandatory   = 1,
+		.connection  = px4_hw_con_onboard,
+	},
+};
+
+
+static px4_hw_mft_list_entry_t mft_lists[] = {
+//  ver_rev
+	{HW_BASE_ID(0),  base_configuration_0, arraySize(base_configuration_0)},  // std Base with PX4IO
+	{HW_BASE_ID(1),  base_configuration_1, arraySize(base_configuration_1)},  // std Base No PX4IO
+	{HW_BASE_ID(2),  base_configuration_0, arraySize(base_configuration_0)},  // CUAV Base
+	{HW_BASE_ID(3),  base_configuration_3, arraySize(base_configuration_3)},  // NXP T1 PHY
+	{HW_BASE_ID(4),  base_configuration_0, arraySize(base_configuration_0)},  // HB CM4 base
+	{HW_BASE_ID(5),  base_configuration_5, arraySize(base_configuration_5)},  // HB Mini
+	{HW_BASE_ID(8),  base_configuration_0, arraySize(base_configuration_0)},  // Auterion Skynode ver 8 Aliased to 0
+	{HW_BASE_ID(9),  base_configuration_9, arraySize(base_configuration_9)},  // Auterion Skynode ver 9
+	{HW_BASE_ID(10), base_configuration_9, arraySize(base_configuration_9)},  // Auterion Skynode ver 10
+	{HW_BASE_ID(16), base_configuration_0, arraySize(base_configuration_0)},  // Auterion Skynode ver 16
+	{HW_BASE_ID(17), base_configuration_17, arraySize(base_configuration_17)},  // Auterion Skynode ver 17
+};
+
+/************************************************************************************
+ * Name: base_query_manifest
+ *
+ * Description:
+ *   Optional returns manifest item.
+ *
+ * Input Parameters:
+ *   manifest_id - the ID for the manifest item to retrieve
+ *
+ * Returned Value:
+ *   0 - item is not in manifest => assume legacy operations
+ *   pointer to a manifest item
+ *
+ ************************************************************************************/
+
+__EXPORT px4_hw_mft_item board_query_manifest(px4_hw_mft_item_id_t id)
+{
+	static px4_hw_mft_list_entry boards_manifest = px4_hw_mft_list_uninitialized;
+
+	if (boards_manifest == px4_hw_mft_list_uninitialized) {
+		hw_base_id_t hw_base_id = GET_HW_BASE_ID();
+
+		for (unsigned i = 0; i < arraySize(mft_lists); i++) {
+			if (mft_lists[i].hw_base_id == hw_base_id) {
+				boards_manifest = &mft_lists[i];
+				break;
+			}
+		}
+
+		if (boards_manifest == px4_hw_mft_list_uninitialized) {
+			syslog(LOG_ERR, "[boot] Board %04" PRIx16 " is not supported!\n", hw_base_id);
+		}
+	}
+
+	px4_hw_mft_item rv = &device_unsupported;
+
+	if (boards_manifest != px4_hw_mft_list_uninitialized)
+		for (unsigned int ndx = 0; ndx < boards_manifest->entries; ndx++) {
+			if (boards_manifest->mft[ndx].id == id) {
+				rv = &boards_manifest->mft[id];
+				break;
+			}
+		}
+
+	return rv;
+}
+
+__EXPORT int system_query_manifest(const char *sub,  const char *val, void *out)
+{
+	static const char *keys[] = PX4_MFT_MFT_STR_TYPES;
+	static const px4_hw_mft_item_id_t item_ids[] = PX4_MFT_MFT_TYPES;
+	px4_hw_mft_item rv = &device_unsupported;
+	int id = -1;
+	int intval = atoi(val);
+
+	for (unsigned int k = 0; k < arraySize(keys); k++) {
+		if (!strcmp(keys[k], sub)) {
+			id = item_ids[k];
+			break;
+		}
+	}
+
+	if (id != -1) {
+		// In case we have to filter when a FMUM is mounted to a BASE
+		// For now just use the board
+		rv = board_query_manifest(id);
+		return rv->present == intval ? OK : -ENXIO;
+	}
+
+	return -ENOENT;
+}
+#endif

platforms/common/spi.cpp

@@ -44,12 +44,26 @@
 #if BOARD_NUM_SPI_CFG_HW_VERSIONS > 1
 void px4_set_spi_buses_from_hw_version()
 {
-#if defined(BOARD_HAS_SIMPLE_HW_VERSIONING)
-	int hw_version_revision = board_get_hw_version();
-#else
-	int hw_version_revision = HW_VER_REV(board_get_hw_version(), board_get_hw_revision());
-#endif
+#  if defined(BOARD_HAS_HW_SPLIT_VERSIONING)
+	int hw_fmun_id = GET_HW_FMUM_ID();
 
+	for (int i = 0; i < BOARD_NUM_SPI_CFG_HW_VERSIONS; ++i) {
+		if (!px4_spi_buses && px4_spi_buses_all_hw[i].board_hw_fmun_id == 0) {
+			px4_spi_buses = px4_spi_buses_all_hw[i].buses;
+		}
+
+		if (px4_spi_buses_all_hw[i].board_hw_fmun_id == hw_fmun_id) {
+			px4_spi_buses = px4_spi_buses_all_hw[i].buses;
+		}
+	}
+
+#  else
+
+#    if defined(BOARD_HAS_SIMPLE_HW_VERSIONING)
+	int hw_version_revision = board_get_hw_version();
+#    else
+	int hw_version_revision = HW_VER_REV(board_get_hw_version(), board_get_hw_revision());
+#    endif
 
 	for (int i = 0; i < BOARD_NUM_SPI_CFG_HW_VERSIONS; ++i) {
 		if (!px4_spi_buses && px4_spi_buses_all_hw[i].board_hw_version_revision == 0) {
@@ -61,6 +75,8 @@ void px4_set_spi_buses_from_hw_version()
 		}
 	}
 
+#  endif
+
 	if (!px4_spi_buses) { // fallback
 		px4_spi_buses = px4_spi_buses_all_hw[0].buses;
 	}

platforms/nuttx/src/px4/common/include/px4_platform/board_determine_hw_info.h

@@ -36,6 +36,10 @@
 __BEGIN_DECLS
 
 #define HW_INFO_SUFFIX        "%0" STRINGIFY(HW_INFO_VER_DIGITS) "x%0" STRINGIFY(HW_INFO_REV_DIGITS) "x"
+#if defined(BOARD_HAS_HW_SPLIT_VERSIONING)
+#  define HW_INFO_FMUM_SUFFIX   "%0" STRINGIFY(HW_INFO_REV_DIGITS) "x"
+#  define HW_INFO_BASE_SUFFIX   "%0" STRINGIFY(HW_INFO_VER_DIGITS) "x"
+#endif
 /************************************************************************************
   * Name: board_determine_hw_info
  *

platforms/nuttx/src/px4/common/px4_manifest.cpp

@@ -104,6 +104,13 @@ __EXPORT int px4_mft_query(const px4_mft_s *mft, px4_manifest_types_e type,
 					break;
 
 				case MFT:
+					if (mft->mfts[m]->pmft != nullptr) {
+						system_query_func_t query = (system_query_func_t) mft->mfts[m]->pmft;
+						return query(sub, val, nullptr);
+					}
+
+					break;
+
 				default:
 					rv = -ENODATA;
 					break;

platforms/nuttx/src/px4/nxp/imxrt/board_hw_info/board_hw_rev_ver.c

@@ -50,7 +50,7 @@
 #include <lib/crc/crc.h>
 #include <lib/systemlib/px4_macros.h>
 
-#if defined(BOARD_HAS_HW_VERSIONING)
+#if defined(BOARD_HAS_HW_VERSIONING) || defined(BOARD_HAS_HW_SPLIT_VERSIONING)
 
 #  if defined(GPIO_HW_VER_REV_DRIVE)
 #    define GPIO_HW_REV_DRIVE GPIO_HW_VER_REV_DRIVE
@@ -66,6 +66,9 @@
 static int hw_version = 0;
 static int hw_revision = 0;
 static char hw_info[HW_INFO_SIZE] = {0};
+#if defined(BOARD_HAS_HW_SPLIT_VERSIONING)
+static char hw_base_info[HW_INFO_SIZE] = {0};
+#endif
 
 /****************************************************************************
  * Protected Functions
@@ -279,6 +282,27 @@ __EXPORT const char *board_get_hw_type_name()
 	return (const char *) hw_info;
 }
 
+#if defined(BOARD_HAS_HW_SPLIT_VERSIONING)
+/************************************************************************************
+ * Name: board_get_hw_base_type_name
+ *
+ * Description:
+ *   Optional returns a 0 terminated string defining the base type.
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   a 0 terminated string defining the HW type. This my be a 0 length string ""
+ *
+ ************************************************************************************/
+
+__EXPORT const char *board_get_hw_base_type_name()
+{
+	return (const char *) hw_base_info;
+}
+#endif
+
 /************************************************************************************
  * Name: board_get_hw_version
  *
@@ -380,7 +404,12 @@ int board_determine_hw_info()
 	}
 
 	if (rv == OK) {
+#if defined(BOARD_HAS_HW_SPLIT_VERSIONING)
+		snprintf(hw_info, sizeof(hw_info), HW_INFO_INIT_PREFIX HW_INFO_FMUM_SUFFIX, GET_HW_FMUM_ID());
+		snprintf(hw_base_info, sizeof(hw_info), HW_INFO_BASE_SUFFIX, GET_HW_BASE_ID());
+#else
 		snprintf(hw_info, sizeof(hw_info), HW_INFO_INIT_PREFIX HW_INFO_SUFFIX, hw_version, hw_revision);
+#endif
 	}
 
 	return rv;

platforms/nuttx/src/px4/nxp/imxrt/board_reset/CMakeLists.txt

@@ -35,6 +35,8 @@ px4_add_library(arch_board_reset
 	board_reset.cpp
 )
 
+target_link_libraries(arch_board_reset PRIVATE arch_board_romapi)
+
 # up_systemreset
 if (NOT DEFINED CONFIG_BUILD_FLAT)
 	target_link_libraries(arch_board_reset PRIVATE nuttx_karch)

platforms/nuttx/src/px4/nxp/imxrt/board_reset/board_reset.cpp

@@ -44,6 +44,10 @@
 #include <arm_internal.h>
 #include <hardware/rt117x/imxrt117x_snvs.h>
 
+
+#include <px4_arch/imxrt_flexspi_nor_flash.h>
+#include <px4_arch/imxrt_romapi.h>
+
 #define BOOT_RTC_SIGNATURE                0xb007b007
 #define PX4_IMXRT_RTC_REBOOT_REG          3
 #define PX4_IMXRT_RTC_REBOOT_REG_ADDRESS  IMXRT_SNVS_LPGPR3
@@ -64,6 +68,11 @@ int board_reset(int status)
 {
 	if (status == REBOOT_TO_BOOTLOADER) {
 		board_reset_enter_bootloader();
+
+	} else if (status == REBOOT_TO_ISP) {
+		uint32_t arg = 0xeb100000;
+		ROM_API_Init();
+		ROM_RunBootloader(&arg);
 	}
 
 #if defined(BOARD_HAS_ON_RESET)

platforms/nuttx/src/px4/nxp/rt117x/include/px4_arch/spi_hw_description.h

@@ -40,6 +40,57 @@
 
 #include <imxrt_gpio.h>
 
+constexpr bool validateSPIConfig(const px4_spi_bus_t spi_busses_conf[SPI_BUS_MAX_BUS_ITEMS])
+{
+	const bool nuttx_enabled_spi_buses[] = {
+#ifdef CONFIG_IMXRT_LPSPI1
+		true,
+#else
+		false,
+#endif
+#ifdef CONFIG_IMXRT_LPSPI2
+		true,
+#else
+		false,
+#endif
+#ifdef CONFIG_IMXRT_LPSPI3
+		true,
+#else
+		false,
+#endif
+#ifdef CONFIG_IMXRT_LPSPI4
+		true,
+#else
+		false,
+#endif
+#ifdef CONFIG_IMXRT_LPSPI5
+		true,
+#else
+		false,
+#endif
+#ifdef CONFIG_IMXRT_LPSPI6
+		true,
+#else
+		false,
+#endif
+	};
+
+	for (unsigned i = 0; i < sizeof(nuttx_enabled_spi_buses) / sizeof(nuttx_enabled_spi_buses[0]); ++i) {
+		bool found_bus = false;
+
+		for (int j = 0; j < SPI_BUS_MAX_BUS_ITEMS; ++j) {
+			if (spi_busses_conf[j].bus == (int)i + 1) {
+				found_bus = true;
+			}
+		}
+
+		// Either the bus is enabled in NuttX and configured in spi_busses_conf, or disabled and not configured
+		constexpr_assert(found_bus == nuttx_enabled_spi_buses[i], "SPI bus config mismatch (CONFIG_STM32H7_SPIx)");
+	}
+
+	return false;
+}
+
 static inline constexpr px4_spi_bus_device_t initSPIDevice(uint32_t devid, SPI::CS cs_gpio, SPI::DRDY drdy_gpio = {})
 {
 	px4_spi_bus_device_t ret{};
@@ -132,8 +183,56 @@ static inline constexpr SPI::bus_device_external_cfg_t initSPIConfigExternal(SPI
 	return ret;
 }
 
-constexpr bool validateSPIConfig(const px4_spi_bus_t spi_busses_conf[SPI_BUS_MAX_BUS_ITEMS])
+struct px4_spi_bus_array_t {
+	px4_spi_bus_t item[SPI_BUS_MAX_BUS_ITEMS];
+};
+#if defined(BOARD_HAS_HW_SPLIT_VERSIONING)
+static inline constexpr px4_spi_bus_all_hw_t initSPIFmumID(hw_fmun_id_t hw_fmun_id,
+		const px4_spi_bus_array_t &bus_items)
 {
-	return true;
+	px4_spi_bus_all_hw_t ret{};
+
+	for (int i = 0; i < SPI_BUS_MAX_BUS_ITEMS; ++i) {
+		ret.buses[i] = bus_items.item[i];
+	}
+
+	ret.board_hw_fmun_id = hw_fmun_id;
+	return ret;
 }
+#else
+static inline constexpr px4_spi_bus_all_hw_t initSPIHWVersion(int hw_version_revision,
+		const px4_spi_bus_array_t &bus_items)
+{
+	px4_spi_bus_all_hw_t ret{};
+
+	for (int i = 0; i < SPI_BUS_MAX_BUS_ITEMS; ++i) {
+		ret.buses[i] = bus_items.item[i];
+	}
+
+	ret.board_hw_version_revision = hw_version_revision;
+	return ret;
+}
+#endif
+constexpr bool validateSPIConfig(const px4_spi_bus_t spi_buses_conf[SPI_BUS_MAX_BUS_ITEMS]);
+
+constexpr bool validateSPIConfig(const px4_spi_bus_all_hw_t spi_buses_conf[BOARD_NUM_SPI_CFG_HW_VERSIONS])
+{
+	for (int ver = 0; ver < BOARD_NUM_SPI_CFG_HW_VERSIONS; ++ver) {
+		validateSPIConfig(spi_buses_conf[ver].buses);
+	}
+
+	for (int ver = 1; ver < BOARD_NUM_SPI_CFG_HW_VERSIONS; ++ver) {
+		for (int i = 0; i < SPI_BUS_MAX_BUS_ITEMS; ++i) {
+			const bool equal_power_enable_gpio = spi_buses_conf[ver].buses[i].power_enable_gpio == spi_buses_conf[ver -
+							     1].buses[i].power_enable_gpio;
+			// currently board_control_spi_sensors_power_configgpio() depends on that - this restriction can be removed
+			// by ensuring board_control_spi_sensors_power_configgpio() is called after the hw version is determined
+			// and SPI config is initialized.
+			constexpr_assert(equal_power_enable_gpio, "All HW versions must define the same power enable GPIO");
+		}
+	}
+
+	return false;
+}
+
 #endif // CONFIG_SPI

platforms/nuttx/src/px4/stm/stm32_common/board_hw_info/board_hw_rev_ver.c

@@ -51,7 +51,7 @@
 #include <lib/crc/crc.h>
 #include <lib/systemlib/px4_macros.h>
 
-#if defined(BOARD_HAS_HW_VERSIONING)
+#if defined(BOARD_HAS_HW_VERSIONING) || defined(BOARD_HAS_HW_SPLIT_VERSIONING)
 
 #  if defined(GPIO_HW_VER_REV_DRIVE)
 #    define GPIO_HW_REV_DRIVE GPIO_HW_VER_REV_DRIVE
@@ -67,7 +67,9 @@
 static int hw_version = 0;
 static int hw_revision = 0;
 static char hw_info[HW_INFO_SIZE] = {0};
-
+#if defined(BOARD_HAS_HW_SPLIT_VERSIONING)
+static char hw_base_info[HW_INFO_SIZE] = {0};
+#endif
 /****************************************************************************
  * Protected Functions
  ****************************************************************************/
@@ -366,6 +368,27 @@ __EXPORT const char *board_get_hw_type_name()
 	return (const char *) hw_info;
 }
 
+#if defined(BOARD_HAS_HW_SPLIT_VERSIONING)
+/************************************************************************************
+ * Name: board_get_hw_base_type_name
+ *
+ * Description:
+ *   Optional returns a 0 terminated string defining the base type.
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   a 0 terminated string defining the HW type. This my be a 0 length string ""
+ *
+ ************************************************************************************/
+
+__EXPORT const char *board_get_hw_base_type_name()
+{
+	return (const char *) hw_base_info;
+}
+#endif
+
 /************************************************************************************
  * Name: board_get_hw_version
  *
@@ -467,7 +490,12 @@ int board_determine_hw_info()
 	}
 
 	if (rv == OK) {
+#if defined(BOARD_HAS_HW_SPLIT_VERSIONING)
+		snprintf(hw_info, sizeof(hw_info), HW_INFO_INIT_PREFIX HW_INFO_FMUM_SUFFIX, GET_HW_FMUM_ID());
+		snprintf(hw_base_info, sizeof(hw_info), HW_INFO_BASE_SUFFIX, GET_HW_BASE_ID());
+#else
 		snprintf(hw_info, sizeof(hw_info), HW_INFO_INIT_PREFIX HW_INFO_SUFFIX, hw_version, hw_revision);
+#endif
 	}
 
 	return rv;

platforms/nuttx/src/px4/stm/stm32_common/include/px4_arch/spi_hw_description.h

@@ -136,6 +136,21 @@ static inline constexpr SPI::bus_device_external_cfg_t initSPIConfigExternal(SPI
 struct px4_spi_bus_array_t {
 	px4_spi_bus_t item[SPI_BUS_MAX_BUS_ITEMS];
 };
+
+#if defined(BOARD_HAS_HW_SPLIT_VERSIONING)
+static inline constexpr px4_spi_bus_all_hw_t initSPIFmumID(hw_fmun_id_t hw_fmun_id,
+		const px4_spi_bus_array_t &bus_items)
+{
+	px4_spi_bus_all_hw_t ret{};
+
+	for (int i = 0; i < SPI_BUS_MAX_BUS_ITEMS; ++i) {
+		ret.buses[i] = bus_items.item[i];
+	}
+
+	ret.board_hw_fmun_id = hw_fmun_id;
+	return ret;
+}
+#else
 static inline constexpr px4_spi_bus_all_hw_t initSPIHWVersion(int hw_version_revision,
 		const px4_spi_bus_array_t &bus_items)
 {
@@ -148,6 +163,7 @@ static inline constexpr px4_spi_bus_all_hw_t initSPIHWVersion(int hw_version_rev
 	ret.board_hw_version_revision = hw_version_revision;
 	return ret;
 }
+#endif
 constexpr bool validateSPIConfig(const px4_spi_bus_t spi_buses_conf[SPI_BUS_MAX_BUS_ITEMS]);
 
 constexpr bool validateSPIConfig(const px4_spi_bus_all_hw_t spi_buses_conf[BOARD_NUM_SPI_CFG_HW_VERSIONS])

platforms/nuttx/src/px4/stm/stm32h7/adc/adc.cpp

@@ -37,6 +37,7 @@
 #include <drivers/drv_hrt.h>
 #include <px4_arch/adc.h>
 
+#include "stm32_dbgmcu.h"
 #include <stm32_adc.h>
 #include <stm32_gpio.h>
 
@@ -96,35 +97,123 @@
 
 #define ADC_MAX_FADC 36000000
 
-#if STM32_PLL2P_FREQUENCY     <= ADC_MAX_FADC
-#  define ADC_CCR_PRESC_DIV     ADC_CCR_PRESC_NOT_DIV
-#elif STM32_PLL2P_FREQUENCY/2 <= ADC_MAX_FADC
-#  define ADC_CCR_PRESC_DIV     ADC_CCR_PRESC_DIV2
-#elif STM32_PLL2P_FREQUENCY/4 <= ADC_MAX_FADC
-#  define ADC_CCR_PRESC_DIV     ADC_CCR_PRESC_DIV4
-#elif STM32_PLL2P_FREQUENCY/6 <= ADC_MAX_FADC
-# define ADC_CCR_PRESC_DIV     ADC_CCR_PRESC_DIV6
-#elif STM32_PLL2P_FREQUENCY/8 <= ADC_MAX_FADC
-# define ADC_CCR_PRESC_DIV     ADC_CCR_PRESC_DIV8
-#elif STM32_PLL2P_FREQUENCY/10 <= ADC_MAX_FADC
-# define ADC_CCR_PRESC_DIV     ADC_CCR_PRESC_DIV10
-#elif STM32_PLL2P_FREQUENCY/12 <= ADC_MAX_FADC
-# define ADC_CCR_PRESC_DIV     ADC_CCR_PRESC_DIV12
-#elif STM32_PLL2P_FREQUENCY/16 <= ADC_MAX_FADC
-# define ADC_CCR_PRESC_DIV     ADC_CCR_PRESC_DIV16
-#elif STM32_PLL2P_FREQUENCY/32 <= ADC_MAX_FADC
-# define ADC_CCR_PRESC_DIV     ADC_CCR_PRESC_DIV32
-#elif STM32_PLL2P_FREQUENCY/64 <= ADC_MAX_FADC
-# define ADC_CCR_PRESC_DIV     ADC_CCR_PRESC_DIV64
-#elif STM32_PLL2P_FREQUENCY/128 <= ADC_MAX_FADC
-# define ADC_CCR_PRESC_DIV     ADC_CCR_PRESC_DIV128
-#elif STM32_PLL2P_FREQUENCY/256 <= ADC_MAX_FADC
-# define ADC_CCR_PRESC_DIV     ADC_CCR_PRESC_DIV256
-#else
-#  error "ADC STM32_PLL2P_FREQUENCY too high - no divisor found "
+#define ADC3_INTERNAL_TEMP_SENSOR_CHANNEL 18 //define to map the internal temperature channel.
+
+
+/****************************************************************************
+ * Name: adc_getclocks
+ ****************************************************************************/
+
+static int adc_getclocks(uint32_t *prescaler, uint32_t *boost)
+{
+	uint32_t max_clock = ADC_MAX_FADC;
+	uint32_t src_clock = STM32_PLL2P_FREQUENCY;
+	uint32_t adc_clock;
+	int rv = OK;
+
+#if STM32_RCC_D3CCIPR_ADCSRC == RCC_D3CCIPR_ADCSEL_PLL3
+	src_clock = STM32_PLL3R_FREQUENCY;
+#elif STM32_RCC_D3CCIPR_ADCSRC == RCC_D3CCIPR_ADCSEL_PER
+#  error ADCSEL_PER not supported
 #endif
 
-#define ADC3_INTERNAL_TEMP_SENSOR_CHANNEL 18 //define to map the internal temperature channel.
+	/* The maximum clock is different for rev Y devices and rev V devices.
+	 * rev V can support an ADC clock of up to 50MHz. rev Y only supports
+	 * up to 36MHz.
+	 */
+
+	if ((getreg32(STM32_DEBUGMCU_BASE) & DBGMCU_IDCODE_REVID_MASK) ==
+	    STM32_IDCODE_REVID_V) {
+		/* The max fadc is 50MHz, but there is an always-present /2 divider
+		 * after the configurable prescaler.  Therefore, the max clock out of
+		 * the prescaler block is 2*50=100MHz
+		 */
+
+		max_clock = 100000000;
+	}
+
+	if (src_clock <= max_clock) {
+		*prescaler = ADC_CCR_PRESC_NOT_DIV;
+		adc_clock = src_clock;
+
+	} else if (src_clock / 2 <= max_clock) {
+		*prescaler = ADC_CCR_PRESC_DIV2;
+		adc_clock = src_clock / 2;
+
+	} else if (src_clock / 4 <= max_clock) {
+		*prescaler = ADC_CCR_PRESC_DIV4;
+		adc_clock = src_clock / 4;
+
+	} else if (src_clock / 6 <= max_clock) {
+		*prescaler = ADC_CCR_PRESC_DIV6;
+		adc_clock = src_clock / 6;
+
+	} else if (src_clock / 8 <= max_clock) {
+		*prescaler = ADC_CCR_PRESC_DIV8;
+		adc_clock = src_clock / 8;
+
+	} else if (src_clock / 10 <= max_clock) {
+		*prescaler = ADC_CCR_PRESC_DIV10;
+		adc_clock = src_clock / 10;
+
+	} else if (src_clock / 12 <= max_clock) {
+		*prescaler = ADC_CCR_PRESC_DIV12;
+		adc_clock = src_clock / 12;
+
+	} else if (src_clock / 16 <= max_clock) {
+		*prescaler = ADC_CCR_PRESC_DIV16;
+		adc_clock = src_clock / 16;
+
+	} else if (src_clock / 32 <= max_clock) {
+		*prescaler = ADC_CCR_PRESC_DIV32;
+		adc_clock = src_clock / 32;
+
+	} else if (src_clock / 64 <= max_clock) {
+		*prescaler = ADC_CCR_PRESC_DIV64;
+		adc_clock = src_clock / 64;
+
+	} else if (src_clock / 128 <= max_clock) {
+		*prescaler = ADC_CCR_PRESC_DIV128;
+		adc_clock = src_clock / 128;
+
+	} else if (src_clock / 256 <= max_clock) {
+		*prescaler = ADC_CCR_PRESC_DIV256;
+		adc_clock = src_clock / 256;
+
+	} else {
+		rv = -1;
+	}
+
+	if ((getreg32(STM32_DEBUGMCU_BASE) & DBGMCU_IDCODE_REVID_MASK) ==
+	    STM32_IDCODE_REVID_V) {
+		if (adc_clock >= 25000000) {
+			*boost = ADC_CR_BOOST_50_MHZ;
+
+		} else if (adc_clock >= 12500000) {
+			*boost = ADC_CR_BOOST_25_MHZ;
+
+		} else if (adc_clock >=  6250000) {
+			*boost = ADC_CR_BOOST_12p5_MHZ;
+
+		} else {
+			*boost = ADC_CR_BOOST_6p25_MHZ;
+		}
+
+	} else {
+		if (adc_clock >= 20000000) {
+			*boost = ADC_CR_BOOST;
+
+		} else {
+			*boost = 0;
+		}
+	}
+
+	return rv;
+}
+
+/****************************************************************************
+ * Name: px4_arch_adc_init
+ ****************************************************************************/
 
 int px4_arch_adc_init(uint32_t base_address)
 {
@@ -158,9 +247,21 @@ int px4_arch_adc_init(uint32_t base_address)
 
 	*free = base_address;
 
+	/* Get cloking for this version of Siicon */
+
+	uint32_t boost     = ADC_CR_BOOST;
+	uint32_t prescaler = ADC_CCR_PRESC_DIV256;
+
+	if (adc_getclocks(&prescaler, &boost) != OK) {
+
+		/* ERROR: source clock too high */
+
+		PANIC();
+	}
+
 	/* do calibration if supported */
 
-	rCR(base_address)  = ADC_CR_ADVREGEN | ADC_CR_BOOST;
+	rCR(base_address)  = ADC_CR_ADVREGEN | boost;
 
 	/* Wait for voltage regulator to power up */
 
@@ -169,7 +270,7 @@ int px4_arch_adc_init(uint32_t base_address)
 	/* enable the temperature sensor, VREFINT channel and VBAT */
 
 	rCCR(base_address) = (ADC_CCR_VREFEN | ADC_CCR_VSENSEEN | ADC_CCR_VBATEN |
-			      ADC_CCR_CKMODE_ASYCH | ADC_CCR_PRESC_DIV);
+			      ADC_CCR_CKMODE_ASYCH | prescaler);
 
 	/* Enable ADC calibration. ADCALDIF == 0 so this is only for
 	 * single-ended conversions, not for differential ones.

platforms/posix/cmake/Toolchain-aarch64-linux-gnu.cmake

@@ -2,16 +2,8 @@
 
 set(triple aarch64-linux-gnu)
 
-if("${PX4_BOARD}" MATCHES "modalai_voxl2")
-	set(CMAKE_LIBRARY_ARCHITECTURE ${ARM_CROSS_GCC_ROOT}/bin/${triple})
-	set(TOOLCHAIN_PREFIX ${ARM_CROSS_GCC_ROOT}/bin/${triple})
-	set(ARM_CROSS_GCC_ROOT $ENV{ARM_CROSS_GCC_ROOT})
-	set(HEXAGON_ARM_SYSROOT $ENV{HEXAGON_ARM_SYSROOT})
-	set(CMAKE_EXE_LINKER_FLAGS "-Wl,-gc-sections -Wl,-rpath-link,${HEXAGON_ARM_SYSROOT}/usr/lib/aarch64-linux-gnu -Wl,-rpath-link,${HEXAGON_ARM_SYSROOT}/lib/aarch64-linux-gnu")
-else()
-	set(CMAKE_LIBRARY_ARCHITECTURE ${triple})
-	set(TOOLCHAIN_PREFIX ${triple})
-endif()
+set(CMAKE_LIBRARY_ARCHITECTURE ${triple})
+set(TOOLCHAIN_PREFIX ${triple})
 
 set(CMAKE_SYSTEM_NAME Linux)
 set(CMAKE_SYSTEM_PROCESSOR arm)

platforms/posix/src/px4/common/px4_init.cpp

@@ -40,15 +40,34 @@
 #include <px4_platform_common/px4_work_queue/WorkQueueManager.hpp>
 #include <uORB/uORB.h>
 
+#if defined(CONFIG_MODULES_MUORB_APPS)
+extern "C" { int muorb_init(); }
+#endif
+
 int px4_platform_init(void)
 {
 	hrt_init();
 
 	px4::WorkQueueManagerStart();
 
+// MUORB has slightly different startup requirements
+#if defined(CONFIG_MODULES_MUORB_APPS)
+	//Put sleeper in here to allow wq to finish initializing before param_init is called
+	usleep(10000);
+
+	uorb_start();
+
+	muorb_init();
+
+	// Give muorb some time to setup the DSP
+	usleep(100000);
+
+	param_init();
+#else
 	param_init();
 
 	uorb_start();
+#endif
 
 	px4_log_initialize();
 

platforms/qurt/cmake/qurt_reqs.cmake

@@ -121,7 +121,8 @@ exec_program(${CMAKE_CXX_COMPILER} ${CMAKE_CURRENT_SOURCE_DIR} ARGS -print-file-
 set(EXTRA_LIBS ${EXTRA_LIBS} ${LIBM})
 
 # Full optimization and Link Time Optimization (LTO)
-set(QURT_OPTIMIZATION_FLAGS -O3 -flto)
+# set(QURT_OPTIMIZATION_FLAGS -O3 -flto)
+set(QURT_OPTIMIZATION_FLAGS -O3) # LTO takes a lot of extra time and doesn't really help much...
 
 # Flags we pass to the C compiler
 list2string(CFLAGS

platforms/qurt/src/px4/common/include/px4_platform/cpuload.h

@@ -0,0 +1,37 @@
+/****************************************************************************
+ *
+ *   Copyright (c) 2023 ModalAI, Inc. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name PX4 nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#pragma once
+
+extern "C" float px4muorb_get_cpu_load(void);
+

platforms/qurt/src/px4/drv_hrt.cpp

@@ -116,16 +116,10 @@ hrt_abstime hrt_absolute_time()
 
 int hrt_set_absolute_time_offset(int32_t time_diff_us)
 {
-	dsp_offset = time_diff_us;
+	// dsp_offset = time_diff_us;
 	return 0;
 }
 
-hrt_abstime hrt_elapsed_time_atomic(const volatile hrt_abstime *then)
-{
-	hrt_abstime delta = hrt_absolute_time() - *then;
-	return delta;
-}
-
 void hrt_store_absolute_time(volatile hrt_abstime *t)
 {
 	*t = hrt_absolute_time();

platforms/qurt/src/px4/tasks.cpp

@@ -161,6 +161,9 @@ static px4_task_t px4_task_spawn_internal(const char *name, int priority, px4_ma
 		return -1;
 	}
 
+	char *charPointer = const_cast<char *>(name);
+	taskmap[task_index].argv[0] = charPointer;
+
 	for (i = 0; i < PX4_TASK_MAX_ARGC; i++) {
 		if (i < taskmap[task_index].argc) {
 			int argument_length = strlen(argv[i]);
@@ -172,12 +175,13 @@ static px4_task_t px4_task_spawn_internal(const char *name, int priority, px4_ma
 
 			} else {
 				strcpy(taskmap[task_index].argv_storage[i], argv[i]);
-				taskmap[task_index].argv[i] = taskmap[task_index].argv_storage[i];
+				taskmap[task_index].argv[i + 1] = taskmap[task_index].argv_storage[i];
 			}
 
 		} else {
 			// Must add NULL at end of argv
-			taskmap[task_index].argv[i] = nullptr;
+			taskmap[task_index].argv[i + 1] = nullptr;
+			taskmap[task_index].argc = i + 1;
 			break;
 		}
 	}