[MR-CANHUBK3] Fix pin definitions and init sequence

This commit is contained in:
Peter van der Perk
2022-07-29 10:58:40 +02:00
parent d989da6c20
commit 5b7cee5aea
7 changed files with 61 additions and 48 deletions
+5
View File
@@ -31,6 +31,11 @@ then
set PARAM_FILE /dev/eeeprom0
fi
if mft query -q -k MTD -s MTD_PARAMETERS -v /mnt/qspi/params
then
set PARAM_FILE /mnt/qspi/params
fi
#
# Load parameters.
#
-2
View File
@@ -40,12 +40,10 @@ CONFIG_MODULES_RC_UPDATE=y
CONFIG_MODULES_ROVER_POS_CONTROL=y
CONFIG_MODULES_SIH=y
CONFIG_MODULES_TEMPERATURE_COMPENSATION=y
CONFIG_MODULES_VMOUNT=y
CONFIG_MODULES_VTOL_ATT_CONTROL=y
CONFIG_SYSTEMCMDS_ACTUATOR_TEST=y
CONFIG_SYSTEMCMDS_DMESG=y
CONFIG_SYSTEMCMDS_DUMPFILE=y
CONFIG_SYSTEMCMDS_ESC_CALIB=y
CONFIG_SYSTEMCMDS_NETMAN=y
CONFIG_SYSTEMCMDS_NSHTERM=y
CONFIG_SYSTEMCMDS_PERF=y
@@ -18,6 +18,8 @@
*
****************************************************************************/
/* Copyright 2022 NXP */
#ifndef __BOARDS_ARM_S32K3XX_MR_CANHUBK3_INCLUDE_BOARD_H
#define __BOARDS_ARM_S32K3XX_MR_CANHUBK3_INCLUDE_BOARD_H
@@ -39,8 +41,9 @@
/* The S32K344 will run at 160 MHz */
#define MR_CANHUBK3_SYSCLK_FREQUENCY 160000000
/* MX25L QuadSPI FLASH */
/* MX25L QuadSPI Flash ******************************************************/
#ifdef CONFIG_S32K3XX_QSPI
# ifdef CONFIG_MTD_MX25RXX
@@ -57,8 +60,8 @@
# endif
#endif
#define MX25L_MTD_MINOR 0
#define MX25L_SMART_MINOR 0
#define MX25L_MTD_MINOR 0
#define MX25L_SMART_MINOR 0
/* LED definitions **********************************************************/
@@ -132,41 +135,41 @@
* DCD-LZ UART TX PTA9 (LPUART2_TX)
*/
#define PIN_LPUART2_RX PIN_LPUART2_RX_1 | PIN_INPUT_PULLUP /* PTA8 */
#define PIN_LPUART2_RX (PIN_LPUART2_RX_1 | PIN_INPUT_PULLUP) /* PTA8 */
#define PIN_LPUART2_TX PIN_LPUART2_TX_1 /* PTA9 */
/* LPUART0 P2 UART (with flow control) connector */
#define PIN_LPUART0_CTS PIN_LPUART0_CTS_1 /* PTA0 */
#define PIN_LPUART0_RTS PIN_LPUART0_RTS_1 /* PTA1 */
#define PIN_LPUART0_RX PIN_LPUART0_RX_1 | PIN_INPUT_PULLUP /* PTA2 */
#define PIN_LPUART0_RX (PIN_LPUART0_RX_1 | PIN_INPUT_PULLUP) /* PTA2 */
#define PIN_LPUART0_TX PIN_LPUART0_TX_1 /* PTA3 */
/* LPUART1 P5 UART (with flow control) connector */
#define PIN_LPUART1_CTS PIN_LPUART1_CTS_2 /* PTE2 */
#define PIN_LPUART1_RTS PIN_LPUART1_RTS_2 /* PTE6 */
#define PIN_LPUART1_RX PIN_LPUART1_RX_3 | PIN_INPUT_PULLUP /* PTC6 */
#define PIN_LPUART1_RX (PIN_LPUART1_RX_3 | PIN_INPUT_PULLUP) /* PTC6 */
#define PIN_LPUART1_TX PIN_LPUART1_TX_3 /* PTC7 */
/* LPUART9 P24 UART connector */
#define PIN_LPUART9_RX PIN_LPUART9_RX_1 | PIN_INPUT_PULLUP /* PTB2 */
#define PIN_LPUART9_RX (PIN_LPUART9_RX_1 | PIN_INPUT_PULLUP) /* PTB2 */
#define PIN_LPUART9_TX PIN_LPUART9_TX_1 /* PTB3 */
/* LPUART10 P24 UART connector */
#define PIN_LPUART10_RX PIN_LPUART10_RX_1 | PIN_INPUT_PULLUP /* PTC12 */
#define PIN_LPUART10_RX (PIN_LPUART10_RX_1 | PIN_INPUT_PULLUP) /* PTC12 */
#define PIN_LPUART10_TX PIN_LPUART10_TX_1 /* PTC13 */
/* LPUART13 P25 UART connector */
#define PIN_LPUART13_RX PIN_LPUART13_RX_1 | PIN_INPUT_PULLUP /* PTB19 */
#define PIN_LPUART13_RX (PIN_LPUART13_RX_1 | PIN_INPUT_PULLUP) /* PTB19 */
#define PIN_LPUART13_TX PIN_LPUART13_TX_1 /* PTB18 */
/* LPUART14 P25 UART connector */
#define PIN_LPUART14_RX PIN_LPUART14_RX_1 | PIN_INPUT_PULLUP /* PTB21 */
#define PIN_LPUART14_RX (PIN_LPUART14_RX_1 | PIN_INPUT_PULLUP) /* PTB21 */
#define PIN_LPUART14_TX PIN_LPUART14_TX_1 /* PTB20 */
/* SPI selections ***********************************************************/
@@ -179,8 +182,7 @@
#define PIN_LPSPI1_PCS0 PIN_LPSPI1_PCS0_2 /* PTA21 */
#define PIN_LPSPI1_PCS1 PIN_LPSPI1_PCS1_6 /* PTE4 */
#define PIN_LPSPI1_PCS PIN_PTA21 | GPIO_LOWDRIVE | GPIO_OUTPUT_ONE /* PTA21 */
#define PIN_LPSPI1_PCS (PIN_PTA21 | GPIO_LOWDRIVE | GPIO_OUTPUT_ONE) /* PTA21 */
/* LPSPI2 P1B external SPI connector */
@@ -190,14 +192,14 @@
#define PIN_LPSPI2_PCS0 PIN_LPSPI2_PCS0_2 /* PTB25 */
#define PIN_LPSPI2_PCS1 PIN_LPSPI2_PCS1_3 /* PTC19 */
#define PIN_LPSPI2_PCS PIN_PTB25 | GPIO_LOWDRIVE | GPIO_OUTPUT_ONE /* PTB25 */
#define PIN_LPSPI2_PCS (PIN_PTB25 | GPIO_LOWDRIVE | GPIO_OUTPUT_ONE) /* PTB25 */
/* LPSPI3 FS26 Safety SBC */
#define PIN_LPSPI3_SCK PIN_LPSPI3_SCK_2 /* PTD1 */
#define PIN_LPSPI3_MISO PIN_LPSPI3_SOUT_2 /* PTD0 */
#define PIN_LPSPI3_MOSI PIN_LPSPI3_SIN_3 /* PTE10 */
#define PIN_LPSPI3_PCS PIN_PTD17 | GPIO_LOWDRIVE | GPIO_OUTPUT_ONE /* PTD17 */
#define PIN_LPSPI3_PCS (PIN_PTD17 | GPIO_LOWDRIVE | GPIO_OUTPUT_ONE) /* PTD17 */
/* LPSPI4 P8B I/O connector / P26 external IMU connector */
@@ -207,7 +209,7 @@
#define PIN_LPSPI4_PCS0 PIN_LPSPI4_PCS0_1 /* PTB8 */
#define PIN_LPSPI4_PCS3 PIN_LPSPI4_PCS3_1 /* PTA16 */
#define PIN_LPSPI4_PCS PIN_PTA16 | GPIO_LOWDRIVE | GPIO_OUTPUT_ONE /* PTA16 */
#define PIN_LPSPI4_PCS (PIN_PTA16 | GPIO_LOWDRIVE | GPIO_OUTPUT_ONE) /* PTA16 */
/* LPSPI5 P26 external IMU connector */
@@ -216,7 +218,7 @@
#define PIN_LPSPI5_MOSI PIN_LPSPI5_SIN_3 /* PTD28 */
#define PIN_LPSPI5_PCS1 PIN_LPSPI5_PCS1_1 /* PTA14 */
#define PIN_LPSPI5_PCS PIN_PTA14 | GPIO_LOWDRIVE | GPIO_OUTPUT_ONE /* PTA14 */
#define PIN_LPSPI5_PCS (PIN_PTA14 | GPIO_LOWDRIVE | GPIO_OUTPUT_ONE) /* PTA14 */
/* PIN_LPSPI5_PCS2 PTD29 */
@@ -244,6 +246,7 @@
#define CAN0_ENABLE_OUT 1
#define PIN_CAN0_LED (PIN_PTC18 | GPIO_OUTPUT)
#define CAN0_LED_OUT 0
#define PIN_CAN0_ERRN (PIN_PTC20 | GPIO_INPUT)
/* CAN1 TJA1443 CAN transceiver */
@@ -255,33 +258,57 @@
#define CAN1_ENABLE_OUT 1
#define PIN_CAN1_LED (PIN_PTE5 | GPIO_OUTPUT)
#define CAN1_LED_OUT 0
#define PIN_CAN1_ERRN (PIN_PTD3 | GPIO_INPUT)
/* CAN2 TJA1463 CAN transceiver */
#define PIN_CAN2_RX PIN_CAN2_RX_5 /* PTE25 */
#define PIN_CAN2_TX PIN_CAN2_TX_5 /* PTE24 */
#define PIN_CAN2_STB (PIN_PTD22 | GPIO_OUTPUT)
#define CAN2_STB_OUT 1
#define PIN_CAN2_ENABLE (PIN_PTD4 | GPIO_OUTPUT)
#define CAN2_ENABLE_OUT 1
#define PIN_CAN2_LED (PIN_PTD20 | GPIO_OUTPUT)
#define CAN2_LED_OUT 0
#define PIN_CAN2_ERRN (PIN_PTD21 | GPIO_INPUT)
/* CAN3 TJA1463 CAN transceiver */
#define PIN_CAN3_RX PIN_CAN3_RX_2 /* PTC29 */
#define PIN_CAN3_TX PIN_CAN3_TX_2 /* PTC28 */
#define PIN_CAN3_STB (PIN_PTB1 | GPIO_OUTPUT)
#define PIN_CAN3_STB (PIN_PTB1 | GPIO_OUTPUT)
#define CAN3_STB_OUT 1
#define PIN_CAN3_ENABLE (PIN_PTB0 | GPIO_OUTPUT)
#define CAN3_ENABLE_OUT 1
#define PIN_CAN3_LED (PIN_PTB24 | GPIO_OUTPUT)
#define CAN3_LED_OUT 0
#define PIN_CAN3_ERRN (PIN_PTC27 | GPIO_INPUT)
/* CAN4 TJA1153 CAN transceiver */
#define PIN_CAN4_RX PIN_CAN4_RX_2 /* PTC31 */
#define PIN_CAN4_TX PIN_CAN4_TX_2 /* PTC30 */
#define PIN_CAN4_STB (PIN_PTC25 | GPIO_OUTPUT)
#define CAN4_STB_OUT 0
#define PIN_CAN4_ENABLE (PIN_PTC26 | GPIO_OUTPUT)
#define CAN4_ENABLE_OUT 1
#define PIN_CAN4_LED (PIN_PTB26 | GPIO_OUTPUT)
#define CAN4_LED_OUT 0
#define PIN_CAN4_ERRN (PIN_PTC23 | GPIO_INPUT)
/* CAN5 TJA1153 CAN transceiver */
#define PIN_CAN5_RX PIN_CAN5_RX_1 /* PTC11 */
#define PIN_CAN5_TX PIN_CAN5_TX_1 /* PTC10 */
#define PIN_CAN5_STB (PIN_PTE17 | GPIO_OUTPUT)
#define CAN5_STB_OUT 0
#define PIN_CAN5_ENABLE (PIN_PTD30 | GPIO_OUTPUT)
#define CAN5_ENABLE_OUT 1
#define PIN_CAN5_LED (PIN_PTD31 | GPIO_OUTPUT)
#define CAN5_LED_OUT 0
#define PIN_CAN5_ERRN (PIN_PTD24 | GPIO_INPUT)
/* ENET selections ***********************************************************/
/* ENET selections **********************************************************/
#define PIN_EMAC_MII_RMII_TXD0 PIN_EMAC_MII_RMII_TXD0_1 /* PTB5 */
#define PIN_EMAC_MII_RMII_TXD1 PIN_EMAC_MII_RMII_TXD1_1 /* PTB4 */
@@ -294,5 +321,4 @@
#define PIN_EMAC_MII_RMII_MDIO PIN_EMAC_MII_RMII_MDIO_2 /* PTD16 */
#define PIN_EMAC_MII_RMII_TX_CLK PIN_EMAC_MII_RMII_TX_CLK_2 /* PTD6 */
#endif /* __BOARDS_ARM_S32K3XX_MR_CANHUBK3_INCLUDE_BOARD_H */
@@ -5,7 +5,6 @@
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_DEBUG_OPT_UNUSED_SECTIONS is not set
# CONFIG_FS_PROCFS_EXCLUDE_ENVIRON is not set
# CONFIG_MMCSD_HAVE_CARDDETECT is not set
# CONFIG_MMCSD_HAVE_WRITEPROTECT is not set
@@ -22,22 +21,20 @@ CONFIG_ARCH_CHIP="s32k3xx"
CONFIG_ARCH_CHIP_S32K344=y
CONFIG_ARCH_CHIP_S32K3XX=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_ARMV7M_DCACHE=y
CONFIG_ARMV7M_DCACHE_WRITETHROUGH=y
CONFIG_ARMV7M_DTCM=y
CONFIG_ARMV7M_ICACHE=y
CONFIG_ARMV7M_MEMCPY=y
CONFIG_ARMV7M_USEBASEPRI=y
CONFIG_BOARDCTL_RESET=y
CONFIG_BOARD_LOOPSPERMSEC=14539
CONFIG_BUILTIN=y
CONFIG_DEBUG_ASSERTIONS=y
CONFIG_DEBUG_BUSFAULT=y
CONFIG_DEBUG_ERROR=y
CONFIG_DEBUG_FEATURES=y
CONFIG_DEBUG_FULLOPT=y
CONFIG_DEBUG_HARDFAULT_ALERT=y
CONFIG_DEBUG_INFO=y
CONFIG_DEBUG_SYMBOLS=y
CONFIG_DEBUG_TCBINFO=y
CONFIG_DEBUG_USAGEFAULT=y
CONFIG_DEBUG_WARN=y
CONFIG_DISABLE_MQUEUE=y
CONFIG_DISABLE_POSIX_TIMERS=y
CONFIG_EXAMPLES_MEDIA=y
@@ -45,7 +42,6 @@ CONFIG_FAT_DMAMEMORY=y
CONFIG_FAT_LCNAMES=y
CONFIG_FAT_LFN=y
CONFIG_FAT_LFN_ALIAS_HASH=y
CONFIG_FRAME_POINTER=y
CONFIG_FS26_SPI_FREQUENCY=5000000
CONFIG_FSUTILS_IPCFG=y
CONFIG_FS_CROMFS=y
@@ -73,6 +69,7 @@ CONFIG_MEMSET_64BIT=y
CONFIG_MEMSET_OPTSPEED=y
CONFIG_MMCSD=y
CONFIG_MMCSD_SPICLOCK=7500000
CONFIG_MM_REGIONS=2
CONFIG_MTD=y
CONFIG_MTD_MX25RXX=y
CONFIG_MTD_PARTITION=y
@@ -80,7 +77,6 @@ CONFIG_MTD_PARTITION_NAMES=y
CONFIG_MX25RXX_LXX=y
CONFIG_MX25RXX_PAGE128=y
CONFIG_MX25RXX_QSPI_FREQUENCY=80000000
CONFIG_NDEBUG=y
CONFIG_NET=y
CONFIG_NETDB_DNSCLIENT=y
CONFIG_NETDB_DNSSERVER_NOADDR=y
@@ -125,11 +121,14 @@ CONFIG_PTHREAD_STACK_MIN=512
CONFIG_RAM_SIZE=272000
CONFIG_RAM_START=0x20400000
CONFIG_RAW_BINARY=y
CONFIG_S32K3XX_DTCM_HEAP=y
CONFIG_S32K3XX_EIRQINTS=y
CONFIG_S32K3XX_ENET=y
CONFIG_S32K3XX_ENET_NTXBUFFERS=4
CONFIG_S32K3XX_FLEXCAN0=y
CONFIG_S32K3XX_FLEXCAN1=y
CONFIG_S32K3XX_FLEXCAN2=y
CONFIG_S32K3XX_FLEXCAN3=y
CONFIG_S32K3XX_FS26=y
CONFIG_S32K3XX_GPIOIRQ=y
CONFIG_S32K3XX_LPI2C0=y
@@ -169,7 +168,6 @@ CONFIG_SIG_SIGALRM_ACTION=y
CONFIG_SIG_SIGUSR1_ACTION=y
CONFIG_SIG_SIGUSR2_ACTION=y
CONFIG_SIG_SIGWORK=4
CONFIG_STACK_CANARIES=y
CONFIG_STACK_COLORATION=y
CONFIG_START_DAY=30
CONFIG_START_MONTH=11
+1 -1
View File
@@ -50,7 +50,7 @@ static const px4_mtd_entry_t fmum_qspi_flash = {
.partd = {
{
.type = MTD_PARAMETERS,
.path = "/fs/qspi/params",
.path = "/mnt/qspi/params",
.nblocks = 1
}
},
@@ -128,20 +128,6 @@ int s32k3xx_bringup(void)
#endif
#ifdef CONFIG_FS_PROCFS
/* Mount the procfs file system */
ret = nx_mount(NULL, "/proc", "procfs", 0, NULL);
if (ret < 0) {
_err("Mounting procfs at /proc failed: %d\n", ret);
} else {
_info("Mounting procfs at /proc succesful\n");
}
#endif
#ifdef HAVE_MX25L
/* Create an instance of the S32K3XX QSPI device driver */
+1 -1
View File
@@ -64,7 +64,7 @@ constexpr px4_spi_bus_t px4_spi_buses[SPI_BUS_MAX_BUS_ITEMS] = {
initSPIBusExternal(SPI::Bus::SPI1, {
initSPIConfigExternal(SPI::CS{GPIO::PortB, GPIO::Pin5})
}),
initSPIBusExternal(SPI::Bus::SPI2, {
initSPIBusExternal(SPI::Bus::SPI2, { // SD Card
initSPIConfigExternal(SPI::CS{GPIO::PortB, GPIO::Pin5})
}),
initSPIBus(SPI::Bus::SPI3, { // SPI3 is ignored only used for FS26 by a NuttX driver