Merge branch 'master' of github.com:PX4/Firmware into px4dev_new_driver_wip

This commit is contained in:
Lorenz Meier
2012-08-27 07:25:05 +02:00
40 changed files with 4857 additions and 3773 deletions
+10 -4
View File
@@ -248,7 +248,7 @@
being set to the priority of the parent thread; losing its configured
priority. Reported by Mike Smith.
6.21 2012-xx-xx Gregory Nutt <gnutt@nuttx.org>
6.21 2012-08-25 Gregory Nutt <gnutt@nuttx.org>
* apps/include/: Stylistic clean-up of all header files.
* apps/modbus and apps/include/modbus: A port of freemodbus-v1.5.0
@@ -259,9 +259,9 @@
* apps/modbus: Add CONFIG_MB_TERMIOS. If the driver doesn't support
termios ioctls, then don't bother trying to configure the baud, parity
etc.
* apps/nslib: If waitpid() is supported, then NSH not catches the
* apps/nshlib: If waitpid() is supported, then NSH now catches the
return value from spawned applications (provided by Mike Smith)
* apps/nslib: Lock the schedule while starting built-in applications
* apps/nshlib: Lock the scheduler while starting built-in applications
in order to eliminate race conditions (also from Mike Smith).
* apps/examples/adc, pwm, and qencoder: Add support for testing
devices with multiple ADC, PWM, and QE devices.
@@ -272,9 +272,15 @@
properties of mounted file systems.
* apps/nshlib/nsh_parse.c: Extend help command options. 'help' with
no arguments outputs a short list of commands. With -v lists all
command line details. And command name can be added to just get
command line details. A command name can be added to just get
help on one command.
* system/readline.c: If character input/output is interrupted by a
signal, then readline() will try the read/write again.
* apps/*/Make.defs: Numerous fixes needed to use the automated
configuration (from Richard Cochran).
6.22 2012-xx-xx Gregory Nutt <gnutt@nuttx.org>
* apps/netutils/thttpd/thttpd_cgi.c: Missing NULL in argv[]
list (contributed by Kate).
+12 -2
View File
@@ -58,12 +58,22 @@
#ifndef CONFIG_SEM_PREALLOCHOLDERS
# define CONFIG_SEM_PREALLOCHOLDERS 0
#endif
#define NLOWPRI_THREADS (CONFIG_SEM_PREALLOCHOLDERS+1)
#if CONFIG_SEM_PREALLOCHOLDERS > 3
# define NLOWPRI_THREADS 3
#else
# define NLOWPRI_THREADS (CONFIG_SEM_PREALLOCHOLDERS+1)
#endif
#ifndef CONFIG_SEM_NNESTPRIO
# define CONFIG_SEM_NNESTPRIO 0
#endif
#define NHIGHPRI_THREADS (CONFIG_SEM_NNESTPRIO+1)
#if CONFIG_SEM_NNESTPRIO > 3
# define NHIGHPRI_THREADS 3
#else
# define NHIGHPRI_THREADS (CONFIG_SEM_NNESTPRIO+1)
#endif
/****************************************************************************
* Private Data
+28 -11
View File
@@ -2280,7 +2280,7 @@
the particular condition that revealed the bug occurred. My impression is
that this latter bugfix also fixes some STM32 USB performance problems.
* configs/hymini-stm32v: A configuration for the HY-Mini STM32v board contributed
by Laurent Latil. Theses changes also include support for the STM32F103VCT6.
by Laurent Latil. These changes also include support for the STM32F103VCT6.
* arch/configs/stm3240g-eval/src/up_pwm.c: Add hooks needed to use the new
apps/examples/pwm test of the STM32 PWM driver.
* drivers/mtd/mp25x.c: Add ability to use different SPI modes and different
@@ -2977,7 +2977,7 @@
* configs/lpc4330-xplorer/nsh: Add an NSH configuration for the LPC4330
Xplorer board.
6.21 2012-xx-xx Gregory Nutt <gnutt@nuttx.org>
6.21 2012-08-25 Gregory Nutt <gnutt@nuttx.org>
* configs/lpc4330-xplorer/up_nsh.c: Add support for a basic SPIFI block
driver for use by NSH. Does not work! Crashes on first SPIFI write.
@@ -3024,7 +3024,7 @@
but the driver still does not work.
* arch/arm/src/stm32 and arch/arm/include/stm32: Make name of RTC ALARM interrupt
common on STM32 F1,2,4
* arch/arm/src/stm32 and arch/arm/include/stm32: Add add support for the
* arch/arm/src/stm32 and arch/arm/include/stm32: Add support for the
STM32F100x "Value Line" devices. This includes changes to stm32F10xx_rcc.c that
add the ability to run the chip off the internal oscillator. There is no open
board configuration for this part yet (the STM32VLDiscovery would be a candidate).
@@ -3050,7 +3050,7 @@
* include/termios.h and lib/termios/*: Redesigned yet again (this is getting
painful. NuttX now supports the BOTHER baud setting just as Linux does. termios
Bxxx definitions are again encoded; cf[set|get][o|i]speed now deal with only the
encoded values. If the encode baud is set to BOTHER, then the values in the (non-
encoded values. If the encoded baud is set to BOTHER, then the values in the (non-
standard) c_ispeed and c_ospeed baud values may be accessed directly.
* arch/arm/src/stm32/stm32_serial.c: Add minimal termios support for the STM32
(BOTHER style baud settings only). Contributed by Mike Smith.
@@ -3063,8 +3063,7 @@
* arch/arm/src/stm32/stm32_sdio.c and chip/stm32f20xx_pinmap.h: STM32 F2 SDIO
fixes from Gary Teravskis and Scott Rondestvedt.
* include/termios.h and lib/termios/*: Replace cfsetispeed and cfsetospeed with
cfsetspeed (with definitions for the input/outputs in termios.h). Same for
cfgetispeed and cfgetospeed.
cfsetspeed (with definitions for the input/outputs in termios.h).
* configs/stm32f4discovery/src and configs/stm32f4discovery/pm: Add a power
management configuration for the STM32F4Discovery and supporting logic. This
check-in also includes some fixes for the F4 RTC alarm logic.
@@ -3090,10 +3089,10 @@
* arch/mips/src/pic32mx/pic32mx-gpio.c: Now supports the PIC32MX1/2 ANSEL
IOPORT register.
* lib/string/lib_memchr.c: Add support for memchr() (contributed by Mike Smith)
* lib/string/lib_memccpy.c: Add support for memcpy()
* lib/string/lib_memccpy.c: Add support for memccpy()
* arch/arm/src/lpc17xx/lpc17_serial.c: Now supports ioctl commands to change
the baud using tcsetattr() (contributed by Chris Taglia).
* arch/*/src/*_serial.c: Fix ioctl method return values. Theses methods
* arch/*/src/*_serial.c: Fix ioctl method return values. These methods
should return a negated errno value; they should not set the errno
variable.
* sched/on_exit.c, sched/task_exithook.c, and include/nuttx/sched.c: Add
@@ -3118,7 +3117,7 @@
* arch/arm/src/stm32/stm32*_rcc.c and .h: If CONFIG_PM is defined, add a
function called stm32_clockenable() that can be used by PM logic to re-start
the PLL after re-awakening from deep sleep modes.
* fs/fs_foreachinode.c and fs/fs_foreachmountpoint.c: All logic to traverse
* fs/fs_foreachinode.c and fs/fs_foreachmountpoint.c: Add logic to traverse
inodes and mountpoints in the NuttX pseudo-file system.
* fs/fat/fs_fat32.c: Max. filename length reported by statfs() was wrong
if FAT long file names were enabled.
@@ -3137,7 +3136,7 @@
LPC31xx has the same USB IP, but will require some additional initialization
(and lots of testing) before it can be used with the LPC43xx.
* nuttx/Documentation/NuttShell.html: Added a section covering ways to
customize the behavior or NSH.
customize the behavior of NSH.
* arch/arm/src/stm32/chip/stm32f1*_pinmap.h: STM32 CAN TX/RX pins reversed;
inconsistent conditional compilation. Reported by Max Holtzberg.
* arch/arm/*/stm32: Add support for STM32 F107 "Connectivity Line"
@@ -3166,5 +3165,23 @@
for all 8-bit AVR platforms (Thanks Richard Cochran).
* lib/stdio/lib_*stream.c: Revised to handle new error return values from
serial.c.
* arch/arm/src/stm32/stm32_spi.c: SPI driver can now survice re-
* arch/arm/src/stm32/stm32_spi.c: SPI driver can now service re-
initialization (Mike Smith).
* tools/mkconfig.c: If CONFIG_DRAM_END is not specified, this tool
will provide default definition of (CONFIG_DRAM_START + CONFIG_DRAM_SIZE)
* arch/arm/src/stm32/stm32_otgfshost.c: Renamed from stm32_usbhost.c.
This is nearly code complete and, with any luck, will be available
in NuttX-6.21.
* configs/*/defconfig: Update all defconfig files to remove syntax
that is incompatible with the mconf configuration tool.
* arch/arm/src/stm32/stm32_otgfshost.c: This driver now appears to be
functional (although more testing is necesary).
6.22 2012-xx-xx Gregory Nutt <gnutt@nuttx.org>
* include/semaphore.h, sched/sem_holders.c, and lib/semaphore/sem_init.c:
Fix some strange (and probably wrong) list handling when
CONFIG_PRIORITY_INHERITANCE and CONFIG_SEM_PREALLOCHOLDERS are defined.
This list handling was probably causing errors reported by Mike Smith
* sched/sched_waitpid.c: Fix a possible issue with logic logic that
should be brought into a critical section (suggested by Mike Smith)
+4 -4
View File
@@ -276,8 +276,8 @@ include/stdarg.h:
endif
# Targets used to build include/nuttx/version.h. Creation of version.h is
# part of the overall NuttX configuration sequency. Notice that the
# tools/mkversion tool is cuilt and used to create include/nuttx/version.h
# part of the overall NuttX configuration sequence. Notice that the
# tools/mkversion tool is built and used to create include/nuttx/version.h
tools/mkversion:
@$(MAKE) -C tools -f Makefile.host TOPDIR="$(TOPDIR)" mkversion
@@ -293,8 +293,8 @@ include/nuttx/version.h: $(TOPDIR)/.version tools/mkversion
@tools/mkversion $(TOPDIR) > include/nuttx/version.h
# Targets used to build include/nuttx/config.h. Creation of config.h is
# part of the overall NuttX configuration sequency. Notice that the
# tools/mkconfig tool is cuilt and used to create include/nuttx/config.h
# part of the overall NuttX configuration sequence. Notice that the
# tools/mkconfig tool is built and used to create include/nuttx/config.h
tools/mkconfig:
@$(MAKE) -C tools -f Makefile.host TOPDIR="$(TOPDIR)" mkconfig
+64
View File
@@ -2999,3 +2999,67 @@ Bugfixes (see the change log for details) :
on Z80.
As well as other, less critical bugs (see the ChangeLog for details)
NuttX-6.21
^^^^^^^^^^
The 88th release of NuttX, Version 6.21, was made on August 25, 2012,
and is available for download from the SourceForge website. Note
that release consists of two tarballs: nuttx-6.21.tar.gz and
apps-6.21.tar.gz. Both may be needed (see the top-level nuttx/README.txt
file for build information).
This release corresponds with SVN release number: r5052
Additional new features and extended functionality:
* Core: Add support for multiple registered atexit() functions. Syslog
extended: Now any character driver may be used for the debug logging
device. Mountpoint traversal logic.
* Drivers: Added support for the TI PGA112-7 amplifier/multiplexor.
* LPC43xx: Added clock ramp-up logic to run at 204 MHz
* LPC43xx Drivers: SPIFI block driver, RS-485 support, Minimal termios
support. Framework for USB0 device controller driver.
* LPC17xx Drivers: Minimal termios support
* STM32: Support for STM32 F1 "Value Line" (contributed by Mike Smith).
Add support for STM32 F107 "Connectivity Line" (contributed by Max
Holtzberg).
Clock restart logic needed for recovery from low power modes.
* STM32 Drivers: RTC alarm support. Usable for wakeup from sleep mode,
Minimal serial termios support. USB OTG FS host driver (alpha).
* STM32 Boards: Add power management hooks for the STM32F4Discovery,
Add support for the Olimex STM32-P107 (contributed by Max Holtzberg).
* PIC32: Add support for the Pinguino MIPS toolchain.
* PIC32 Drivers: GPIO driver now supports F1 analog regiaters (ANSEL).
* PIC32 Boards: Add support for the PGA117 on the Mirtoo module.
* Calypso: Add support for the SSD1783 LCD on the Compal E99.
* Library: cfsetispeed(), cfsetospeed(), tcflush(), memchr(), and
memccpy().
* Applications: Port of freemodbus-v1.5.0. Add support for testing
devices with multiple ADC, PWM, and QE devices.
NSH: NSH 'mount' command (with no arguments) will now show mounted
volumes. Add new NSH 'df' command. Extended 'help' support. NSH
now catches the return value from spawned applications (provided
by Mike Smith).
* Build System: mkconfig will not define CONFIG_DRAM_END. A lot of
progress has been made on the automated NuttX configuration logic
(Thanks go to Richard Cochran).
* Documentation: Document ways to customize the behavior of NSH.
Bugfixes (see the change log for details) :
* Serial drivers (all): Fix ioctl return value. Common "upper half"
serial driver will now return with EINTR if a serial wait is
interrupted by a signal.
* FAT: Fix statfs() file name length.
* LPC43xx: Clock configuration.
* STM32: Pinmap fixes, SPI driver re-initialization
* STM32 Boards: Correct and lower SDIO frequency for F2 and f4 boards.
* AVR: C++ build issues.
* PM: Fix a place where interrupts were not be re-enabled.
* Applications: NSH application start-up race conditions.
* Library: Fieldwidth and justification for %s format. Fixed several
issues with presenting floating point numbers. NULL definition
for C++
As well as other, less critical bugs (see the ChangeLog for details)
+36 -1
View File
@@ -19,11 +19,13 @@ config ARCH_ARM
config ARCH_AVR
bool "AVR"
select ARCH_NOINTC
---help---
Atmel 8-bit bit AVR and 32-bit AVR32 architectures
config ARCH_HC
bool "Freescale HC"
select ARCH_NOINTC
---help---
Freescale HC architectures (M9S12)
@@ -39,7 +41,8 @@ config ARCH_RGMP
http://rgmp.sourceforge.net/wiki/index.php/Main_Page.
config ARCH_SH
bool "Rensas"
bool "Renesas"
select ARCH_NOINTC
---help---
Renesas architectures (SH and M16C).
@@ -90,3 +93,35 @@ source arch/sim/Kconfig
source arch/x86/Kconfig
source arch/z16/Kconfig
source arch/z80/Kconfig
comment "Architecture Options"
config ARCH_NOINTC
bool
default n
config ARCH_STACKDUMP
bool "Dump stack on assertions"
default n
---help---
Enable to do stack dumps after assertions
comment "Board Settings"
config BOARD_LOOPSPERMSEC
int "Loops per millisecond"
help
Must be calibrated for correct operation of delay loops.
You simply use a stop watch to measure the 100 second delay
then adjust CONFIG_BOARD_LOOPSPERMSEC until it is actually
is 100 seconds.
config DRAM_START
hex "DRAM start address"
help
The physical start address of installed RAM.
config DRAM_SIZE
int "DRAM size"
help
The size in bytes of the installed RAM.
-6
View File
@@ -118,12 +118,6 @@ config ARCH_CHIP
default "stm32" if ARCH_CHIP_STM32
default "str71x" if ARCH_CHIP_STR71X
config ARCH_STACKDUMP
bool "Dump stack on assertions"
default n
---help---
Enable to do stack dumps after assertions
config ARCH_LEDS
bool "Use board LEDs to show state"
default y
+53
View File
@@ -1910,3 +1910,56 @@ config STM32_MII_MCO1
bool
default y if !STM32_MII_MCO2
depends on STM32_MII
menu "USB Host Configuration"
config STM32_OTGFS_RXFIFO_SIZE
int "Rx Packet Size"
default 128
depends on USBHOST && STM32_OTGFS
---help---
Size of the RX FIFO in 32-bit words. Default 128 (512 bytes)
config STM32_OTGFS_NPTXFIFO_SIZE
int "Non-periodic Tx FIFO Size"
default 96
depends on USBHOST && STM32_OTGFS
---help---
Size of the non-periodic Tx FIFO in 32-bit words. Default 96 (384 bytes)
config STM32_OTGFS_PTXFIFO_SIZE
int "Periodic Tx FIFO size"
default 128
depends on USBHOST && STM32_OTGFS
---help---
Size of the periodic Tx FIFO in 32-bit words. Default 96 (384 bytes)
config STM32_OTGFS_DESCSIZE
int "Descriptor Size"
default 128
depends on USBHOST && STM32_OTGFS
---help---
Maximum size to allocate for descriptor memory descriptor. Default: 128
config STM32_OTGFS_SOFINTR
bool "Enable SOF interrupts"
default n
depends on USBHOST && STM32_OTGFS
---help---
Enable SOF interrupts. Why would you ever want to do that?
config STM32_USBHOST_REGDEBUG
bool "Register-Level Debug"
default n
depends on USBHOST && STM32_OTGFS
---help---
Enable very low-level register access debug. Depends on CONFIG_DEBUG.
config STM32_USBHOST_PKTDUMP
bool "Packet Dump Debug"
default n
depends on USBHOST && STM32_OTGFS
---help---
Dump all incoming and outgoing USB packets. Depends on CONFIG_DEBUG.
endmenu
+6
View File
@@ -81,6 +81,12 @@ CMN_CSRCS += stm32_otgfsdev.c
endif
endif
ifeq ($(CONFIG_USBHOST),y)
ifeq ($(CONFIG_STM32_OTGFS),y)
CMN_CSRCS += stm32_otgfshost.c
endif
endif
ifeq ($(CONFIG_ARMV7M_CMNVECTOR),y)
CHIP_ASRCS += stm32_vectors.S
endif
+38 -23
View File
@@ -46,6 +46,18 @@
/****************************************************************************************************
* Pre-processor Definitions
****************************************************************************************************/
/* General definitions */
#define OTGFS_EPTYPE_CTRL (0) /* Control */
#define OTGFS_EPTYPE_ISOC (1) /* Isochronous */
#define OTGFS_EPTYPE_BULK (2) /* Bulk */
#define OTGFS_EPTYPE_INTR (3) /* Interrupt */
#define OTGFS_PID_DATA0 (0)
#define OTGFS_PID_DATA2 (1)
#define OTGFS_PID_DATA1 (2)
#define OTGFS_PID_MDATA (3) /* Non-control */
#define OTGFS_PID_SETUP (3) /* Control */
/* Register Offsets *********************************************************************************/
/* Core global control and status registers */
@@ -125,8 +137,8 @@
#define STM32_OTGFS_HCTSIZ3_OFFSET 0x0570 /* Host channel-3 interrupt register */
#define STM32_OTGFS_HCTSIZ4_OFFSET 0x0590 /* Host channel-4 interrupt register */
#define STM32_OTGFS_HCTSIZ5_OFFSET 0x05b0 /* Host channel-5 interrupt register */
#define STM32_OTGFS_HCTSIZ6_OFFSET 0x05d9 /* Host channel-6 interrupt register */
#define STM32_OTGFS_HCTSIZ7_OFFSET 0x05f9 /* Host channel-7 interrupt register */
#define STM32_OTGFS_HCTSIZ6_OFFSET 0x05d0 /* Host channel-6 interrupt register */
#define STM32_OTGFS_HCTSIZ7_OFFSET 0x05f0 /* Host channel-7 interrupt register */
/* Device-mode control and status registers */
@@ -193,6 +205,10 @@
#define STM32_OTGFS_DOEPTSIZ2_OFFSET 0x00b50 /* Device OUT endpoint-2 transfer size register */
#define STM32_OTGFS_DOEPTSIZ3_OFFSET 0x00b70 /* Device OUT endpoint-3 transfer size register */
/* Power and clock gating registers */
#define STM32_OTGFS_PCGCCTL_OFFSET 0x0e00 /* Power and clock gating control register */
/* Data FIFO (DFIFO) access registers */
#define STM32_OTGFS_DFIFO_DEP_OFFSET(n) (0x1000 + ((n) << 12))
@@ -204,15 +220,11 @@
#define STM32_OTGFS_DFIFO_DEP1_OFFSET 0x2000 /* 0x2000-0x2ffc Device IN/OUT Endpoint 1 DFIFO Write/Read Access */
#define STM32_OTGFS_DFIFO_HCH1_OFFSET 0x2000 /* 0x2000-0x2ffc Host OUT/IN Channel 1 DFIFO Read/Write Access */
#define STM32_OTGFS_DFIFO_DEP2_OFFSET 0x3000 /* 0x3000-0x3ffc Device IN/OUT Endpoint 1 DFIFO Write/Read Access */
#define STM32_OTGFS_DFIFO_HCH2_OFFSET 0x3000 /* 0x3000-0x3ffc Host OUT/IN Channel 1 DFIFO Read/Write Access */
#define STM32_OTGFS_DFIFO_DEP2_OFFSET 0x3000 /* 0x3000-0x3ffc Device IN/OUT Endpoint 2 DFIFO Write/Read Access */
#define STM32_OTGFS_DFIFO_HCH2_OFFSET 0x3000 /* 0x3000-0x3ffc Host OUT/IN Channel 2 DFIFO Read/Write Access */
#define STM32_OTGFS_DFIFO_DEP3_OFFSET 0x4000 /* 0x4000-0x4ffc Device IN/OUT Endpoint 1 DFIFO Write/Read Access */
#define STM32_OTGFS_DFIFO_HCH3_OFFSET 0x4000 /* 0x4000-0x4ffc Host OUT/IN Channel 1 DFIFO Read/Write Access */
/* Power and clock gating registers */
#define STM32_OTGFS_PCGCCTL_OFFSET 0x0e00 /* Power and clock gating control register */
#define STM32_OTGFS_DFIFO_DEP3_OFFSET 0x4000 /* 0x4000-0x4ffc Device IN/OUT Endpoint 3 DFIFO Write/Read Access */
#define STM32_OTGFS_DFIFO_HCH3_OFFSET 0x4000 /* 0x4000-0x4ffc Host OUT/IN Channel 3 DFIFO Read/Write Access */
/* Register Addresses *******************************************************************************/
@@ -349,6 +361,10 @@
#define STM32_OTGFS_DOEPTSIZ2 (STM32_OTGFS_BASE+STM32_OTGFS_DOEPTSIZ2_OFFSET)
#define STM32_OTGFS_DOEPTSIZ3 (STM32_OTGFS_BASE+STM32_OTGFS_DOEPTSIZ3_OFFSET)
/* Power and clock gating registers */
#define STM32_OTGFS_PCGCCTL (STM32_OTGFS_BASE+STM32_OTGFS_PCGCCTL_OFFSET)
/* Data FIFO (DFIFO) access registers */
#define STM32_OTGFS_DFIFO_DEP(n) (STM32_OTGFS_BASE+STM32_OTGFS_DFIFO_DEP_OFFSET(n))
@@ -366,10 +382,6 @@
#define STM32_OTGFS_DFIFO_DEP3 (STM32_OTGFS_BASE+STM32_OTGFS_DFIFO_DEP3_OFFSET)
#define STM32_OTGFS_DFIFO_HCH3 (STM32_OTGFS_BASE+STM32_OTGFS_DFIFO_HCH3_OFFSET)
/* Power and clock gating registers */
#define STM32_OTGFS_PCGCCTL (STM32_OTGFS_BASE+STM32_OTGFS_PCGCCTL_OFFSET)
/* Register Bitfield Definitions ********************************************************************/
/* Core global control and status registers */
@@ -411,7 +423,9 @@
#define OTGFS_GUSBCFG_TOCAL_SHIFT (0) /* Bits 0-2: FS timeout calibration */
#define OTGFS_GUSBCFG_TOCAL_MASK (7 << OTGFS_GUSBCFG_TOCAL_SHIFT)
/* Bits 3-6: Reserved, must be kept at reset value */
/* Bits 3-5: Reserved, must be kept at reset value */
#define OTGFS_GUSBCFG_PHYSEL (1 << 6) /* Bit 6: Full Speed serial transceiver select */
/* Bit 7: Reserved, must be kept at reset value */
#define OTGFS_GUSBCFG_SRPCAP (1 << 8) /* Bit 8: SRP-capable */
#define OTGFS_GUSBCFG_HNPCAP (1 << 9) /* Bit 9: HNP-capable */
#define OTGFS_GUSBCFG_TRDT_SHIFT (10) /* Bits 10-13: USB turnaround time */
@@ -491,7 +505,7 @@
#define OTGFS_GRXSTSH_PKTSTS_MASK (15 << OTGFS_GRXSTSH_PKTSTS_SHIFT)
# define OTGFS_GRXSTSH_PKTSTS_INRECVD (2 << OTGFS_GRXSTSH_PKTSTS_SHIFT) /* IN data packet received */
# define OTGFS_GRXSTSH_PKTSTS_INDONE (3 << OTGFS_GRXSTSH_PKTSTS_SHIFT) /* IN transfer completed */
# define OTGFS_GRXSTSH_PKTSTS_DTOGERR (2 << OTGFS_GRXSTSH_PKTSTS_SHIFT) /* Data toggle error */
# define OTGFS_GRXSTSH_PKTSTS_DTOGERR (5 << OTGFS_GRXSTSH_PKTSTS_SHIFT) /* Data toggle error */
# define OTGFS_GRXSTSH_PKTSTS_HALTED (7 << OTGFS_GRXSTSH_PKTSTS_SHIFT) /* Channel halted */
/* Bits 21-31: Reserved, must be kept at reset value */
/* Receive status debug read/OTG status read and pop registers (device mode) */
@@ -559,7 +573,7 @@
# define OTGFS_HNPTXSTS_EPNUM_SHIFT (27) /* Bits 27-30: Endpoint number */
# define OTGFS_HNPTXSTS_EPNUM_MASK (15 << OTGFS_HNPTXSTS_EPNUM_SHIFT)
/* Bit 31 Reserved, must be kept at reset value */
/* general core configuration register */
/* General core configuration register */
/* Bits 15:0 Reserved, must be kept at reset value */
#define OTGFS_GCCFG_PWRDWN (1 << 16) /* Bit 16: Power down */
/* Bit 17 Reserved, must be kept at reset value */
@@ -625,9 +639,11 @@
# define OTGFS_HPTXSTS_TYPE_HALT (3 << OTGFS_HPTXSTS_TYPE_SHIFT) /* Disable channel command */
# define OTGFS_HPTXSTS_EPNUM_SHIFT (27) /* Bits 27-30: Endpoint number */
# define OTGFS_HPTXSTS_EPNUM_MASK (15 << OTGFS_HPTXSTS_EPNUM_SHIFT)
# define OTGFS_HPTXSTS_CHNUM_SHIFT (27) /* Bits 27-30: Channel number */
# define OTGFS_HPTXSTS_CHNUM_MASK (15 << OTGFS_HPTXSTS_CHNUM_SHIFT)
# define OTGFS_HPTXSTS_ODD (1 << 24) /* Bit 31: Send in odd (vs even) frame */
/* Host all channels interrupt and all channels interrupt mask registers */
/* Host all channels interrupt and all channels interrupt mask registers */
#define OTGFS_HAINT(n) (1 << (n)) /* Bits 15:0 HAINTM: Channel interrupt */
@@ -664,7 +680,7 @@
/* Host channel-n characteristics register */
#define OTGFS_HCCHAR0_MPSIZ_SHIFT (0) /* Bits 0-10: Maximum packet size */
#define OTGFS_HCCHAR_MPSIZ_SHIFT (0) /* Bits 0-10: Maximum packet size */
#define OTGFS_HCCHAR_MPSIZ_MASK (0x7ff << OTGFS_HCCHAR_MPSIZ_SHIFT)
#define OTGFS_HCCHAR_EPNUM_SHIFT (11) /* Bits 11-14: Endpoint number */
#define OTGFS_HCCHAR_EPNUM_MASK (15 << OTGFS_HCCHAR_EPNUM_SHIFT)
@@ -695,7 +711,7 @@
#define OTGFS_HCINT_STALL (1 << 3) /* Bit 3: STALL response received interrupt */
#define OTGFS_HCINT_NAK (1 << 4) /* Bit 4: NAK response received interrupt */
#define OTGFS_HCINT_ACK (1 << 5) /* Bit 5: ACK response received/transmitted interrupt */
#define OTGFS_HCINTMSK_NYET (1 << 6) /* Bit 6: response received interrupt mask */
#define OTGFS_HCINT_NYET (1 << 6) /* Bit 6: Response received interrupt */
#define OTGFS_HCINT_TXERR (1 << 7) /* Bit 7: Transaction error */
#define OTGFS_HCINT_BBERR (1 << 8) /* Bit 8: Babble error */
#define OTGFS_HCINT_FRMOR (1 << 9) /* Bit 9: Frame overrun */
@@ -712,7 +728,8 @@
# define OTGFS_HCTSIZ_DPID_DATA0 (0 << OTGFS_HCTSIZ_DPID_SHIFT)
# define OTGFS_HCTSIZ_DPID_DATA2 (1 << OTGFS_HCTSIZ_DPID_SHIFT)
# define OTGFS_HCTSIZ_DPID_DATA1 (2 << OTGFS_HCTSIZ_DPID_SHIFT)
# define OTGFS_HCTSIZ_DPID_MDATA (3 << OTGFS_HCTSIZ_DPID_SHIFT)
# define OTGFS_HCTSIZ_DPID_MDATA (3 << OTGFS_HCTSIZ_DPID_SHIFT) /* Non-control */
# define OTGFS_HCTSIZ_PID_SETUP (3 << OTGFS_HCTSIZ_DPID_SHIFT) /* Control */
/* Bit 31 Reserved, must be kept at reset value */
/* Device-mode control and status registers */
@@ -989,8 +1006,6 @@
# define OTGFS_DOEPTSIZ_RXDPID_DATA1 (2 << OTGFS_DOEPTSIZ_RXDPID_SHIFT)
# define OTGFS_DOEPTSIZ_RXDPID_MDATA (3 << OTGFS_DOEPTSIZ_RXDPID_SHIFT)
/* Bit 31: Reserved, must be kept at reset value */
/* Power and clock gating registers */
/* Power and clock gating control register */
#define OTGFS_PCGCCTL_STPPCLK (1 << 0) /* Bit 0: Stop PHY clock */
@@ -365,7 +365,7 @@
#define GPIO_JTMS_SWDIO (GPIO_ALT|GPIO_AF0|GPIO_PORTA|GPIO_PIN13)
#define GPIO_JTRST (GPIO_ALT|GPIO_AF0|GPIO_PORTB|GPIO_PIN4)
/* OTG FS/HS */
/* OTG FS/HS (VBUS PA9 is not an alternate configuration) */
#define GPIO_OTGFS_DM (GPIO_ALT|GPIO_FLOAT|GPIO_AF10|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN11)
#define GPIO_OTGFS_DP (GPIO_ALT|GPIO_FLOAT|GPIO_AF10|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN12)
@@ -365,7 +365,7 @@
#define GPIO_JTMS_SWDIO (GPIO_ALT|GPIO_AF0|GPIO_PORTA|GPIO_PIN13)
#define GPIO_JTRST (GPIO_ALT|GPIO_AF0|GPIO_PORTB|GPIO_PIN4)
/* OTG FS/HS */
/* OTG FS/HS (VBUS PA9 is not an alternate configuration) */
#define GPIO_OTGFS_DM (GPIO_ALT|GPIO_FLOAT|GPIO_AF10|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN11)
#define GPIO_OTGFS_DP (GPIO_ALT|GPIO_FLOAT|GPIO_AF10|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN12)
+21 -5
View File
@@ -4086,7 +4086,7 @@ static void *stm32_ep_allocbuffer(FAR struct usbdev_ep_s *ep, unsigned bytes)
*
*******************************************************************************/
#ifdef CONFIG_LPC313x_USBDEV_DMA
#ifdef CONFIG_STM32_USBDEV_DMA
static void stm32_ep_freebuffer(FAR struct usbdev_ep_s *ep, FAR void *buf)
{
usbtrace(TRACE_EPFREEBUFFER, privep->epphy);
@@ -4645,7 +4645,6 @@ static int stm32_wakeup(struct usbdev_s *dev)
regval &= ~(OTGFS_PCGCCTL_STPPCLK | OTGFS_PCGCCTL_GATEHCLK);
stm32_putreg(regval, STM32_OTGFS_PCGCCTL);
#endif
/* Activate Remote wakeup signaling */
regval = stm32_getreg(STM32_OTGFS_DCTL);
@@ -4971,7 +4970,7 @@ static void stm32_hwinitialize(FAR struct stm32_usbdev_s *priv)
#ifndef CONFIG_USBDEV_VBUSSENSING
regval |= OTGFS_GCCFG_NOVBUSSENS;
#endif
#ifdef CONFIG_USBDEV_SOFOUTPUT
#ifdef CONFIG_STM32_OTGFS_SOFOUTPUT
regval |= OTGFS_GCCFG_SOFOUTEN;
#endif
stm32_putreg(regval, STM32_OTGFS_GCCFG);
@@ -5173,12 +5172,29 @@ void up_usbinitialize(void)
* current detection.
*/
/* Configure OTG FS alternate function pins */
/* Configure OTG FS alternate function pins
*
* PIN* SIGNAL DIRECTION
* ---- ----------- ----------
* PA8 OTG_FS_SOF SOF clock output
* PA9 OTG_FS_VBUS VBUS input for device, Driven by external regulator by
* host (not an alternate function)
* PA10 OTG_FS_ID OTG ID pin (only needed in Dual mode)
* PA11 OTG_FS_DM D- I/O
* PA12 OTG_FS_DP D+ I/O
*
* *Pins may vary from device-to-device.
*/
stm32_configgpio(GPIO_OTGFS_DM);
stm32_configgpio(GPIO_OTGFS_DP);
stm32_configgpio(GPIO_OTGFS_ID);
stm32_configgpio(GPIO_OTGFS_ID); /* Only needed for OTG */
/* SOF output pin configuration is configurable. */
#ifdef CONFIG_STM32_OTGFS_SOFOUTPUT
stm32_configgpio(GPIO_OTGFS_SOF);
#endif
/* Uninitialize the hardware so that we know that we are starting from a
* known state. */
File diff suppressed because it is too large Load Diff
File diff suppressed because it is too large Load Diff
+57
View File
@@ -47,6 +47,34 @@
#include "chip.h"
#include "chip/stm32_otgfs.h"
#if defined(CONFIG_STM32_OTGFS) && defined(CONFIG_USBHOST)
/************************************************************************************
* Public Functions
************************************************************************************/
/*
* STM32 USB OTG FS Host Driver Support
*
* Pre-requisites
*
* CONFIG_USBHOST - Enable general USB host support
* CONFIG_STM32_OTGFS - Enable the STM32 USB OTG FS block
* CONFIG_STM32_SYSCFG - Needed
*
* Options:
*
* CONFIG_STM32_OTGFS_RXFIFO_SIZE - Size of the RX FIFO in 32-bit words.
* Default 128 (512 bytes)
* CONFIG_STM32_OTGFS_NPTXFIFO_SIZE - Size of the non-periodic Tx FIFO
* in 32-bit words. Default 96 (384 bytes)
* CONFIG_STM32_OTGFS_PTXFIFO_SIZE - Size of the periodic Tx FIFO in 32-bit
* words. Default 96 (384 bytes)
* CONFIG_STM32_OTGFS_SOFINTR - Enable SOF interrupts. Why would you ever
* want to do that?
* CONFIG_STM32_USBHOST_REGDEBUG - Enable very low-level register access
* debug. Depends on CONFIG_DEBUG.
*/
/************************************************************************************
* Public Functions
************************************************************************************/
@@ -61,11 +89,40 @@ extern "C" {
#define EXTERN extern
#endif
/***********************************************************************************
* Name: stm32_usbhost_vbusdrive
*
* Description:
* Enable/disable driving of VBUS 5V output. This function must be provided be
* each platform that implements the STM32 OTG FS host interface
*
* "On-chip 5 V VBUS generation is not supported. For this reason, a charge pump
* or, if 5 V are available on the application board, a basic power switch, must
* be added externally to drive the 5 V VBUS line. The external charge pump can
* be driven by any GPIO output. When the application decides to power on VBUS
* using the chosen GPIO, it must also set the port power bit in the host port
* control and status register (PPWR bit in OTG_FS_HPRT).
*
* "The application uses this field to control power to this port, and the core
* clears this bit on an overcurrent condition."
*
* Input Parameters:
* iface - For future growth to handle multiple USB host interface. Should be zero.
* enable - true: enable VBUS power; false: disable VBUS power
*
* Returned Value:
* None
*
***********************************************************************************/
EXTERN void stm32_usbhost_vbusdrive(int iface, bool enable);
#undef EXTERN
#if defined(__cplusplus)
}
#endif
#endif /* __ASSEMBLY__ */
#endif /* CONFIG_STM32_OTGFS && CONFIG_USBHOST */
#endif /* __ARCH_ARM_SRC_STM32_STM32_USBHOST_H */
+1 -1
View File
@@ -616,7 +616,7 @@ static void stm32_stdclockconfig(void)
/* Set the PLL dividers and multiplers to configure the main PLL */
regval = (STM32_PLLCFG_PLLM | STM32_PLLCFG_PLLN |STM32_PLLCFG_PLLP |
RCC_PLLCFG_PLLSRC_HSE | STM32_PLLCFG_PPQ);
RCC_PLLCFG_PLLSRC_HSE | STM32_PLLCFG_PLLQ);
putreg32(regval, STM32_RCC_PLLCFG);
/* Enable the main PLL */
+1 -1
View File
@@ -618,7 +618,7 @@ static void stm32_stdclockconfig(void)
/* Set the PLL dividers and multiplers to configure the main PLL */
regval = (STM32_PLLCFG_PLLM | STM32_PLLCFG_PLLN |STM32_PLLCFG_PLLP |
RCC_PLLCFG_PLLSRC_HSE | STM32_PLLCFG_PPQ);
RCC_PLLCFG_PLLSRC_HSE | STM32_PLLCFG_PLLQ);
putreg32(regval, STM32_RCC_PLLCFG);
/* Enable the main PLL */
+14 -689
View File
@@ -12,703 +12,28 @@ choice
be available for selection. Use ARCH_BOARD_CUSTOM to create a new
board configuration.
config ARCH_BOARD_AMBER
bool "Amber Web Server"
depends on ARCH_CHIP_ATMEGA128
config ARCH_BOARD_PX4FMU
bool "PX4FMU board"
depends on ARCH_CHIP_STM32F405RG
---help---
This is placeholder for the SoC Robotics Amber Web Server that is based
on the Atmel AVR ATMega128 MCU. There is not much there yet and what is
there is untested due to tool-related issues.
PX4 system Flight Management Unit
config ARCH_BOARD_AVR32DEV1
bool "Atmel AVR32DEV1 board"
depends on ARCH_CHIP_AT32UC3B0256
config ARCH_BOARD_PX4IO
bool "PX4IO board"
depends on ARCH_CHIP_STM32F100C8
---help---
This is a port of NuttX to the Atmel AVR32DEV1 board. That board is
based on the Atmel AT32UC3B0256 MCU and uses a specially patched
version of the GNU toolchain: The patches provide support for the
AVR32 family. That patched GNU toolchain is available only from the
Atmel website. STATUS: This port is functional but very basic. There
are configurations for NSH and the OS test.
config ARCH_BOARD_C5471EVM
bool "Spectrum Digital C5471 evaluation board"
depends on ARCH_CHIP_C5471
---help---
This is a port to the Spectrum Digital C5471 evaluation board. The
TMS320C5471 is a dual core processor from TI with an ARM7TDMI general
purpose processor and a c54 DSP. It is also known as TMS320DA180 or just DA180.
NuttX runs on the ARM core and is built with a GNU arm-elf toolchain*.
This port is complete and verified.
config ARCH_BOARD_COMPALE88
bool "Compal e88 phone"
depends on ARCH_CHIP_CALYPSO
---help---
These directories contain the board support for compal e88 and e99 phones.
These ports are based on patches contributed by Denis Carikli for both the
compal e99 and e88. The patches were made by Alan Carvalho de Assis and
Denis Carikli using the Stefan Richter's Osmocom-bb patches.
config ARCH_BOARD_COMPALE99
bool "Compal e99 phone"
depends on ARCH_CHIP_CALYPSO
---help---
These directories contain the board support for compal e88 and e99 phones.
These ports are based on patches contributed by Denis Carikli for both the
compal e99 and e88. The patches were made by Alan Carvalho de Assis and
Denis Carikli using the Stefan Richter's Osmocom-bb patches.
config ARCH_BOARD_DEMOS92S12NEC64
bool "Freescale DMO9S12NE64 board"
depends on ARCH_CHIP_MCS92S12NEC64
---help---
Freescale DMO9S12NE64 board based on the MC9S12NE64 hcs12 cpu. This
port uses the m9s12x GCC toolchain. STATUS: (Still) under development; it
is code complete but has not yet been verified.
config ARCH_BOARD_EA3131
bool "Embedded Artists EA3131 Development board"
depends on ARCH_CHIP_LPC3131
---help---
Embedded Artists EA3131 Development board. This board is based on the
an NXP LPC3131 MCU. This OS is built with the arm-elf toolchain*.
STATUS: This port is complete and mature.
config ARCH_BOARD_EA3152
bool "Embedded Artists EA3152 Development board"
depends on ARCH_CHIP_LPC3152
---help---
Embedded Artists EA3152 Development board. This board is based on the
an NXP LPC3152 MCU. This OS is built with the arm-elf toolchain*.
STATUS: This port is has not be exercised well, but since it is
a simple derivative of the ea3131, it should be fully functional.
config ARCH_BOARD_EAGLE100
bool "Micromint Eagle-100 Development board"
depends on ARCH_CHIP_LM3S6918
---help---
Micromint Eagle-100 Development board. This board is based on the
an ARM Cortex-M3 MCU, the Luminary LM3S6918. This OS is built with the
arm-elf toolchain*. STATUS: This port is complete and mature.
config ARCH_BOARD_EKK_LM3S9B96
bool "TI/Stellaris EKK-LM3S9B96"
depends on ARCH_CHIP_LM3S9B96
---help---
TI/Stellaris EKK-LM3S9B96 board. This board is based on the
an EKK-LM3S9B96 which is a Cortex-M3.
config ARCH_BOARD_EZ80F910200KITG
bool "ZiLOG ez80f0910200kitg development kit"
depends on ARCH_CHIP_EZ80F91
---help---
ez80Acclaim! Microcontroller. This port use the ZiLOG ez80f0910200kitg
development kit, eZ80F091 part, and the Zilog ZDS-II Windows command line
tools. The development environment is Cygwin under WinXP.
config ARCH_BOARD_EZ80F910200ZCO
bool "ZiLOG ez80f0910200zco development kit"
depends on ARCH_CHIP_EZ80F91
---help---
ez80Acclaim! Microcontroller. This port use the Zilog ez80f0910200zco
development kit, eZ80F091 part, and the Zilog ZDS-II Windows command line
tools. The development environment is Cygwin under WinXP.
config ARCH_BOARD_HYMINI_STM32V
bool "HY-Mini STM32v board"
depends on ARCH_CHIP_STM32F103VCT
---help---
A configuration for the HY-Mini STM32v board. This board is based on the
STM32F103VCT chip.
config ARCH_BOARD_LINCOLN60
bool "Micromint Lincoln 60 board"
depends on ARCH_CHIP_LPC1769
---help---
Micromint Lincoln 60 board using the NXP LPC1769 MCU.
config ARCH_BOARD_KWIKSTIK_K40
bool "FreeScale KwikStik-K40 development board"
depends on ARCH_CHIP_MK40X256VLQ100
---help---
Kinetis K40 Cortex-M4 MCU. This port uses the FreeScale KwikStik-K40
development board.
config ARCH_BOARD_LM3S6432S2E
bool "Stellaris RDK-S2E Reference Design Kit"
depends on ARCH_CHIP_LM3S6432
---help---
Stellaris RDK-S2E Reference Design Kit and the MDL-S2E Ethernet to
Serial module.
config ARCH_BOARD_LM3S6965EK
bool "Stellaris LM3S6965 Evaluation Kit"
depends on ARCH_CHIP_LM3S6965
---help---
Stellaris LM3S6965 Evaluation Kit. This board is based on the
an ARM Cortex-M3 MCU, the Luminary/TI LM3S6965. This OS is built with the
arm-elf toolchain*. STATUS: This port is complete and mature.
config ARCH_BOARD_LM3S8962EK
bool "Stellaris LMS38962 Evaluation Kit"
depends on ARCH_CHIP_LM3S8962
---help---
Stellaris LMS38962 Evaluation Kit.
config ARCH_BOARD_LPCXPRESSO
bool "NXP LPCExpresso LPC1768"
depends on ARCH_CHIP_LPC1768
---help---
Embedded Artists base board with NXP LPCExpresso LPC1768. This board
is based on the NXP LPC1768. The Code Red toolchain is used by default.
config ARCH_BOARD_LPC4330_XPLORER
bool "NXG LPC4330-Xplorer"
depends on ARCH_CHIP_LPC4330FET100
---help---
NXG Technologoies LPC4330 Xplorer board. This board is based on the
LPC4330FET100. The Code Red toolchain is used by default.
config ARCH_BOARD_M68332EVB
bool "Motoroloa M68332EVB"
depends on ARCH_M68332
---help---
This is a work in progress for the venerable m68322evb board from
Motorola. This OS is also built with the arm-elf toolchain. STATUS:
This port was never completed.
config ARCH_BOARD_MBED
bool "mbed LCP1768"
depends on ARCH_CHIP_LPC1768
---help---
The configurations in this directory support the mbed board (http://mbed.org)
that features the NXP LPC1768 microcontroller. This OS is also built
with the arm-elf toolchain*. STATUS: Contributed.
config ARCH_BOARD_MCU123
bool "mcu123.com LPC2148 Development Board"
depends on ARCH_CHIP_LPC2148
---help---
This port is for the NXP LPC2148 as provided on the mcu123.com
lpc214x development board. This OS is also built with the arm-elf
toolchain*. The port supports serial, timer0, spi, and usb.
config ARCH_BOARD_MICROPENDOUS
bool "Opendous Micropendous 3 board"
depends on ARCH_CHIP_AT90USB646 || ARCH_CHIP_AT90USB647 || ARCH_CHIP_AT90USB1286 || ARCH_CHIP_AT90USB1287
---help---
This is a port to the Opendous Micropendous 3 board. This board may
be populated with either an AVR AT90USB646, 647, 1286, or 1287 MCU.
Support is configured for the AT90USB647.
config ARCH_BOARD_MX1ADS
bool "Motorola MX1ADS development board"
depends on ARCH_CHIP_IMX1
---help---
This is a port to the Motorola MX1ADS development board. That board
is based on the Freescale i.MX1 processor. The i.MX1 is an ARM920T.
STATUS: This port is nearly code complete but was never fully
integrated due to tool-related issues.
config ARCH_BOARD_NE64BADGE
bool "FEG NE64 /PoE Badge board"
depends on ARCH_CHIP_MCS92S12NEC64
---help---
Future Electronics Group NE64 /PoE Badge board based on the
MC9S12NE64 hcs12 cpu. This port uses the m9s12x GCC toolchain.
STATUS: Under development. The port is code-complete but has
not yet been fully tested.
config ARCH_BOARD_NTOSD_DM320
bool "Neuros OSD v1.0 Dev Board"
depends on ARCH_CHIP_DM320
---help---
This port uses the Neuros OSD v1.0 Dev Board with a GNU arm-elf
toolchain*: see
http://wiki.neurostechnology.com/index.php/OSD_1.0_Developer_Home
There are some differences between the Dev Board and the currently
available commercial v1.0 Boards. See
http://wiki.neurostechnology.com/index.php/OSD_Developer_Board_v1
NuttX operates on the ARM9EJS of this dual core processor.
STATUS: This port is code complete, verified, and included in the
NuttX 0.2.1 release.
config ARCH_BOARD_NUCLEUS2G
bool "Nucleus 2G board"
depends on ARCH_CHIP_LPC1768
---help---
This port uses the Nucleus 2G board (with Babel CAN board). This board
features an NXP LPC1768 processor. See the 2G website (http://www.2g-eng.com/)
for more information about the Nucleus 2G.
config ARCH_BOARD_LPC1766STK
bool "Olimex LPC1766-STK board"
depends on ARCH_CHIP_LPC1766
---help---
This port uses the Olimex LPC1766-STK board and a GNU GCC toolchain* under
Linux or Cygwin. STATUS: Complete and mature.
config ARCH_BOARD_MIRTOO
bool "Mirtoo PIC32 Module from Dimitech"
depends on ARCH_CHIP_PIC32MX250F128D
---help---
This is the port to the DTX1-4000L "Mirtoo" module. This module uses MicroChip
PIC32MX250F128D. See http://www.dimitech.com/ for further information.
config ARCH_BOARD_OLIMEXLPC2378
bool "Olimex-lpc2378 board"
depends on ARCH_CHIP_LPC2378
---help---
This port uses the Olimex-lpc2378 board and a GNU arm-elf toolchain* under
Linux or Cygwin. STATUS: ostest and NSH configurations available.
This port for the NXP LPC2378 was contributed by Rommel Marcelo.
config ARCH_BOARD_OLIMEX_STRP711
bool "Olimex STR-P711 board"
depends on ARCH_CHIP_STR71X
---help---
This port uses the Olimex STR-P711 board and a GNU arm-elf toolchain* under
Linux or Cygwin. See the http://www.olimex.com/dev/str-p711.html" for
further information. STATUS: Configurations for the basic OS test and NSH
are complete and verified.
config ARCH_BOARD_PCBLOGICPIC32MX
bool "PIC32MX board from PCB Logic Design Co"
depends on ARCH_CHIP_PIC32MX460F512L
---help---
This is the port of NuttX to the PIC32MX board from PCB Logic Design Co.
This board features the MicroChip PIC32MX460F512L.
The board is a very simple -- little more than a carrier for the PIC32
MCU plus voltage regulation, debug interface, and an OTG connector.
STATUS: Code complete but testing has been stalled due to tool related problems
(PICkit 2 does not work with the PIC32).
config ARCH_BOARD_PIC32_STARTERKIT
bool "Microchip PIC32 Ethernet Starter Kit (DM320004)"
depends on ARCH_CHIP_PIC32MX795F512L
---help---
This is the port of NuttX to the Microchip PIC32 Ethernet Starter Kit
(DM320004) with the Multimedia Expansion Board (MEB, DM320005).
See www.microchip.com for further information.
config ARCH_BOARD_PIC32_PIC32MX7MMB
bool "Mikroelektronika PIC32MX7 MMB"
depends on ARCH_CHIP_PIC32MX795F512L
---help---
This is the port NuttX to the Mikroelektronika PIC32MX7 Multimedia Board
(MMB). See http://www.mikroe.com/ for further information.
config ARCH_BOARD_PJRC_87C52
bool "PJRC 87C52 development system"
depends on ARCH_CHIP_8052
---help---
8051 Microcontroller. This port uses the PJRC 87C52 development system
and the SDCC toolchain. This port is not quite ready for prime time.
config ARCH_BOARD_QEMU_I486
bool "Qemu i486 Mode"
depends on ARCH_QEMU
---help---
Port of NuttX to QEMU in i486 mode. This port will also run on real i486
hardwared (Google the Bifferboard).
config ARCH_BOARD_RGMP
bool "RGMP"
depends on ARCH_RGMP
---help---
RGMP stands for RTOS and GPOS on Multi-Processor. RGMP is a project for
running GPOS and RTOS simultaneously on multi-processor platforms. You can
port your favorite RTOS to RGMP together with an unmodified Linux to form a
hybrid operating system. This makes your application able to use both RTOS
and GPOS features.
See http://rgmp.sourceforge.net/wiki/index.php/Main_Page for further information
about RGMP.
config ARCH_BOARD_SAM3UEK
bool "Atmel SAM3U-EK development board"
depends on ARCH_CHIP_AT91SAM3U4E
---help---
The port of NuttX to the Atmel SAM3U-EK development board.
config ARCH_BOARD_SKP16C26
bool "Renesas SKP16C26 StarterKit"
depends on ARCH_CHIP_M30262F8
---help---
Renesas M16C processor on the Renesas SKP16C26 StarterKit. This port
uses the GNU m32c toolchain. STATUS: The port is complete but untested
due to issues with compiler internal errors.
config ARCH_BOARD_STM3210E_EVAL
bool "STMicro STM3210E-EVAL development board"
depends on ARCH_CHIP_STM32F103ZET6
---help---
STMicro STM3210E-EVAL development board based on the STMicro STM32F103ZET6
microcontroller (ARM Cortex-M3). This port uses the GNU Cortex-M3
toolchain.
config ARCH_BOARD_STM3220G_EVAL
bool "STMicro STM3220G-EVAL development board"
depends on ARCH_CHIP_STM32F207IG
---help---
STMicro STM3220G-EVAL development board based on the STMicro STM32F407IG
microcontroller (ARM Cortex-M3).
config ARCH_BOARD_STM3240G_EVAL
bool "STMicro STM3240G-EVAL development board"
depends on ARCH_CHIP_STM32F407IG
---help---
STMicro STM3240G-EVAL development board based on the STMicro STM32F103ZET6
microcontroller (ARM Cortex-M4 with FPU). This port uses a GNU Cortex-M4
toolchain (such as CodeSourcery).
config ARCH_BOARD_STM32F4_DISCOVERY
bool "STMicro STM32F4-Discovery board"
depends on ARCH_CHIP_STM32F407VG
---help---
STMicro STM32F4-Discovery board boased on the STMIcro STM32F407VGT6 MCU.
config ARCH_BOARD_SUREPIC32MX
bool "Sure PIC32MX boards"
depends on ARCH_CHIP_PIC32MX440F512H
---help---
The "Advanced USB Storage Demo Board," Model DB-DP11215, from Sure
Electronics (http://www.sureelectronics.net/). This board features
the MicroChip PIC32MX440F512H. See also
http://www.sureelectronics.net/goods.php?id=1168 for further
information about the Sure DB-DP11215 board.
config ARCH_BOARD_TEENSY
bool "PJRC Teensy++ 2.0 board"
depends on ARCH_CHIP_AT90USB1286
---help---
This is the port of NuttX to the PJRC Teensy++ 2.0 board. This board is
developed by http://pjrc.com/teensy/. The Teensy++ 2.0 is based
on an Atmel AT90USB1286 MCU.
config ARCH_BOARD_TWR_K60N512
bool "FreeScale TWR-K60N512d evelopment board"
depends on ARCH_CHIP_MK60N512VMD100
---help---
Kinetis K60 Cortex-M4 MCU. This port uses the FreeScale TWR-K60N512
development board.
config ARCH_BOARD_UBW32
bool "UBW32 v2.4 board from Sparkfun"
depends on ARCH_CHIP_PIC32MX460F512L
---help---
This is the port to the Sparkfun UBW32 board. This port uses the original v2.4
board which is based on the MicroChip PIC32MX460F512L. See
http://www.sparkfun.com/products/8971. This older version has been replaced
with this board http://www.sparkfun.com/products/9713. See also
http://www.schmalzhaus.com/UBW32/.
config ARCH_BOARD_US7032EVB1
bool "Hitachi SH-1/US7032EVB1 board"
depends on ARCH_CHIP_SH7032
---help---
This is a port of the Hitachi SH-1 on the Hitachi SH-1/US7032EVB1 board.
STATUS: Work has just began on this port.
config ARCH_BOARD_VSN
bool "SOTEL NetClamps VSN sensor network platform"
depends on ARCH_CHIP_STM32F103RET6
---help---
ISOTEL NetClamps VSN V1.2 ready2go sensor network platform based on the
STMicro STM32F103RET6. Contributed by Uros Platise. See
http://isotel.eu/NetClamps/
config ARCH_BOARD_XTRS
bool "XTRS TRS80 Model 3 emulation"
depends on ARCH_CHIP_Z80
---help---
TRS80 Model 3. This port uses a vintage computer based on the Z80.
An emulator for this computer is available to run TRS80 programs on a
linux platform (http://www.tim-mann.org/xtrs.html).
config ARCH_BOARD_Z16F2800100ZCOG
bool "Zilog Z16F2800100ZCOG Development Kit"
depends on ARCH_CHIP_Z16F281
---help---
z16f Microcontroller. This port use the ZiLIG z16f2800100zcog
development kit and the Zilog ZDS-II Windows command line tools. The
development environment is Cygwin under WinXP.
config ARCH_BOARD_Z80SIM
bool "Z80 Instruction Set Simulator"
depends on ARCH_CHIP_Z80
---help---
z80 Microcontroller. This port uses a Z80 instruction set simulator.
That simulator can be found in the NuttX SVN at
http://nuttx.svn.sourceforge.net/viewvc/nuttx/trunk/misc/sims/z80sim.
This port also uses the SDCC toolchain (http://sdcc.sourceforge.net/")
(verified with version 2.6.0).
config ARCH_BOARD_Z8ENCORE000ZCO
bool "ZiLOG z8encore000zco Development Kit"
depends on ARCH_CHIP_Z8F6403
---help---
z8Encore! Microcontroller. This port use the ZiLOG z8encore000zco
development kit, Z8F6403 part, and the Zilog ZDS-II Windows command line
tools. The development environment is Cygwin under WinXP.
config ARCH_BOARD_Z8F64200100KI
bool "ZiLOG Z8F64200100KIT Development Kit"
depends on ARCH_CHIP_Z8F642X
---help---
z8Encore! Microcontroller. This port use the Zilog z8f64200100kit
development kit, Z8F6423 part, and the Zilog ZDS-II Windows command line
tools. The development environment is Cygwin under WinXP.
config ARCH_BOARD_SIM
bool "User mode simulation"
depends on ARCH_SIM
---help---
A user-mode port of NuttX to the x86 Linux/Cygwin platform is available.
The purpose of this port is primarily to support OS feature development.
This port does not support interrupts or a real timer (and hence no
round robin scheduler) Otherwise, it is complete.
config ARCH_BOARD_CUSTOM
bool "Custom development board"
---help---
Select this option if there is no directory for the board under configs/.
Don't see the board you want? You must first select the exact MCU part
number, then the boards supporting that part will be available for selection.
PX4 system I/O expansion board
endchoice
config ARCH_BOARD
string
default "amber" if ARCH_BOARD_AMBER
default "avr32dev1" if ARCH_BOARD_AVR32DEV1
default "c5471evm" if ARCH_BOARD_C5471EVM
default "compal_e88" if ARCH_BOARD_COMPALE88
default "compal_e99" if ARCH_BOARD_COMPALE99
default "demo9s12ne64" if ARCH_BOARD_DEMOS92S12NEC64
default "ea3131" if ARCH_BOARD_EA3131
default "ea3152" if ARCH_BOARD_EA3152
default "eagle100" if ARCH_BOARD_EAGLE100
default "ekk-lm3s9b96" if ARCH_BOARD_EKK_LM3S9B96
default "ez80f0910200kitg" if ARCH_BOARD_EZ80F910200KITG
default "ez80f0910200zco" if ARCH_BOARD_EZ80F910200ZCO
default "hymini-stm32v" if ARCH_BOARD_HYMINI_STM32V
default "kwikstik-k40" if ARCH_BOARD_KWIKSTIK_K40
default "lincoln60" if ARCH_BOARD_LINCOLN60
default "lm3s6432-s2e" if ARCH_BOARD_LM3S6432S2E
default "lm3s6965-ek" if ARCH_BOARD_LM3S6965EK
default "lm3s8962-ek" if ARCH_BOARD_LM3S8962EK
default "lpc4330-xplorer" if ARCH_BOARD_LPC4330_XPLORER
default "lpcxpresso-lpc1768" if ARCH_BOARD_LPCXPRESSO
default "m68322evb" if ARCH_BOARD_M68332EVB
default "mbed" if ARCH_BOARD_MBED
default "mcu123-lpc214x" if ARCH_BOARD_MCU123
default "micropendous3" if ARCH_BOARD_MICROPENDOUS
default "mirtoo" if ARCH_BOARD_MIRTOO
default "mx1ads" if ARCH_BOARD_MX1ADS
default "ne64badge" if ARCH_BOARD_NE64BADGE
default "ntosd-dm320" if ARCH_BOARD_NTOSD_DM320
default "nucleus2g" if ARCH_BOARD_NUCLEUS2G
default "olimex-lpc1766stk" if ARCH_BOARD_LPC1766STK
default "olimex-lpc2378" if ARCH_BOARD_OLIMEXLPC2378
default "olimex-strp711" if ARCH_BOARD_OLIMEX_STRP711
default "pcblogic-pic32mx" if ARCH_BOARD_PCBLOGICPIC32MX
default "pic32-starterkit" if ARCH_BOARD_PIC32_STARTERKIT
default "pic32mx7mmb" if ARCH_BOARD_PIC32_PIC32MX7MMB
default "pjrc-8051" if ARCH_BOARD_PJRC_87C52
default "qemu-i486" if ARCH_BOARD_QEMU_I486
default "rgmp" if ARCH_BOARD_RGMP
default "sam3u-ek" if ARCH_BOARD_SAM3UEK
default "skp16c26" if ARCH_BOARD_SKP16C26
default "stm3210e-eval" if ARCH_BOARD_STM3210E_EVAL
default "stm3220g-eval" if ARCH_BOARD_STM3220G_EVAL
default "stm3240g-eval" if ARCH_BOARD_STM3240G_EVAL
default "stm32f4discovery" if ARCH_BOARD_STM32F4_DISCOVERY
default "sure-pic32mx" if ARCH_BOARD_SUREPIC32MX
default "teensy" if ARCH_BOARD_TEENSY
default "twr-k60n512" if ARCH_BOARD_TWR_K60N512
default "ubw32" if ARCH_BOARD_UBW32
default "us7032evb1" if ARCH_BOARD_US7032EVB1
default "vsn" if ARCH_BOARD_VSN
default "xtrs" if ARCH_BOARD_XTRS
default "z16f2800100zcog" if ARCH_BOARD_Z16F2800100ZCOG
default "z80sim" if ARCH_BOARD_Z80SIM
default "z8encore000zco" if ARCH_BOARD_Z8ENCORE000ZCO
default "z8f64200100kit" if ARCH_BOARD_Z8F64200100KI
default "sim" if ARCH_BOARD_SIM
default "px4fmu" if ARCH_BOARD_PX4FMU
default "px4io" if ARCH_BOARD_PX4IO
default "" if ARCH_BOARD_CUSTOM
if ARCH_BOARD_AMBER
source "configs/amber/Kconfig"
if ARCH_BOARD_PX4FMU
source "configs/px4fmu/Kconfig"
endif
if ARCH_BOARD_AVR32DEV1
source "configs/avr32dev1/Kconfig"
endif
if ARCH_BOARD_C5471EVM
source "configs/c5471evm/Kconfig"
endif
if ARCH_BOARD_COMPALE88
source "configs/compal_e88/Kconfig"
endif
if ARCH_BOARD_COMPALE99
source "configs/compal_e99/Kconfig"
endif
if ARCH_BOARD_DEMOS92S12NEC64
source "configs/demo9s12ne64/Kconfig"
endif
if ARCH_BOARD_EA3131
source "configs/ea3131/Kconfig"
endif
if ARCH_BOARD_EA3152
source "configs/ea3152/Kconfig"
endif
if ARCH_BOARD_EAGLE100
source "configs/eagle100/Kconfig"
endif
if ARCH_BOARD_EKK_LM3S9B96
source "configs/ekk-lm3s9b96/Kconfig"
endif
if ARCH_BOARD_EZ80F910200KITG
source "configs/ez80f910200kitg/Kconfig"
endif
if ARCH_BOARD_EZ80F910200ZCO
source "configs/ez80f910200zco/Kconfig"
endif
if ARCH_BOARD_HYMINI_STM32V
source "configs/hymini-stm32v/Kconfig"
endif
if ARCH_BOARD_KWIKSTIK_K40
source "configs/kwikstik-k40/Kconfig"
endif
if ARCH_BOARD_LINCOLN60
source "configs/lincoln60/Kconfig"
endif
if ARCH_BOARD_LM3S6432S2E
source "configs/lm3s6432-s2e/Kconfig"
endif
if ARCH_BOARD_LM3S6965EK
source "configs/lm3s6965-ek/Kconfig"
endif
if ARCH_BOARD_LM3S8962EK
source "configs/lm3s8962-ek/Kconfig"
endif
if ARCH_BOARD_LPC4330_XPLORER
source "configs/lpc4330-xplorer/Kconfig"
endif
if ARCH_BOARD_LPCXPRESSO
source "configs/lpcxpresso-lpc1768/Kconfig"
endif
if ARCH_BOARD_M68332EVB
source "configs/m68332evb/Kconfig"
endif
if ARCH_BOARD_MBED
source "configs/mbed/Kconfig"
endif
if ARCH_BOARD_MCU123
source "configs/mcu123-lpc214x/Kconfig"
endif
if ARCH_BOARD_MICROPENDOUS
source "configs/micropendous3/Kconfig"
endif
if ARCH_BOARD_MIRTOO
source "configs/mirtoo/Kconfig"
endif
if ARCH_BOARD_MX1ADS
source "configs/mx1ads/Kconfig"
endif
if ARCH_BOARD_NE64BADGE
source "configs/ne64badge/Kconfig"
endif
if ARCH_BOARD_NTOSD_DM320
source "configs/ntosd-dm320/Kconfig"
endif
if ARCH_BOARD_NUCLEUS2G
source "configs/nucleus2g/Kconfig"
endif
if ARCH_BOARD_LPC1766STK
source "configs/olimex-lpc1766stk/Kconfig"
endif
if ARCH_BOARD_OLIMEXLPC2378
source "configs/olimex-lpc2378/Kconfig"
endif
if ARCH_BOARD_OLIMEX_STRP711
source "configs/olimex-strp711/Kconfig"
endif
if ARCH_BOARD_PCBLOGICPIC32MX
source "configs/pcblogic-pic32mx/Kconfig"
endif
if ARCH_BOARD_PIC32_STARTERKIT
source "configs/pic32-starterkit/Kconfig"
endif
if ARCH_BOARD_PIC32_PIC32MX7MMB
source "configs/pic32mx7mmb/Kconfig"
endif
if ARCH_BOARD_PJRC_87C52
source "configs/pjrc-8051/Kconfig"
endif
if ARCH_BOARD_QEMU_I486
source "configs/qemu-i486/Kconfig"
endif
if ARCH_BOARD_RGMP
source "configs/rgmp/Kconfig"
endif
if ARCH_BOARD_SAM3UEK
source "configs/sam3u-ek/Kconfig"
endif
if ARCH_BOARD_SKP16C26
source "configs/skp16c26/Kconfig"
endif
if ARCH_BOARD_STM3210E_EVAL
source "configs/stm3210e-eval/Kconfig"
endif
if ARCH_BOARD_STM3220G_EVAL
source "configs/stm3220g-eval/Kconfig"
endif
if ARCH_BOARD_STM3240G_EVAL
source "configs/stm3240g-eval/Kconfig"
endif
if ARCH_BOARD_STM32F4_DISCOVERY
source "configs/stm32f4discovery/Kconfig"
endif
if ARCH_BOARD_SUREPIC32MX
source "configs/sure-pic32mx/Kconfig"
endif
if ARCH_BOARD_TEENSY
source "configs/teensy/Kconfig"
endif
if ARCH_BOARD_TWR_K60N512
source "configs/twr-k60n512/Kconfig"
endif
if ARCH_BOARD_UBW32
source "configs/ubw32/Kconfig"
endif
if ARCH_BOARD_US7032EVB1
source "configs/us7032evb1/Kconfig"
endif
if ARCH_BOARD_VSN
source "configs/vsn/Kconfig"
endif
if ARCH_BOARD_XTRS
source "configs/xtrs/Kconfig"
endif
if ARCH_BOARD_Z16F2800100ZCOG
source "configs/z16f2800100zcog/Kconfig"
endif
if ARCH_BOARD_Z80SIM
source "configs/z80sim/Kconfig"
endif
if ARCH_BOARD_Z8ENCORE000ZCO
source "configs/z8encore000zco/Kconfig"
endif
if ARCH_BOARD_Z8F64200100KI
source "configs/z8f64200100kit/Kconfig"
endif
if ARCH_BOARD_SIM
source "configs/sim/Kconfig"
if ARCH_BOARD_PX4IO
source "configs/px4io/Kconfig"
endif
+26
View File
@@ -0,0 +1,26 @@
#
# For a description of the syntax of this configuration file,
# see misc/tools/kconfig-language.txt.
#
if ARCH_BOARD_PX4FMU
config ARCH_LEDS
bool "NuttX LED support"
default n
---help---
"Support control of board LEDs by NuttX to indicate system state"
config ARCH_BUTTONS
bool "Button support"
default n
---help---
"Support interfaces to use buttons provided by the board."
config ARCH_IRQBUTTONS
bool "Button interrupt support"
default n
depends on ARCH_BUTTONS
---help---
"Support EXTI interrupts on button presses and releases."
endif
+1 -1
View File
@@ -106,7 +106,7 @@
#define STM32_PLLCFG_PLLM RCC_PLLCFG_PLLM(24)
#define STM32_PLLCFG_PLLN RCC_PLLCFG_PLLN(336)
#define STM32_PLLCFG_PLLP RCC_PLLCFG_PLLP_2
#define STM32_PLLCFG_PPQ RCC_PLLCFG_PLLQ(7)
#define STM32_PLLCFG_PLLQ RCC_PLLCFG_PLLQ(7)
#define STM32_SYSCLK_FREQUENCY 168000000ul
+1 -1
View File
@@ -1,3 +1,3 @@
include ${TOPDIR}/.config
include $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/common/Make.defs
include $(TOPDIR)/configs/px4fmu/common/Make.defs
-3
View File
@@ -63,10 +63,7 @@ CONFIGURED_APPS += systemcmds/eeprom
CONFIGURED_APPS += uORB
ifeq ($(CONFIG_MAVLINK),y)
CONFIGURED_APPS += mavlink
endif
CONFIGURED_APPS += gps
CONFIGURED_APPS += commander
#CONFIGURED_APPS += sdlog
+112 -156
View File
@@ -1,7 +1,8 @@
############################################################################
# configs/px4fmu/nsh/defconfig
#
# Copyright (C) 2011 Gregory Nutt. All rights reserved.
# Copyright (C) 2012 PX4 Development Team. All rights reserved.
# Copyright (C) 2011-2012 Gregory Nutt. All rights reserved.
# Author: Gregory Nutt <gnutt@nuttx.org>
#
# Redistribution and use in source and binary forms, with or without
@@ -41,7 +42,7 @@
# particular chip family that the architecture is implemented
# in.
# CONFIG_ARCH_architecture - for use in C code. This identifies the
# specific architecture within the chip familyl.
# specific architecture within the chip family.
# CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory
# CONFIG_ARCH_CHIP_name - For use in C code
# CONFIG_ARCH_BOARD - identifies the configs subdirectory and, hence,
@@ -51,7 +52,6 @@
# CONFIG_BOARD_LOOPSPERMSEC - for delay loops
# CONFIG_DRAM_SIZE - Describes the installed DRAM.
# CONFIG_DRAM_START - The start address of DRAM (physical)
# CONFIG_DRAM_END - Last address+1 of installed RAM
# CONFIG_ARCH_IRQPRIO - The STM3240xxx supports interrupt prioritization
# CONFIG_ARCH_FPU - The STM3240xxx supports a floating point unit (FPU).
# CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt
@@ -70,17 +70,16 @@
# the delay actually is 100 seconds.
# CONFIG_ARCH_DMA - Support DMA initialization
#
CONFIG_ARCH=arm
CONFIG_ARCH="arm"
CONFIG_ARCH_ARM=y
CONFIG_ARCH_CORTEXM4=y
CONFIG_ARCH_CHIP=stm32
CONFIG_ARCH_CHIP="stm32"
CONFIG_ARCH_CHIP_STM32F405RG=y
CONFIG_ARCH_BOARD=px4fmu
CONFIG_ARCH_BOARD="px4fmu"
CONFIG_ARCH_BOARD_PX4FMU=y
CONFIG_BOARD_LOOPSPERMSEC=16717
CONFIG_DRAM_SIZE=0x00030000
CONFIG_DRAM_START=0x20000000
CONFIG_DRAM_END=(CONFIG_DRAM_START+CONFIG_DRAM_SIZE)
CONFIG_ARCH_IRQPRIO=y
CONFIG_ARCH_FPU=y
CONFIG_ARCH_INTERRUPTSTACK=n
@@ -94,25 +93,8 @@ CONFIG_ARCH_MATH_H=y
CONFIG_ARMV7M_CMNVECTOR=y
#
# LIBC printf() options
#
# CONFIG_LIBC_FLOATINGPOINT - Enables printf("%f")
# CONFIG_LIBC_FIXEDPRECISION - Sets 7 digits after dot for printing:
# 5.1234567
# CONFIG_HAVE_LONG_LONG - Enabled printf("%llu)
#
CONFIG_LIBC_FLOATINGPOINT=y
CONFIG_HAVE_LONG_LONG=y
#CONFIG_LIBC_FIXEDPRECISION=7
#
# CMSIS options
#
# CONFIG_DSPLIB_TARGET - Target for the CMSIS DSP library, one of
# CortexM0, CortexM3 or CortexM4 (with fpu)
#
CONFIG_CMSIS_DSPLIB_TARGET=CortexM4
#
# JTAG Enable settings (by default JTAG-DP and SW-DP are enabled):
@@ -131,6 +113,14 @@ CONFIG_STM32_JTAG_FULL_ENABLE=y
CONFIG_STM32_JTAG_NOJNTRST_ENABLE=n
CONFIG_STM32_JTAG_SW_ENABLE=n
#
# On-chip CCM SRAM configuration
#
# CONFIG_STM32_CCMEXCLUDE - Exclude CCM SRAM from the HEAP. You would need
# to do this if DMA is enabled to prevent non-DMA-able CCM memory from
# being a part of the stack.
#
#
# On-board FSMC SRAM configuration
#
@@ -181,6 +171,7 @@ CONFIG_STM32_TIM12=y
CONFIG_STM32_TIM13=y
CONFIG_STM32_TIM14=y
CONFIG_STM32_WWDG=y
CONFIG_STM32_IWDG=n
CONFIG_STM32_SPI2=n
CONFIG_STM32_SPI3=y
CONFIG_STM32_USART2=y
@@ -211,40 +202,6 @@ CONFIG_STM32_TIM9=y
CONFIG_STM32_TIM10=y
CONFIG_STM32_TIM11=y
#
# Configure the ADC
#
CONFIG_ADC=y
# select trigger timer
CONFIG_STM32_TIM4_ADC3=y
# select sample frequency 1^=1.5Msamples/second
# 65535^=10samples/second 16bit-timer runs at 84/128 MHz
CONFIG_STM32_ADC3_SAMPLE_FREQUENCY=6000
# select timer channel 0=CC1,...,3=CC4
CONFIG_STM32_ADC3_TIMTRIG=3
CONFIG_ADC_DMA=y
# only 4 places usable!
CONFIG_ADC_FIFOSIZE=5
#
# Timer and I2C devices may need to the following to force power to be applied:
#
#CONFIG_STM32_FORCEPOWER=y
#
# I2C configuration
#
CONFIG_I2C=y
CONFIG_I2C_POLLED=y
CONFIG_I2C_TRANSFER=y
CONFIG_I2C_WRITEREAD=y
CONFIG_I2C_TRACE=n
# Allow 180 us per byte, a wide margin for the 400 KHz clock we're using
# e.g. 9.6 ms for an EEPROM page write, 0.9 ms for a MAG update
CONFIG_STM32_I2CTIMEOUS_PER_BYTE=200
# Constant overhead for generating I2C start / stop conditions
CONFIG_STM32_I2CTIMEOUS_START_STOP=700
CONFIG_DEBUG_I2C=n
#
# Enable the MTD driver for the onboard I2C EEPROM
@@ -367,13 +324,6 @@ CONFIG_TONE_ALARM=y
CONFIG_PWM_SERVO=n
CONFIG_MULTIPORT=n
#
# CONFIG_UART2_RTS_CTS_AS_GPIO
# If set, enables RTS and CTS pins as additional GPIOs 2 and 3
#
CONFIG_PX4_UART2_RTS_CTS_AS_GPIO=y
#
# STM32F40xxx specific SPI device driver settings
#
@@ -386,6 +336,8 @@ CONFIG_SPI_EXCHANGE=y
#
# CONFIG_CAN - Enables CAN support (one or both of CONFIG_STM32_CAN1 or
# CONFIG_STM32_CAN2 must also be defined)
# CONFIG_CAN_EXTID - Enables support for the 29-bit extended ID. Default
# Standard 11-bit IDs.
# CONFIG_CAN_FIFOSIZE - The size of the circular buffer of CAN messages.
# Default: 8
# CONFIG_CAN_NPENDINGRTR - The size of the list of pending RTR requests.
@@ -394,14 +346,53 @@ CONFIG_SPI_EXCHANGE=y
# mode for testing. The STM32 CAN driver does support loopback mode.
# CONFIG_CAN1_BAUD - CAN1 BAUD rate. Required if CONFIG_STM32_CAN1 is defined.
# CONFIG_CAN2_BAUD - CAN1 BAUD rate. Required if CONFIG_STM32_CAN2 is defined.
# CONFIG_CAN_TSEG1 - The number of CAN time quanta in segment 1. Default: 6
# CONFIG_CAN_TSEG2 - the number of CAN time quanta in segment 2. Default: 7
#
CONFIG_CAN=n
CONFIG_CAN_EXTID=n
#CONFIG_CAN_FIFOSIZE
#CONFIG_CAN_NPENDINGRTR
CONFIG_CAN_LOOPBACK=n
CONFIG_CAN1_BAUD=700000
CONFIG_CAN2_BAUD=700000
#
# I2C configuration
#
CONFIG_I2C=y
CONFIG_I2C_POLLED=y
CONFIG_I2C_TRANSFER=y
CONFIG_I2C_TRACE=n
# Allow 180 us per byte, a wide margin for the 400 KHz clock we're using
# e.g. 9.6 ms for an EEPROM page write, 0.9 ms for a MAG update
CONFIG_STM32_I2CTIMEOUS_PER_BYTE=200
# Constant overhead for generating I2C start / stop conditions
CONFIG_STM32_I2CTIMEOUS_START_STOP=700
# XXX this is bad and we want it gone
CONFIG_I2C_WRITEREAD=y
#
# ADC configuration
#
# Enable ADC driver support.
#
# CONFIG_ADC=y : Enable the generic ADC infrastructure
# CONFIG_STM32_TIM1_ADC=y : Indicate that timer 1 will be used to trigger an ADC
# CONFIG_STM32_TIM1_ADC3=y : Assign timer 1 to drive ADC3 sampling
# CONFIG_STM32_ADC3_SAMPLE_FREQUENCY=100 : Select a sampling frequency
#
CONFIG_ADC=y
CONFIG_STM32_TIM4_ADC3=y
# select sample frequency 1^=1.5Msamples/second
# 65535^=10samples/second 16bit-timer runs at 84/128 MHz
CONFIG_STM32_ADC3_SAMPLE_FREQUENCY=6000
# select timer channel 0=CC1,...,3=CC4
CONFIG_STM32_ADC3_TIMTRIG=3
CONFIG_ADC_DMA=y
# only 4 places usable!
CONFIG_ADC_FIFOSIZE=5
#
# General build options
#
@@ -419,7 +410,7 @@ CONFIG_CAN2_BAUD=700000
# CONFIG_HAVE_LIBM - toolchain supports libm.a
#
CONFIG_RRLOAD_BINARY=n
CONFIG_INTELHEX_BINARY=y
CONFIG_INTELHEX_BINARY=n
CONFIG_MOTOROLA_SREC=n
CONFIG_RAW_BINARY=y
CONFIG_HAVE_LIBM=y
@@ -434,6 +425,9 @@ CONFIG_HAVE_LIBM=y
# CONFIG_DEBUG_SYMBOLS - build without optimization and with
# debug symbols (needed for use with a debugger).
# CONFIG_HAVE_CXX - Enable support for C++
# CONFIG_HAVE_CXXINITIALIZE - The platform-specific logic includes support
# for initialization of static C++ instances for this architecture
# and for the selected toolchain (via up_cxxinitialize()).
# CONFIG_MM_REGIONS - If the architecture includes multiple
# regions of memory to allocate from, this specifies the
# number of memory regions that the memory manager must
@@ -508,7 +502,7 @@ CONFIG_HAVE_LIBM=y
# CONFIG_SCHED_WORKPRIORITY - The execution priority of the worker
# thread. Default: 50
# CONFIG_SCHED_WORKPERIOD - How often the worker thread checks for
# work in units of microseconds. Default: 50*1000 (50 MS).
# work in units of microseconds. Default: 50000 (50 MS).
# CONFIG_SCHED_WORKSTACKSIZE - The stack size allocated for the worker
# thread. Default: CONFIG_IDLETHREAD_STACKSIZE.
# CONFIG_SIG_SIGWORK - The signal number that will be used to wake-up
@@ -520,14 +514,20 @@ CONFIG_HAVE_LIBM=y
CONFIG_DEBUG=y
CONFIG_DEBUG_VERBOSE=y
CONFIG_DEBUG_SYMBOLS=y
CONFIG_DEBUG_ANALOG=n
CONFIG_DEBUG_FS=n
CONFIG_DEBUG_GRAPHICS=n
CONFIG_DEBUG_LCD=n
CONFIG_DEBUG_USB=n
CONFIG_DEBUG_NET=n
CONFIG_DEBUG_RTC=n
CONFIG_DEBUG_ANALOG=n
CONFIG_DEBUG_PWM=n
CONFIG_DEBUG_CAN=n
CONFIG_DEBUG_I2C=n
CONFIG_DEBUG_INPUT=n
CONFIG_HAVE_CXX=y
CONFIG_HAVE_CXXINITIALIZE=n
CONFIG_MM_REGIONS=2
CONFIG_ARCH_LOWPUTC=y
CONFIG_MSEC_PER_TICK=1
@@ -549,13 +549,45 @@ CONFIG_FDCLONE_DISABLE=n
CONFIG_FDCLONE_STDIO=y
CONFIG_SDCLONE_DISABLE=y
CONFIG_SCHED_WORKQUEUE=y
CONFIG_SCHED_WORKPRIORITY=199
CONFIG_SCHED_WORKPERIOD=(5*1000)
CONFIG_SCHED_WORKPRIORITY=192
CONFIG_SCHED_WORKPERIOD=5000
CONFIG_SCHED_WORKSTACKSIZE=2048
CONFIG_SIG_SIGWORK=4
CONFIG_SCHED_WAITPID=y
CONFIG_SCHED_ATEXIT=n
#
# System Logging
#
# CONFIG_SYSLOG - Enables the System Logging feature.
# CONFIG_RAMLOG - Enables the RAM logging feature
# CONFIG_RAMLOG_CONSOLE - Use the RAM logging device as a system console.
# If this feature is enabled (along with CONFIG_DEV_CONSOLE), then all
# console output will be re-directed to a circular buffer in RAM. This
# is useful, for example, if the only console is a Telnet console. Then
# in that case, console output from non-Telnet threads will go to the
# circular buffer and can be viewed using the NSH 'dmesg' command.
# CONFIG_RAMLOG_SYSLOG - Use the RAM logging device for the syslogging
# interface. If this feature is enabled (along with CONFIG_SYSLOG),
# then all debug output (only) will be re-directed to the circular
# buffer in RAM. This RAM log can be view from NSH using the 'dmesg'
# command.
# CONFIG_RAMLOG_NPOLLWAITERS - The number of threads than can be waiting
# for this driver on poll(). Default: 4
#
# If CONFIG_RAMLOG_CONSOLE or CONFIG_RAMLOG_SYSLOG is selected, then the
# following may also be provided:
#
# CONFIG_RAMLOG_CONSOLE_BUFSIZE - Size of the console RAM log. Default: 1024
#
CONFIG_SYSLOG=n
CONFIG_RAMLOG=n
CONFIG_RAMLOG_CONSOLE=n
CONFIG_RAMLOG_SYSLOG=n
#CONFIG_RAMLOG_NPOLLWAITERS
#CONFIG_RAMLOG_CONSOLE_BUFSIZE
#
# The following can be used to disable categories of
# APIs supported by the OS. If the compiler supports
@@ -585,8 +617,14 @@ CONFIG_DISABLE_POLL=n
#
# CONFIG_NOPRINTF_FIELDWIDTH - sprintf-related logic is a
# little smaller if we do not support fieldwidthes
# CONFIG_LIBC_FLOATINGPOINT - Enables printf("%f")
# CONFIG_LIBC_FIXEDPRECISION - Sets 7 digits after dot for printing:
# 5.1234567
# CONFIG_HAVE_LONG_LONG - Enabled printf("%llu)
#
CONFIG_NOPRINTF_FIELDWIDTH=n
CONFIG_LIBC_FLOATINGPOINT=y
CONFIG_HAVE_LONG_LONG=y
#
# Allow for architecture optimized implementations
@@ -802,42 +840,6 @@ CONFIG_USBDEV_MAXPOWER=500
CONFIG_USBDEV_TRACE=n
CONFIG_USBDEV_TRACE_NRECORDS=512
#
# USB Serial Device Configuration (Prolifics PL2303 emulation)
#
# CONFIG_PL2303
# Enable compilation of the USB serial driver
# CONFIG_PL2303_EPINTIN
# The logical 7-bit address of a hardware endpoint that supports
# interrupt IN operation
# CONFIG_PL2303_EPBULKOUT
# The logical 7-bit address of a hardware endpoint that supports
# bulk OUT operation
# CONFIG_PL2303_EPBULKIN
# The logical 7-bit address of a hardware endpoint that supports
# bulk IN operation
# # CONFIG_PL2303_NWRREQS and CONFIG_PL2303_NRDREQS
# The number of write/read requests that can be in flight
# CONFIG_PL2303_VENDORID and CONFIG_PL2303_VENDORSTR
# The vendor ID code/string
# CONFIG_PL2303_PRODUCTID and CONFIG_PL2303_PRODUCTSTR
# The product ID code/string
# CONFIG_PL2303_RXBUFSIZE and CONFIG_PL2303_TXBUFSIZE
# Size of the serial receive/transmit buffers
#
CONFIG_PL2303=n
CONFIG_PL2303_EPINTIN=1
CONFIG_PL2303_EPBULKOUT=2
CONFIG_PL2303_EPBULKIN=3
CONFIG_PL2303_NWRREQS=4
CONFIG_PL2303_NRDREQS=4
CONFIG_PL2303_VENDORID=0x067b
CONFIG_PL2303_PRODUCTID=0x2303
CONFIG_PL2303_VENDORSTR="Nuttx"
CONFIG_PL2303_PRODUCTSTR="USBdev Serial"
CONFIG_PL2303_RXBUFSIZE=512
CONFIG_PL2303_TXBUFSIZE=512
#
# USB serial device class driver (Standard CDC ACM class)
#
@@ -910,44 +912,6 @@ CONFIG_CDCACM_PRODUCTSTR="PX4 FMU v1.6"
#CONFIG_CDCACM_RXBUFSIZE
#CONFIG_CDCACM_TXBUFSIZE
#
# USB Storage Device Configuration
#
# CONFIG_USBMSC
# Enable compilation of the USB storage driver
# CONFIG_USBMSC_EP0MAXPACKET
# Max packet size for endpoint 0
# CONFIG_USBMSC_EPBULKOUT and CONFIG_USBMSC_EPBULKIN
# The logical 7-bit address of a hardware endpoints that support
# bulk OUT and IN operations
# CONFIG_USBMSC_NWRREQS and CONFIG_USBMSC_NRDREQS
# The number of write/read requests that can be in flight
# CONFIG_USBMSC_BULKINREQLEN and CONFIG_USBMSC_BULKOUTREQLEN
# The size of the buffer in each write/read request. This
# value needs to be at least as large as the endpoint
# maxpacket and ideally as large as a block device sector.
# CONFIG_USBMSC_VENDORID and CONFIG_USBMSC_VENDORSTR
# The vendor ID code/string
# CONFIG_USBMSC_PRODUCTID and CONFIG_USBMSC_PRODUCTSTR
# The product ID code/string
# CONFIG_USBMSC_REMOVABLE
# Select if the media is removable
#
CONFIG_USBMSC=n
CONFIG_USBMSC_EP0MAXPACKET=64
CONFIG_USBMSC_EPBULKOUT=2
CONFIG_USBMSC_EPBULKIN=5
CONFIG_USBMSC_NRDREQS=2
CONFIG_USBMSC_NWRREQS=2
CONFIG_USBMSC_BULKINREQLEN=256
CONFIG_USBMSC_BULKOUTREQLEN=256
CONFIG_USBMSC_VENDORID=0x584e
CONFIG_USBMSC_VENDORSTR="NuttX"
CONFIG_USBMSC_PRODUCTID=0x5342
CONFIG_USBMSC_PRODUCTSTR="USBdev Storage"
CONFIG_USBMSC_VERSIONNO=0x0399
CONFIG_USBMSC_REMOVABLE=y
#
# Settings for apps/nshlib
@@ -958,7 +922,6 @@ CONFIG_USBMSC_REMOVABLE=y
# CONFIG_NSH_FILEIOSIZE - Size of a static I/O buffer
# CONFIG_NSH_STRERROR - Use strerror(errno)
# CONFIG_NSH_LINELEN - Maximum length of one command line
# CONFIG_NSH_STACKSIZE - Stack size to use for new threads.
# CONFIG_NSH_NESTDEPTH - Max number of nested if-then[-else]-fi
# CONFIG_NSH_DISABLESCRIPT - Disable scripting support
# CONFIG_NSH_DISABLEBG - Disable background commands
@@ -1003,9 +966,9 @@ CONFIG_NSH_ARCHINIT=y
CONFIG_NSH_IOBUFFER_SIZE=512
CONFIG_NSH_DHCPC=n
CONFIG_NSH_NOMAC=y
CONFIG_NSH_IPADDR=(10<<24|0<<16|0<<8|2)
CONFIG_NSH_DRIPADDR=(10<<24|0<<16|0<<8|1)
CONFIG_NSH_NETMASK=(255<<24|255<<16|255<<8|0)
CONFIG_NSH_IPADDR=0x0a000002
CONFIG_NSH_DRIPADDR=0x0a000001
CONFIG_NSH_NETMASK=0xffffff00
CONFIG_NSH_ROMFSMOUNTPT="/etc"
CONFIG_NSH_INITSCRIPT="init.d/rcS"
CONFIG_NSH_ROMFSDEVNO=0
@@ -1022,13 +985,6 @@ CONFIG_NSH_MMCSDSPIPORTNO=3
CONFIG_NSH_MMCSDSLOTNO=0
CONFIG_NSH_MMCSDMINOR=0
#
# Settings for mavlink
#
# CONFIG_MAVLINK - Enable MAVLINK app
# CONFIG_NSH_BUILTIN_APPS - Build the ADC test as an NSH built-in function.
# Default: Built as a standalone problem
CONFIG_MAVLINK=y
#
# Stack and heap information
+1 -1
View File
@@ -1,3 +1,3 @@
include ${TOPDIR}/.config
include $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/common/Make.defs
include $(TOPDIR)/configs/px4io/common/Make.defs
+36 -19
View File
@@ -1,7 +1,8 @@
############################################################################
# configs/px4io/nsh/defconfig
#
# Copyright (C) 2009-2012 Gregory Nutt. All rights reserved.
# Copyright (C) 2012 PX4 Development Team. All rights reserved.
# Copyright (C) 2011-2012 Gregory Nutt. All rights reserved.
# Author: Gregory Nutt <gnutt@nuttx.org>
#
# Redistribution and use in source and binary forms, with or without
@@ -41,7 +42,7 @@
# particular chip family that the architecture is implemented
# in.
# CONFIG_ARCH_architecture - for use in C code. This identifies the
# specific architecture within the chip familyl.
# specific architecture within the chip family.
# CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory
# CONFIG_ARCH_CHIP_name - For use in C code
# CONFIG_ARCH_BOARD - identifies the configs subdirectory and, hence,
@@ -51,7 +52,6 @@
# CONFIG_BOARD_LOOPSPERMSEC - for delay loops
# CONFIG_DRAM_SIZE - Describes the installed DRAM.
# CONFIG_DRAM_START - The start address of DRAM (physical)
# CONFIG_DRAM_END - Last address+1 of installed RAM
# CONFIG_ARCH_IRQPRIO - The ST32F100CB supports interrupt prioritization
# CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt
# stack. If defined, this symbol is the size of the interrupt
@@ -69,17 +69,16 @@
# the delay actually is 100 seconds.
# CONFIG_ARCH_DMA - Support DMA initialization
#
CONFIG_ARCH=arm
CONFIG_ARCH="arm"
CONFIG_ARCH_ARM=y
CONFIG_ARCH_CORTEXM3=y
CONFIG_ARCH_CHIP=stm32
CONFIG_ARCH_CHIP="stm32"
CONFIG_ARCH_CHIP_STM32F100C8=y
CONFIG_ARCH_BOARD=px4io
CONFIG_ARCH_BOARD="px4io"
CONFIG_ARCH_BOARD_PX4IO=y
CONFIG_BOARD_LOOPSPERMSEC=2000
CONFIG_DRAM_SIZE=0x00002000
CONFIG_DRAM_START=0x20000000
CONFIG_DRAM_END=(CONFIG_DRAM_START+CONFIG_DRAM_SIZE)
CONFIG_ARCH_IRQPRIO=y
CONFIG_ARCH_INTERRUPTSTACK=n
CONFIG_ARCH_STACKDUMP=y
@@ -109,6 +108,7 @@ CONFIG_STM32_JTAG_SW_ENABLE=n
#
# Individual subsystems can be enabled:
#
# AHB:
CONFIG_STM32_DMA1=n
CONFIG_STM32_DMA2=n
@@ -140,10 +140,6 @@ CONFIG_STM32_TIM8=n
CONFIG_STM32_USART1=y
CONFIG_STM32_ADC3=n
#
# Timer and I2C devices may need to the following to force power to be applied:
#
#CONFIG_STM32_FORCEPOWER=y
#
# STM32F100 specific serial device driver settings
@@ -306,9 +302,6 @@ CONFIG_HAVE_LIBM=n
# CONFIG_SDCLONE_DISABLE. Disable cloning of all socket
# desciptors by task_create() when a new task is started. If
# set, all sockets will appear to be closed in the new task.
# CONFIG_NXFLAT. Enable support for the NXFLAT binary format.
# This format will support execution of NuttX binaries located
# in a ROMFS filesystem (see examples/nxflat).
# CONFIG_SCHED_WORKQUEUE. Create a dedicated "worker" thread to
# handle delayed processing from interrupt handlers. This feature
# is required for some drivers but, if there are not complaints,
@@ -327,11 +320,25 @@ CONFIG_HAVE_LIBM=n
# thread. Default: CONFIG_IDLETHREAD_STACKSIZE.
# CONFIG_SIG_SIGWORK - The signal number that will be used to wake-up
# the worker thread. Default: 4
# CONFIG_SCHED_WAITPID - Enable the waitpid() API
# CONFIG_SCHED_ATEXIT - Enabled the atexit() API
#
#CONFIG_APPS_DIR=
CONFIG_DEBUG=n
CONFIG_DEBUG_VERBOSE=n
CONFIG_DEBUG_SYMBOLS=y
CONFIG_DEBUG_FS=n
CONFIG_DEBUG_GRAPHICS=n
CONFIG_DEBUG_LCD=n
CONFIG_DEBUG_USB=n
CONFIG_DEBUG_NET=n
CONFIG_DEBUG_RTC=n
CONFIG_DEBUG_ANALOG=n
CONFIG_DEBUG_PWM=n
CONFIG_DEBUG_CAN=n
CONFIG_DEBUG_I2C=n
CONFIG_DEBUG_INPUT=n
CONFIG_HAVE_CXX=n
CONFIG_HAVE_CXXINITIALIZE=n
CONFIG_MM_REGIONS=1
@@ -340,9 +347,9 @@ CONFIG_ARCH_LOWPUTC=y
CONFIG_RR_INTERVAL=200
CONFIG_SCHED_INSTRUMENTATION=n
CONFIG_TASK_NAME_SIZE=0
CONFIG_START_YEAR=2009
CONFIG_START_MONTH=9
CONFIG_START_DAY=21
CONFIG_START_YEAR=1970
CONFIG_START_MONTH=1
CONFIG_START_DAY=1
CONFIG_GREGORIAN_TIME=n
CONFIG_JULIAN_TIME=n
CONFIG_DEV_CONSOLE=y
@@ -354,12 +361,13 @@ CONFIG_SEM_NNESTPRIO=0
CONFIG_FDCLONE_DISABLE=n
CONFIG_FDCLONE_STDIO=y
CONFIG_SDCLONE_DISABLE=y
CONFIG_NXFLAT=n
CONFIG_SCHED_WORKQUEUE=n
CONFIG_SCHED_WORKPRIORITY=50
CONFIG_SCHED_WORKPERIOD=(50*1000)
CONFIG_SCHED_WORKPERIOD=50000
CONFIG_SCHED_WORKSTACKSIZE=1024
CONFIG_SIG_SIGWORK=4
CONFIG_SCHED_WAITPID=n
CONFIG_SCHED_ATEXIT=n
#
# The following can be used to disable categories of
@@ -427,6 +435,14 @@ CONFIG_ARCH_BZERO=n
# CONFIG_NAME_MAX - The maximum size of a file name.
# CONFIG_STDIO_BUFFER_SIZE - Size of the buffer to allocate
# on fopen. (Only if CONFIG_NFILE_STREAMS > 0)
# CONFIG_STDIO_LINEBUFFER - If standard C buffered I/O is enabled
# (CONFIG_STDIO_BUFFER_SIZE > 0), then this option may be added
# to force automatic, line-oriented flushing the output buffer
# for putc(), fputc(), putchar(), puts(), fputs(), printf(),
# fprintf(), and vfprintf(). When a newline is encountered in
# the output string, the output buffer will be flushed. This
# (slightly) increases the NuttX footprint but supports the kind
# of behavior that people expect for printf().
# CONFIG_NUNGET_CHARS - Number of characters that can be
# buffered by ungetc() (Only if CONFIG_NFILE_STREAMS > 0)
# CONFIG_PREALLOC_MQ_MSGS - The number of pre-allocated message
@@ -452,6 +468,7 @@ CONFIG_NFILE_DESCRIPTORS=8
CONFIG_NFILE_STREAMS=0
CONFIG_NAME_MAX=32
CONFIG_STDIO_BUFFER_SIZE=64
CONFIG_STDIO_LINEBUFFER=n
CONFIG_NUNGET_CHARS=2
CONFIG_PREALLOC_MQ_MSGS=4
CONFIG_MQ_MAXMSGSIZE=32
+4
View File
@@ -182,6 +182,10 @@ menuconfig LCD
Drivers for parallel and serial LCD and OLED type devices. These
drivers support interfaces as defined in include/nuttx/lcd/lcd.h
This selection is necessary to enable support for LCD drivers in
drivers/lcd as well as for board-specific LCD drivers in the configs/
subdirectories.
if LCD
source drivers/lcd/Kconfig
endif
+39
View File
@@ -173,3 +173,42 @@ config LCD_UG9664HSWAG01
ug-9664hswag01.c. OLED Display Module, UG-9664HSWAG01", Univision
Technology Inc. Used with the LPC Xpresso and Embedded Artists
base board.
choice
prompt "LCD Orientation"
default LCD_LANDSCAPE
depends on LCD
---help---
Some LCD drivers may support displays in different orientations.
If the LCD driver supports this capability, than these are configuration
options to select that display orientation.
config LCD_LANDSCAPE
bool "Landscape orientation"
---help---
Define for "landscape" orientation support. Landscape mode refers one
of two orientations where the the display is wider than it is tall
(LCD_RLANDSCAPE is the other). This is the default orientation.
config LCD_PORTRAIT
bool "Portrait orientation"
---help---
Define for "portrait" orientation support. Portrait mode refers one
of two orientations where the the display is taller than it is wide
(LCD_RPORTAIT is the other).
config LCD_RPORTRAIT
bool "Reverse portrait display"
---help---
Define for "reverse portrait" orientation support. Reverse portrait mode
refers one of two orientations where the the display is taller than it is
wide (LCD_PORTAIT is the other).
config LCD_RLANDSCAPE
bool "Reverse landscape orientation"
---help---
Define for "reverse landscape" orientation support. Reverse landscape mode
refers one of two orientations where the the display is wider than it is
tall (LCD_LANDSCAPE is the other).
endchoice
+3
View File
@@ -37,7 +37,10 @@
# These drivers depend on I2C support
ifeq ($(CONFIG_I2C),y)
ifeq ($(CONFIG_I2C_TRANSFER),y)
CSRCS += lis331dl.c
endif
ifeq ($(CONFIG_I2C_LM75),y)
CSRCS += lm75.c
+6 -6
View File
@@ -1,8 +1,8 @@
/*******************************************************************************
* drivers/usbhost/usbhost_enumerate.c
*
* Copyright (C) 2011 Gregory Nutt. All rights reserved.
* Authors: Gregory Nutt <spudmonkey@racsa.co.cr>
* Copyright (C) 2011-2012 Gregory Nutt. All rights reserved.
* Authors: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@@ -122,8 +122,8 @@ static void usbhost_putle16(uint8_t *dest, uint16_t val)
*
*******************************************************************************/
static inline int usbhost_devdesc(const struct usb_devdesc_s *devdesc,
struct usbhost_id_s *id)
static inline int usbhost_devdesc(FAR const struct usb_devdesc_s *devdesc,
FAR struct usbhost_id_s *id)
{
/* Clear the ID info */
@@ -131,7 +131,7 @@ static inline int usbhost_devdesc(const struct usb_devdesc_s *devdesc,
/* Pick off the class ID info */
id->base = devdesc->class;
id->base = devdesc->classid;
id->subclass = devdesc->subclass;
id->proto = devdesc->protocol;
@@ -194,7 +194,7 @@ static inline int usbhost_configdesc(const uint8_t *configdesc, int cfglen,
*/
DEBUGASSERT(remaining >= sizeof(struct usb_ifdesc_s));
id->base = ifdesc->class;
id->base = ifdesc->classid;
id->subclass = ifdesc->subclass;
id->proto = ifdesc->protocol;
uvdbg("class:%d subclass:%d protocol:%d\n",
+5 -1
View File
@@ -255,7 +255,9 @@ static inline int usbhost_devinit(FAR struct usbhost_state_s *priv);
static inline uint16_t usbhost_getle16(const uint8_t *val);
static inline void usbhost_putle16(uint8_t *dest, uint16_t val);
static inline uint32_t usbhost_getle32(const uint8_t *val);
#if 0 /* Not used */
static void usbhost_putle32(uint8_t *dest, uint32_t val);
#endif
/* Transfer descriptor memory management */
@@ -701,7 +703,7 @@ static int usbhost_kbdpoll(int argc, char *argv[])
#if defined(CONFIG_DEBUG_USB) && defined(CONFIG_DEBUG_VERBOSE)
unsigned int npolls = 0;
#endif
unsigned int nerrors;
unsigned int nerrors = 0;
int ret;
uvdbg("Started\n");
@@ -1381,6 +1383,7 @@ static inline uint32_t usbhost_getle32(const uint8_t *val)
*
****************************************************************************/
#if 0 /* Not used */
static void usbhost_putle32(uint8_t *dest, uint32_t val)
{
/* Little endian means LS halfword first in byte stream */
@@ -1388,6 +1391,7 @@ static void usbhost_putle32(uint8_t *dest, uint32_t val)
usbhost_putle16(dest, (uint16_t)(val & 0xffff));
usbhost_putle16(dest+2, (uint16_t)(val >> 16));
}
#endif
/****************************************************************************
* Name: usbhost_tdalloc
+60 -53
View File
@@ -1,8 +1,8 @@
/****************************************************************************
* drivers/usbhost/usbhost_storage.c
*
* Copyright (C) 2010-2011 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
* Copyright (C) 2010-2012 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@@ -123,7 +123,7 @@ struct usbhost_state_s
struct usbhost_driver_s *drvr;
/* The remainder of the fields are provide to the mass storage class */
char sdchar; /* Character identifying the /dev/sd[n] device */
volatile bool disconnected; /* TRUE: Device has been disconnected */
uint8_t ifno; /* Interface number */
@@ -217,7 +217,7 @@ static inline int usbhost_tfree(FAR struct usbhost_state_s *priv);
static FAR struct usbmsc_cbw_s *usbhost_cbwalloc(FAR struct usbhost_state_s *priv);
/* struct usbhost_registry_s methods */
static struct usbhost_class_s *usbhost_create(FAR struct usbhost_driver_s *drvr,
FAR const struct usbhost_id_s *id);
@@ -248,7 +248,7 @@ static int usbhost_ioctl(FAR struct inode *inode, int cmd,
* Private Data
****************************************************************************/
/* This structure provides the registry entry ID informatino that will be
/* This structure provides the registry entry ID informatino that will be
* used to associate the USB host mass storage class to a connected USB
* device.
*/
@@ -416,7 +416,7 @@ static inline void usbhost_freeclass(FAR struct usbhost_state_s *class)
flags = irqsave();
class->class.flink = g_freelist;
g_freelist = class;
irqrestore(flags);
irqrestore(flags);
}
#else
static inline void usbhost_freeclass(FAR struct usbhost_state_s *class)
@@ -700,16 +700,16 @@ static inline int usbhost_testunitready(FAR struct usbhost_state_s *priv)
int result;
/* Initialize a CBW (re-using the allocated transfer buffer) */
cbw = usbhost_cbwalloc(priv);
if (!cbw)
{
udbg("ERROR: Failed to create CBW\n");
return -ENOMEM;
}
/* Construct and send the CBW */
usbhost_testunitreadycbw(cbw);
result = DRVR_TRANSFER(priv->drvr, priv->bulkout,
(uint8_t*)cbw, USBMSC_CBW_SIZEOF);
@@ -733,7 +733,7 @@ static inline int usbhost_requestsense(FAR struct usbhost_state_s *priv)
int result;
/* Initialize a CBW (re-using the allocated transfer buffer) */
cbw = usbhost_cbwalloc(priv);
if (!cbw)
{
@@ -742,7 +742,7 @@ static inline int usbhost_requestsense(FAR struct usbhost_state_s *priv)
}
/* Construct and send the CBW */
usbhost_requestsensecbw(cbw);
result = DRVR_TRANSFER(priv->drvr, priv->bulkout,
(uint8_t*)cbw, USBMSC_CBW_SIZEOF);
@@ -775,7 +775,7 @@ static inline int usbhost_readcapacity(FAR struct usbhost_state_s *priv)
int result;
/* Initialize a CBW (re-using the allocated transfer buffer) */
cbw = usbhost_cbwalloc(priv);
if (!cbw)
{
@@ -784,7 +784,7 @@ static inline int usbhost_readcapacity(FAR struct usbhost_state_s *priv)
}
/* Construct and send the CBW */
usbhost_readcapacitycbw(cbw);
result = DRVR_TRANSFER(priv->drvr, priv->bulkout,
(uint8_t*)cbw, USBMSC_CBW_SIZEOF);
@@ -823,7 +823,7 @@ static inline int usbhost_inquiry(FAR struct usbhost_state_s *priv)
int result;
/* Initialize a CBW (re-using the allocated transfer buffer) */
cbw = usbhost_cbwalloc(priv);
if (!cbw)
{
@@ -832,7 +832,7 @@ static inline int usbhost_inquiry(FAR struct usbhost_state_s *priv)
}
/* Construct and send the CBW */
usbhost_inquirycbw(cbw);
result = DRVR_TRANSFER(priv->drvr, priv->bulkout,
(uint8_t*)cbw, USBMSC_CBW_SIZEOF);
@@ -885,7 +885,7 @@ static void usbhost_destroy(FAR void *arg)
DEBUGASSERT(priv != NULL);
uvdbg("crefs: %d\n", priv->crefs);
/* Unregister the block driver */
usbhost_mkdevname(priv, devname);
@@ -965,10 +965,10 @@ static inline int usbhost_cfgdesc(FAR struct usbhost_state_s *priv,
uint8_t found = 0;
int ret;
DEBUGASSERT(priv != NULL &&
DEBUGASSERT(priv != NULL &&
configdesc != NULL &&
desclen >= sizeof(struct usb_cfgdesc_s));
/* Verify that we were passed a configuration descriptor */
cfgdesc = (FAR struct usb_cfgdesc_s *)configdesc;
@@ -1004,7 +1004,7 @@ static inline int usbhost_cfgdesc(FAR struct usbhost_state_s *priv,
case USB_DESC_TYPE_INTERFACE:
{
FAR struct usb_ifdesc_s *ifdesc = (FAR struct usb_ifdesc_s *)configdesc;
uvdbg("Interface descriptor\n");
DEBUGASSERT(remaining >= USB_SIZEOF_IFDESC);
@@ -1078,7 +1078,7 @@ static inline int usbhost_cfgdesc(FAR struct usbhost_state_s *priv,
found |= USBHOST_BINFOUND;
/* Save the bulk IN endpoint information */
bindesc.addr = epdesc->addr & USB_EP_ADDR_NUMBER_MASK;
bindesc.in = 1;
bindesc.funcaddr = funcaddr;
@@ -1108,7 +1108,7 @@ static inline int usbhost_cfgdesc(FAR struct usbhost_state_s *priv,
}
/* Increment the address of the next descriptor */
configdesc += desc->len;
remaining -= desc->len;
}
@@ -1116,7 +1116,7 @@ static inline int usbhost_cfgdesc(FAR struct usbhost_state_s *priv,
/* Sanity checking... did we find all of things that we need? Hmmm.. I wonder..
* can we work read-only or write-only if only one bulk endpoint found?
*/
if (found != USBHOST_ALLFOUND)
{
ulldbg("ERROR: Found IF:%s BIN:%s BOUT:%s\n",
@@ -1202,7 +1202,7 @@ static inline int usbhost_initvolume(FAR struct usbhost_state_s *priv)
uvdbg("Test unit ready, retries=%d\n", retries);
/* Send TESTUNITREADY to see the unit is ready */
ret = usbhost_testunitready(priv);
if (ret == OK)
{
@@ -1585,7 +1585,7 @@ static FAR struct usbmsc_cbw_s *usbhost_cbwalloc(FAR struct usbhost_state_s *pri
* Name: usbhost_create
*
* Description:
* This function implements the create() method of struct usbhost_registry_s.
* This function implements the create() method of struct usbhost_registry_s.
* The create() method is a callback into the class implementation. It is
* used to (1) create a new instance of the USB host class state and to (2)
* bind a USB host driver "session" to the class instance. Use of this
@@ -1644,9 +1644,9 @@ static FAR struct usbhost_class_s *usbhost_create(FAR struct usbhost_driver_s *d
priv->drvr = drvr;
/* NOTE: We do not yet know the geometry of the USB mass storage device */
/* Return the instance of the USB mass storage class */
return &priv->class;
}
}
@@ -1701,7 +1701,7 @@ static int usbhost_connect(FAR struct usbhost_class_s *class,
FAR struct usbhost_state_s *priv = (FAR struct usbhost_state_s *)class;
int ret;
DEBUGASSERT(priv != NULL &&
DEBUGASSERT(priv != NULL &&
configdesc != NULL &&
desclen >= sizeof(struct usb_cfgdesc_s));
@@ -1722,7 +1722,7 @@ static int usbhost_connect(FAR struct usbhost_class_s *class,
udbg("usbhost_initvolume() failed: %d\n", ret);
}
}
return ret;
}
@@ -1792,7 +1792,7 @@ static int usbhost_disconnected(struct usbhost_class_s *class)
}
}
irqrestore(flags);
irqrestore(flags);
return OK;
}
@@ -1945,45 +1945,52 @@ static ssize_t usbhost_read(FAR struct inode *inode, unsigned char *buffer,
ret = -ENOMEM;
/* Initialize a CBW (re-using the allocated transfer buffer) */
cbw = usbhost_cbwalloc(priv);
if (cbw)
{
/* Assume some device failure */
/* Loop in the event that EAGAIN is returned (mean that the
* transaction was NAKed and we should try again.
*/
ret = -ENODEV;
/* Construct and send the CBW */
usbhost_readcbw(startsector, priv->blocksize, nsectors, cbw);
result = DRVR_TRANSFER(priv->drvr, priv->bulkout,
(uint8_t*)cbw, USBMSC_CBW_SIZEOF);
if (result == OK)
do
{
/* Receive the user data */
/* Assume some device failure */
result = DRVR_TRANSFER(priv->drvr, priv->bulkin,
buffer, priv->blocksize * nsectors);
ret = -ENODEV;
/* Construct and send the CBW */
usbhost_readcbw(startsector, priv->blocksize, nsectors, cbw);
result = DRVR_TRANSFER(priv->drvr, priv->bulkout,
(uint8_t*)cbw, USBMSC_CBW_SIZEOF);
if (result == OK)
{
/* Receive the CSW */
/* Receive the user data */
result = DRVR_TRANSFER(priv->drvr, priv->bulkin,
priv->tbuffer, USBMSC_CSW_SIZEOF);
buffer, priv->blocksize * nsectors);
if (result == OK)
{
FAR struct usbmsc_csw_s *csw;
/* Receive the CSW */
/* Check the CSW status */
csw = (FAR struct usbmsc_csw_s *)priv->tbuffer;
if (csw->status == 0)
result = DRVR_TRANSFER(priv->drvr, priv->bulkin,
priv->tbuffer, USBMSC_CSW_SIZEOF);
if (result == OK)
{
ret = nsectors;
FAR struct usbmsc_csw_s *csw;
/* Check the CSW status */
csw = (FAR struct usbmsc_csw_s *)priv->tbuffer;
if (csw->status == 0)
{
ret = nsectors;
}
}
}
}
}
} while (result == -EAGAIN);
}
usbhost_givesem(&priv->exclsem);
@@ -2037,7 +2044,7 @@ static ssize_t usbhost_write(FAR struct inode *inode, const unsigned char *buffe
ret = -ENOMEM;
/* Initialize a CBW (re-using the allocated transfer buffer) */
cbw = usbhost_cbwalloc(priv);
if (cbw)
{
@@ -2046,7 +2053,7 @@ static ssize_t usbhost_write(FAR struct inode *inode, const unsigned char *buffe
ret = -ENODEV;
/* Construct and send the CBW */
usbhost_writecbw(startsector, priv->blocksize, nsectors, cbw);
result = DRVR_TRANSFER(priv->drvr, priv->bulkout,
(uint8_t*)cbw, USBMSC_CBW_SIZEOF);
+17 -11
View File
@@ -1,7 +1,7 @@
/************************************************************************************
* include/nuttx/usb/usbhost.h
*
* Copyright (C) 2010-2011 Gregory Nutt. All rights reserved.
* Copyright (C) 2010-2012 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* References:
@@ -284,7 +284,7 @@
* Some hardware supports special memory in which request and descriptor data can
* be accessed more efficiently. This method provides a mechanism to allocate
* the request/descriptor memory. If the underlying hardware does not support
* such "special" memory, this functions may simply map to malloc.
* such "special" memory, this functions may simply map to kmalloc.
*
* This interface was optimized under a particular assumption. It was assumed
* that the driver maintains a pool of small, pre-allocated buffers for descriptor
@@ -317,7 +317,7 @@
* Some hardware supports special memory in which request and descriptor data can
* be accessed more efficiently. This method provides a mechanism to free that
* request/descriptor memory. If the underlying hardware does not support
* such "special" memory, this functions may simply map to free().
* such "special" memory, this functions may simply map to kfree().
*
* Input Parameters:
* drvr - The USB host driver instance obtained as a parameter from the call to
@@ -342,7 +342,7 @@
* Some hardware supports special memory in which larger IO buffers can
* be accessed more efficiently. This method provides a mechanism to allocate
* the request/descriptor memory. If the underlying hardware does not support
* such "special" memory, this functions may simply map to malloc.
* such "special" memory, this functions may simply map to kmalloc.
*
* This interface differs from DRVR_ALLOC in that the buffers are variable-sized.
*
@@ -371,7 +371,7 @@
* Some hardware supports special memory in which IO data can be accessed more
* efficiently. This method provides a mechanism to free that IO buffer
* memory. If the underlying hardware does not support such "special" memory,
* this functions may simply map to free().
* this functions may simply map to kfree().
*
* Input Parameters:
* drvr - The USB host driver instance obtained as a parameter from the call to
@@ -448,7 +448,13 @@
*
* Returned Values:
* On success, zero (OK) is returned. On a failure, a negated errno value is
* returned indicating the nature of the failure
* returned indicating the nature of the failure:
*
* EAGAIN - If devices NAKs the transfer (or NYET or other error where
* it may be appropriate to restart the entire transaction).
* EPERM - If the endpoint stalls
* EIO - On a TX or data toggle error
* EPIPE - Overrun errors
*
* Assumptions:
* This function will *not* be called from an interrupt handler.
@@ -553,7 +559,7 @@ struct usbhost_class_s
};
/* This structure describes one endpoint. It is used as an input to the
* allocep() method. Most of this information comes from the endpoint
* epalloc() method. Most of this information comes from the endpoint
* descriptor.
*/
@@ -562,12 +568,12 @@ struct usbhost_epdesc_s
uint8_t addr; /* Endpoint address */
bool in; /* Direction: true->IN */
uint8_t funcaddr; /* USB address of function containing endpoint */
uint8_t xfrtype; /* Transfer type. See SB_EP_ATTR_XFER_* in usb.h */
uint8_t xfrtype; /* Transfer type. See USB_EP_ATTR_XFER_* in usb.h */
uint8_t interval; /* Polling interval */
uint16_t mxpacketsize; /* Max packetsize */
};
/* This type represents one endpoint configured by the allocep() method.
/* This type represents one endpoint configured by the epalloc() method.
* The actual form is know only internally to the USB host controller
* (for example, for an OHCI driver, this would probably be a pointer
* to an endpoint descriptor).
@@ -615,7 +621,7 @@ struct usbhost_driver_s
* be accessed more efficiently. The following methods provide a mechanism
* to allocate and free the transfer descriptor memory. If the underlying
* hardware does not support such "special" memory, these functions may
* simply map to malloc and free.
* simply map to kmalloc and kfree.
*
* This interface was optimized under a particular assumption. It was assumed
* that the driver maintains a pool of small, pre-allocated buffers for descriptor
@@ -630,7 +636,7 @@ struct usbhost_driver_s
/* Some hardware supports special memory in which larger IO buffers can
* be accessed more efficiently. This method provides a mechanism to allocate
* the request/descriptor memory. If the underlying hardware does not support
* such "special" memory, this functions may simply map to malloc.
* such "special" memory, this functions may simply map to kmalloc.
*
* This interface differs from DRVR_ALLOC in that the buffers are variable-sized.
*/
+16 -7
View File
@@ -60,16 +60,16 @@ extern "C" {
* Public Type Declarations
****************************************************************************/
/* This structure contains the holder of a semaphore */
/* This structure contains information about the holder of a semaphore */
#ifdef CONFIG_PRIORITY_INHERITANCE
struct semholder_s
{
#if CONFIG_SEM_PREALLOCHOLDERS > 0
struct semholder_s *flink; /* Implements singly linked list */
struct semholder_s *flink; /* Implements singly linked list */
#endif
void *holder; /* Holder TCB (actual type is _TCB) */
int16_t counts; /* Number of counts owned by this holder */
void *htcb; /* Holder TCB (actual type is _TCB) */
int16_t counts; /* Number of counts owned by this holder */
};
#if CONFIG_SEM_PREALLOCHOLDERS > 0
@@ -83,12 +83,21 @@ struct semholder_s
struct sem_s
{
int16_t semcount; /* >0 -> Num counts available */
/* <0 -> Num tasks waiting for semaphore */
int16_t semcount; /* >0 -> Num counts available */
/* <0 -> Num tasks waiting for semaphore */
/* If priority inheritance is enabled, then we have to keep track of which
* tasks hold references to the semaphore.
*/
#ifdef CONFIG_PRIORITY_INHERITANCE
struct semholder_s hlist; /* List of holders of semaphore counts */
# if CONFIG_SEM_PREALLOCHOLDERS > 0
FAR struct semholder_s *hhead; /* List of holders of semaphore counts */
# else
struct semholder_s holder; /* Single holder */
# endif
#endif
};
typedef struct sem_s sem_t;
/* Initializers */
+5 -4
View File
@@ -103,16 +103,17 @@ int sem_init(FAR sem_t *sem, int pshared, unsigned int value)
{
/* Initialize the seamphore count */
sem->semcount = (int16_t)value;
sem->semcount = (int16_t)value;
/* Initialize to support priority inheritance */
#ifdef CONFIG_PRIORITY_INHERITANCE
# if CONFIG_SEM_PREALLOCHOLDERS > 0
sem->hlist.flink = NULL;
sem->hhead = NULL;
# else
sem->holder.htcb = NULL;
sem->holder.counts = 0;
# endif
sem->hlist.holder = NULL;
sem->hlist.counts = 0;
#endif
return OK;
}
+1 -1
View File
@@ -204,7 +204,7 @@ config SCHED_ONEXIT_MAX
config DISABLE_OS_API
bool "Disable NuttX interfaces"
default n
default y
---help---
The following can be used to disable categories of
APIs supported by the OS. If the compiler supports
+12 -9
View File
@@ -289,6 +289,18 @@ void os_start(void)
g_idletcb.flags = TCB_FLAG_TTYPE_KERNEL;
up_initial_state(&g_idletcb);
/* Initialize the semaphore facility(if in link). This has to be done
* very early because many subsystems depend upon fully functional
* semaphores.
*/
#ifdef CONFIG_HAVE_WEAKFUNCTIONS
if (sem_initialize != NULL)
#endif
{
sem_initialize();
}
/* Initialize the memory manager */
#ifndef CONFIG_HEAP_BASE
@@ -351,15 +363,6 @@ void os_start(void)
}
#endif
/* Initialize the semaphore facility. (if in link) */
#ifdef CONFIG_HAVE_WEAKFUNCTIONS
if (sem_initialize != NULL)
#endif
{
sem_initialize();
}
/* Initialize the named message queue facility (if in link) */
#ifndef CONFIG_DISABLE_MQUEUE
+2 -1
View File
@@ -178,7 +178,7 @@
pid_t waitpid(pid_t pid, int *stat_loc, int options)
{
_TCB *tcb = sched_gettcb(pid);
_TCB *tcb;
bool mystat;
int err;
int ret;
@@ -186,6 +186,7 @@ pid_t waitpid(pid_t pid, int *stat_loc, int options)
/* Disable pre-emption so that nothing changes in the following tests */
sched_lock();
tcb = sched_gettcb(pid);
if (!tcb)
{
err = ECHILD;
+61 -55
View File
@@ -99,32 +99,31 @@ static inline FAR struct semholder_s *sem_allocholder(sem_t *sem)
* used to implement mutexes.
*/
if (!sem->hlist.holder)
#if CONFIG_SEM_PREALLOCHOLDERS > 0
pholder = g_freeholders;
if (pholder)
{
pholder = &sem->hlist;
/* Remove the holder from the free list an put it into the semaphore's holder list */
g_freeholders = pholder->flink;
pholder->flink = sem->hhead;
sem->hhead = pholder;
/* Make sure the initial count is zero */
pholder->counts = 0;
}
#else
if (!sem->holder.htcb)
{
pholder = &sem->holder;
pholder->counts = 0;
}
#endif
else
{
#if CONFIG_SEM_PREALLOCHOLDERS > 0
pholder = g_freeholders;
if (pholder)
{
/* Remove the holder from the free list an put it into the semaphore's holder list */
g_freeholders = pholder->flink;
pholder->flink = sem->hlist.flink;
sem->hlist.flink = pholder;
/* Make sure the initial count is zero */
pholder->counts = 0;
}
else
#else
pholder = NULL;
#endif
sdbg("Insufficient pre-allocated holders\n");
pholder = NULL;
}
return pholder;
@@ -140,12 +139,13 @@ static FAR struct semholder_s *sem_findholder(sem_t *sem, FAR _TCB *htcb)
/* Try to find the holder in the list of holders associated with this semaphore */
pholder = &sem->hlist;
#if CONFIG_SEM_PREALLOCHOLDERS > 0
for (; pholder; pholder = pholder->flink)
for (pholder = sem->hhead; pholder; pholder = pholder->flink)
#else
pholder = &sem->holder;
#endif
{
if (pholder->holder == htcb)
if (pholder->htcb == htcb)
{
/* Got it! */
@@ -186,31 +186,33 @@ static inline void sem_freeholder(sem_t *sem, FAR struct semholder_s *pholder)
/* Release the holder and counts */
pholder->holder = 0;
pholder->htcb = NULL;
pholder->counts = 0;
#if CONFIG_SEM_PREALLOCHOLDERS > 0
/* If this is the holder inside the semaphore, then do nothing more */
/* Search the list for the matching holder */
if (pholder != &sem->hlist)
for (prev = NULL, curr = sem->hhead;
curr && curr != pholder;
prev = curr, curr = curr->flink);
if (curr)
{
/* Otherwise, search the list for the matching holder */
/* Remove the holder from the list */
for (prev = &sem->hlist, curr = sem->hlist.flink;
curr && curr != pholder;
prev = curr, curr = curr->flink);
if (curr)
if (prev)
{
/* Remove the holder from the list */
prev->flink = pholder->flink;
/* And put it in the free list */
pholder->flink = g_freeholders;
g_freeholders = pholder;
}
else
{
sem->hhead = pholder->flink;
}
/* And put it in the free list */
pholder->flink = g_freeholders;
g_freeholders = pholder;
}
#endif
}
@@ -221,14 +223,16 @@ static inline void sem_freeholder(sem_t *sem, FAR struct semholder_s *pholder)
static int sem_foreachholder(FAR sem_t *sem, holderhandler_t handler, FAR void *arg)
{
FAR struct semholder_s *pholder = &sem->hlist;
FAR struct semholder_s *pholder;
#if CONFIG_SEM_PREALLOCHOLDERS > 0
FAR struct semholder_s *next;
#endif
int ret = 0;
#if CONFIG_SEM_PREALLOCHOLDERS > 0
for (; pholder && ret == 0; pholder = next)
for (pholder = sem->hhead; pholder && ret == 0; pholder = next)
#else
pholder = &sem->holder;
#endif
{
#if CONFIG_SEM_PREALLOCHOLDERS > 0
@@ -238,7 +242,7 @@ static int sem_foreachholder(FAR sem_t *sem, holderhandler_t handler, FAR void *
#endif
/* The initial "built-in" container may hold a NULL holder */
if (pholder->holder)
if (pholder->htcb)
{
/* Call the handler */
@@ -268,7 +272,7 @@ static int sem_recoverholders(FAR struct semholder_s *pholder, FAR sem_t *sem, F
static int sem_boostholderprio(FAR struct semholder_s *pholder,
FAR sem_t *sem, FAR void *arg)
{
FAR _TCB *htcb = (FAR _TCB *)pholder->holder;
FAR _TCB *htcb = (FAR _TCB *)pholder->htcb;
FAR _TCB *rtcb = (FAR _TCB*)arg;
/* Make sure that the thread is still active. If it exited without releasing
@@ -371,7 +375,7 @@ static int sem_boostholderprio(FAR struct semholder_s *pholder,
static int sem_verifyholder(FAR struct semholder_s *pholder, FAR sem_t *sem, FAR void *arg)
{
#if 0 // Need to revisit this, but these assumptions seem to be untrue -- OR there is a bug???
FAR _TCB *htcb = (FAR _TCB *)pholder->holder;
FAR _TCB *htcb = (FAR _TCB *)pholder->htcb;
/* Called after a semaphore has been released (incremented), the semaphore
* could is non-negative, and there is no thread waiting for the count.
@@ -396,9 +400,9 @@ static int sem_dumpholder(FAR struct semholder_s *pholder, FAR sem_t *sem, FAR v
{
#if CONFIG_SEM_PREALLOCHOLDERS > 0
dbg(" %08x: %08x %08x %04x\n",
pholder, pholder->flink, pholder->holder, pholder->counts);
pholder, pholder->flink, pholder->htcb, pholder->counts);
#else
dbg(" %08x: %08x %04x\n", pholder, pholder->holder, pholder->counts);
dbg(" %08x: %08x %04x\n", pholder, pholder->htcb, pholder->counts);
#endif
return 0;
}
@@ -410,7 +414,7 @@ static int sem_dumpholder(FAR struct semholder_s *pholder, FAR sem_t *sem, FAR v
static int sem_restoreholderprio(FAR struct semholder_s *pholder, FAR sem_t *sem, FAR void *arg)
{
FAR _TCB *htcb = (FAR _TCB *)pholder->holder;
FAR _TCB *htcb = (FAR _TCB *)pholder->htcb;
#if CONFIG_SEM_NNESTPRIO > 0
FAR _TCB *stcb = (FAR _TCB *)arg;
int rpriority;
@@ -510,6 +514,7 @@ static int sem_restoreholderprio(FAR struct semholder_s *pholder, FAR sem_t *sem
{
htcb->pend_reprios[i] = htcb->pend_reprios[j];
}
htcb->npend_reprio = j;
break;
}
@@ -534,7 +539,7 @@ static int sem_restoreholderprio(FAR struct semholder_s *pholder, FAR sem_t *sem
static int sem_restoreholderprioA(FAR struct semholder_s *pholder, FAR sem_t *sem, FAR void *arg)
{
FAR _TCB *rtcb = (FAR _TCB*)g_readytorun.head;
if (pholder->holder != rtcb)
if (pholder->htcb != rtcb)
{
return sem_restoreholderprio(pholder, sem, arg);
}
@@ -545,7 +550,7 @@ static int sem_restoreholderprioA(FAR struct semholder_s *pholder, FAR sem_t *se
static int sem_restoreholderprioB(FAR struct semholder_s *pholder, FAR sem_t *sem, FAR void *arg)
{
FAR _TCB *rtcb = (FAR _TCB*)g_readytorun.head;
if (pholder->holder == rtcb)
if (pholder->htcb == rtcb)
{
(void)sem_restoreholderprio(pholder, sem, arg);
return 1;
@@ -586,6 +591,7 @@ void sem_initholders(void)
{
g_holderalloc[i].flink = &g_holderalloc[i+1];
}
g_holderalloc[CONFIG_SEM_PREALLOCHOLDERS-1].flink = NULL;
#endif
}
@@ -609,8 +615,8 @@ void sem_initholders(void)
void sem_destroyholder(FAR sem_t *sem)
{
/* It is an error is a semaphore is destroyed while there are any holders
* (except perhaps the thread releas the semaphore itself). Hmmm.. but
/* It is an error if a semaphore is destroyed while there are any holders
* (except perhaps the thread release the semaphore itself). Hmmm.. but
* we actually have to assume that the caller knows what it is doing because
* could have killed another thread that is the actual holder of the semaphore.
* We cannot make any assumptions about the state of the semaphore or the
@@ -621,18 +627,18 @@ void sem_destroyholder(FAR sem_t *sem)
*/
#if CONFIG_SEM_PREALLOCHOLDERS > 0
if (sem->hlist.holder || sem->hlist.flink)
if (sem->hhead)
{
sdbg("Semaphore destroyed with holders\n");
(void)sem_foreachholder(sem, sem_recoverholders, NULL);
}
#else
if (sem->hlist.holder)
if (sem->holder.htcb)
{
sdbg("Semaphore destroyed with holder\n");
}
sem->hlist.holder = NULL;
sem->holder.htcb = NULL;
#endif
}
@@ -664,7 +670,7 @@ void sem_addholder(FAR sem_t *sem)
{
/* Then set the holder and increment the number of counts held by this holder */
pholder->holder = rtcb;
pholder->htcb = rtcb;
pholder->counts++;
}
}
+7
View File
@@ -174,6 +174,12 @@ int main(int argc, char **argv, char **envp)
printf("#ifndef CONFIG_MM_REGIONS\n");
printf("# define CONFIG_MM_REGIONS 1\n");
printf("#endif\n\n");
printf("/* If the end of RAM is not specified then it is assumed to be the beginning\n");
printf(" * of RAM plus the RAM size.\n");
printf(" */\n\n");
printf("#ifndef CONFIG_DRAM_END\n");
printf("# define CONFIG_DRAM_END (CONFIG_DRAM_START+CONFIG_DRAM_SIZE)\n");
printf("#endif\n\n");
printf("/* If no file streams are configured, then make certain that buffered I/O\n");
printf(" * support is disabled\n");
printf(" */\n\n");
@@ -256,6 +262,7 @@ int main(int argc, char **argv, char **envp)
printf("# undef CONFIG_DEBUG_USB\n");
printf("# undef CONFIG_DEBUG_GRAPHICS\n");
printf("# undef CONFIG_DEBUG_GPIO\n");
printf("# undef CONFIG_DEBUG_SPI\n");
printf("# undef CONFIG_DEBUG_STACK\n");
printf("#endif\n\n");
printf("#endif /* __INCLUDE_NUTTX_CONFIG_H */\n");