mirror of
https://gitee.com/mirrors_PX4/PX4-Autopilot.git
synced 2026-10-16 07:43:34 +08:00
Merge FMUv3 into FMUv2
This commit is contained in:
Daniel Agar
committed by
Lorenz Meier
Lorenz Meier
parent
08a108ee1b
commit
01691e626b
@@ -15,7 +15,7 @@ set(config_module_list
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drivers/boards
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drivers/rgbled
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drivers/mpu6000
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#drivers/mpu9250
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drivers/mpu9250
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drivers/lsm303d
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drivers/l3gd20
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drivers/hmc5883
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@@ -49,20 +49,20 @@ set(config_module_list
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#drivers/snapdragon_rc_pwm
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drivers/lis3mdl
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#drivers/iridiumsbd
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drivers/ulanding
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#drivers/ulanding
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#
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# System commands
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#
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systemcmds/bl_update
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systemcmds/config
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#systemcmds/bl_update
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#systemcmds/config
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#systemcmds/dumpfile
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#systemcmds/esc_calib
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systemcmds/hardfault_log
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systemcmds/mixer
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#systemcmds/motor_ramp
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systemcmds/mtd
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systemcmds/nshterm
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#systemcmds/nshterm
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systemcmds/param
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systemcmds/perf
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systemcmds/pwm
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@@ -92,7 +92,7 @@ set(config_module_list
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modules/load_mon
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modules/navigator
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modules/mavlink
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modules/gpio_led
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#modules/gpio_led
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#modules/uavcan
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modules/land_detector
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modules/camera_feedback
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@@ -146,7 +146,7 @@ set(config_module_list
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lib/mixer
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lib/runway_takeoff
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lib/tailsitter_recovery
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lib/terrain_estimation
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#lib/terrain_estimation
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lib/version
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platforms/nuttx
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@@ -1,3 +1,8 @@
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# FMUv3 is FMUv2 with access to the full 2MB flash
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set(BOARD px4fmu-v2 CACHE string "" FORCE)
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set(LD_SCRIPT ld_full.script CACHE string "" FORCE)
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include(nuttx/px4_impl_nuttx)
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px4_nuttx_configure(HWCLASS m4 CONFIG nsh ROMFS y ROMFSROOT px4fmu_common IO px4io-v2)
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@@ -203,4 +208,4 @@ set(config_module_list
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# EKF
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examples/ekf_att_pos_estimator
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)
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)
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@@ -1,22 +0,0 @@
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#
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# For a description of the syntax of this configuration file,
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# see misc/tools/kconfig-language.txt.
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#
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if ARCH_BOARD_PX4FMU_V2
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config BOARD_HAS_PROBES
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bool "Board provides GPIO or other Hardware for signaling to timing analyze."
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default y
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---help---
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This board provides GPIO FMU-CH1-6 as PROBE_1-6 to provide timing signals from selected drivers.
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config BOARD_USE_PROBES
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bool "Enable the use the board provided GPIO FMU-CH1-6 as PROBE_1-6 to provide timing signals from selected drivers"
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default n
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depends on BOARD_HAS_PROBES
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---help---
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Select to use GPIO FMU-CH1-6 to provide timing signals from selected drivers.
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endif
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@@ -1,368 +0,0 @@
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/************************************************************************************
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* nuttx-configs/px4fmu-v3/include/board.h
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* include/arch/board/board.h
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*
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* Copyright (C) 2009 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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************************************************************************************/
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#ifndef __ARCH_BOARD_BOARD_H
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#define __ARCH_BOARD_BOARD_H
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/************************************************************************************
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* Included Files
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************************************************************************************/
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#include <nuttx/config.h>
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#ifndef __ASSEMBLY__
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# include <stdint.h>
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#endif
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#include <stm32.h>
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/************************************************************************************
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* Definitions
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************************************************************************************/
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/* Clocking *************************************************************************/
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/* The PX4FMUV2 uses a 24MHz crystal connected to the HSE.
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*
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* This is the "standard" configuration as set up by arch/arm/src/stm32f40xx_rcc.c:
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* System Clock source : PLL (HSE)
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* SYSCLK(Hz) : 168000000 Determined by PLL configuration
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* HCLK(Hz) : 168000000 (STM32_RCC_CFGR_HPRE)
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* AHB Prescaler : 1 (STM32_RCC_CFGR_HPRE)
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* APB1 Prescaler : 4 (STM32_RCC_CFGR_PPRE1)
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* APB2 Prescaler : 2 (STM32_RCC_CFGR_PPRE2)
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* HSE Frequency(Hz) : 24000000 (STM32_BOARD_XTAL)
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* PLLM : 24 (STM32_PLLCFG_PLLM)
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* PLLN : 336 (STM32_PLLCFG_PLLN)
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* PLLP : 2 (STM32_PLLCFG_PLLP)
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* PLLQ : 7 (STM32_PLLCFG_PPQ)
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* Main regulator output voltage : Scale1 mode Needed for high speed SYSCLK
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* Flash Latency(WS) : 5
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* Prefetch Buffer : OFF
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* Instruction cache : ON
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* Data cache : ON
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* Require 48MHz for USB OTG FS, : Enabled
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* SDIO and RNG clock
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*/
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/* HSI - 16 MHz RC factory-trimmed
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* LSI - 32 KHz RC
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* HSE - On-board crystal frequency is 24MHz
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* LSE - not installed
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*/
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#define STM32_BOARD_XTAL 24000000ul
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#define STM32_HSI_FREQUENCY 16000000ul
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#define STM32_LSI_FREQUENCY 32000
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#define STM32_HSE_FREQUENCY STM32_BOARD_XTAL
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//#define STM32_LSE_FREQUENCY 32768
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/* Main PLL Configuration.
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*
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* PLL source is HSE
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* PLL_VCO = (STM32_HSE_FREQUENCY / PLLM) * PLLN
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* = (25,000,000 / 25) * 336
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* = 336,000,000
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* SYSCLK = PLL_VCO / PLLP
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* = 336,000,000 / 2 = 168,000,000
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* USB OTG FS, SDIO and RNG Clock
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* = PLL_VCO / PLLQ
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* = 48,000,000
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*/
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#define STM32_PLLCFG_PLLM RCC_PLLCFG_PLLM(24)
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#define STM32_PLLCFG_PLLN RCC_PLLCFG_PLLN(336)
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#define STM32_PLLCFG_PLLP RCC_PLLCFG_PLLP_2
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#define STM32_PLLCFG_PLLQ RCC_PLLCFG_PLLQ(7)
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#define STM32_SYSCLK_FREQUENCY 168000000ul
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/* AHB clock (HCLK) is SYSCLK (168MHz) */
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#define STM32_RCC_CFGR_HPRE RCC_CFGR_HPRE_SYSCLK /* HCLK = SYSCLK / 1 */
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#define STM32_HCLK_FREQUENCY STM32_SYSCLK_FREQUENCY
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#define STM32_BOARD_HCLK STM32_HCLK_FREQUENCY /* same as above, to satisfy compiler */
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/* APB1 clock (PCLK1) is HCLK/4 (42MHz) */
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#define STM32_RCC_CFGR_PPRE1 RCC_CFGR_PPRE1_HCLKd4 /* PCLK1 = HCLK / 4 */
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#define STM32_PCLK1_FREQUENCY (STM32_HCLK_FREQUENCY/4)
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/* Timers driven from APB1 will be twice PCLK1 */
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#define STM32_APB1_TIM2_CLKIN (2*STM32_PCLK1_FREQUENCY)
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#define STM32_APB1_TIM3_CLKIN (2*STM32_PCLK1_FREQUENCY)
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#define STM32_APB1_TIM4_CLKIN (2*STM32_PCLK1_FREQUENCY)
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#define STM32_APB1_TIM5_CLKIN (2*STM32_PCLK1_FREQUENCY)
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#define STM32_APB1_TIM6_CLKIN (2*STM32_PCLK1_FREQUENCY)
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#define STM32_APB1_TIM7_CLKIN (2*STM32_PCLK1_FREQUENCY)
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#define STM32_APB1_TIM12_CLKIN (2*STM32_PCLK1_FREQUENCY)
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#define STM32_APB1_TIM13_CLKIN (2*STM32_PCLK1_FREQUENCY)
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#define STM32_APB1_TIM14_CLKIN (2*STM32_PCLK1_FREQUENCY)
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/* APB2 clock (PCLK2) is HCLK/2 (84MHz) */
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#define STM32_RCC_CFGR_PPRE2 RCC_CFGR_PPRE2_HCLKd2 /* PCLK2 = HCLK / 2 */
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#define STM32_PCLK2_FREQUENCY (STM32_HCLK_FREQUENCY/2)
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/* Timers driven from APB2 will be twice PCLK2 */
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#define STM32_APB2_TIM1_CLKIN (2*STM32_PCLK2_FREQUENCY)
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#define STM32_APB2_TIM8_CLKIN (2*STM32_PCLK2_FREQUENCY)
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#define STM32_APB2_TIM9_CLKIN (2*STM32_PCLK2_FREQUENCY)
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#define STM32_APB2_TIM10_CLKIN (2*STM32_PCLK2_FREQUENCY)
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#define STM32_APB2_TIM11_CLKIN (2*STM32_PCLK2_FREQUENCY)
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/* Timer Frequencies, if APBx is set to 1, frequency is same to APBx
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* otherwise frequency is 2xAPBx.
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* Note: TIM1,8-11 are on APB2, others on APB1
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*/
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#define BOARD_TIM1_FREQUENCY STM32_APB2_TIM1_CLKIN
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#define BOARD_TIM2_FREQUENCY STM32_APB1_TIM2_CLKIN
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#define BOARD_TIM3_FREQUENCY STM32_APB1_TIM3_CLKIN
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#define BOARD_TIM4_FREQUENCY STM32_APB1_TIM4_CLKIN
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#define BOARD_TIM5_FREQUENCY STM32_APB1_TIM5_CLKIN
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#define BOARD_TIM6_FREQUENCY STM32_APB1_TIM6_CLKIN
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#define BOARD_TIM7_FREQUENCY STM32_APB1_TIM7_CLKIN
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#define BOARD_TIM8_FREQUENCY STM32_APB2_TIM8_CLKIN
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#define BOARD_TIM9_FREQUENCY STM32_APB2_TIM9_CLKIN
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#define BOARD_TIM10_FREQUENCY STM32_APB2_TIM10_CLKIN
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#define BOARD_TIM11_FREQUENCY STM32_APB2_TIM11_CLKIN
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#define BOARD_TIM12_FREQUENCY STM32_APB1_TIM12_CLKIN
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#define BOARD_TIM13_FREQUENCY STM32_APB1_TIM13_CLKIN
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#define BOARD_TIM14_FREQUENCY STM32_APB1_TIM14_CLKIN
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/* SDIO dividers. Note that slower clocking is required when DMA is disabled
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* in order to avoid RX overrun/TX underrun errors due to delayed responses
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* to service FIFOs in interrupt driven mode. These values have not been
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* tuned!!!
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*
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* SDIOCLK=48MHz, SDIO_CK=SDIOCLK/(118+2)=400 KHz
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*/
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#define SDIO_INIT_CLKDIV (118 << SDIO_CLKCR_CLKDIV_SHIFT)
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/* DMA ON: SDIOCLK=48MHz, SDIO_CK=SDIOCLK/(1+2)=16 MHz
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* DMA OFF: SDIOCLK=48MHz, SDIO_CK=SDIOCLK/(2+2)=12 MHz
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*/
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#ifdef CONFIG_STM32_SDIO_DMA
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# define SDIO_MMCXFR_CLKDIV (1 << SDIO_CLKCR_CLKDIV_SHIFT)
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#else
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# define SDIO_MMCXFR_CLKDIV (2 << SDIO_CLKCR_CLKDIV_SHIFT)
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#endif
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/* DMA ON: SDIOCLK=48MHz, SDIO_CK=SDIOCLK/(1+2)=16 MHz
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* DMA OFF: SDIOCLK=48MHz, SDIO_CK=SDIOCLK/(2+2)=12 MHz
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*/
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#ifdef CONFIG_STM32_SDIO_DMA
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# define SDIO_SDXFR_CLKDIV (1 << SDIO_CLKCR_CLKDIV_SHIFT)
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#else
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# define SDIO_SDXFR_CLKDIV (2 << SDIO_CLKCR_CLKDIV_SHIFT)
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#endif
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/* DMA Channl/Stream Selections *****************************************************/
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/* Stream selections are arbitrary for now but might become important in the future
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* is we set aside more DMA channels/streams.
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*
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* SDIO DMA
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* DMAMAP_SDIO_1 = Channel 4, Stream 3 <- may later be used by SPI DMA
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* DMAMAP_SDIO_2 = Channel 4, Stream 6
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*/
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#define DMAMAP_SDIO DMAMAP_SDIO_1
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/* Alternate function pin selections ************************************************/
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/* UARTs */
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#define GPIO_USART1_RX GPIO_USART1_RX_1 /* Console in from IO */
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#define GPIO_USART1_TX 0 /* USART1 is RX-only */
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#define GPIO_USART2_RX GPIO_USART2_RX_2
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#define GPIO_USART2_TX GPIO_USART2_TX_2
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#define GPIO_USART2_RTS GPIO_USART2_RTS_2
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#define GPIO_USART2_CTS GPIO_USART2_CTS_2
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#define GPIO_USART3_RX GPIO_USART3_RX_3
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#define GPIO_USART3_TX GPIO_USART3_TX_3
|
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#define GPIO_USART3_RTS GPIO_USART3_RTS_2
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#define GPIO_USART3_CTS GPIO_USART3_CTS_2
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|
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#define GPIO_UART4_RX GPIO_UART4_RX_1
|
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#define GPIO_UART4_TX GPIO_UART4_TX_1
|
||||
|
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#define GPIO_USART6_RX GPIO_USART6_RX_1
|
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#define GPIO_USART6_TX GPIO_USART6_TX_1
|
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|
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#define GPIO_UART7_RX GPIO_UART7_RX_1
|
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#define GPIO_UART7_TX GPIO_UART7_TX_1
|
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|
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/* UART8 has no alternate pin config */
|
||||
|
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/* UART RX DMA configurations */
|
||||
|
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#define DMAMAP_USART1_RX DMAMAP_USART1_RX_2
|
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#define DMAMAP_USART6_RX DMAMAP_USART6_RX_2
|
||||
|
||||
/* CAN
|
||||
*
|
||||
* CAN1 is routed to the onboard transceiver.
|
||||
* CAN2 is routed to the expansion connector.
|
||||
*/
|
||||
|
||||
#define GPIO_CAN1_RX GPIO_CAN1_RX_3
|
||||
#define GPIO_CAN1_TX GPIO_CAN1_TX_3
|
||||
#define GPIO_CAN2_RX GPIO_CAN2_RX_1
|
||||
#define GPIO_CAN2_TX GPIO_CAN2_TX_2
|
||||
|
||||
/* I2C
|
||||
*
|
||||
* The optional _GPIO configurations allow the I2C driver to manually
|
||||
* reset the bus to clear stuck slaves. They match the pin configuration,
|
||||
* but are normally-high GPIOs.
|
||||
*/
|
||||
|
||||
#define GPIO_I2C1_SCL GPIO_I2C1_SCL_2
|
||||
#define GPIO_I2C1_SDA GPIO_I2C1_SDA_2
|
||||
#define GPIO_I2C1_SCL_GPIO \
|
||||
(GPIO_OUTPUT|GPIO_OPENDRAIN|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN8)
|
||||
#define GPIO_I2C1_SDA_GPIO \
|
||||
(GPIO_OUTPUT|GPIO_OPENDRAIN|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN9)
|
||||
|
||||
#define GPIO_I2C2_SCL GPIO_I2C2_SCL_1
|
||||
#define GPIO_I2C2_SDA GPIO_I2C2_SDA_1
|
||||
#define GPIO_I2C2_SCL_GPIO \
|
||||
(GPIO_OUTPUT|GPIO_OPENDRAIN|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN10)
|
||||
#define GPIO_I2C2_SDA_GPIO \
|
||||
(GPIO_OUTPUT|GPIO_OPENDRAIN|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN11)
|
||||
|
||||
/* SPI
|
||||
*
|
||||
* There are sensors on SPI1, and SPI2 is connected to the FRAM.
|
||||
*/
|
||||
|
||||
#define GPIO_SPI1_MISO GPIO_SPI1_MISO_1
|
||||
#define GPIO_SPI1_MOSI GPIO_SPI1_MOSI_1
|
||||
#define GPIO_SPI1_SCK GPIO_SPI1_SCK_1
|
||||
|
||||
#define GPIO_SPI2_MISO GPIO_SPI2_MISO_1
|
||||
#define GPIO_SPI2_MOSI GPIO_SPI2_MOSI_1
|
||||
#define GPIO_SPI2_SCK GPIO_SPI2_SCK_2
|
||||
|
||||
#define GPIO_SPI4_MISO GPIO_SPI4_MISO_1
|
||||
#define GPIO_SPI4_MOSI GPIO_SPI4_MOSI_1
|
||||
#define GPIO_SPI4_SCK GPIO_SPI4_SCK_1
|
||||
|
||||
/* LED Definitions. Needed if CONFIG_ARCH_LEDs is defined */
|
||||
|
||||
#define LED_STARTED 0
|
||||
#define LED_HEAPALLOCATE 0
|
||||
#define LED_IRQSENABLED 0
|
||||
#define LED_STACKCREATED 1
|
||||
#define LED_INIRQ 1
|
||||
#define LED_SIGNAL 1
|
||||
#define LED_ASSERTION 1
|
||||
#define LED_PANIC 1
|
||||
|
||||
/* Board provides GPIO or other Hardware for signaling to timing analyzer */
|
||||
|
||||
#if defined(CONFIG_BOARD_USE_PROBES)
|
||||
# define PROBE_N(n) (1<<((n)-1))
|
||||
# define PROBE_1 (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTE|GPIO_PIN14)
|
||||
# define PROBE_2 (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTE|GPIO_PIN13)
|
||||
# define PROBE_3 (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTE|GPIO_PIN11)
|
||||
# define PROBE_4 (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTE|GPIO_PIN9)
|
||||
# define PROBE_5 (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTD|GPIO_PIN13)
|
||||
# define PROBE_6 (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTD|GPIO_PIN14)
|
||||
|
||||
# define PROBE_INIT(mask) \
|
||||
do { \
|
||||
if ((mask)& PROBE_N(1)) { stm32_configgpio(PROBE_1); } \
|
||||
if ((mask)& PROBE_N(2)) { stm32_configgpio(PROBE_2); } \
|
||||
if ((mask)& PROBE_N(3)) { stm32_configgpio(PROBE_3); } \
|
||||
if ((mask)& PROBE_N(4)) { stm32_configgpio(PROBE_4); } \
|
||||
if ((mask)& PROBE_N(5)) { stm32_configgpio(PROBE_5); } \
|
||||
if ((mask)& PROBE_N(6)) { stm32_configgpio(PROBE_6); } \
|
||||
} while(0)
|
||||
|
||||
# define PROBE(n,s) do {stm32_gpiowrite(PROBE_##n,(s));}while(0)
|
||||
# define PROBE_MARK(n) PROBE(n,false);PROBE(n,true)
|
||||
#else
|
||||
# define PROBE_INIT(mask)
|
||||
# define PROBE(n,s)
|
||||
# define PROBE_MARK(n)
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
/************************************************************************************
|
||||
* Public Data
|
||||
************************************************************************************/
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
|
||||
#undef EXTERN
|
||||
#if defined(__cplusplus)
|
||||
#define EXTERN extern "C"
|
||||
extern "C" {
|
||||
#else
|
||||
#define EXTERN extern
|
||||
#endif
|
||||
|
||||
/************************************************************************************
|
||||
* Public Function Prototypes
|
||||
************************************************************************************/
|
||||
/************************************************************************************
|
||||
* Name: stm32_boardinitialize
|
||||
*
|
||||
* Description:
|
||||
* All STM32 architectures must provide the following entry point. This entry point
|
||||
* is called early in the initialization -- after all memory has been configured
|
||||
* and mapped but before any devices have been initialized.
|
||||
*
|
||||
************************************************************************************/
|
||||
|
||||
EXTERN void stm32_boardinitialize(void);
|
||||
|
||||
#undef EXTERN
|
||||
#if defined(__cplusplus)
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __ASSEMBLY__ */
|
||||
#endif /* __ARCH_BOARD_BOARD_H */
|
||||
@@ -1,42 +0,0 @@
|
||||
/****************************************************************************
|
||||
*
|
||||
* Copyright (C) 2013 PX4 Development Team. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* 3. Neither the name PX4 nor the names of its contributors may be
|
||||
* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
/**
|
||||
* nsh_romfsetc.h
|
||||
*
|
||||
* This file is a stub for 'make export' purposes; the actual ROMFS
|
||||
* must be supplied by the library client.
|
||||
*/
|
||||
|
||||
extern unsigned char romfs_img[];
|
||||
extern unsigned int romfs_img_len;
|
||||
@@ -1,164 +0,0 @@
|
||||
############################################################################
|
||||
# nuttx-configs/px4fmu-v3/nsh/Make.defs
|
||||
#
|
||||
# Copyright (C) 2011 Gregory Nutt. All rights reserved.
|
||||
# Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
#
|
||||
# Redistribution and use in source and binary forms, with or without
|
||||
# modification, are permitted provided that the following conditions
|
||||
# are met:
|
||||
#
|
||||
# 1. Redistributions of source code must retain the above copyright
|
||||
# notice, this list of conditions and the following disclaimer.
|
||||
# 2. Redistributions in binary form must reproduce the above copyright
|
||||
# notice, this list of conditions and the following disclaimer in
|
||||
# the documentation and/or other materials provided with the
|
||||
# distribution.
|
||||
# 3. Neither the name NuttX nor the names of its contributors may be
|
||||
# used to endorse or promote products derived from this software
|
||||
# without specific prior written permission.
|
||||
#
|
||||
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
# POSSIBILITY OF SUCH DAMAGE.
|
||||
#
|
||||
############################################################################
|
||||
|
||||
include ${TOPDIR}/.config
|
||||
include ${TOPDIR}/tools/Config.mk
|
||||
include $(TOPDIR)/PX4_Warnings.mk
|
||||
include $(TOPDIR)/PX4_Config.mk
|
||||
|
||||
#
|
||||
# We only support building with the ARM bare-metal toolchain from
|
||||
# https://launchpad.net/gcc-arm-embedded on Windows, Linux or Mac OS.
|
||||
#
|
||||
CONFIG_ARMV7M_TOOLCHAIN := GNU_EABI${HOST_OS_FIRST_LETTER}
|
||||
|
||||
include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs
|
||||
|
||||
CC = $(CROSSDEV)gcc
|
||||
CXX = $(CROSSDEV)g++
|
||||
CPP = $(CROSSDEV)gcc -E
|
||||
LD = $(CROSSDEV)ld
|
||||
AR = $(CROSSDEV)ar rcs
|
||||
NM = $(CROSSDEV)nm
|
||||
OBJCOPY = $(CROSSDEV)objcopy
|
||||
OBJDUMP = $(CROSSDEV)objdump
|
||||
|
||||
MAXOPTIMIZATION = -Os
|
||||
ARCHCPUFLAGS = -mcpu=cortex-m4 \
|
||||
-mthumb \
|
||||
-march=armv7e-m \
|
||||
-mfpu=fpv4-sp-d16 \
|
||||
-mfloat-abi=hard
|
||||
|
||||
# Enable precise stack overflow tracking
|
||||
|
||||
ifeq ($(CONFIG_ARMV7M_STACKCHECK),y)
|
||||
INSTRUMENTATIONDEFINES = -finstrument-functions -ffixed-r10
|
||||
endif
|
||||
|
||||
# Pull in *just* libm from the toolchain ... this is grody
|
||||
|
||||
LIBM = "${shell $(CC) $(ARCHCPUFLAGS) -print-file-name=libm.a}"
|
||||
EXTRA_LIBS += $(LIBM)
|
||||
|
||||
# Use our linker script
|
||||
|
||||
LDSCRIPT = ld.script
|
||||
|
||||
ifeq ($(WINTOOL),y)
|
||||
# Windows-native toolchains
|
||||
DIRLINK = $(TOPDIR)/tools/copydir.sh
|
||||
DIRUNLINK = $(TOPDIR)/tools/unlink.sh
|
||||
MKDEP = $(TOPDIR)/tools/mknulldeps.sh
|
||||
ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}"
|
||||
ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}"
|
||||
ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}"
|
||||
else
|
||||
ifeq ($(PX4_WINTOOL),y)
|
||||
# Windows-native toolchains (MSYS)
|
||||
DIRLINK = $(TOPDIR)/tools/copydir.sh
|
||||
DIRUNLINK = $(TOPDIR)/tools/unlink.sh
|
||||
MKDEP = $(TOPDIR)/tools/mknulldeps.sh
|
||||
ARCHINCLUDES = -I. -isystem $(TOPDIR)/include
|
||||
ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx
|
||||
ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)
|
||||
else
|
||||
# Linux/Cygwin-native toolchain
|
||||
MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT)
|
||||
ARCHINCLUDES = -I. -isystem $(TOPDIR)/include
|
||||
ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx
|
||||
ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)
|
||||
endif
|
||||
endif
|
||||
|
||||
# Tool versions
|
||||
|
||||
ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'}
|
||||
ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1}
|
||||
|
||||
# Optimization flags
|
||||
|
||||
ARCHOPTIMIZATION = $(MAXOPTIMIZATION) \
|
||||
-fno-strict-aliasing \
|
||||
-fno-strength-reduce \
|
||||
-fomit-frame-pointer \
|
||||
-funsafe-math-optimizations \
|
||||
-fno-builtin-printf \
|
||||
-ffunction-sections \
|
||||
-fdata-sections
|
||||
|
||||
ifeq ("${CONFIG_DEBUG_SYMBOLS}","y")
|
||||
ARCHOPTIMIZATION += -g
|
||||
endif
|
||||
|
||||
ARCHCFLAGS = -std=gnu99
|
||||
ARCHCXXFLAGS = -fno-exceptions -fno-rtti -std=gnu++0x
|
||||
ARCHWARNINGS = $(PX4_ARCHWARNINGS)
|
||||
ARCHCWARNINGS = $(PX4_ARCHWARNINGS) $(PX4_ARCHCWARNINGS)
|
||||
ARCHWARNINGSXX = $(ARCHWARNINGS) $(PX4_ARCHWARNINGSXX)
|
||||
ARCHDEFINES =
|
||||
ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
|
||||
|
||||
# This seems to be the only way to add linker flags
|
||||
|
||||
EXTRA_LIBS += --warn-common \
|
||||
--gc-sections
|
||||
|
||||
CFLAGS = $(ARCHCFLAGS) $(ARCHCWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(INSTRUMENTATIONDEFINES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe -fno-common
|
||||
CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
|
||||
CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(INSTRUMENTATIONDEFINES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
|
||||
CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
|
||||
CPPFLAGS = $(ARCHINCLUDES) $(INSTRUMENTATIONDEFINES) $(ARCHDEFINES) $(EXTRADEFINES)
|
||||
AFLAGS = $(CFLAGS) -D__ASSEMBLY__
|
||||
|
||||
NXFLATLDFLAGS1 = -r -d -warn-common
|
||||
NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat.ld -no-check-sections
|
||||
LDNXFLATFLAGS = -e main -s 2048
|
||||
|
||||
OBJEXT = .o
|
||||
LIBEXT = .a
|
||||
EXEEXT =
|
||||
|
||||
# Produce partially-linked $1 from files in $2
|
||||
|
||||
define PRELINK
|
||||
@echo "PRELINK: $1"
|
||||
$(Q) $(LD) -Ur -o $1 $2 && $(OBJCOPY) --localize-hidden $1
|
||||
endef
|
||||
|
||||
HOSTCC = gcc
|
||||
HOSTINCLUDES = -I.
|
||||
HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -g -pipe
|
||||
HOSTLDFLAGS =
|
||||
File diff suppressed because it is too large
Load Diff
@@ -1,86 +0,0 @@
|
||||
############################################################################
|
||||
#
|
||||
# Copyright (C) 2011 Gregory Nutt. All rights reserved.
|
||||
# Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
#
|
||||
# Redistribution and use in source and binary forms, with or without
|
||||
# modification, are permitted provided that the following conditions
|
||||
# are met:
|
||||
#
|
||||
# 1. Redistributions of source code must retain the above copyright
|
||||
# notice, this list of conditions and the following disclaimer.
|
||||
# 2. Redistributions in binary form must reproduce the above copyright
|
||||
# notice, this list of conditions and the following disclaimer in
|
||||
# the documentation and/or other materials provided with the
|
||||
# distribution.
|
||||
# 3. Neither the name NuttX nor the names of its contributors may be
|
||||
# used to endorse or promote products derived from this software
|
||||
# without specific prior written permission.
|
||||
#
|
||||
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
# POSSIBILITY OF SUCH DAMAGE.
|
||||
#
|
||||
############################################################################
|
||||
|
||||
-include $(TOPDIR)/Make.defs
|
||||
|
||||
CFLAGS += -I$(TOPDIR)/sched
|
||||
|
||||
ASRCS =
|
||||
AOBJS = $(ASRCS:.S=$(OBJEXT))
|
||||
|
||||
CSRCS = empty.c
|
||||
COBJS = $(CSRCS:.c=$(OBJEXT))
|
||||
|
||||
SRCS = $(ASRCS) $(CSRCS)
|
||||
OBJS = $(AOBJS) $(COBJS)
|
||||
|
||||
ARCH_SRCDIR = $(TOPDIR)/arch/$(CONFIG_ARCH)/src
|
||||
ifeq ($(WINTOOL),y)
|
||||
CFLAGS += -I "${shell cygpath -w $(ARCH_SRCDIR)/chip}" \
|
||||
-I "${shell cygpath -w $(ARCH_SRCDIR)/common}" \
|
||||
-I "${shell cygpath -w $(ARCH_SRCDIR)/armv7-m}"
|
||||
else
|
||||
CFLAGS += -I$(ARCH_SRCDIR)/chip -I$(ARCH_SRCDIR)/common -I$(ARCH_SRCDIR)/armv7-m
|
||||
endif
|
||||
|
||||
all: libboard$(LIBEXT)
|
||||
|
||||
$(AOBJS): %$(OBJEXT): %.S
|
||||
$(call ASSEMBLE, $<, $@)
|
||||
|
||||
$(COBJS) $(LINKOBJS): %$(OBJEXT): %.c
|
||||
$(call COMPILE, $<, $@)
|
||||
|
||||
libboard$(LIBEXT): $(OBJS)
|
||||
$(call ARCHIVE, $@, $(OBJS))
|
||||
|
||||
.depend: Makefile $(SRCS)
|
||||
$(Q) $(MKDEP) $(CC) -- $(CFLAGS) -- $(SRCS) >Make.dep
|
||||
$(Q) touch $@
|
||||
|
||||
depend: .depend
|
||||
|
||||
clean:
|
||||
$(call DELFILE, libboard$(LIBEXT))
|
||||
$(call CLEAN)
|
||||
|
||||
distclean: clean
|
||||
$(call DELFILE, Make.dep)
|
||||
$(call DELFILE, .depend)
|
||||
|
||||
ifneq ($(BOARD_CONTEXT),y)
|
||||
context:
|
||||
endif
|
||||
|
||||
-include Make.dep
|
||||
@@ -1,4 +0,0 @@
|
||||
/*
|
||||
* There are no source files here, but libboard.a can't be empty, so
|
||||
* we have this empty source file to keep it company.
|
||||
*/
|
||||
@@ -34,6 +34,7 @@ px4_add_module(
|
||||
MODULE drivers__boards__px4fmu-v2
|
||||
SRCS
|
||||
px4fmu_can.c
|
||||
px4fmu_i2c.c
|
||||
px4fmu_init.c
|
||||
px4fmu_led.c
|
||||
px4fmu_spi.c
|
||||
|
||||
@@ -47,6 +47,17 @@
|
||||
#include <nuttx/compiler.h>
|
||||
#include <stdint.h>
|
||||
|
||||
/* Run time Hardware detection */
|
||||
#define BOARD_HAS_SIMPLE_HW_VERSIONING 1
|
||||
#define HW_VER_PB4 (GPIO_INPUT|GPIO_PULLUP|GPIO_PORTB|GPIO_PIN4)
|
||||
#define HW_VER_PB12 (GPIO_INPUT|GPIO_PULLUP|GPIO_PORTB|GPIO_PIN12)
|
||||
#define HW_VER_PB4_INIT (GPIO_SPI1_EXTI_DRDY_PB4)
|
||||
#define HW_VER_PB12_INIT (GPIO_INPUT|GPIO_FLOAT|GPIO_PORTB|GPIO_PIN12)
|
||||
#define HW_VER_FMUV2_STATE 0x8 /* PB12:PU:1 PB12:PD:0 PB4:PU:0 PB4PD:0 */
|
||||
#define HW_VER_FMUV3_STATE 0xE /* PB12:PU:1 PB12:PD:1 PB4:PU:1 PB4PD:0 */
|
||||
#define HW_VER_FMUV2MINI_STATE 0xA /* PB12:PU:1 PB12:PD:0 PB4:PU:1 PB4PD:0 */
|
||||
#define HW_VER_TYPE_INIT {'V','2',0, 0}
|
||||
|
||||
/****************************************************************************************************
|
||||
* Definitions
|
||||
****************************************************************************************************/
|
||||
@@ -217,6 +228,135 @@
|
||||
#define PX4_I2C_OBDEV_HMC5883 0x1e
|
||||
#define PX4_I2C_OBDEV_LIS3MDL 0x1e
|
||||
|
||||
/*----------------------------------------------------------*/
|
||||
/* FMUv3 Cube SPI chip selects and DRDY */
|
||||
/*----------------------------------------------------------*/
|
||||
/* Due to inconsistent use of chip select and dry signal on
|
||||
* different board that use this build. We are defining the GPIO
|
||||
* inclusive of the SPI port and GPIO to help identify pins the
|
||||
* are part of the sensor Net's controlled by different power
|
||||
* domains.
|
||||
*
|
||||
* --------------- SPI1 -------------------- SPI4 -------------- Incompatibilities ---------
|
||||
* FMUv3 Cube: FmuV2 PixhawkMini
|
||||
* Power Domain: VDD_3V3_SENSORS_EN NA V3V:SPI V5:SPI4 V3V:SPI1 No SPI4
|
||||
* PA5 SPI_INT_SCK
|
||||
* PA6 SPI_INT_MISO
|
||||
* PA7 SPI_INT_MOSI
|
||||
* PB0 EXTERN_DRDY SPI1:GYRO_DRDY NC
|
||||
* PB1 MAG_DRDY nEXTERN_CS -SPI1:MAG_DRDY NC
|
||||
* PB4 NC SPI1:ACCEL_DRDY NC
|
||||
* PC1 SPI_INT_MAG_!CS -ADC1_IN11 NC
|
||||
* PC2 nMPU_CS @MPU6000 @MPU9250
|
||||
* PC13 nGYRO_EXT_CS SPI1:nGYRO_CS NC
|
||||
* PC14 nBARO_EXT_CS GPIO_EXT_1 -20608_DRDY
|
||||
* PC15 nACCEL_MAG_EXT_CS SPI1:nACCEL_MAG_CS 20608_CS
|
||||
* PD7 nBARO_CS
|
||||
* PD15 nMPU_DRDY @MPU6000 @MPU9250
|
||||
* PE2 SPI_EXT_SCK NC
|
||||
* PE4 MPU_EXT_CS SPI4:nSPI_EXT_NSS NC
|
||||
* PE5 SPI_EXT_MISO NC
|
||||
* PE6 SPI_EXT_MOSI NC
|
||||
*
|
||||
*
|
||||
* Notes: Prefixed with @ Does not effect board control
|
||||
* Prefixed with + Input used as Output
|
||||
* Prefixed with - Output used as Input
|
||||
* Prefixed with SPIn: Bus changed
|
||||
*
|
||||
*/
|
||||
|
||||
/* FMUv3 Cube SPI1 chip selects */
|
||||
/* Was a spare ACD IN10 on V2 */
|
||||
#define GPIO_SPI1_CS_PC1 (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET|GPIO_PORTC|GPIO_PIN1)
|
||||
#define GPIO_SPI4_CS_PB1 (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN1)
|
||||
#define GPIO_SPI4_CS_PC13 GPIO_SPI1_CS_PC13
|
||||
#define GPIO_SPI4_CS_PC14 GPIO_SPI4_GPIO_PC14
|
||||
#define GPIO_SPI4_CS_PC15 GPIO_SPI1_CS_PC15
|
||||
|
||||
/* FMUv3 Cube chip selects Assignments */
|
||||
/* Cube 2.0 V2.1 */
|
||||
#define GPIO_SPI1_CS_MPU GPIO_SPI1_CS_PC2 /* MPU600 MPU9250 */
|
||||
#define GPIO_SPI1_CS_BARO GPIO_SPI1_CS_PD7 /* MS5611 MS5611 */
|
||||
#define GPIO_SPI1_CS_HMC GPIO_SPI1_CS_PC1 /* HMC5983 Removed */
|
||||
|
||||
/* N.B. bus moves from SPI1 to SPI4 */
|
||||
#define GPIO_SPI4_GYRO_EXT_CS GPIO_SPI4_CS_PC13
|
||||
#define GPIO_SPI4_BARO_EXT_CS GPIO_SPI4_CS_PC14
|
||||
#define GPIO_SPI4_ACCEL_MAG_EXT_CS GPIO_SPI4_CS_PC15
|
||||
|
||||
/* No move */
|
||||
#define GPIO_SPI4_MPU_EXT_CS GPIO_SPI4_NSS_PE4
|
||||
|
||||
/* FMUv3 DRDY Assignments */
|
||||
#define GPIO_SPI4_EXTI_DRDY_PB0 GPIO_SPI1_EXTI_DRDY_PB0
|
||||
#define GPIO_SPI4_EXTI_EXTERN_DRDY GPIO_SPI4_EXTI_DRDY_PB0
|
||||
#define GPIO_SPI4_EXTERN_CS GPIO_SPI4_CS_PB1
|
||||
/* PB1 is an External CS on V3 */
|
||||
|
||||
#define PX4_SPIDEV_HMC 5
|
||||
|
||||
/*----------------------------------------------------------*/
|
||||
/* End FMUv3 Cube SPI chip selects and DRDY */
|
||||
/*----------------------------------------------------------*/
|
||||
/*----------------------------------------------------------*/
|
||||
/* Due to inconsistent use of chip select and dry signal on
|
||||
* different board that use this build. We are defining the GPIO
|
||||
* inclusive of the SPI port and GPIO to help identify pins the
|
||||
* are part of the sensor Net's controlled by different power
|
||||
* domains.
|
||||
*
|
||||
* --------------- SPI1 -------------------- SPI4 -------------- Incompatibilities ---------
|
||||
* FMUv2 Pixhawk Mini FmuV2 FmuV3 Cube
|
||||
* Power Domain: VDD_3V3_SENSORS_EN NA V3V:SPI V5:SPI4 V3V:SPI1&SPI4
|
||||
* PA5 SPI_INT_SCK
|
||||
* PA6 SPI_INT_MISO
|
||||
* PA7 SPI_INT_MOSI
|
||||
* PB0 NC SPI1:GYRO_DRDY SPI4:EXTERN_DRDY
|
||||
* PB1 NC -SPI1:MAG_DRDY +SPI4:nEXTERN_CS
|
||||
* PB4 NC SPI1:ACCEL_DRDY NC
|
||||
* PC1 Spare ADC ( NC ) +SPI1:SPI_INT_MAG_!CS
|
||||
* PC2 nMPU_CS @MPU6000 @MPU6000|MPU9250
|
||||
* PC13 NC SPI1:nGYRO_CS SPI4:nGYRO_EXT_CS
|
||||
* PC14 20608_DRDY +GPIO_EXT_1 nBARO_EXT_CS
|
||||
* PC15 20608_CS nACCEL_MAG_CS SPI4:nACCEL_MAG_EXT_CS
|
||||
* PD7 nBARO_CS
|
||||
* PD15 nMPU_DRDY @MPU6000 @MPU6000|MPU9250
|
||||
* PE2 NC SPI_EXT_SCK SPI_EXT_SCK
|
||||
* PE4 NC SPI4:nSPI_EXT_NSS SPI4:nMPU_EXT_CS
|
||||
* PE5 NC SPI_EXT_MISO SPI_EXT_MISO
|
||||
* PE6 NC SPI_EXT_MOSI SPI_EXT_MOSI
|
||||
*
|
||||
* Notes: Prefixed with @ Does not effect board control
|
||||
* Prefixed with + Input used as Output
|
||||
* Prefixed with - Output used as Input
|
||||
* Prefixed with SPIn: Bus changed
|
||||
*
|
||||
*/
|
||||
|
||||
/*----------------------------------------------------------*/
|
||||
/* FMUv2 PixhawkMini SPI chip selects and DRDY */
|
||||
/*----------------------------------------------------------*/
|
||||
|
||||
/* FMUv2 PixhawkMini SPI1 chip selects */
|
||||
|
||||
/* FMUv3 Cube chip selects Assignments */
|
||||
|
||||
#define GPIO_SPI1_CS_MPU GPIO_SPI1_CS_PC2 /* MPU9250 */
|
||||
#define GPIO_SPI1_CS_BARO GPIO_SPI1_CS_PD7 /* MS5611 */
|
||||
#define GPIO_SPI1_CS_20608 GPIO_SPI1_CS_PC15 /* ICM20608 */
|
||||
|
||||
/* FMUv3 DRDY Assignments */
|
||||
|
||||
/* Pixhawk mini has reused the PC14 GPIO_SPI_CS_EXT1 signal that was associated
|
||||
* with SPI4.
|
||||
*/
|
||||
#define GPIO_SPI1_EXTI_20608_DRDY_PC14 (GPIO_INPUT|GPIO_FLOAT|GPIO_EXTI|GPIO_PORTC|GPIO_PIN14)
|
||||
|
||||
#define PX4_SPIDEV_ICM_20608 6 /* ICM_20608 on PC15 */
|
||||
|
||||
|
||||
|
||||
/*
|
||||
* ADC channels
|
||||
*
|
||||
|
||||
@@ -120,16 +120,11 @@ __END_DECLS
|
||||
* Private Data
|
||||
****************************************************************************/
|
||||
#if defined(BOARD_HAS_SIMPLE_HW_VERSIONING)
|
||||
static int hw_version = -1;
|
||||
static int hw_revision = -1;
|
||||
static int hw_version = 0;
|
||||
static int hw_revision = 0;
|
||||
static char hw_type[4] = HW_VER_TYPE_INIT;
|
||||
#endif
|
||||
/****************************************************************************
|
||||
* Protected Functions
|
||||
****************************************************************************/
|
||||
/****************************************************************************
|
||||
* Public Functions
|
||||
****************************************************************************/
|
||||
|
||||
/************************************************************************************
|
||||
* Name: board_peripheral_reset
|
||||
*
|
||||
@@ -229,7 +224,7 @@ __EXPORT void board_on_reset(int status)
|
||||
#if defined(BOARD_HAS_SIMPLE_HW_VERSIONING)
|
||||
static int determin_hw_version(int *version, int *revision)
|
||||
{
|
||||
*revision = -1; /* unknown */
|
||||
*revision = 0; /* default revision */
|
||||
int rv = 0;
|
||||
int pos = 0;
|
||||
stm32_configgpio(GPIO_PULLDOWN | (HW_VER_PB4 & ~GPIO_PUPD_MASK));
|
||||
|
||||
@@ -549,3 +549,18 @@ __EXPORT void board_spi_reset(int ms)
|
||||
|
||||
stm32_spi1_initialize();
|
||||
}
|
||||
|
||||
__EXPORT bool px4_spi_bus_external(int bus)
|
||||
{
|
||||
if (HW_VER_FMUV3 == board_get_hw_version()) {
|
||||
/* all FMUv3 2.1 spi buses are internal */
|
||||
return false;
|
||||
|
||||
} else {
|
||||
if (bus == PX4_SPI_BUS_EXT) {
|
||||
return true;
|
||||
}
|
||||
}
|
||||
|
||||
return false;
|
||||
}
|
||||
|
||||
@@ -1,45 +0,0 @@
|
||||
############################################################################
|
||||
#
|
||||
# Copyright (c) 2015 PX4 Development Team. All rights reserved.
|
||||
#
|
||||
# Redistribution and use in source and binary forms, with or without
|
||||
# modification, are permitted provided that the following conditions
|
||||
# are met:
|
||||
#
|
||||
# 1. Redistributions of source code must retain the above copyright
|
||||
# notice, this list of conditions and the following disclaimer.
|
||||
# 2. Redistributions in binary form must reproduce the above copyright
|
||||
# notice, this list of conditions and the following disclaimer in
|
||||
# the documentation and/or other materials provided with the
|
||||
# distribution.
|
||||
# 3. Neither the name PX4 nor the names of its contributors may be
|
||||
# used to endorse or promote products derived from this software
|
||||
# without specific prior written permission.
|
||||
#
|
||||
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
# POSSIBILITY OF SUCH DAMAGE.
|
||||
#
|
||||
############################################################################
|
||||
px4_add_module(
|
||||
MODULE drivers__boards__px4fmu-v3
|
||||
SRCS
|
||||
px4fmu_can.c
|
||||
px4fmu_i2c.c
|
||||
px4fmu_init.c
|
||||
px4fmu_led.c
|
||||
px4fmu_spi.c
|
||||
px4fmu_timer_config.c
|
||||
px4fmu_usb.c
|
||||
DEPENDS
|
||||
platforms__common
|
||||
)
|
||||
@@ -1,187 +0,0 @@
|
||||
/****************************************************************************
|
||||
*
|
||||
* Copyright (c) 2013-2016 PX4 Development Team. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* 3. Neither the name PX4 nor the names of its contributors may be
|
||||
* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
/**
|
||||
* @file board_config.h
|
||||
*
|
||||
* PX4FMUv3 internal definitions: identical to fmuv2 except for usable flash
|
||||
*/
|
||||
|
||||
#pragma once
|
||||
|
||||
/****************************************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************************************/
|
||||
|
||||
/* Run time Hardware detection */
|
||||
#define BOARD_HAS_SIMPLE_HW_VERSIONING 1
|
||||
#define HW_VER_PB4 (GPIO_INPUT|GPIO_PULLUP|GPIO_PORTB|GPIO_PIN4)
|
||||
#define HW_VER_PB12 (GPIO_INPUT|GPIO_PULLUP|GPIO_PORTB|GPIO_PIN12)
|
||||
#define HW_VER_PB4_INIT (GPIO_SPI1_EXTI_DRDY_PB4)
|
||||
#define HW_VER_PB12_INIT (GPIO_INPUT|GPIO_FLOAT|GPIO_PORTB|GPIO_PIN12)
|
||||
#define HW_VER_FMUV2_STATE 0x8 /* PB12:PU:1 PB12:PD:0 PB4:PU:0 PB4PD:0 */
|
||||
#define HW_VER_FMUV3_STATE 0xE /* PB12:PU:1 PB12:PD:1 PB4:PU:1 PB4PD:0 */
|
||||
#define HW_VER_FMUV2MINI_STATE 0xA /* PB12:PU:1 PB12:PD:0 PB4:PU:1 PB4PD:0 */
|
||||
#define HW_VER_TYPE_INIT {'V','2',0, 0}
|
||||
|
||||
/*----------------------------------------------------------*/
|
||||
/* FMUv3 Cube SPI chip selects and DRDY */
|
||||
/*----------------------------------------------------------*/
|
||||
/* Due to inconsistent use of chip select and dry signal on
|
||||
* different board that use this build. We are defining the GPIO
|
||||
* inclusive of the SPI port and GPIO to help identify pins the
|
||||
* are part of the sensor Net's controlled by different power
|
||||
* domains.
|
||||
*
|
||||
* --------------- SPI1 -------------------- SPI4 -------------- Incompatibilities ---------
|
||||
* FMUv3 Cube: FmuV2 PixhawkMini
|
||||
* Power Domain: VDD_3V3_SENSORS_EN NA V3V:SPI V5:SPI4 V3V:SPI1 No SPI4
|
||||
* PA5 SPI_INT_SCK
|
||||
* PA6 SPI_INT_MISO
|
||||
* PA7 SPI_INT_MOSI
|
||||
* PB0 EXTERN_DRDY SPI1:GYRO_DRDY NC
|
||||
* PB1 MAG_DRDY nEXTERN_CS -SPI1:MAG_DRDY NC
|
||||
* PB4 NC SPI1:ACCEL_DRDY NC
|
||||
* PC1 SPI_INT_MAG_!CS -ADC1_IN11 NC
|
||||
* PC2 nMPU_CS @MPU6000 @MPU9250
|
||||
* PC13 nGYRO_EXT_CS SPI1:nGYRO_CS NC
|
||||
* PC14 nBARO_EXT_CS GPIO_EXT_1 -20608_DRDY
|
||||
* PC15 nACCEL_MAG_EXT_CS SPI1:nACCEL_MAG_CS 20608_CS
|
||||
* PD7 nBARO_CS
|
||||
* PD15 nMPU_DRDY @MPU6000 @MPU9250
|
||||
* PE2 SPI_EXT_SCK NC
|
||||
* PE4 MPU_EXT_CS SPI4:nSPI_EXT_NSS NC
|
||||
* PE5 SPI_EXT_MISO NC
|
||||
* PE6 SPI_EXT_MOSI NC
|
||||
*
|
||||
*
|
||||
* Notes: Prefixed with @ Does not effect board control
|
||||
* Prefixed with + Input used as Output
|
||||
* Prefixed with - Output used as Input
|
||||
* Prefixed with SPIn: Bus changed
|
||||
*
|
||||
*/
|
||||
|
||||
/* FMUv3 Cube SPI1 chip selects */
|
||||
/* Was a spare ACD IN10 on V2 */
|
||||
#define GPIO_SPI1_CS_PC1 (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET|GPIO_PORTC|GPIO_PIN1)
|
||||
#define GPIO_SPI4_CS_PB1 (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN1)
|
||||
#define GPIO_SPI4_CS_PC13 GPIO_SPI1_CS_PC13
|
||||
#define GPIO_SPI4_CS_PC14 GPIO_SPI4_GPIO_PC14
|
||||
#define GPIO_SPI4_CS_PC15 GPIO_SPI1_CS_PC15
|
||||
|
||||
/* FMUv3 Cube chip selects Assignments */
|
||||
/* Cube 2.0 V2.1 */
|
||||
#define GPIO_SPI1_CS_MPU GPIO_SPI1_CS_PC2 /* MPU600 MPU9250 */
|
||||
#define GPIO_SPI1_CS_BARO GPIO_SPI1_CS_PD7 /* MS5611 MS5611 */
|
||||
#define GPIO_SPI1_CS_HMC GPIO_SPI1_CS_PC1 /* HMC5983 Removed */
|
||||
|
||||
/* N.B. bus moves from SPI1 to SPI4 */
|
||||
#define GPIO_SPI4_GYRO_EXT_CS GPIO_SPI4_CS_PC13
|
||||
#define GPIO_SPI4_BARO_EXT_CS GPIO_SPI4_CS_PC14
|
||||
#define GPIO_SPI4_ACCEL_MAG_EXT_CS GPIO_SPI4_CS_PC15
|
||||
|
||||
/* No move */
|
||||
#define GPIO_SPI4_MPU_EXT_CS GPIO_SPI4_NSS_PE4
|
||||
|
||||
/* FMUv3 DRDY Assignments */
|
||||
#define GPIO_SPI4_EXTI_DRDY_PB0 GPIO_SPI1_EXTI_DRDY_PB0
|
||||
#define GPIO_SPI4_EXTI_EXTERN_DRDY GPIO_SPI4_EXTI_DRDY_PB0
|
||||
#define GPIO_SPI4_EXTERN_CS GPIO_SPI4_CS_PB1
|
||||
/* PB1 is an External CS on V3 */
|
||||
|
||||
#define PX4_SPIDEV_HMC 5
|
||||
|
||||
/*----------------------------------------------------------*/
|
||||
/* End FMUv3 Cube SPI chip selects and DRDY */
|
||||
/*----------------------------------------------------------*/
|
||||
/*----------------------------------------------------------*/
|
||||
/* Due to inconsistent use of chip select and dry signal on
|
||||
* different board that use this build. We are defining the GPIO
|
||||
* inclusive of the SPI port and GPIO to help identify pins the
|
||||
* are part of the sensor Net's controlled by different power
|
||||
* domains.
|
||||
*
|
||||
* --------------- SPI1 -------------------- SPI4 -------------- Incompatibilities ---------
|
||||
* FMUv2 Pixhawk Mini FmuV2 FmuV3 Cube
|
||||
* Power Domain: VDD_3V3_SENSORS_EN NA V3V:SPI V5:SPI4 V3V:SPI1&SPI4
|
||||
* PA5 SPI_INT_SCK
|
||||
* PA6 SPI_INT_MISO
|
||||
* PA7 SPI_INT_MOSI
|
||||
* PB0 NC SPI1:GYRO_DRDY SPI4:EXTERN_DRDY
|
||||
* PB1 NC -SPI1:MAG_DRDY +SPI4:nEXTERN_CS
|
||||
* PB4 NC SPI1:ACCEL_DRDY NC
|
||||
* PC1 Spare ADC ( NC ) +SPI1:SPI_INT_MAG_!CS
|
||||
* PC2 nMPU_CS @MPU6000 @MPU6000|MPU9250
|
||||
* PC13 NC SPI1:nGYRO_CS SPI4:nGYRO_EXT_CS
|
||||
* PC14 20608_DRDY +GPIO_EXT_1 nBARO_EXT_CS
|
||||
* PC15 20608_CS nACCEL_MAG_CS SPI4:nACCEL_MAG_EXT_CS
|
||||
* PD7 nBARO_CS
|
||||
* PD15 nMPU_DRDY @MPU6000 @MPU6000|MPU9250
|
||||
* PE2 NC SPI_EXT_SCK SPI_EXT_SCK
|
||||
* PE4 NC SPI4:nSPI_EXT_NSS SPI4:nMPU_EXT_CS
|
||||
* PE5 NC SPI_EXT_MISO SPI_EXT_MISO
|
||||
* PE6 NC SPI_EXT_MOSI SPI_EXT_MOSI
|
||||
*
|
||||
* Notes: Prefixed with @ Does not effect board control
|
||||
* Prefixed with + Input used as Output
|
||||
* Prefixed with - Output used as Input
|
||||
* Prefixed with SPIn: Bus changed
|
||||
*
|
||||
*/
|
||||
|
||||
/*----------------------------------------------------------*/
|
||||
/* FMUv2 PixhawkMini SPI chip selects and DRDY */
|
||||
/*----------------------------------------------------------*/
|
||||
|
||||
/* FMUv2 PixhawkMini SPI1 chip selects */
|
||||
|
||||
/* FMUv3 Cube chip selects Assignments */
|
||||
|
||||
#define GPIO_SPI1_CS_MPU GPIO_SPI1_CS_PC2 /* MPU9250 */
|
||||
#define GPIO_SPI1_CS_BARO GPIO_SPI1_CS_PD7 /* MS5611 */
|
||||
#define GPIO_SPI1_CS_20608 GPIO_SPI1_CS_PC15 /* ICM20608 */
|
||||
|
||||
/* FMUv3 DRDY Assignments */
|
||||
|
||||
/* Pixhawk mini has reused the PC14 GPIO_SPI_CS_EXT1 signal that was associated
|
||||
* with SPI4.
|
||||
*/
|
||||
#define GPIO_SPI1_EXTI_20608_DRDY_PC14 (GPIO_INPUT|GPIO_FLOAT|GPIO_EXTI|GPIO_PORTC|GPIO_PIN14)
|
||||
|
||||
#define PX4_SPIDEV_ICM_20608 6 /* ICM_20608 on PC15 */
|
||||
|
||||
/*----------------------------------------------------------*/
|
||||
/* FMUv2 PixhawkMini SPI chip selects and DRDY */
|
||||
/*----------------------------------------------------------*/
|
||||
#include "../px4fmu-v2/board_config.h"
|
||||
@@ -1,130 +0,0 @@
|
||||
/****************************************************************************
|
||||
*
|
||||
* Copyright (C) 2012 PX4 Development Team. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* 3. Neither the name PX4 nor the names of its contributors may be
|
||||
* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
/**
|
||||
* @file px4fmu_can.c
|
||||
*
|
||||
* Board-specific CAN functions.
|
||||
*/
|
||||
|
||||
/************************************************************************************
|
||||
* Included Files
|
||||
************************************************************************************/
|
||||
|
||||
#include <px4_config.h>
|
||||
|
||||
#include <errno.h>
|
||||
#include <debug.h>
|
||||
|
||||
#include <nuttx/can/can.h>
|
||||
#include <arch/board/board.h>
|
||||
|
||||
#include "chip.h"
|
||||
#include "up_arch.h"
|
||||
|
||||
#include "stm32.h"
|
||||
#include "stm32_can.h"
|
||||
#include "board_config.h"
|
||||
|
||||
#ifdef CONFIG_CAN
|
||||
|
||||
/************************************************************************************
|
||||
* Pre-processor Definitions
|
||||
************************************************************************************/
|
||||
/* Configuration ********************************************************************/
|
||||
|
||||
#if defined(CONFIG_STM32_CAN1) && defined(CONFIG_STM32_CAN2)
|
||||
# warning "Both CAN1 and CAN2 are enabled. Assuming only CAN1."
|
||||
# undef CONFIG_STM32_CAN2
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_STM32_CAN1
|
||||
# define CAN_PORT 1
|
||||
#else
|
||||
# define CAN_PORT 2
|
||||
#endif
|
||||
|
||||
/************************************************************************************
|
||||
* Private Functions
|
||||
************************************************************************************/
|
||||
|
||||
/************************************************************************************
|
||||
* Public Functions
|
||||
************************************************************************************/
|
||||
int can_devinit(void);
|
||||
|
||||
/************************************************************************************
|
||||
* Name: can_devinit
|
||||
*
|
||||
* Description:
|
||||
* All STM32 architectures must provide the following interface to work with
|
||||
* examples/can.
|
||||
*
|
||||
************************************************************************************/
|
||||
|
||||
int can_devinit(void)
|
||||
{
|
||||
static bool initialized = false;
|
||||
struct can_dev_s *can;
|
||||
int ret;
|
||||
|
||||
/* Check if we have already initialized */
|
||||
|
||||
if (!initialized) {
|
||||
/* Call stm32_caninitialize() to get an instance of the CAN interface */
|
||||
|
||||
can = stm32_caninitialize(CAN_PORT);
|
||||
|
||||
if (can == NULL) {
|
||||
canerr("ERROR: Failed to get CAN interface\n");
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
/* Register the CAN driver at "/dev/can0" */
|
||||
|
||||
ret = can_register("/dev/can0", can);
|
||||
|
||||
if (ret < 0) {
|
||||
canerr("ERROR: can_register failed: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
/* Now we are initialized */
|
||||
|
||||
initialized = true;
|
||||
}
|
||||
|
||||
return OK;
|
||||
}
|
||||
|
||||
#endif
|
||||
@@ -1,676 +0,0 @@
|
||||
/****************************************************************************
|
||||
*
|
||||
* Copyright (c) 2012-2015 PX4 Development Team. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* 3. Neither the name PX4 nor the names of its contributors may be
|
||||
* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
/**
|
||||
* @file px4fmu2_init.c
|
||||
*
|
||||
* PX4FMUv2-specific early startup code. This file implements the
|
||||
* board_app_initialize() function that is called early by nsh during startup.
|
||||
*
|
||||
* Code here is run before the rcS script is invoked; it should start required
|
||||
* subsystems and perform board-specific initialization.
|
||||
*/
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
|
||||
#include <px4_config.h>
|
||||
#include <px4_tasks.h>
|
||||
|
||||
#include <stdbool.h>
|
||||
#include <stdio.h>
|
||||
#include <string.h>
|
||||
#include <debug.h>
|
||||
#include <errno.h>
|
||||
|
||||
#include "platform/cxxinitialize.h"
|
||||
#include <nuttx/board.h>
|
||||
#include <nuttx/spi/spi.h>
|
||||
#include <nuttx/i2c/i2c_master.h>
|
||||
#include <nuttx/sdio.h>
|
||||
#include <nuttx/mmcsd.h>
|
||||
#include <nuttx/analog/adc.h>
|
||||
|
||||
#include <stm32.h>
|
||||
#include "board_config.h"
|
||||
#include <stm32_uart.h>
|
||||
|
||||
#include <arch/board/board.h>
|
||||
|
||||
#include <drivers/drv_hrt.h>
|
||||
#include <drivers/drv_board_led.h>
|
||||
|
||||
#include <systemlib/px4_macros.h>
|
||||
#include <systemlib/cpuload.h>
|
||||
#include <systemlib/perf_counter.h>
|
||||
#include <systemlib/err.h>
|
||||
|
||||
#include <systemlib/hardfault_log.h>
|
||||
|
||||
#include <systemlib/systemlib.h>
|
||||
#include <systemlib/param/param.h>
|
||||
|
||||
/****************************************************************************
|
||||
* Pre-Processor Definitions
|
||||
****************************************************************************/
|
||||
|
||||
/* Configuration ************************************************************/
|
||||
|
||||
/* Debug ********************************************************************/
|
||||
|
||||
#ifdef CONFIG_CPP_HAVE_VARARGS
|
||||
# ifdef CONFIG_DEBUG
|
||||
# define message(...) syslog(__VA_ARGS__)
|
||||
# else
|
||||
# define message(...) printf(__VA_ARGS__)
|
||||
# endif
|
||||
#else
|
||||
# ifdef CONFIG_DEBUG
|
||||
# define message syslog
|
||||
# else
|
||||
# define message printf
|
||||
# endif
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Ideally we'd be able to get these from up_internal.h,
|
||||
* but since we want to be able to disable the NuttX use
|
||||
* of leds for system indication at will and there is no
|
||||
* separate switch, we need to build independent of the
|
||||
* CONFIG_ARCH_LEDS configuration switch.
|
||||
*/
|
||||
__BEGIN_DECLS
|
||||
extern void led_init(void);
|
||||
extern void led_on(int led);
|
||||
extern void led_off(int led);
|
||||
__END_DECLS
|
||||
|
||||
/****************************************************************************
|
||||
* Private Data
|
||||
****************************************************************************/
|
||||
static int hw_version = 0;
|
||||
static int hw_revision = 0;
|
||||
static char hw_type[4] = HW_VER_TYPE_INIT;
|
||||
|
||||
/************************************************************************************
|
||||
* Name: board_peripheral_reset
|
||||
*
|
||||
* Description:
|
||||
*
|
||||
************************************************************************************/
|
||||
__EXPORT void board_peripheral_reset(int ms)
|
||||
{
|
||||
/* set the peripheral rails off */
|
||||
stm32_configgpio(GPIO_VDD_5V_PERIPH_EN);
|
||||
stm32_gpiowrite(GPIO_VDD_5V_PERIPH_EN, 1);
|
||||
|
||||
/* wait for the peripheral rail to reach GND */
|
||||
usleep(ms * 1000);
|
||||
warnx("reset done, %d ms", ms);
|
||||
|
||||
/* re-enable power */
|
||||
|
||||
/* switch the peripheral rail back on */
|
||||
stm32_gpiowrite(GPIO_VDD_5V_PERIPH_EN, 0);
|
||||
}
|
||||
|
||||
/************************************************************************************
|
||||
* Name: board_on_reset
|
||||
*
|
||||
* Description:
|
||||
* Optionally provided function called on entry to board_system_reset
|
||||
* It should perform any house keeping prior to the rest.
|
||||
*
|
||||
* status - 1 if resetting to boot loader
|
||||
* 0 if just resetting
|
||||
*
|
||||
************************************************************************************/
|
||||
|
||||
__EXPORT void board_on_reset(int status)
|
||||
{
|
||||
UNUSED(status);
|
||||
/* configure the GPIO pins to outputs and keep them low */
|
||||
|
||||
stm32_configgpio(GPIO_GPIO0_OUTPUT);
|
||||
stm32_configgpio(GPIO_GPIO1_OUTPUT);
|
||||
stm32_configgpio(GPIO_GPIO2_OUTPUT);
|
||||
stm32_configgpio(GPIO_GPIO3_OUTPUT);
|
||||
stm32_configgpio(GPIO_GPIO4_OUTPUT);
|
||||
stm32_configgpio(GPIO_GPIO5_OUTPUT);
|
||||
|
||||
/* On resets invoked from system (not boot) insure we establish a low
|
||||
* output state (discharge the pins) on PWM pins before they become inputs.
|
||||
*
|
||||
* We also delay the onset of the that 3.1 Ms pulse as boot. This has
|
||||
* triggered some ESC to spin. By adding this delay here the reset
|
||||
* is pushed out > 400 ms. So the ESC PWM input can not mistake
|
||||
* the 3.1 Ms pulse as a valid PWM command.
|
||||
*
|
||||
* fixme:Establish in upstream NuttX an CONFIG_IO_INIT_STATE to
|
||||
* the initialize the IO lines in the clock config.
|
||||
*
|
||||
*/
|
||||
|
||||
if (status >= 0) {
|
||||
up_mdelay(400);
|
||||
}
|
||||
}
|
||||
|
||||
/************************************************************************************
|
||||
* Name: determin_hw_version
|
||||
*
|
||||
* Description:
|
||||
*
|
||||
* This function looks at HW deltas to determine what the
|
||||
* build is running on using the following criteria:
|
||||
*
|
||||
* MSN PB12 FMUv2 Cube MINI
|
||||
* CAN2_RX CONECTOR MX30521 NC
|
||||
* PU.PD 1,0 1,1 1,0
|
||||
*
|
||||
* LSN PB4 FMUv2 Cube MINI
|
||||
* ACCEL_DRDY LSM303D NC NC
|
||||
* PU.PD 0,0 1,0 1,0
|
||||
|
||||
* PB12:PB4
|
||||
* ud ud
|
||||
* 10 00 - 0x8 FMUv2
|
||||
* 11 10 - 0xE Cube AKA V2.0
|
||||
* 10 10 - 0xA PixhawkMini
|
||||
*
|
||||
* This will return OK on success and -1 on not supported
|
||||
*
|
||||
* hw_type Initial state is {'V','2',0, 0}
|
||||
* V 2 - FMUv2
|
||||
* V 3 0 - FMUv3 2.0
|
||||
* V 3 1 - FMUv3 2.1 - not differentiateable,
|
||||
* V 2 M - FMUv2 Mini
|
||||
*
|
||||
************************************************************************************/
|
||||
|
||||
static int determin_hw_version(int *version, int *revision)
|
||||
{
|
||||
*revision = 0; /* default revision */
|
||||
int rv = 0;
|
||||
int pos = 0;
|
||||
stm32_configgpio(GPIO_PULLDOWN | (HW_VER_PB4 & ~GPIO_PUPD_MASK));
|
||||
up_udelay(10);
|
||||
rv |= stm32_gpioread(HW_VER_PB4) << pos++;
|
||||
stm32_configgpio(HW_VER_PB4);
|
||||
up_udelay(10);
|
||||
rv |= stm32_gpioread(HW_VER_PB4) << pos++;
|
||||
|
||||
int votes = 16;
|
||||
int ones[2] = {0, 0};
|
||||
int zeros[2] = {0, 0};
|
||||
|
||||
while (votes--) {
|
||||
stm32_configgpio(GPIO_PULLDOWN | (HW_VER_PB12 & ~GPIO_PUPD_MASK));
|
||||
up_udelay(10);
|
||||
stm32_gpioread(HW_VER_PB12) ? ones[0]++ : zeros[0]++;
|
||||
stm32_configgpio(HW_VER_PB12);
|
||||
up_udelay(10);
|
||||
stm32_gpioread(HW_VER_PB12) ? ones[1]++ : zeros[1]++;
|
||||
}
|
||||
|
||||
if (ones[0] > zeros[0]) {
|
||||
rv |= 1 << pos;
|
||||
}
|
||||
|
||||
pos++;
|
||||
|
||||
if (ones[1] > zeros[1]) {
|
||||
rv |= 1 << pos;
|
||||
}
|
||||
|
||||
stm32_configgpio(HW_VER_PB4_INIT);
|
||||
stm32_configgpio(HW_VER_PB12_INIT);
|
||||
*version = rv;
|
||||
return OK;
|
||||
}
|
||||
|
||||
/************************************************************************************
|
||||
* Name: board_get_hw_type_name
|
||||
*
|
||||
* Description:
|
||||
* Optional returns a string defining the HW type
|
||||
*
|
||||
*
|
||||
************************************************************************************/
|
||||
|
||||
__EXPORT const char *board_get_hw_type_name()
|
||||
{
|
||||
return (const char *) hw_type;
|
||||
}
|
||||
|
||||
/************************************************************************************
|
||||
* Name: board_get_hw_version
|
||||
*
|
||||
* Description:
|
||||
* Optional returns a integer HW version
|
||||
*
|
||||
*
|
||||
************************************************************************************/
|
||||
|
||||
__EXPORT int board_get_hw_version()
|
||||
{
|
||||
return HW_VER_SIMPLE(hw_version);
|
||||
}
|
||||
|
||||
/************************************************************************************
|
||||
* Name: board_get_hw_revision
|
||||
*
|
||||
* Description:
|
||||
* Optional returns a integer HW revision
|
||||
*
|
||||
*
|
||||
************************************************************************************/
|
||||
|
||||
__EXPORT int board_get_hw_revision()
|
||||
{
|
||||
return hw_revision;
|
||||
}
|
||||
|
||||
/************************************************************************************
|
||||
* Name: stm32_boardinitialize
|
||||
*
|
||||
* Description:
|
||||
* All STM32 architectures must provide the following entry point. This entry point
|
||||
* is called early in the intitialization -- after all memory has been configured
|
||||
* and mapped but before any devices have been initialized.
|
||||
*
|
||||
************************************************************************************/
|
||||
|
||||
__EXPORT void
|
||||
stm32_boardinitialize(void)
|
||||
{
|
||||
board_on_reset(-1);
|
||||
|
||||
/* configure LEDs */
|
||||
board_autoled_initialize();
|
||||
|
||||
/* Start with the Sensor voltage off */
|
||||
|
||||
stm32_configgpio(GPIO_VDD_3V3_SENSORS_EN);
|
||||
|
||||
/* configure ADC pins */
|
||||
|
||||
stm32_configgpio(GPIO_ADC1_IN2); /* BATT_VOLTAGE_SENS */
|
||||
stm32_configgpio(GPIO_ADC1_IN3); /* BATT_CURRENT_SENS */
|
||||
stm32_configgpio(GPIO_ADC1_IN4); /* VDD_5V_SENS */
|
||||
stm32_configgpio(GPIO_ADC1_IN13); /* FMU_AUX_ADC_1 */
|
||||
stm32_configgpio(GPIO_ADC1_IN14); /* FMU_AUX_ADC_2 */
|
||||
stm32_configgpio(GPIO_ADC1_IN15); /* PRESSURE_SENS */
|
||||
|
||||
/* configure power supply control/sense pins */
|
||||
stm32_configgpio(GPIO_VDD_5V_PERIPH_EN);
|
||||
stm32_configgpio(GPIO_VDD_BRICK_VALID);
|
||||
stm32_configgpio(GPIO_VDD_SERVO_VALID);
|
||||
stm32_configgpio(GPIO_VDD_USB_VALID);
|
||||
stm32_configgpio(GPIO_VDD_5V_HIPOWER_OC);
|
||||
stm32_configgpio(GPIO_VDD_5V_PERIPH_OC);
|
||||
|
||||
|
||||
/* configure SPI interfaces is deferred to board_app_initialize
|
||||
* to delay the sensor power up with out adding a delay
|
||||
*/
|
||||
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: board_app_initialize
|
||||
*
|
||||
* Description:
|
||||
* Perform application specific initialization. This function is never
|
||||
* called directly from application code, but only indirectly via the
|
||||
* (non-standard) boardctl() interface using the command BOARDIOC_INIT.
|
||||
*
|
||||
* Input Parameters:
|
||||
* arg - The boardctl() argument is passed to the board_app_initialize()
|
||||
* implementation without modification. The argument has no
|
||||
* meaning to NuttX; the meaning of the argument is a contract
|
||||
* between the board-specific initalization logic and the the
|
||||
* matching application logic. The value cold be such things as a
|
||||
* mode enumeration value, a set of DIP switch switch settings, a
|
||||
* pointer to configuration data read from a file or serial FLASH,
|
||||
* or whatever you would like to do with it. Every implementation
|
||||
* should accept zero/NULL as a default configuration.
|
||||
*
|
||||
* Returned Value:
|
||||
* Zero (OK) is returned on success; a negated errno value is returned on
|
||||
* any failure to indicate the nature of the failure.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
static struct spi_dev_s *spi1;
|
||||
static struct spi_dev_s *spi2;
|
||||
static struct spi_dev_s *spi4;
|
||||
static struct sdio_dev_s *sdio;
|
||||
|
||||
__EXPORT int board_app_initialize(uintptr_t arg)
|
||||
{
|
||||
|
||||
#if defined(CONFIG_HAVE_CXX) && defined(CONFIG_HAVE_CXXINITIALIZE)
|
||||
|
||||
/* run C++ ctors before we go any further */
|
||||
|
||||
up_cxxinitialize();
|
||||
|
||||
# if defined(CONFIG_EXAMPLES_NSH_CXXINITIALIZE)
|
||||
# error CONFIG_EXAMPLES_NSH_CXXINITIALIZE Must not be defined! Use CONFIG_HAVE_CXX and CONFIG_HAVE_CXXINITIALIZE.
|
||||
# endif
|
||||
|
||||
#else
|
||||
# error platform is dependent on c++ both CONFIG_HAVE_CXX and CONFIG_HAVE_CXXINITIALIZE must be defined.
|
||||
#endif
|
||||
|
||||
|
||||
if (OK == determin_hw_version(&hw_version, & hw_revision)) {
|
||||
switch (hw_version) {
|
||||
default:
|
||||
case 0x8:
|
||||
break;
|
||||
|
||||
case 0xE:
|
||||
hw_type[1]++;
|
||||
hw_type[2] = '0';
|
||||
break;
|
||||
|
||||
case 0xA:
|
||||
hw_type[2] = 'M';
|
||||
break;
|
||||
}
|
||||
|
||||
PX4_INFO("Ver 0x%1X : Rev %x %s", hw_version, hw_revision, hw_type);
|
||||
}
|
||||
|
||||
|
||||
/* Bring up the Sensor power */
|
||||
|
||||
stm32_gpiowrite(GPIO_VDD_3V3_SENSORS_EN, 1);
|
||||
|
||||
/* Ensure the power is on 1 ms before we drive the GPIO pins */
|
||||
|
||||
usleep(1000);
|
||||
|
||||
/* Now it is ok to drive the pins high so configure SPI GPIO */
|
||||
|
||||
stm32_spiinitialize();
|
||||
|
||||
|
||||
/* configure the high-resolution time/callout interface */
|
||||
|
||||
hrt_init();
|
||||
|
||||
param_init();
|
||||
|
||||
/* configure the DMA allocator */
|
||||
|
||||
if (board_dma_alloc_init() < 0) {
|
||||
message("DMA alloc FAILED");
|
||||
}
|
||||
|
||||
/* configure CPU load estimation */
|
||||
#ifdef CONFIG_SCHED_INSTRUMENTATION
|
||||
cpuload_initialize_once();
|
||||
#endif
|
||||
|
||||
/* set up the serial DMA polling */
|
||||
static struct hrt_call serial_dma_call;
|
||||
struct timespec ts;
|
||||
|
||||
/*
|
||||
* Poll at 1ms intervals for received bytes that have not triggered
|
||||
* a DMA event.
|
||||
*/
|
||||
ts.tv_sec = 0;
|
||||
ts.tv_nsec = 1000000;
|
||||
|
||||
hrt_call_every(&serial_dma_call,
|
||||
ts_to_abstime(&ts),
|
||||
ts_to_abstime(&ts),
|
||||
(hrt_callout)stm32_serial_dma_poll,
|
||||
NULL);
|
||||
|
||||
#if defined(CONFIG_STM32_BBSRAM)
|
||||
|
||||
if (hardfault_check_status) {
|
||||
/* NB. the use of the console requires the hrt running
|
||||
* to poll the DMA
|
||||
*/
|
||||
|
||||
/* Using Battery Backed Up SRAM */
|
||||
|
||||
int filesizes[CONFIG_STM32_BBSRAM_FILES + 1] = BSRAM_FILE_SIZES;
|
||||
|
||||
stm32_bbsraminitialize(BBSRAM_PATH, filesizes);
|
||||
|
||||
#if defined(CONFIG_STM32_SAVE_CRASHDUMP)
|
||||
|
||||
/* Panic Logging in Battery Backed Up Files */
|
||||
|
||||
/*
|
||||
* In an ideal world, if a fault happens in flight the
|
||||
* system save it to BBSRAM will then reboot. Upon
|
||||
* rebooting, the system will log the fault to disk, recover
|
||||
* the flight state and continue to fly. But if there is
|
||||
* a fault on the bench or in the air that prohibit the recovery
|
||||
* or committing the log to disk, the things are too broken to
|
||||
* fly. So the question is:
|
||||
*
|
||||
* Did we have a hard fault and not make it far enough
|
||||
* through the boot sequence to commit the fault data to
|
||||
* the SD card?
|
||||
*/
|
||||
|
||||
/* Do we have an uncommitted hard fault in BBSRAM?
|
||||
* - this will be reset after a successful commit to SD
|
||||
*/
|
||||
int hadCrash = hardfault_check_status("boot");
|
||||
|
||||
if (hadCrash == OK) {
|
||||
|
||||
message("[boot] There is a hard fault logged. Hold down the SPACE BAR," \
|
||||
" while booting to halt the system!\n");
|
||||
|
||||
/* Yes. So add one to the boot count - this will be reset after a successful
|
||||
* commit to SD
|
||||
*/
|
||||
|
||||
int reboots = hardfault_increment_reboot("boot", false);
|
||||
|
||||
/* Also end the misery for a user that holds for a key down on the console */
|
||||
|
||||
int bytesWaiting;
|
||||
ioctl(fileno(stdin), FIONREAD, (unsigned long)((uintptr_t) &bytesWaiting));
|
||||
|
||||
if (reboots > 2 || bytesWaiting != 0) {
|
||||
|
||||
/* Since we can not commit the fault dump to disk. Display it
|
||||
* to the console.
|
||||
*/
|
||||
|
||||
hardfault_write("boot", fileno(stdout), HARDFAULT_DISPLAY_FORMAT, false);
|
||||
|
||||
message("[boot] There were %d reboots with Hard fault that were not committed to disk - System halted %s\n",
|
||||
reboots,
|
||||
(bytesWaiting == 0 ? "" : " Due to Key Press\n"));
|
||||
|
||||
|
||||
/* For those of you with a debugger set a break point on up_assert and
|
||||
* then set dbgContinue = 1 and go.
|
||||
*/
|
||||
|
||||
/* Clear any key press that got us here */
|
||||
|
||||
static volatile bool dbgContinue = false;
|
||||
int c = '>';
|
||||
|
||||
while (!dbgContinue) {
|
||||
|
||||
switch (c) {
|
||||
|
||||
case EOF:
|
||||
|
||||
|
||||
case '\n':
|
||||
case '\r':
|
||||
case ' ':
|
||||
continue;
|
||||
|
||||
default:
|
||||
|
||||
putchar(c);
|
||||
putchar('\n');
|
||||
|
||||
switch (c) {
|
||||
|
||||
case 'D':
|
||||
case 'd':
|
||||
hardfault_write("boot", fileno(stdout), HARDFAULT_DISPLAY_FORMAT, false);
|
||||
break;
|
||||
|
||||
case 'C':
|
||||
case 'c':
|
||||
hardfault_rearm("boot");
|
||||
hardfault_increment_reboot("boot", true);
|
||||
break;
|
||||
|
||||
case 'B':
|
||||
case 'b':
|
||||
dbgContinue = true;
|
||||
break;
|
||||
|
||||
default:
|
||||
break;
|
||||
} // Inner Switch
|
||||
|
||||
message("\nEnter B - Continue booting\n" \
|
||||
"Enter C - Clear the fault log\n" \
|
||||
"Enter D - Dump fault log\n\n?>");
|
||||
fflush(stdout);
|
||||
|
||||
if (!dbgContinue) {
|
||||
c = getchar();
|
||||
}
|
||||
|
||||
break;
|
||||
|
||||
} // outer switch
|
||||
} // for
|
||||
|
||||
} // inner if
|
||||
} // outer if
|
||||
} // hardfault_check_status
|
||||
|
||||
#endif // CONFIG_STM32_SAVE_CRASHDUMP
|
||||
#endif // CONFIG_STM32_BBSRAM
|
||||
|
||||
/* initial LED state */
|
||||
drv_led_start();
|
||||
led_off(LED_AMBER);
|
||||
|
||||
/* Configure SPI-based devices */
|
||||
|
||||
spi1 = stm32_spibus_initialize(PX4_SPI_BUS_SENSORS);
|
||||
|
||||
if (!spi1) {
|
||||
message("[boot] FAILED to initialize SPI port %d\n", PX4_SPI_BUS_SENSORS);
|
||||
board_autoled_on(LED_AMBER);
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
/* Default SPI1 to 1MHz and de-assert the known chip selects. */
|
||||
SPI_SETFREQUENCY(spi1, 10000000);
|
||||
SPI_SETBITS(spi1, 8);
|
||||
SPI_SETMODE(spi1, SPIDEV_MODE3);
|
||||
up_udelay(20);
|
||||
|
||||
/* Get the SPI port for the FRAM */
|
||||
|
||||
spi2 = stm32_spibus_initialize(PX4_SPI_BUS_RAMTRON);
|
||||
|
||||
if (!spi2) {
|
||||
message("[boot] FAILED to initialize SPI port %d\n", PX4_SPI_BUS_RAMTRON);
|
||||
board_autoled_on(LED_AMBER);
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
/* Default SPI2 to 37.5 MHz (40 MHz rounded to nearest valid divider, F4 max)
|
||||
* and de-assert the known chip selects. */
|
||||
|
||||
// XXX start with 10.4 MHz in FRAM usage and go up to 37.5 once validated
|
||||
SPI_SETFREQUENCY(spi2, 12 * 1000 * 1000);
|
||||
SPI_SETBITS(spi2, 8);
|
||||
SPI_SETMODE(spi2, SPIDEV_MODE3);
|
||||
|
||||
spi4 = stm32_spibus_initialize(PX4_SPI_BUS_EXT);
|
||||
|
||||
if (!spi4) {
|
||||
message("[boot] FAILED to initialize SPI port %d\n", PX4_SPI_BUS_EXT);
|
||||
board_autoled_on(LED_AMBER);
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
/* Default SPI4 to 1MHz and de-assert the known chip selects. */
|
||||
SPI_SETFREQUENCY(spi4, 10000000);
|
||||
SPI_SETBITS(spi4, 8);
|
||||
SPI_SETMODE(spi4, SPIDEV_MODE3);
|
||||
|
||||
#ifdef CONFIG_MMCSD
|
||||
/* First, get an instance of the SDIO interface */
|
||||
|
||||
sdio = sdio_initialize(CONFIG_NSH_MMCSDSLOTNO);
|
||||
|
||||
if (!sdio) {
|
||||
message("[boot] Failed to initialize SDIO slot %d\n",
|
||||
CONFIG_NSH_MMCSDSLOTNO);
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
/* Now bind the SDIO interface to the MMC/SD driver */
|
||||
int ret = mmcsd_slotinitialize(CONFIG_NSH_MMCSDMINOR, sdio);
|
||||
|
||||
if (ret != OK) {
|
||||
message("[boot] Failed to bind SDIO to the MMC/SD driver: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
/* Then let's guess and say that there is a card in the slot. There is no card detect GPIO. */
|
||||
sdio_mediachange(sdio, true);
|
||||
|
||||
#endif
|
||||
|
||||
return OK;
|
||||
}
|
||||
@@ -1,96 +0,0 @@
|
||||
/****************************************************************************
|
||||
*
|
||||
* Copyright (c) 2013 PX4 Development Team. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* 3. Neither the name PX4 nor the names of its contributors may be
|
||||
* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
/**
|
||||
* @file px4fmu2_led.c
|
||||
*
|
||||
* PX4FMU LED backend.
|
||||
*/
|
||||
|
||||
#include <px4_config.h>
|
||||
|
||||
#include <stdbool.h>
|
||||
|
||||
#include "stm32.h"
|
||||
#include "board_config.h"
|
||||
|
||||
#include <arch/board/board.h>
|
||||
|
||||
/*
|
||||
* Ideally we'd be able to get these from up_internal.h,
|
||||
* but since we want to be able to disable the NuttX use
|
||||
* of leds for system indication at will and there is no
|
||||
* separate switch, we need to build independent of the
|
||||
* CONFIG_ARCH_LEDS configuration switch.
|
||||
*/
|
||||
__BEGIN_DECLS
|
||||
extern void led_init(void);
|
||||
extern void led_on(int led);
|
||||
extern void led_off(int led);
|
||||
extern void led_toggle(int led);
|
||||
__END_DECLS
|
||||
|
||||
__EXPORT void led_init()
|
||||
{
|
||||
/* Configure LED1 GPIO for output */
|
||||
|
||||
stm32_configgpio(GPIO_LED1);
|
||||
}
|
||||
|
||||
__EXPORT void led_on(int led)
|
||||
{
|
||||
if (led == 1) {
|
||||
/* Pull down to switch on */
|
||||
stm32_gpiowrite(GPIO_LED1, false);
|
||||
}
|
||||
}
|
||||
|
||||
__EXPORT void led_off(int led)
|
||||
{
|
||||
if (led == 1) {
|
||||
/* Pull up to switch off */
|
||||
stm32_gpiowrite(GPIO_LED1, true);
|
||||
}
|
||||
}
|
||||
|
||||
__EXPORT void led_toggle(int led)
|
||||
{
|
||||
if (led == 1) {
|
||||
if (stm32_gpioread(GPIO_LED1)) {
|
||||
stm32_gpiowrite(GPIO_LED1, false);
|
||||
|
||||
} else {
|
||||
stm32_gpiowrite(GPIO_LED1, true);
|
||||
}
|
||||
}
|
||||
}
|
||||
@@ -1,468 +0,0 @@
|
||||
/****************************************************************************
|
||||
*
|
||||
* Copyright (C) 2012 PX4 Development Team. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* 3. Neither the name PX4 nor the names of its contributors may be
|
||||
* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
/**
|
||||
* @file px4fmu_spi.c
|
||||
*
|
||||
* Board-specific SPI functions.
|
||||
*/
|
||||
|
||||
/************************************************************************************
|
||||
* Included Files
|
||||
************************************************************************************/
|
||||
|
||||
#include <px4_config.h>
|
||||
|
||||
#include <stdint.h>
|
||||
#include <stdbool.h>
|
||||
#include <debug.h>
|
||||
#include <unistd.h>
|
||||
|
||||
#include <nuttx/spi/spi.h>
|
||||
#include <arch/board/board.h>
|
||||
|
||||
#include <up_arch.h>
|
||||
#include <chip.h>
|
||||
#include <stm32.h>
|
||||
#include "board_config.h"
|
||||
#include <systemlib/err.h>
|
||||
|
||||
/************************************************************************************
|
||||
* Public Functions
|
||||
************************************************************************************/
|
||||
|
||||
/************************************************************************************
|
||||
* Name: stm32_spiinitialize
|
||||
*
|
||||
* Description:
|
||||
* Called to configure SPI chip select GPIO pins for the PX4FMU board.
|
||||
*
|
||||
************************************************************************************/
|
||||
|
||||
#ifdef CONFIG_STM32_SPI1
|
||||
/* Verification
|
||||
* PA5 PA6 PA7 PB0 PB1 PB4 PC1 PC2 PC13 PC14 PC15 PD7 PD15 PE2 PE4 PE5 PE6
|
||||
* driver X X X X X X
|
||||
* local V2 v2 V2 V3 a V2 V2M V2x a a 4
|
||||
*/
|
||||
static void stm32_spi1_initialize(void)
|
||||
{
|
||||
stm32_configgpio(GPIO_SPI1_CS_PC2);
|
||||
stm32_configgpio(GPIO_SPI1_CS_PD7);
|
||||
|
||||
stm32_configgpio(GPIO_SPI1_EXTI_DRDY_PD15);
|
||||
|
||||
if (HW_VER_FMUV2 == board_get_hw_version()) {
|
||||
stm32_configgpio(GPIO_SPI1_EXTI_DRDY_PB0);
|
||||
stm32_configgpio(GPIO_SPI1_EXTI_DRDY_PB1);
|
||||
stm32_configgpio(GPIO_SPI1_EXTI_DRDY_PB4);
|
||||
stm32_configgpio(GPIO_SPI1_CS_PC13);
|
||||
stm32_configgpio(GPIO_SPI1_CS_PC15);
|
||||
|
||||
} else if (HW_VER_FMUV2MINI == board_get_hw_version()) {
|
||||
stm32_configgpio(GPIO_SPI1_EXTI_20608_DRDY_PC14);
|
||||
stm32_configgpio(GPIO_SPI1_CS_PC15);
|
||||
|
||||
} else if (HW_VER_FMUV3 == board_get_hw_version()) {
|
||||
stm32_configgpio(GPIO_SPI1_CS_PC1);
|
||||
}
|
||||
}
|
||||
#endif // CONFIG_STM32_SPI1
|
||||
|
||||
#ifdef CONFIG_STM32_SPI4
|
||||
/* Verification
|
||||
* PA5 PA6 PA7 PB0 PB1 PB4 PC1 PC2 PC13 PC14 PC15 PD7 PD15 PE2 PE4 PE5 PE6
|
||||
* driver X X X X X X
|
||||
* local V3 V3 - V3 a V3 V23 V3 - -
|
||||
*/
|
||||
static void stm32_spi4_initialize(void)
|
||||
{
|
||||
stm32_configgpio(GPIO_SPI4_NSS_PE4);
|
||||
|
||||
if (HW_VER_FMUV3 == board_get_hw_version()) {
|
||||
stm32_configgpio(GPIO_SPI4_EXTI_DRDY_PB0);
|
||||
stm32_configgpio(GPIO_SPI4_CS_PB1);
|
||||
stm32_configgpio(GPIO_SPI4_CS_PC13);
|
||||
stm32_configgpio(GPIO_SPI4_CS_PC15);
|
||||
}
|
||||
|
||||
if (HW_VER_FMUV2MINI != board_get_hw_version()) {
|
||||
stm32_configgpio(GPIO_SPI4_GPIO_PC14);
|
||||
}
|
||||
}
|
||||
#endif //CONFIG_STM32_SPI4
|
||||
|
||||
__EXPORT void stm32_spiinitialize(void)
|
||||
{
|
||||
#ifdef CONFIG_STM32_SPI1
|
||||
stm32_spi1_initialize();
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_STM32_SPI2
|
||||
stm32_configgpio(GPIO_SPI2_CS_PD10);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_STM32_SPI4
|
||||
stm32_spi4_initialize();
|
||||
#endif
|
||||
}
|
||||
|
||||
#ifdef CONFIG_STM32_SPI1
|
||||
__EXPORT void stm32_spi1select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
|
||||
{
|
||||
/* SPI select is active low, so write !selected to select the device */
|
||||
/* Verification
|
||||
* PA5 PA6 PA7 PB0 PB1 PB4 PC1 PC2 PC13 PC14 PC15 PD7 PD15 PE2 PE4 PE5 PE6
|
||||
* driver X X X X X X
|
||||
* local - - - V3 a V2 - V2M a - -
|
||||
*/
|
||||
|
||||
switch (devid) {
|
||||
case PX4_SPIDEV_GYRO:
|
||||
|
||||
/* Making sure the other peripherals are not selected */
|
||||
if (HW_VER_FMUV2 == board_get_hw_version()) {
|
||||
stm32_gpiowrite(GPIO_SPI1_CS_PC13, !selected);
|
||||
}
|
||||
|
||||
if (HW_VER_FMUV3 != board_get_hw_version()) {
|
||||
stm32_gpiowrite(GPIO_SPI1_CS_PC15, 1);
|
||||
}
|
||||
|
||||
stm32_gpiowrite(GPIO_SPI1_CS_PD7, 1);
|
||||
stm32_gpiowrite(GPIO_SPI1_CS_PC2, 1);
|
||||
|
||||
if (HW_VER_FMUV3 == board_get_hw_version()) {
|
||||
stm32_gpiowrite(GPIO_SPI1_CS_PC1, 1);
|
||||
}
|
||||
|
||||
break;
|
||||
|
||||
# if defined(PX4_SPIDEV_ICM_20608)
|
||||
|
||||
case PX4_SPIDEV_ICM_20608:
|
||||
# endif
|
||||
case PX4_SPIDEV_ACCEL_MAG:
|
||||
|
||||
/* Making sure the other peripherals are not selected */
|
||||
if (HW_VER_FMUV2 == board_get_hw_version()) {
|
||||
stm32_gpiowrite(GPIO_SPI1_CS_PC13, 1);
|
||||
}
|
||||
|
||||
if (HW_VER_FMUV3 != board_get_hw_version()) {
|
||||
stm32_gpiowrite(GPIO_SPI1_CS_PC15, !selected);
|
||||
}
|
||||
|
||||
stm32_gpiowrite(GPIO_SPI1_CS_PD7, 1);
|
||||
stm32_gpiowrite(GPIO_SPI1_CS_PC2, 1);
|
||||
|
||||
if (HW_VER_FMUV3 == board_get_hw_version()) {
|
||||
stm32_gpiowrite(GPIO_SPI1_CS_PC1, 1);
|
||||
}
|
||||
|
||||
break;
|
||||
|
||||
case PX4_SPIDEV_BARO:
|
||||
|
||||
/* Making sure the other peripherals are not selected */
|
||||
if (HW_VER_FMUV2 == board_get_hw_version()) {
|
||||
stm32_gpiowrite(GPIO_SPI1_CS_PC13, 1);
|
||||
}
|
||||
|
||||
if (HW_VER_FMUV3 != board_get_hw_version()) {
|
||||
stm32_gpiowrite(GPIO_SPI1_CS_PC15, 1);
|
||||
}
|
||||
|
||||
stm32_gpiowrite(GPIO_SPI1_CS_PD7, !selected);
|
||||
stm32_gpiowrite(GPIO_SPI1_CS_PC2, 1);
|
||||
|
||||
if (HW_VER_FMUV3 == board_get_hw_version()) {
|
||||
stm32_gpiowrite(GPIO_SPI1_CS_PC1, 1);
|
||||
}
|
||||
|
||||
break;
|
||||
|
||||
case PX4_SPIDEV_MPU:
|
||||
|
||||
/* Making sure the other peripherals are not selected */
|
||||
if (HW_VER_FMUV2 == board_get_hw_version()) {
|
||||
stm32_gpiowrite(GPIO_SPI1_CS_PC13, 1);
|
||||
}
|
||||
|
||||
if (HW_VER_FMUV3 != board_get_hw_version()) {
|
||||
stm32_gpiowrite(GPIO_SPI1_CS_PC15, 1);
|
||||
}
|
||||
|
||||
stm32_gpiowrite(GPIO_SPI1_CS_PD7, 1);
|
||||
stm32_gpiowrite(GPIO_SPI1_CS_PC2, !selected);
|
||||
|
||||
if (HW_VER_FMUV3 == board_get_hw_version()) {
|
||||
stm32_gpiowrite(GPIO_SPI1_CS_PC1, 1);
|
||||
}
|
||||
|
||||
break;
|
||||
|
||||
case PX4_SPIDEV_HMC:
|
||||
if (HW_VER_FMUV2 == board_get_hw_version()) {
|
||||
stm32_gpiowrite(GPIO_SPI1_CS_PC13, 1);
|
||||
}
|
||||
|
||||
if (HW_VER_FMUV3 != board_get_hw_version()) {
|
||||
stm32_gpiowrite(GPIO_SPI1_CS_PC15, 1);
|
||||
}
|
||||
|
||||
stm32_gpiowrite(GPIO_SPI1_CS_PD7, 1);
|
||||
stm32_gpiowrite(GPIO_SPI1_CS_PC2, 1);
|
||||
|
||||
if (HW_VER_FMUV3 == board_get_hw_version()) {
|
||||
stm32_gpiowrite(GPIO_SPI1_CS_PC1, !selected);
|
||||
}
|
||||
|
||||
break;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
__EXPORT uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, uint32_t devid)
|
||||
{
|
||||
return SPI_STATUS_PRESENT;
|
||||
}
|
||||
#endif // CONFIG_STM32_SPI1
|
||||
|
||||
#ifdef CONFIG_STM32_SPI2
|
||||
__EXPORT void stm32_spi2select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
|
||||
{
|
||||
/* there can only be one device on this bus, so always select it */
|
||||
stm32_gpiowrite(GPIO_SPI2_CS_PD10, !selected);
|
||||
}
|
||||
|
||||
__EXPORT uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, uint32_t devid)
|
||||
{
|
||||
/* FRAM is always present */
|
||||
return SPI_STATUS_PRESENT;
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
#ifdef CONFIG_STM32_SPI4
|
||||
__EXPORT void stm32_spi4select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
|
||||
{
|
||||
/* SPI select is active low, so write !selected to select the device */
|
||||
/* Verification
|
||||
* PA5 PA6 PA7 PB0 PB1 PB4 PC1 PC2 PC13 PC14 PC15 PD7 PD15 PE2 PE4 PE5 PE6
|
||||
* driver X X X X X X
|
||||
* local - - - - - V3 !V2M V3 - - a
|
||||
*/
|
||||
|
||||
switch (devid) {
|
||||
case PX4_SPIDEV_EXT_MPU:
|
||||
/* Making sure the other peripherals are not selected */
|
||||
stm32_gpiowrite(GPIO_SPI4_NSS_PE4, !selected);
|
||||
|
||||
if (HW_VER_FMUV2MINI != board_get_hw_version()) {
|
||||
stm32_gpiowrite(GPIO_SPI4_GPIO_PC14, 1);
|
||||
}
|
||||
|
||||
if (HW_VER_FMUV3 == board_get_hw_version()) {
|
||||
stm32_gpiowrite(GPIO_SPI4_CS_PC15, 1);
|
||||
stm32_gpiowrite(GPIO_SPI4_CS_PC13, 1);
|
||||
}
|
||||
|
||||
break;
|
||||
|
||||
case PX4_SPIDEV_EXT_BARO:
|
||||
/* Making sure the other peripherals are not selected */
|
||||
stm32_gpiowrite(GPIO_SPI4_NSS_PE4, 1);
|
||||
|
||||
if (HW_VER_FMUV2MINI != board_get_hw_version()) {
|
||||
stm32_gpiowrite(GPIO_SPI4_GPIO_PC14, !selected);
|
||||
}
|
||||
|
||||
if (HW_VER_FMUV3 == board_get_hw_version()) {
|
||||
stm32_gpiowrite(GPIO_SPI4_CS_PC15, 1);
|
||||
stm32_gpiowrite(GPIO_SPI4_CS_PC13, 1);
|
||||
}
|
||||
|
||||
break;
|
||||
|
||||
# if defined(PX4_SPIDEV_ICM_20608)
|
||||
|
||||
case PX4_SPIDEV_ICM_20608:
|
||||
# endif
|
||||
case PX4_SPIDEV_EXT_ACCEL_MAG:
|
||||
/* Making sure the other peripherals are not selected */
|
||||
stm32_gpiowrite(GPIO_SPI4_NSS_PE4, 1);
|
||||
|
||||
if (HW_VER_FMUV2MINI != board_get_hw_version()) {
|
||||
stm32_gpiowrite(GPIO_SPI4_GPIO_PC14, 1);
|
||||
}
|
||||
|
||||
if (HW_VER_FMUV3 == board_get_hw_version()) {
|
||||
stm32_gpiowrite(GPIO_SPI4_CS_PC15, !selected);
|
||||
stm32_gpiowrite(GPIO_SPI4_CS_PC13, 1);
|
||||
}
|
||||
|
||||
break;
|
||||
|
||||
case PX4_SPIDEV_EXT_BMI:
|
||||
case PX4_SPIDEV_EXT_GYRO:
|
||||
/* Making sure the other peripherals are not selected */
|
||||
stm32_gpiowrite(GPIO_SPI4_NSS_PE4, 1);
|
||||
|
||||
if (HW_VER_FMUV2MINI != board_get_hw_version()) {
|
||||
stm32_gpiowrite(GPIO_SPI4_GPIO_PC14, 1);
|
||||
}
|
||||
|
||||
if (HW_VER_FMUV3 == board_get_hw_version()) {
|
||||
stm32_gpiowrite(GPIO_SPI4_CS_PC15, 1);
|
||||
stm32_gpiowrite(GPIO_SPI4_CS_PC13, !selected);
|
||||
}
|
||||
|
||||
break;
|
||||
|
||||
default:
|
||||
break;
|
||||
|
||||
}
|
||||
}
|
||||
__EXPORT uint8_t stm32_spi4status(FAR struct spi_dev_s *dev, uint32_t devid)
|
||||
{
|
||||
return SPI_STATUS_PRESENT;
|
||||
}
|
||||
#endif // CONFIG_STM32_SPI4
|
||||
|
||||
/* V2, V2M SPI1 All signals SPI4, V3 ALL signals */
|
||||
/* Verification
|
||||
* PA5 PA6 PA7 PB0 PB1 PB4 PC1 PC2 PC13 PC14 PC15 PD7 PD15 PE2 PE4 PE5 PE6
|
||||
* local A A A A A A V3 A A !V2 A A A V3 V3 V3 V3
|
||||
*/
|
||||
|
||||
__EXPORT void board_spi_reset(int ms)
|
||||
{
|
||||
/* disable SPI bus */
|
||||
stm32_configgpio(_PIN_OFF(GPIO_SPI1_CS_PC2));
|
||||
stm32_configgpio(_PIN_OFF(GPIO_SPI1_CS_PC13));
|
||||
stm32_configgpio(_PIN_OFF(GPIO_SPI1_CS_PC15));
|
||||
stm32_configgpio(_PIN_OFF(GPIO_SPI1_CS_PD7));
|
||||
|
||||
stm32_gpiowrite(_PIN_OFF(GPIO_SPI1_CS_PC2), 0);
|
||||
stm32_gpiowrite(_PIN_OFF(GPIO_SPI1_CS_PC13), 0);
|
||||
stm32_gpiowrite(_PIN_OFF(GPIO_SPI1_CS_PC15), 0);
|
||||
stm32_gpiowrite(_PIN_OFF(GPIO_SPI1_CS_PD7), 0);
|
||||
|
||||
stm32_configgpio(_PIN_OFF(GPIO_SPI1_SCK));
|
||||
stm32_configgpio(_PIN_OFF(GPIO_SPI1_MISO));
|
||||
stm32_configgpio(_PIN_OFF(GPIO_SPI1_MOSI));
|
||||
|
||||
stm32_gpiowrite(_PIN_OFF(GPIO_SPI1_SCK), 0);
|
||||
stm32_gpiowrite(_PIN_OFF(GPIO_SPI1_MISO), 0);
|
||||
stm32_gpiowrite(_PIN_OFF(GPIO_SPI1_MOSI), 0);
|
||||
|
||||
stm32_configgpio(_PIN_OFF(GPIO_SPI1_EXTI_DRDY_PB0));
|
||||
stm32_configgpio(_PIN_OFF(GPIO_SPI1_EXTI_DRDY_PB1));
|
||||
stm32_configgpio(_PIN_OFF(GPIO_SPI1_EXTI_DRDY_PB4));
|
||||
stm32_configgpio(_PIN_OFF(GPIO_SPI1_EXTI_DRDY_PD15));
|
||||
|
||||
stm32_gpiowrite(_PIN_OFF(GPIO_SPI1_EXTI_DRDY_PB0), 0);
|
||||
stm32_gpiowrite(_PIN_OFF(GPIO_SPI1_EXTI_DRDY_PB1), 0);
|
||||
stm32_gpiowrite(_PIN_OFF(GPIO_SPI1_EXTI_DRDY_PB4), 0);
|
||||
stm32_gpiowrite(_PIN_OFF(GPIO_SPI1_EXTI_DRDY_PD15), 0);
|
||||
|
||||
if (HW_VER_FMUV2 != board_get_hw_version()) {
|
||||
stm32_configgpio(_PIN_OFF(GPIO_SPI4_CS_PC14));
|
||||
stm32_gpiowrite(_PIN_OFF(GPIO_SPI4_CS_PC14), 0);
|
||||
}
|
||||
|
||||
if (HW_VER_FMUV3 == board_get_hw_version()) {
|
||||
stm32_configgpio(_PIN_OFF(GPIO_SPI1_CS_PC1));
|
||||
stm32_gpiowrite(_PIN_OFF(GPIO_SPI1_CS_PC1), 0);
|
||||
|
||||
stm32_configgpio(_PIN_OFF(GPIO_SPI4_NSS_PE4));
|
||||
stm32_gpiowrite(_PIN_OFF(GPIO_SPI4_NSS_PE4), 0);
|
||||
|
||||
stm32_configgpio(_PIN_OFF(GPIO_SPI4_SCK));
|
||||
stm32_configgpio(_PIN_OFF(GPIO_SPI4_MISO));
|
||||
stm32_configgpio(_PIN_OFF(GPIO_SPI4_MOSI));
|
||||
|
||||
stm32_gpiowrite(_PIN_OFF(GPIO_SPI4_SCK), 0);
|
||||
stm32_gpiowrite(_PIN_OFF(GPIO_SPI4_MISO), 0);
|
||||
stm32_gpiowrite(_PIN_OFF(GPIO_SPI4_MOSI), 0);
|
||||
}
|
||||
|
||||
/* set the sensor rail off */
|
||||
stm32_configgpio(GPIO_VDD_3V3_SENSORS_EN);
|
||||
stm32_gpiowrite(GPIO_VDD_3V3_SENSORS_EN, 0);
|
||||
|
||||
/* wait for the sensor rail to reach GND */
|
||||
usleep(ms * 1000);
|
||||
warnx("reset done, %d ms", ms);
|
||||
|
||||
/* re-enable power */
|
||||
|
||||
/* switch the sensor rail back on */
|
||||
stm32_gpiowrite(GPIO_VDD_3V3_SENSORS_EN, 1);
|
||||
|
||||
/* wait a bit before starting SPI, different times didn't influence results */
|
||||
usleep(100);
|
||||
|
||||
/* reconfigure the SPI pins */
|
||||
stm32_configgpio(GPIO_SPI1_SCK);
|
||||
stm32_configgpio(GPIO_SPI1_MISO);
|
||||
stm32_configgpio(GPIO_SPI1_MOSI);
|
||||
|
||||
if (HW_VER_FMUV3 == board_get_hw_version()) {
|
||||
stm32_configgpio(GPIO_SPI4_SCK);
|
||||
stm32_configgpio(GPIO_SPI4_MISO);
|
||||
stm32_configgpio(GPIO_SPI4_MOSI);
|
||||
stm32_spi4_initialize();
|
||||
}
|
||||
|
||||
stm32_spi1_initialize();
|
||||
}
|
||||
|
||||
__EXPORT bool px4_spi_bus_external(int bus)
|
||||
{
|
||||
if (HW_VER_FMUV3 == board_get_hw_version()) {
|
||||
/* all FMUv3 2.1 spi buses are internal */
|
||||
return false;
|
||||
|
||||
} else {
|
||||
if (bus == PX4_SPI_BUS_EXT) {
|
||||
return true;
|
||||
}
|
||||
}
|
||||
|
||||
return false;
|
||||
}
|
||||
@@ -1,126 +0,0 @@
|
||||
/****************************************************************************
|
||||
*
|
||||
* Copyright (C) 2012 PX4 Development Team. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* 3. Neither the name PX4 nor the names of its contributors may be
|
||||
* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
/*
|
||||
* @file px4fmu_timer_config.c
|
||||
*
|
||||
* Configuration data for the stm32 pwm_servo, input capture and pwm input driver.
|
||||
*
|
||||
* Note that these arrays must always be fully-sized.
|
||||
*/
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
#include <stm32.h>
|
||||
#include <stm32_gpio.h>
|
||||
#include <stm32_tim.h>
|
||||
|
||||
#include <drivers/drv_pwm_output.h>
|
||||
#include <drivers/stm32/drv_io_timer.h>
|
||||
|
||||
#include "board_config.h"
|
||||
|
||||
__EXPORT const io_timers_t io_timers[MAX_IO_TIMERS] = {
|
||||
{
|
||||
.base = STM32_TIM1_BASE,
|
||||
.clock_register = STM32_RCC_APB2ENR,
|
||||
.clock_bit = RCC_APB2ENR_TIM1EN,
|
||||
.clock_freq = STM32_APB2_TIM1_CLKIN,
|
||||
.first_channel_index = 0,
|
||||
.last_channel_index = 3,
|
||||
.handler = io_timer_handler0,
|
||||
.vectorno = STM32_IRQ_TIM1CC,
|
||||
|
||||
},
|
||||
{
|
||||
.base = STM32_TIM4_BASE,
|
||||
.clock_register = STM32_RCC_APB1ENR,
|
||||
.clock_bit = RCC_APB1ENR_TIM4EN,
|
||||
.clock_freq = STM32_APB1_TIM4_CLKIN,
|
||||
.first_channel_index = 4,
|
||||
.last_channel_index = 5,
|
||||
.handler = io_timer_handler1,
|
||||
.vectorno = STM32_IRQ_TIM4
|
||||
}
|
||||
};
|
||||
|
||||
__EXPORT const timer_io_channels_t timer_io_channels[MAX_TIMER_IO_CHANNELS] = {
|
||||
{
|
||||
.gpio_out = GPIO_TIM1_CH4OUT,
|
||||
.gpio_in = GPIO_TIM1_CH4IN,
|
||||
.timer_index = 0,
|
||||
.timer_channel = 4,
|
||||
.ccr_offset = STM32_GTIM_CCR4_OFFSET,
|
||||
.masks = GTIM_SR_CC4IF | GTIM_SR_CC4OF
|
||||
},
|
||||
{
|
||||
.gpio_out = GPIO_TIM1_CH3OUT,
|
||||
.gpio_in = GPIO_TIM1_CH3IN,
|
||||
.timer_index = 0,
|
||||
.timer_channel = 3,
|
||||
.ccr_offset = STM32_GTIM_CCR3_OFFSET,
|
||||
.masks = GTIM_SR_CC3IF | GTIM_SR_CC3OF
|
||||
},
|
||||
{
|
||||
.gpio_out = GPIO_TIM1_CH2OUT,
|
||||
.gpio_in = GPIO_TIM1_CH2IN,
|
||||
.timer_index = 0,
|
||||
.timer_channel = 2,
|
||||
.ccr_offset = STM32_GTIM_CCR2_OFFSET,
|
||||
.masks = GTIM_SR_CC2IF | GTIM_SR_CC2OF
|
||||
},
|
||||
{
|
||||
.gpio_out = GPIO_TIM1_CH1OUT,
|
||||
.gpio_in = GPIO_TIM1_CH1IN,
|
||||
.timer_index = 0,
|
||||
.timer_channel = 1,
|
||||
.ccr_offset = STM32_GTIM_CCR1_OFFSET,
|
||||
.masks = GTIM_SR_CC1IF | GTIM_SR_CC1OF
|
||||
},
|
||||
{
|
||||
.gpio_out = GPIO_TIM4_CH2OUT,
|
||||
.gpio_in = GPIO_TIM4_CH2IN,
|
||||
.timer_index = 1,
|
||||
.timer_channel = 2,
|
||||
.ccr_offset = STM32_GTIM_CCR2_OFFSET,
|
||||
.masks = GTIM_SR_CC2IF | GTIM_SR_CC2OF
|
||||
},
|
||||
{
|
||||
.gpio_out = GPIO_TIM4_CH3OUT,
|
||||
.gpio_in = GPIO_TIM4_CH3IN,
|
||||
.timer_index = 1,
|
||||
.timer_channel = 3,
|
||||
.ccr_offset = STM32_GTIM_CCR3_OFFSET,
|
||||
.masks = GTIM_SR_CC3IF | GTIM_SR_CC3OF
|
||||
}
|
||||
};
|
||||
@@ -1,107 +0,0 @@
|
||||
/****************************************************************************
|
||||
*
|
||||
* Copyright (C) 2012 PX4 Development Team. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* 3. Neither the name PX4 nor the names of its contributors may be
|
||||
* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
/**
|
||||
* @file px4fmu_usb.c
|
||||
*
|
||||
* Board-specific USB functions.
|
||||
*/
|
||||
|
||||
/************************************************************************************
|
||||
* Included Files
|
||||
************************************************************************************/
|
||||
|
||||
#include <px4_config.h>
|
||||
|
||||
#include <sys/types.h>
|
||||
#include <stdint.h>
|
||||
#include <stdbool.h>
|
||||
#include <debug.h>
|
||||
|
||||
#include <nuttx/usb/usbdev.h>
|
||||
#include <nuttx/usb/usbdev_trace.h>
|
||||
|
||||
#include <up_arch.h>
|
||||
#include <stm32.h>
|
||||
#include "board_config.h"
|
||||
|
||||
/************************************************************************************
|
||||
* Definitions
|
||||
************************************************************************************/
|
||||
|
||||
/************************************************************************************
|
||||
* Private Functions
|
||||
************************************************************************************/
|
||||
|
||||
/************************************************************************************
|
||||
* Public Functions
|
||||
************************************************************************************/
|
||||
|
||||
/************************************************************************************
|
||||
* Name: stm32_usbinitialize
|
||||
*
|
||||
* Description:
|
||||
* Called to setup USB-related GPIO pins for the PX4FMU board.
|
||||
*
|
||||
************************************************************************************/
|
||||
|
||||
__EXPORT void stm32_usbinitialize(void)
|
||||
{
|
||||
/* The OTG FS has an internal soft pull-up */
|
||||
|
||||
/* Configure the OTG FS VBUS sensing GPIO, Power On, and Overcurrent GPIOs */
|
||||
|
||||
#ifdef CONFIG_STM32_OTGFS
|
||||
stm32_configgpio(GPIO_OTGFS_VBUS);
|
||||
/* XXX We only support device mode
|
||||
stm32_configgpio(GPIO_OTGFS_PWRON);
|
||||
stm32_configgpio(GPIO_OTGFS_OVER);
|
||||
*/
|
||||
#endif
|
||||
}
|
||||
|
||||
/************************************************************************************
|
||||
* Name: stm32_usbsuspend
|
||||
*
|
||||
* Description:
|
||||
* Board logic must provide the stm32_usbsuspend logic if the USBDEV driver is
|
||||
* used. This function is called whenever the USB enters or leaves suspend mode.
|
||||
* This is an opportunity for the board logic to shutdown clocks, power, etc.
|
||||
* while the USB is suspended.
|
||||
*
|
||||
************************************************************************************/
|
||||
|
||||
__EXPORT void stm32_usbsuspend(FAR struct usbdev_s *dev, bool resume)
|
||||
{
|
||||
uinfo("resume: %d\n", resume);
|
||||
}
|
||||
@@ -29,8 +29,12 @@ if (CONFIG_NET)
|
||||
list(APPEND nuttx_libs nuttx_net)
|
||||
endif()
|
||||
|
||||
if (NOT LD_SCRIPT)
|
||||
set(LD_SCRIPT ld.script)
|
||||
endif()
|
||||
|
||||
target_link_libraries(${fw_name}
|
||||
-T${PX4_BINARY_DIR}/NuttX/nuttx/configs/${BOARD}/scripts/ld.script
|
||||
-T${PX4_BINARY_DIR}/NuttX/nuttx/configs/${BOARD}/scripts/${LD_SCRIPT}
|
||||
-Wl,-Map=${PX4_BINARY_DIR}/${CONFIG}.map
|
||||
-Wl,--warn-common
|
||||
-Wl,--gc-sections
|
||||
|
||||
Reference in New Issue
Block a user