Mission+RTL: Refactoring mission and RTL to keep them separate. RTL does all its mission related computation in its own class.

Dataman: Add write function to dataman cache.

RTL and mission have a new common base class mission_base. Both inherit from them and mission, RTL mission, and rtl reverse mission inherit from them and implement their desired functionalities. This simplifies the logic in mission as well as make the logic in rtl mission reverse and mission more readable.
Rtl mission reverse now functional again for VTOL flying back the mission and transitioning to MC at the home position.
Dataman cache has new write functionality to write to dataman while updating write item in its cache if necessary.
Dataman cache is now only updated when the respective module is active. Leads to a higher computation time once on activation, but decreases unnecessary cache updates when inactive.
This commit is contained in:
Konrad
2023-09-29 14:25:03 +02:00
committed by Silvan Fuhrer
parent 1a7e438099
commit 007ed11bbe
24 changed files with 4561 additions and 3237 deletions
+26
View File
@@ -556,6 +556,32 @@ bool DatamanCache::loadWait(dm_item_t item, uint32_t index, uint8_t *buffer, uin
return success;
}
bool DatamanCache::writeWait(dm_item_t item, uint32_t index, uint8_t *buffer, uint32_t length, hrt_abstime timeout)
{
if (length > g_per_item_size[item]) {
PX4_ERR("Length %" PRIu32 " can't fit in data size for item %" PRIi8, length, static_cast<uint8_t>(item));
return false;
}
bool success = _client.writeSync(item, index, buffer, length, timeout);
if (success && _items) {
for (uint32_t i = 0; i < _num_items; ++i) {
if ((_items[i].response.item == item) &&
(_items[i].response.index == index) &&
((_items[i].cache_state == State::ResponseReceived) ||
(_items[i].cache_state == State::RequestPrepared))) {
memcpy(_items[i].response.data, buffer, length);
_items[i].cache_state = State::ResponseReceived;
break;
}
}
}
return success;
}
void DatamanCache::update()
{
if (_item_counter > 0) {
+13
View File
@@ -235,6 +235,19 @@ public:
*/
bool loadWait(dm_item_t item, uint32_t index, uint8_t *buffer, uint32_t length, hrt_abstime timeout = 0);
/**
* @brief Write data back and update it in the cache if stored.
*
* @param[in] item The data item type to write.
* @param[in] index The index of the data item.
* @param[in] buffer The buffer that contains the data to write.
* @param[in] length The length of the data to write.
* @param[in] timeout The maximum time in microseconds to wait for the response.
*
* @return True if the write operation succeeded, false otherwise.
*/
bool writeWait(dm_item_t item, uint32_t index, uint8_t *buffer, uint32_t length, hrt_abstime timeout = 1000_ms);
/**
* @brief Updates the dataman cache by checking for responses from the DatamanClient and processing them.
*