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316 lines
10 KiB
C++
316 lines
10 KiB
C++
/************************************************************************************
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*
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* Copyright (C) 2016, 2018 Gregory Nutt. All rights reserved.
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* Authors: Gregory Nutt <gnutt@nuttx.org>
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* David Sidrane <david_s5@nscdg.com>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name PX4 nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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************************************************************************************/
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/************************************************************************************
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* Included Files
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************************************************************************************/
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#include <px4_arch/spi_hw_description.h>
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#include <drivers/drv_sensor.h>
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#include <nuttx/spi/spi.h>
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#include <px4_platform_common/px4_config.h>
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#include <px4_log.h>
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#include <stdint.h>
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#include <stdbool.h>
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#include <debug.h>
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#include <nuttx/spi/spi.h>
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#include <arch/board/board.h>
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#include <systemlib/px4_macros.h>
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#include <px4_platform/gpio.h>
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#include <arm_internal.h>
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#include <chip.h>
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#include "imxrt_lpspi.h"
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#include "imxrt_gpio.h"
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#include "board_config.h"
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#include <systemlib/err.h>
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#if defined(CONFIG_IMXRT_LPSPI3) || defined(CONFIG_IMXRT_LPSPI4)
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constexpr px4_spi_bus_t px4_spi_buses[SPI_BUS_MAX_BUS_ITEMS] = {
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initSPIBus(SPI::Bus::LPSPI3, {
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initSPIDevice(DRV_IMU_DEVTYPE_ICM42688P, SPI::CS{GPIO::Port1, GPIO::Pin28}), /* GPIO_AD_B1_12 GPIO1_IO28 */
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}),
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initSPIBus(SPI::Bus::LPSPI4, {
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initSPIDevice(DRV_GYR_DEVTYPE_BMI088, SPI::CS{GPIO::Port2, GPIO::Pin18}), /* GPIO_B1_02 GPIO2_IO18 */
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initSPIDevice(DRV_ACC_DEVTYPE_BMI088, SPI::CS{GPIO::Port2, GPIO::Pin0}), /* GPIO_B0_00 GPIO2_IO00 */
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}),
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};
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static constexpr bool unused = validateSPIConfig(px4_spi_buses);
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#define _PIN_OFF(def) (((def) & (GPIO_PORT_MASK | GPIO_PIN_MASK)) | (GPIO_INPUT | IOMUX_PULL_DOWN_100K | IOMUX_CMOS_INPUT))
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/************************************************************************************
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* Public Functions
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************************************************************************************/
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/************************************************************************************
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* Name: fmurt1062_spidev_initialize
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*
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* Description:
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* Called to configure SPI chip select GPIO pins for the NXP FMUKRT1062-V1 board.
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*
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************************************************************************************/
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void imxrt_spidev_initialize(void)
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{
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for (int bus = 0; bus < SPI_BUS_MAX_BUS_ITEMS; ++bus) {
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for (int i = 0; i < SPI_BUS_MAX_DEVICES; ++i) {
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if (px4_spi_buses[bus].devices[i].cs_gpio != 0) {
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px4_arch_configgpio(px4_spi_buses[bus].devices[i].cs_gpio);
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}
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}
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}
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}
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/************************************************************************************
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* Name: imxrt_spi_bus_initialize
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*
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* Description:
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* Called to configure SPI chip select GPIO pins for the NXP FMUKRT1062-V1 board.
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*
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************************************************************************************/
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static const px4_spi_bus_t *_spi_bus3;
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static const px4_spi_bus_t *_spi_bus4;
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__EXPORT int imxrt1062_spi_bus_initialize(void)
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{
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for (int i = 0; i < SPI_BUS_MAX_BUS_ITEMS; ++i) {
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switch (px4_spi_buses[i].bus) {
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case 3: _spi_bus3 = &px4_spi_buses[i]; break;
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case 4: _spi_bus4 = &px4_spi_buses[i]; break;
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}
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}
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/* Configure SPI-based devices */
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struct spi_dev_s *spi_icm = px4_spibus_initialize(3);
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if (!spi_icm) {
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PX4_ERR("[boot] FAILED to initialize SPI port %d\n", 1);
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return -ENODEV;
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}
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/* Default bus 1 to 8MHz and de-assert the known chip selects.
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*/
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SPI_SETFREQUENCY(spi_icm, 8 * 1000 * 1000);
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SPI_SETBITS(spi_icm, 8);
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SPI_SETMODE(spi_icm, SPIDEV_MODE3);
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/* Get the SPI port for the BMI088 */
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struct spi_dev_s *spi_bmi = px4_spibus_initialize(4);
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if (!spi_bmi) {
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PX4_ERR("[boot] FAILED to initialize SPI port %d\n", 4);
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return -ENODEV;
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}
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/* Default ext bus to 8MHz and de-assert the known chip selects.
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*/
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SPI_SETFREQUENCY(spi_bmi, 8 * 1000 * 1000);
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SPI_SETBITS(spi_bmi, 8);
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SPI_SETMODE(spi_bmi, SPIDEV_MODE3);
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/* deselect all */
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for (int bus = 0; bus < SPI_BUS_MAX_BUS_ITEMS; ++bus) {
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for (int i = 0; i < SPI_BUS_MAX_DEVICES; ++i) {
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if (px4_spi_buses[bus].devices[i].cs_gpio != 0) {
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SPI_SELECT(spi_bmi, px4_spi_buses[bus].devices[i].devid, false);
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}
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}
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}
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return OK;
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}
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/****************************************************************************
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* Name: imxrt_lpspi1/2/3select and imxrt_lpspi1/2/3status
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*
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* Description:
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* The external functions, imxrt_lpspi1/2/3select and imxrt_lpspi1/2/3status must be
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* provided by board-specific logic. They are implementations of the select
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* and status methods of the SPI interface defined by struct spi_ops_s (see
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* include/nuttx/spi/spi.h). All other methods (including imxrt_lpspibus_initialize())
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* are provided by common STM32 logic. To use this common SPI logic on your
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* board:
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*
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* 1. Provide logic in imxrt_boardinitialize() to configure SPI chip select
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* pins.
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* 2. Provide imxrt_lpspi1/2/3select() and imxrt_lpspi1/2/3status() functions in your
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* board-specific logic. These functions will perform chip selection and
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* status operations using GPIOs in the way your board is configured.
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* 3. Add a calls to imxrt_lpspibus_initialize() in your low level application
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* initialization logic
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* 4. The handle returned by imxrt_lpspibus_initialize() may then be used to bind the
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* SPI driver to higher level logic (e.g., calling
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* mmcsd_spislotinitialize(), for example, will bind the SPI driver to
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* the SPI MMC/SD driver).
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*
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****************************************************************************/
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static inline void imxrt_spixselect(const px4_spi_bus_t *bus, struct spi_dev_s *dev, uint32_t devid, bool selected)
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{
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for (int i = 0; i < SPI_BUS_MAX_DEVICES; ++i) {
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if (bus->devices[i].cs_gpio == 0) {
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break;
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}
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if (devid == bus->devices[i].devid) {
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// SPI select is active low, so write !selected to select the device
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imxrt_gpio_write(bus->devices[i].cs_gpio, !selected);
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}
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}
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}
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#if defined(CONFIG_IMXRT_LPSPI3)
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__EXPORT void imxrt_lpspi3select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
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{
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imxrt_spixselect(_spi_bus3, dev, devid, selected);
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}
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__EXPORT uint8_t imxrt_lpspi3status(FAR struct spi_dev_s *dev, uint32_t devid)
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{
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return SPI_STATUS_PRESENT;
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}
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#endif
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#if defined(CONFIG_IMXRT_LPSPI4)
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__EXPORT void imxrt_lpspi4select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
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{
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imxrt_spixselect(_spi_bus4, dev, devid, selected);
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}
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__EXPORT uint8_t imxrt_lpspi4status(FAR struct spi_dev_s *dev, uint32_t devid)
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{
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return SPI_STATUS_PRESENT;
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}
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#endif
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/************************************************************************************
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* Name: board_spi_reset
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*
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* Description:
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*
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*
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************************************************************************************/
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__EXPORT void board_spi_reset(int ms, int bus_mask)
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{
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#ifdef CONFIG_IMXRT_LPSPI1
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/* Goal not to back feed the chips on the bus via IO lines */
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for (int bus = 0; bus < SPI_BUS_MAX_BUS_ITEMS; ++bus) {
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if (px4_spi_buses[bus].bus == 1 || px4_spi_buses[bus].bus == 3) {
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for (int i = 0; i < SPI_BUS_MAX_DEVICES; ++i) {
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if (px4_spi_buses[bus].devices[i].cs_gpio != 0) {
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imxrt_config_gpio(_PIN_OFF(px4_spi_buses[bus].devices[i].cs_gpio));
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}
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if (px4_spi_buses[bus].devices[i].drdy_gpio != 0) {
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imxrt_config_gpio(_PIN_OFF(px4_spi_buses[bus].devices[i].drdy_gpio));
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}
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}
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}
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}
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imxrt_config_gpio(GPIO_SPI1_SCK_OFF);
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imxrt_config_gpio(GPIO_SPI1_MISO_OFF);
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imxrt_config_gpio(GPIO_SPI1_MOSI_OFF);
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imxrt_config_gpio(GPIO_SPI3_SCK_OFF);
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imxrt_config_gpio(GPIO_SPI3_MISO_OFF);
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imxrt_config_gpio(GPIO_SPI3_MOSI_OFF);
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imxrt_config_gpio(_PIN_OFF(GPIO_LPI2C3_SDA_RESET));
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imxrt_config_gpio(_PIN_OFF(GPIO_LPI2C3_SCL_RESET));
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/* set the sensor rail off */
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imxrt_gpio_write(GPIO_VDD_3V3_SENSORS_EN, 0);
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/* wait for the sensor rail to reach GND */
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usleep(ms * 1000);
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warnx("reset done, %d ms", ms);
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/* re-enable power */
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/* switch the sensor rail back on */
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imxrt_gpio_write(GPIO_VDD_3V3_SENSORS_EN, 1);
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/* wait a bit before starting SPI, different times didn't influence results */
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usleep(100);
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/* reconfigure the SPI pins */
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for (int bus = 0; bus < SPI_BUS_MAX_BUS_ITEMS; ++bus) {
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if (px4_spi_buses[bus].bus == 1 || px4_spi_buses[bus].bus == 3) {
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for (int i = 0; i < SPI_BUS_MAX_DEVICES; ++i) {
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if (px4_spi_buses[bus].devices[i].cs_gpio != 0) {
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imxrt_config_gpio(px4_spi_buses[bus].devices[i].cs_gpio);
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}
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if (px4_spi_buses[bus].devices[i].drdy_gpio != 0) {
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imxrt_config_gpio(px4_spi_buses[bus].devices[i].drdy_gpio);
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}
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}
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}
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}
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imxrt_config_gpio(GPIO_LPSPI1_SCK);
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imxrt_config_gpio(GPIO_LPSPI1_MISO);
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imxrt_config_gpio(GPIO_LPSPI1_MOSI);
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imxrt_config_gpio(GPIO_LPSPI3_SCK);
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imxrt_config_gpio(GPIO_LPSPI3_MISO);
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imxrt_config_gpio(GPIO_LPSPI3_MOSI);
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imxrt_config_gpio(GPIO_LPI2C3_SDA);
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imxrt_config_gpio(GPIO_LPI2C3_SCL);
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#endif /* CONFIG_IMXRT_LPSPI1 */
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}
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#endif /* CONFIG_IMXRT_LPSPI3 || CONFIG_IMXRT_LPSPI4 */
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