mirror of
https://gitee.com/mirrors_PX4/PX4-Autopilot.git
synced 2026-11-03 05:31:36 +08:00
Julian Oes
9686c81f7d
This enables flow control on CDCACM for the NuttX boards which fixes a problem where HITL would stall. The stall could happen if the hardware would be a bit too slow in keeping up with the incoming messages. Often, this happened on arming because the logger would take some time to log all parameters right at the beginning. The stall would then not recover due to NuttX bug where the rx interrupt would not be restored correctly and instead only a slower watchdog would release the next read. This watchdog takes 200ms which means it's hard to impossible to get out of the situation without restarting sim and/or PX4. For more information about the issue, see: apache/incubator-nuttx#3633 As a workaround, until that bug is fixed, and because it makes sense anyway, I propose to enable FLOWCONTROL for the serial via USB.
232 lines
6.1 KiB
Plaintext
232 lines
6.1 KiB
Plaintext
#
|
|
# This file is autogenerated: PLEASE DO NOT EDIT IT.
|
|
#
|
|
# You can use "make menuconfig" to make any modifications to the installed .config file.
|
|
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
|
|
# modifications.
|
|
#
|
|
# CONFIG_DISABLE_ENVIRON is not set
|
|
# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set
|
|
# CONFIG_MMCSD_HAVE_CARDDETECT is not set
|
|
# CONFIG_MMCSD_HAVE_WRITEPROTECT is not set
|
|
# CONFIG_MMCSD_MMCSUPPORT is not set
|
|
# CONFIG_MMCSD_SPI is not set
|
|
# CONFIG_NSH_DISABLEBG is not set
|
|
# CONFIG_NSH_DISABLESCRIPT is not set
|
|
# CONFIG_NSH_DISABLE_DF is not set
|
|
# CONFIG_NSH_DISABLE_EXEC is not set
|
|
# CONFIG_NSH_DISABLE_EXIT is not set
|
|
# CONFIG_NSH_DISABLE_GET is not set
|
|
# CONFIG_NSH_DISABLE_ITEF is not set
|
|
# CONFIG_NSH_DISABLE_LOOPS is not set
|
|
# CONFIG_NSH_DISABLE_MKFATFS is not set
|
|
# CONFIG_NSH_DISABLE_SEMICOLON is not set
|
|
# CONFIG_NSH_DISABLE_TIME is not set
|
|
# CONFIG_STM32_CCMEXCLUDE is not set
|
|
CONFIG_ARCH="arm"
|
|
CONFIG_ARCH_BOARD_CUSTOM=y
|
|
CONFIG_ARCH_BOARD_CUSTOM_DIR="../../../../boards/mro/x21/nuttx-config"
|
|
CONFIG_ARCH_BOARD_CUSTOM_DIR_RELPATH=y
|
|
CONFIG_ARCH_BOARD_CUSTOM_NAME="px4"
|
|
CONFIG_ARCH_CHIP="stm32"
|
|
CONFIG_ARCH_CHIP_STM32=y
|
|
CONFIG_ARCH_CHIP_STM32F427V=y
|
|
CONFIG_ARCH_INTERRUPTSTACK=512
|
|
CONFIG_ARCH_STACKDUMP=y
|
|
CONFIG_ARMV7M_MEMCPY=y
|
|
CONFIG_ARMV7M_USEBASEPRI=y
|
|
CONFIG_ARM_MPU_EARLY_RESET=y
|
|
CONFIG_BOARDCTL_RESET=y
|
|
CONFIG_BOARD_CRASHDUMP=y
|
|
CONFIG_BOARD_LOOPSPERMSEC=16717
|
|
CONFIG_BOARD_RESET_ON_ASSERT=2
|
|
CONFIG_BUILTIN=y
|
|
CONFIG_C99_BOOL8=y
|
|
CONFIG_CDCACM=y
|
|
CONFIG_CDCACM_IFLOWCONTROL=y
|
|
CONFIG_CDCACM_PRODUCTID=0x0021
|
|
CONFIG_CDCACM_PRODUCTSTR="PX4 AUAV X2.1"
|
|
CONFIG_CDCACM_RXBUFSIZE=600
|
|
CONFIG_CDCACM_TXBUFSIZE=2000
|
|
CONFIG_CDCACM_VENDORID=0x26ac
|
|
CONFIG_CDCACM_VENDORSTR="AUAV"
|
|
CONFIG_CLOCK_MONOTONIC=y
|
|
CONFIG_DEBUG_FULLOPT=y
|
|
CONFIG_DEBUG_HARDFAULT_ALERT=y
|
|
CONFIG_DEBUG_SYMBOLS=y
|
|
CONFIG_DEFAULT_SMALL=y
|
|
CONFIG_DEV_FIFO_SIZE=0
|
|
CONFIG_DEV_PIPE_MAXSIZE=1024
|
|
CONFIG_DEV_PIPE_SIZE=70
|
|
CONFIG_DISABLE_MQUEUE=y
|
|
CONFIG_FAT_DMAMEMORY=y
|
|
CONFIG_FAT_LCNAMES=y
|
|
CONFIG_FAT_LFN=y
|
|
CONFIG_FAT_LFN_ALIAS_HASH=y
|
|
CONFIG_FDCLONE_STDIO=y
|
|
CONFIG_FS_BINFS=y
|
|
CONFIG_FS_CROMFS=y
|
|
CONFIG_FS_FAT=y
|
|
CONFIG_FS_FATTIME=y
|
|
CONFIG_FS_PROCFS=y
|
|
CONFIG_FS_PROCFS_INCLUDE_PROGMEM=y
|
|
CONFIG_FS_PROCFS_REGISTER=y
|
|
CONFIG_FS_ROMFS=y
|
|
CONFIG_GRAN=y
|
|
CONFIG_GRAN_INTR=y
|
|
CONFIG_HAVE_CXX=y
|
|
CONFIG_HAVE_CXXINITIALIZE=y
|
|
CONFIG_I2C=y
|
|
CONFIG_I2C_RESET=y
|
|
CONFIG_IDLETHREAD_STACKSIZE=750
|
|
CONFIG_LIBC_FLOATINGPOINT=y
|
|
CONFIG_LIBC_LONG_LONG=y
|
|
CONFIG_LIBC_STRERROR=y
|
|
CONFIG_MEMSET_64BIT=y
|
|
CONFIG_MEMSET_OPTSPEED=y
|
|
CONFIG_MMCSD=y
|
|
CONFIG_MMCSD_SDIO=y
|
|
CONFIG_MMCSD_SDIOWAIT_WRCOMPLETE=y
|
|
CONFIG_MM_REGIONS=2
|
|
CONFIG_MTD=y
|
|
CONFIG_MTD_BYTE_WRITE=y
|
|
CONFIG_MTD_PARTITION=y
|
|
CONFIG_MTD_RAMTRON=y
|
|
CONFIG_NAME_MAX=40
|
|
CONFIG_NSH_ARCHINIT=y
|
|
CONFIG_NSH_ARGCAT=y
|
|
CONFIG_NSH_BUILTIN_APPS=y
|
|
CONFIG_NSH_CMDPARMS=y
|
|
CONFIG_NSH_CROMFSETC=y
|
|
CONFIG_NSH_DISABLE_IFCONFIG=y
|
|
CONFIG_NSH_DISABLE_IFUPDOWN=y
|
|
CONFIG_NSH_DISABLE_TELNETD=y
|
|
CONFIG_NSH_LINELEN=128
|
|
CONFIG_NSH_MAXARGUMENTS=15
|
|
CONFIG_NSH_NESTDEPTH=8
|
|
CONFIG_NSH_QUOTE=y
|
|
CONFIG_NSH_ROMFSETC=y
|
|
CONFIG_NSH_ROMFSSECTSIZE=128
|
|
CONFIG_NSH_STRERROR=y
|
|
CONFIG_NSH_VARS=y
|
|
CONFIG_PIPES=y
|
|
CONFIG_PREALLOC_TIMERS=50
|
|
CONFIG_PRIORITY_INHERITANCE=y
|
|
CONFIG_PTHREAD_MUTEX_ROBUST=y
|
|
CONFIG_PTHREAD_STACK_MIN=512
|
|
CONFIG_RAMTRON_SETSPEED=y
|
|
CONFIG_RAM_SIZE=262144
|
|
CONFIG_RAM_START=0x20000000
|
|
CONFIG_RAW_BINARY=y
|
|
CONFIG_RTC_DATETIME=y
|
|
CONFIG_SCHED_ATEXIT=y
|
|
CONFIG_SCHED_HPWORK=y
|
|
CONFIG_SCHED_HPWORKPRIORITY=249
|
|
CONFIG_SCHED_HPWORKSTACKSIZE=1280
|
|
CONFIG_SCHED_INSTRUMENTATION=y
|
|
CONFIG_SCHED_INSTRUMENTATION_EXTERNAL=y
|
|
CONFIG_SCHED_LPWORK=y
|
|
CONFIG_SCHED_LPWORKPRIORITY=50
|
|
CONFIG_SCHED_LPWORKSTACKSIZE=1632
|
|
CONFIG_SCHED_WAITPID=y
|
|
CONFIG_SDCLONE_DISABLE=y
|
|
CONFIG_SDIO_BLOCKSETUP=y
|
|
CONFIG_SEM_NNESTPRIO=8
|
|
CONFIG_SEM_PREALLOCHOLDERS=0
|
|
CONFIG_SERIAL_IFLOWCONTROL_WATERMARKS=y
|
|
CONFIG_SERIAL_TERMIOS=y
|
|
CONFIG_SIG_DEFAULT=y
|
|
CONFIG_SIG_SIGALRM_ACTION=y
|
|
CONFIG_SIG_SIGUSR1_ACTION=y
|
|
CONFIG_SIG_SIGUSR2_ACTION=y
|
|
CONFIG_SIG_SIGWORK=4
|
|
CONFIG_STACK_COLORATION=y
|
|
CONFIG_START_DAY=30
|
|
CONFIG_START_MONTH=11
|
|
CONFIG_STDIO_BUFFER_SIZE=32
|
|
CONFIG_STM32_ADC1=y
|
|
CONFIG_STM32_BBSRAM=y
|
|
CONFIG_STM32_BBSRAM_FILES=5
|
|
CONFIG_STM32_BKPSRAM=y
|
|
CONFIG_STM32_CCMDATARAM=y
|
|
CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG=y
|
|
CONFIG_STM32_DMA1=y
|
|
CONFIG_STM32_DMA2=y
|
|
CONFIG_STM32_FLASH_CONFIG_I=y
|
|
CONFIG_STM32_FLOWCONTROL_BROKEN=y
|
|
CONFIG_STM32_I2C1=y
|
|
CONFIG_STM32_I2CTIMEOMS=10
|
|
CONFIG_STM32_I2CTIMEOTICKS=10
|
|
CONFIG_STM32_JTAG_SW_ENABLE=y
|
|
CONFIG_STM32_OTGFS=y
|
|
CONFIG_STM32_PWR=y
|
|
CONFIG_STM32_RTC=y
|
|
CONFIG_STM32_RTC_HSECLOCK=y
|
|
CONFIG_STM32_RTC_MAGIC=0xfacefeee
|
|
CONFIG_STM32_RTC_MAGIC_REG=1
|
|
CONFIG_STM32_RTC_MAGIC_TIME_SET=0xfacefeef
|
|
CONFIG_STM32_SAVE_CRASHDUMP=y
|
|
CONFIG_STM32_SDIO=y
|
|
CONFIG_STM32_SDIO_CARD=y
|
|
CONFIG_STM32_SERIALBRK_BSDCOMPAT=y
|
|
CONFIG_STM32_SERIAL_DISABLE_REORDERING=y
|
|
CONFIG_STM32_SPI1=y
|
|
CONFIG_STM32_SPI1_DMA=y
|
|
CONFIG_STM32_SPI1_DMA_BUFFER=1024
|
|
CONFIG_STM32_SPI2=y
|
|
CONFIG_STM32_SPI_DMA=y
|
|
CONFIG_STM32_SPI_DMATHRESHOLD=8
|
|
CONFIG_STM32_TIM10=y
|
|
CONFIG_STM32_TIM11=y
|
|
CONFIG_STM32_TIM3=y
|
|
CONFIG_STM32_TIM9=y
|
|
CONFIG_STM32_UART4=y
|
|
CONFIG_STM32_UART7=y
|
|
CONFIG_STM32_UART8=y
|
|
CONFIG_STM32_USART1=y
|
|
CONFIG_STM32_USART2=y
|
|
CONFIG_STM32_USART3=y
|
|
CONFIG_STM32_USART6=y
|
|
CONFIG_STM32_USART_BREAKS=y
|
|
CONFIG_STM32_USART_SINGLEWIRE=y
|
|
CONFIG_STM32_WWDG=y
|
|
CONFIG_SYSTEM_CDCACM=y
|
|
CONFIG_SYSTEM_NSH=y
|
|
CONFIG_TASK_NAME_SIZE=24
|
|
CONFIG_UART4_BAUD=57600
|
|
CONFIG_UART4_RXBUFSIZE=300
|
|
CONFIG_UART4_RXDMA=y
|
|
CONFIG_UART4_TXBUFSIZE=300
|
|
CONFIG_UART7_BAUD=57600
|
|
CONFIG_UART7_RXBUFSIZE=300
|
|
CONFIG_UART7_RXDMA=y
|
|
CONFIG_UART7_SERIAL_CONSOLE=y
|
|
CONFIG_UART7_TXBUFSIZE=300
|
|
CONFIG_UART8_BAUD=57600
|
|
CONFIG_UART8_RXBUFSIZE=300
|
|
CONFIG_UART8_TXBUFSIZE=300
|
|
CONFIG_USART1_RXBUFSIZE=128
|
|
CONFIG_USART1_TXBUFSIZE=32
|
|
CONFIG_USART2_BAUD=57600
|
|
CONFIG_USART2_IFLOWCONTROL=y
|
|
CONFIG_USART2_OFLOWCONTROL=y
|
|
CONFIG_USART2_RXBUFSIZE=600
|
|
CONFIG_USART2_RXDMA=y
|
|
CONFIG_USART2_TXBUFSIZE=1100
|
|
CONFIG_USART3_BAUD=57600
|
|
CONFIG_USART3_IFLOWCONTROL=y
|
|
CONFIG_USART3_OFLOWCONTROL=y
|
|
CONFIG_USART3_RXBUFSIZE=300
|
|
CONFIG_USART3_RXDMA=y
|
|
CONFIG_USART3_TXBUFSIZE=600
|
|
CONFIG_USART6_BAUD=57600
|
|
CONFIG_USART6_RXBUFSIZE=300
|
|
CONFIG_USART6_RXDMA=y
|
|
CONFIG_USART6_TXBUFSIZE=300
|
|
CONFIG_USBDEV=y
|
|
CONFIG_USBDEV_BUSPOWERED=y
|
|
CONFIG_USBDEV_MAXPOWER=500
|
|
CONFIG_USEC_PER_TICK=1000
|
|
CONFIG_USERMAIN_STACKSIZE=2944
|
|
CONFIG_USER_ENTRYPOINT="nsh_main"
|