mirror of
https://gitee.com/mirrors_PX4/PX4-Autopilot.git
synced 2026-07-07 05:10:35 +08:00
Andrew Tridgell
af27101ffe
the timeout of 1ms was far too long, and could impact flight performance Returning 0xffff on error matches the FMU code, and allows bad values to be discarded
173 lines
4.7 KiB
C
173 lines
4.7 KiB
C
/****************************************************************************
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*
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* Copyright (C) 2012 PX4 Development Team. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name PX4 nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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/**
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* @file adc.c
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*
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* Simple ADC support for PX4IO on STM32.
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*/
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#include <nuttx/config.h>
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#include <stdint.h>
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#include <nuttx/arch.h>
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#include <arch/stm32/chip.h>
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#include <stm32_internal.h>
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#include <drivers/drv_hrt.h>
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#include <systemlib/perf_counter.h>
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#define DEBUG
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#include "px4io.h"
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/*
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* Register accessors.
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* For now, no reason not to just use ADC1.
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*/
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#define REG(_reg) (*(volatile uint32_t *)(STM32_ADC1_BASE + _reg))
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#define rSR REG(STM32_ADC_SR_OFFSET)
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#define rCR1 REG(STM32_ADC_CR1_OFFSET)
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#define rCR2 REG(STM32_ADC_CR2_OFFSET)
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#define rSMPR1 REG(STM32_ADC_SMPR1_OFFSET)
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#define rSMPR2 REG(STM32_ADC_SMPR2_OFFSET)
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#define rJOFR1 REG(STM32_ADC_JOFR1_OFFSET)
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#define rJOFR2 REG(STM32_ADC_JOFR2_OFFSET)
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#define rJOFR3 REG(STM32_ADC_JOFR3_OFFSET)
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#define rJOFR4 REG(STM32_ADC_JOFR4_OFFSET)
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#define rHTR REG(STM32_ADC_HTR_OFFSET)
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#define rLTR REG(STM32_ADC_LTR_OFFSET)
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#define rSQR1 REG(STM32_ADC_SQR1_OFFSET)
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#define rSQR2 REG(STM32_ADC_SQR2_OFFSET)
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#define rSQR3 REG(STM32_ADC_SQR3_OFFSET)
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#define rJSQR REG(STM32_ADC_JSQR_OFFSET)
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#define rJDR1 REG(STM32_ADC_JDR1_OFFSET)
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#define rJDR2 REG(STM32_ADC_JDR2_OFFSET)
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#define rJDR3 REG(STM32_ADC_JDR3_OFFSET)
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#define rJDR4 REG(STM32_ADC_JDR4_OFFSET)
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#define rDR REG(STM32_ADC_DR_OFFSET)
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perf_counter_t adc_perf;
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int
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adc_init(void)
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{
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adc_perf = perf_alloc(PC_ELAPSED, "adc");
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/* do calibration if supported */
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#ifdef ADC_CR2_CAL
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rCR2 |= ADC_CR2_RSTCAL;
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up_udelay(1);
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if (rCR2 & ADC_CR2_RSTCAL)
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return -1;
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rCR2 |= ADC_CR2_CAL;
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up_udelay(100);
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if (rCR2 & ADC_CR2_CAL)
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return -1;
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#endif
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/* arbitrarily configure all channels for 55 cycle sample time */
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rSMPR1 = 0b00000011011011011011011011011011;
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rSMPR2 = 0b00011011011011011011011011011011;
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/* XXX for F2/4, might want to select 12-bit mode? */
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rCR1 = 0;
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/* enable the temperature sensor / Vrefint channel if supported*/
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rCR2 =
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#ifdef ADC_CR2_TSVREFE
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/* enable the temperature sensor in CR2 */
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ADC_CR2_TSVREFE |
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#endif
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0;
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#ifdef ADC_CCR_TSVREFE
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/* enable temperature sensor in CCR */
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rCCR = ADC_CCR_TSVREFE;
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#endif
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/* configure for a single-channel sequence */
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rSQR1 = 0;
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rSQR2 = 0;
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rSQR3 = 0; /* will be updated with the channel each tick */
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/* power-cycle the ADC and turn it on */
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rCR2 &= ~ADC_CR2_ADON;
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up_udelay(10);
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rCR2 |= ADC_CR2_ADON;
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up_udelay(10);
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rCR2 |= ADC_CR2_ADON;
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up_udelay(10);
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return 0;
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}
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/*
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return one measurement, or 0xffff on error
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*/
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uint16_t
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adc_measure(unsigned channel)
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{
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perf_begin(adc_perf);
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/* clear any previous EOC */
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if (rSR & ADC_SR_EOC)
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rSR &= ~ADC_SR_EOC;
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/* run a single conversion right now - should take about 60 cycles (a few microseconds) max */
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rSQR3 = channel;
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rCR2 |= ADC_CR2_ADON;
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/* wait for the conversion to complete */
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hrt_abstime now = hrt_absolute_time();
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while (!(rSR & ADC_SR_EOC)) {
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/* never spin forever - this will give a bogus result though */
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if (hrt_elapsed_time(&now) > 100) {
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debug("adc timeout");
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perf_end(adc_perf);
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return 0xffff;
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}
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}
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/* read the result and clear EOC */
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uint16_t result = rDR;
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perf_end(adc_perf);
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return result;
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}
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