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https://gitee.com/mirrors_PX4/PX4-Autopilot.git
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1250563ed1
* rt106x: Use platform SPI hal layer * rt106x: Add romapi support and reboot to isp/bootloader * bootloader: imxrt_common: Add rt106x support * NXP MR-Tropic initial commit * Add missing file for mr-tropic bootloader * nxp-mr-tropic:Bootloader Alow Assertion debugging & Keep Ram Vectors * nxp-mr-tropic: Firmware Boot from bootloader * nxp-mr-tropic:Add Bootloader bin file * mr-tropic: Update config and linker Fixes enet issues with write-back and some code cleanup. Furthermore increase NOR LittleFS to 256kB to reflect on linker * Update NuttX * mr-tropic: fix itcm apping and add mr-tropic to itcm check --------- Co-authored-by: David Sidrane <David.Sidrane@NscDg.com>
153 lines
6.1 KiB
C++
153 lines
6.1 KiB
C++
/****************************************************************************
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*
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* Copyright (C) 2024 PX4 Development Team. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name PX4 nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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#include <stdint.h>
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#include <chip.h>
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#include "hardware/imxrt_tmr.h"
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#include "hardware/imxrt_flexpwm.h"
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#include "imxrt_gpio.h"
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#include "imxrt_iomuxc.h"
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#include "hardware/imxrt_pinmux.h"
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#include "imxrt_xbar.h"
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#include "imxrt_periphclks.h"
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#include <drivers/drv_pwm_output.h>
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#include <px4_arch/io_timer_hw_description.h>
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#include "board_config.h"
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/****************************************************************************************************
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* Definitions
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****************************************************************************************************/
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/* Register accessors */
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#define _REG(_addr) (*(volatile uint16_t *)(_addr))
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/* QTimer3 register accessors */
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#define REG(_reg) _REG(IMXRT_QTIMER3_BASE + IMXRT_TMR_OFFSET(IMXRT_TMR_CH0,(_reg)))
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#define rCOMP1 REG(IMXRT_TMR_COMP1_OFFSET)
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#define rCOMP2 REG(IMXRT_TMR_COMP2_OFFSET)
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#define rCAPT REG(IMXRT_TMR_CAPT_OFFSET)
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#define rLOAD REG(IMXRT_TMR_LOAD_OFFSET)
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#define rHOLD REG(IMXRT_TMR_HOLD_OFFSET)
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#define rCNTR REG(IMXRT_TMR_CNTR_OFFSET)
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#define rCTRL REG(IMXRT_TMR_CTRL_OFFSET)
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#define rSCTRL REG(IMXRT_TMR_SCTRL_OFFSET)
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#define rCMPLD1 REG(IMXRT_TMR_CMPLD1_OFFSET)
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#define rCMPLD2 REG(IMXRT_TMR_CMPLD2_OFFSET)
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#define rCSCTRL REG(IMXRT_TMR_CSCTRL_OFFSET)
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#define rFILT REG(IMXRT_TMR_FILT_OFFSET)
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#define rDMA REG(IMXRT_TMR_DMA_OFFSET)
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#define rENBL REG(IMXRT_TMR_ENBL_OFFSET)
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constexpr io_timers_t io_timers[MAX_IO_TIMERS] = {
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initIOPWMDshot(PWM::FlexPWM2, PWM::Submodule0), // PWM_1, PMW_2
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initIOPWMDshot(PWM::FlexPWM2, PWM::Submodule1), // PWM_3, PWM_4
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initIOPWMDshot(PWM::FlexPWM4, PWM::Submodule1), // PWM_5, PWM_6
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initIOPWMDshot(PWM::FlexPWM4, PWM::Submodule2), // PWM_7, PWM_8
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};
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#define FXIO_IOMUX (IOMUX_SLEW_FAST | IOMUX_DRIVE_130OHM | IOMUX_PULL_UP_47K | IOMUX_SCHMITT_TRIGGER)
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constexpr timer_io_channels_t timer_io_channels[MAX_TIMER_IO_CHANNELS] = {
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initIOTimerChannelDshot(io_timers, {PWM::PWM2_PWM_A, PWM::Submodule0}, IOMUX::Pad::GPIO_EMC_06, GPIO_FLEXIO1_FLEXIO06_1 | FXIO_IOMUX, 6),
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initIOTimerChannelDshot(io_timers, {PWM::PWM2_PWM_B, PWM::Submodule0}, IOMUX::Pad::GPIO_EMC_07, GPIO_FLEXIO1_FLEXIO07_1 | FXIO_IOMUX, 7),
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initIOTimerChannelDshot(io_timers, {PWM::PWM2_PWM_A, PWM::Submodule1}, IOMUX::Pad::GPIO_EMC_08, GPIO_FLEXIO1_FLEXIO08_1 | FXIO_IOMUX, 8),
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initIOTimerChannelDshot(io_timers, {PWM::PWM2_PWM_B, PWM::Submodule1}, IOMUX::Pad::GPIO_EMC_09, GPIO_FLEXIO1_FLEXIO09_1 | FXIO_IOMUX, 9),
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initIOTimerChannelDshot(io_timers, {PWM::PWM4_PWM_A, PWM::Submodule1}, IOMUX::Pad::GPIO_EMC_02, GPIO_FLEXIO1_FLEXIO02_1 | FXIO_IOMUX, 2),
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initIOTimerChannelDshot(io_timers, {PWM::PWM4_PWM_B, PWM::Submodule1}, IOMUX::Pad::GPIO_EMC_03, GPIO_FLEXIO1_FLEXIO03_1 | FXIO_IOMUX, 3),
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initIOTimerChannelDshot(io_timers, {PWM::PWM4_PWM_A, PWM::Submodule2}, IOMUX::Pad::GPIO_EMC_04, GPIO_FLEXIO1_FLEXIO04_1 | FXIO_IOMUX, 4),
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initIOTimerChannelDshot(io_timers, {PWM::PWM4_PWM_B, PWM::Submodule2}, IOMUX::Pad::GPIO_EMC_05, GPIO_FLEXIO1_FLEXIO05_1 | FXIO_IOMUX, 5),
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};
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constexpr io_timers_channel_mapping_t io_timers_channel_mapping =
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initIOTimerChannelMapping(io_timers, timer_io_channels);
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constexpr io_timers_t led_pwm_timers[MAX_LED_TIMERS] = {
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};
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constexpr timer_io_channels_t led_pwm_channels[MAX_TIMER_LED_CHANNELS] = {
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};
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#include <stdio.h>
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void fmurt1062_timer_initialize(void)
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{
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/* We must configure Qtimer 3 as the IPG divide by to yield 16 Mhz
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* and deliver that clock to the eFlexPWM234 via XBAR
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*
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* IPG = 144 Mhz
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* 16Mhz = 144 / 9
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* COMP 1 = 5, COMP2 = 4
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*
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* */
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/* Enable Block Clocks for Qtimer and XBAR1 */
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imxrt_clockall_timer3();
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imxrt_clockall_xbar1();
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/* Disable Timer */
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rCTRL = 0;
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rCOMP1 = 5 - 1; // N - 1
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rCOMP2 = 4 - 1;
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rCAPT = 0;
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rLOAD = 0;
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rCNTR = 0;
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rSCTRL = TMR_SCTRL_OEN;
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rCMPLD1 = 0;
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rCMPLD2 = 0;
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rCSCTRL = 0;
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rFILT = 0;
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rDMA = 0;
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/* Count rising edges of primary source,
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* Prescaler is /1
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* Count UP until compare, then re-initialize. a successful compare occurs when the counter reaches a COMP1 value.
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* Toggle OFLAG output using alternating compare registers
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*/
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rCTRL = (TMR_CTRL_CM_MODE1 | TMR_CTRL_PCS_DIV1 | TMR_CTRL_LENGTH | TMR_CTRL_OUTMODE_TOG_ALT);
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/* QTIMER3_TIMER0 -> Flexpwm234ExtClk */
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imxrt_xbar_connect(IMXRT_XBARA1_OUT_FLEXPWM234_EXT_CLK_SEL_OFFSET, IMXRT_XBARA1_IN_QTIMER3_TMR0_OUT);
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imxrt_xbar_connect(IMXRT_XBARA1_OUT_FLEXPWM1_EXT_CLK_SEL_OFFSET, IMXRT_XBARA1_IN_QTIMER3_TMR0_OUT);
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}
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