mirror of
https://gitee.com/mirrors_PX4/PX4-Autopilot.git
synced 2026-11-02 01:31:36 +08:00
Peter van der PerkandDavid Sidrane
1250563ed1
* rt106x: Use platform SPI hal layer * rt106x: Add romapi support and reboot to isp/bootloader * bootloader: imxrt_common: Add rt106x support * NXP MR-Tropic initial commit * Add missing file for mr-tropic bootloader * nxp-mr-tropic:Bootloader Alow Assertion debugging & Keep Ram Vectors * nxp-mr-tropic: Firmware Boot from bootloader * nxp-mr-tropic:Add Bootloader bin file * mr-tropic: Update config and linker Fixes enet issues with write-back and some code cleanup. Furthermore increase NOR LittleFS to 256kB to reflect on linker * Update NuttX * mr-tropic: fix itcm apping and add mr-tropic to itcm check --------- Co-authored-by: David Sidrane <David.Sidrane@NscDg.com>
183 lines
6.7 KiB
C++
183 lines
6.7 KiB
C++
/****************************************************************************
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*
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* Copyright (c) 2024 PX4 Development Team. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name Airmind nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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/**
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* @file tropic_led_pwm.cpp
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*/
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#include <px4_platform_common/px4_config.h>
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#include <systemlib/px4_macros.h>
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#include <nuttx/arch.h>
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#include <nuttx/irq.h>
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#include <sys/types.h>
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#include <stdbool.h>
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#include <assert.h>
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#include <debug.h>
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#include <time.h>
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#include <queue.h>
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#include <errno.h>
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#include <string.h>
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#include <stdio.h>
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#include <arch/board/board.h>
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#include <drivers/drv_pwm_output.h>
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#include <px4_arch/io_timer.h>
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#include <chip.h>
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#include "imxrt_xbar.h"
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#include "imxrt_periphclks.h"
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#include "hardware/imxrt_tmr.h"
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#include "hardware/imxrt_flexpwm.h"
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#define LED_PWM_FREQ 1000
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#define FLEXPWM_FREQ 1000000
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#define QTMR_FREQ (144000000/128)
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#define SM_SPACING (IMXRT_FLEXPWM_SM1CNT_OFFSET-IMXRT_FLEXPWM_SM0CNT_OFFSET)
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#define FLEXPWM_TIMER_BASE IMXRT_FLEXPWM2_BASE
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/* Register accessors */
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#define _REG(_addr) (*(volatile uint16_t *)(_addr))
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#define _REG16(_base, _reg) (*(volatile uint16_t *)(_base + _reg))
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#define FLEXPWMREG(_tmr, _sm, _reg) _REG16(_tmr + ((_sm) * SM_SPACING), (_reg))
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/* FlexPWM Registers for LED_G */
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#define rINIT(_tim, _sm) FLEXPWMREG(_tim, _sm,IMXRT_FLEXPWM_SM0INIT_OFFSET) /* Initial Count Register */
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#define rCTRL(_tim, _sm) FLEXPWMREG(_tim, _sm,IMXRT_FLEXPWM_SM0CTRL_OFFSET) /* Control Register */
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#define rCTRL2(_tim, _sm) FLEXPWMREG(_tim, _sm,IMXRT_FLEXPWM_SM0CTRL2_OFFSET) /* Control 2 Register */
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#define rFSTS0(_tim) FLEXPWMREG(_tim, 0, IMXRT_FLEXPWM_FSTS0_OFFSET) /* Fault Status Register */
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#define rVAL0(_tim, _sm) FLEXPWMREG(_tim, _sm,IMXRT_FLEXPWM_SM0VAL0_OFFSET) /* Value Register 0 */
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#define rVAL1(_tim, _sm) FLEXPWMREG(_tim, _sm,IMXRT_FLEXPWM_SM0VAL1_OFFSET) /* Value Register 1 */
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#define rVAL2(_tim, _sm) FLEXPWMREG(_tim, _sm,IMXRT_FLEXPWM_SM0VAL2_OFFSET) /* Value Register 2 */
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#define rVAL3(_tim, _sm) FLEXPWMREG(_tim, _sm,IMXRT_FLEXPWM_SM0VAL3_OFFSET) /* Value Register 3 */
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#define rVAL4(_tim, _sm) FLEXPWMREG(_tim, _sm,IMXRT_FLEXPWM_SM0VAL4_OFFSET) /* Value Register 4 */
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#define rVAL5(_tim, _sm) FLEXPWMREG(_tim, _sm,IMXRT_FLEXPWM_SM0VAL5_OFFSET) /* Value Register 5 */
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#define rFFILT0(_tim) FLEXPWMREG(_tim, 0, IMXRT_FLEXPWM_FFILT0_OFFSET) /* Fault Filter Register */
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#define rDISMAP0(_tim, _sm) FLEXPWMREG(_tim, _sm,IMXRT_FLEXPWM_SM0DISMAP0_OFFSET) /* Fault Disable Mapping Register 0 */
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#define rDISMAP1(_tim, _sm) FLEXPWMREG(_tim, _sm,IMXRT_FLEXPWM_SM0DISMAP1_OFFSET) /* Fault Disable Mapping Register 1 */
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#define rOUTEN(_tim) FLEXPWMREG(_tim, 0, IMXRT_FLEXPWM_OUTEN_OFFSET) /* Output Enable Register */
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#define rDTSRCSEL(_tim) FLEXPWMREG(_tim, 0, IMXRT_FLEXPWM_DTSRCSEL_OFFSET) /* PWM Source Select Register */
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#define rMCTRL(_tim) FLEXPWMREG(_tim, 0, IMXRT_FLEXPWM_MCTRL_OFFSET) /* Master Control Register */
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#define OUTEN_A_MASK 0x1
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#define OUTEN_B_MASK 0x2
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#define FREQ
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static void flexpwm_led(uint32_t timer, uint32_t sm, uint16_t cvalue, uint32_t gpio_mux, uint32_t pwm_mux,
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uint32_t out_mask)
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{
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if (cvalue == 0) {
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//rMCTRL(timer) &= ~MCTRL_RUN(1 << sm);
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px4_arch_configgpio(gpio_mux);
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} else {
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rMCTRL(timer) |= (1 << (sm + MCTRL_CLDOK_SHIFT));
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rVAL1(timer, sm) = (FLEXPWM_FREQ / LED_PWM_FREQ) - 1;
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if (out_mask & OUTEN_A_MASK) {
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rVAL3(timer, sm) = (FLEXPWM_FREQ / LED_PWM_FREQ) - (cvalue);
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} else if (out_mask & OUTEN_B_MASK) {
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rVAL5(timer, sm) = (FLEXPWM_FREQ / LED_PWM_FREQ) - (cvalue);
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}
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rMCTRL(timer) |= MCTRL_LDOK(1 << sm) | MCTRL_RUN(1 << sm);
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px4_arch_configgpio(pwm_mux);
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}
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}
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int
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led_pwm_servo_set(unsigned channel, uint8_t cvalue)
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{
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if (channel == 0) {
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flexpwm_led(IMXRT_FLEXPWM3_BASE, 2, cvalue, GPIO_nLED_RED, PWM_LED_RED, OUTEN_A_MASK);
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} else if (channel == 1) {
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flexpwm_led(IMXRT_FLEXPWM1_BASE, 3, cvalue, GPIO_nLED_GREEN, PWM_LED_GREEN, OUTEN_A_MASK);
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} else if (channel == 2) {
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flexpwm_led(IMXRT_FLEXPWM3_BASE, 2, cvalue * 3, GPIO_nLED_BLUE, PWM_LED_BLUE, OUTEN_B_MASK);
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}
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return 0;
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}
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void flexpwm_init(uint32_t timer, uint32_t sm, uint32_t out_mask)
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{
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/* Clear all Faults */
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rFSTS0(timer) = FSTS_FFLAG_MASK;
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rMCTRL(timer) |= (1 << (sm + MCTRL_CLDOK_SHIFT));
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rCTRL2(timer, sm) = SMCTRL2_CLK_SEL_EXT_CLK | SMCTRL2_DBGEN | SMCTRL2_INDEP;
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rCTRL(timer, sm) = SMCTRL_PRSC_DIV16 | SMCTRL_FULL;
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/* Edge aligned at 0 */
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rINIT(timer, sm) = 0;
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rVAL0(timer, sm) = 0;
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rVAL2(timer, sm) = 0;
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rVAL4(timer, sm) = 0;
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rFFILT0(timer) &= ~FFILT_FILT_PER_MASK;
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rDISMAP0(timer, sm) = 0xf000;
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rDISMAP1(timer, sm) = 0xf000;
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if (out_mask & OUTEN_A_MASK) {
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rOUTEN(timer) |= OUTEN_PWMA_EN(1 << sm);
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}
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if (out_mask & OUTEN_B_MASK) {
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rOUTEN(timer) |= OUTEN_PWMB_EN(1 << sm);
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}
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rDTSRCSEL(timer) = 0;
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rMCTRL(timer) |= MCTRL_LDOK(1 << sm);
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}
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int led_pwm_servo_init()
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{
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/* PWM_LED_GREEN - FLEXPWM2_PWMB03 */
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imxrt_clockall_pwm1();
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imxrt_clockall_pwm3();
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flexpwm_init(IMXRT_FLEXPWM3_BASE, 2, OUTEN_A_MASK | OUTEN_B_MASK); // GPIO_FLEXPWM3_PWMA02_1
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flexpwm_init(IMXRT_FLEXPWM1_BASE, 3, OUTEN_A_MASK); // GPIO_FLEXPWM1_PWMA03_2
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return OK;
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}
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