mirror of
https://gitee.com/mirrors_PX4/PX4-Autopilot.git
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nxp/rt117x:Fix Pin IRQ
nxp/rt117x:Support 4 i2c busses
nxp/rt117x:Add px4io_serial support
nxp/imxrt:Expand ToneAlarmInterface to GPT 3 & 4
px4_fmu-6xrt:Using imxrt_flexspi_nor_octal
px4_fmu-6xrt:Entry is start
px4_fmu-6xrt:Add Proper MTD
px4_fmu-6xrt:Set I2C Buses
px4_fmu-6xrt:Proper SPI usage
px4_fmu-6xrt:Adjust memory Map to use the 2 MB
px4_fmu-6xrt:Bring in ROMAPI
px4_fmu-6xrt:Push FLASH to 200Mhz
px4_fmu-6xrt:Use BOARD_I2C_LATEINIT
px4_fmu-6xrt:Clock Config remove unused devices
px4_fmu-6xrt:Remove EVK SDRAM IO
px4_fmu-6xrt:Enable SE550 using HW_VER_REV_DRIVE
px4_fmu-6xrt:Use MTD to mount FRAM on Flex SPI
px4_fmu-6xrt:Manifest
px4_fmu-6xrt:Restore board_peripheral_reset
px4_fmu-6xrt:Set I2C buss Interna/Externa and startup
nxp/rt117x:Set 6 I2C busses
px4_fmu-6xrt:Correct Clock Sources and Freqency Settings
px4_fmu-6xrt:Correct ADC Settings
px4_fmu-6xrt:Tune FlexSPI config and sync header with debug variant Linker prep for rodata ahb partitioning
px4_fmu-6xrt:FlexSPI prefetch partition split .text and .rodata
Current config
1KB Prefetch .rodata
3KB Prefetch .text
px4_fmu-6xrt:Run imxrt_flash_setup_prefetch_partition from ram with barriers
px4_fmu-6xrt:Use All OCTL setting from FLASH g_flash_config SANS lookupTable
px4_fmu-6xrt:Octal spi boot/debug problem bypass
px4_fmu-6xrt:Add PWM test
px4_fmu-6xrt:Fix clockconfig and USB vbus sense
px4_fmu-6xrt: Use TCM
px4_fmu-6xrt: Ethernet bringup
imxrt: use unique_id register for board_identity
px4_fmu-6xrt: update ITCM mapping, todo proper trap on pc hitting 0x0
px4_fmu-6xrt:correct rotation icm42688p onboard imu
rt117x: Add SSARC HP RAM driver for memory dumps
px4_fmu-6xrt: Enable hardfault_log
px4_fmu-6xrt: Enable DMA pool
px4_fmu-6xrt: fix uart mapping
px4_fmu-6xrt: enable SocketCAN & DroneCAN
px4_fmu-6xrt:Command line history TAB completion
px4_fmu-6xrt:Fix pinning duplication
px4_fmu-6xrt:Support conditional PHY address based on selected PHY
px4_fmu-6xrt:Add Pull Downs on CTS, use GPIO for RTS
px4_fmu-6xrt:Set TelemN TX Slew rate and Drive Strenth to max
px4_fmu-6xrt::Set TELEM Buffers add HW HS
px4_fmu-6xrt:Turn off DMA poll
px4_fmu-6xrt:RC_SERIAL_PORT needed to be px4io to disable rc_input using TELEM2!
px4_fmu-6xrt: bootloader (#22228)
* imxrt:Add bootloader support
* bootloader:imxrt clear BOOT_RTC_SIGNATURE
* px4_fmu-6xrt:Add bootloader
* px4_fmu-6xrt:bootloader removed ADC
* px4_fmu-6xrt:bootloader base bootloader script off of script.ld
* px4_fmu-6xrt:add _bootdelay_signature & change entry from 0x30000000 to 0x30040000
* px4_fmu-6xrt:hw_config Bootloader has to have 12 bytes
px4_fmu-6xrt:Default to use LAN8742A PHY
px4_fmu-v6xrt:VID Set to Drone Code
board_reset:Enable ability to write RTC GP regs
px4_fmu-6xrt:Fix CMP0079 error
rt117x:micro_hal Add a PX4_MAKE_GPIO_PULLED_INPUT
px4_fmu-v6xrt:Set CTS High before VDD_5V applided to ports to avoid radios fro entering bootloaders
fmu-v6xrt: increase 5v down time
fmu-v6xrt:Ready for Release DEBUGASSERTS off and Console 57600,
Bootloder updated.
imxrt:board_hw_rev_ver Rework for 3.893V Ref
px4_fmu-v6xrt:Move ADC to Port3
196 lines
5.1 KiB
Plaintext
196 lines
5.1 KiB
Plaintext
/****************************************************************************
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* boards/px4/fmu-v6xrt/nuttx-config/scripts/bootloader_script.ld
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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/* Specify the memory areas */
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/* Reallocate
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* Final Configuration is
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* No DTCM
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* 512k OCRAM M7 (FlexRAM) (2038:0000-203f:ffff)
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* 128k OCRAMM7 FlexRAM ECC (2036:0000-2037:ffff)
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* 64k OCRAM2 ECC parity (2035:0000-2035:ffff)
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* 64k OCRAM1 ECC parity (2034:0000-2034:ffff)
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* 512k FlexRAM OCRAM2 (202C:0000-2033:ffff)
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* 512k FlexRAM OCRAM1 (2024:0000-202B:ffff)
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* 256k System OCRAM M4 (2020:0000-2023:ffff)
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*/
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MEMORY
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{
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flash (rx) : ORIGIN = 0x30000000, LENGTH = 128K
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sram (rwx) : ORIGIN = 0x20240000, LENGTH = 2M-256k-512k
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itcm (rwx) : ORIGIN = 0x00000000, LENGTH = 256K /* TODO FlexRAM partition */
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dtcm (rwx) : ORIGIN = 0x20000000, LENGTH = 256K
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}
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OUTPUT_ARCH(arm)
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EXTERN(_vectors)
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EXTERN(g_flash_config)
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EXTERN(g_image_vector_table)
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EXTERN(g_boot_data)
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EXTERN(board_get_manifest)
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EXTERN(_bootdelay_signature)
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ENTRY(__start)
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SECTIONS
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{
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/* Image Vector Table and Boot Data for booting from external flash */
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.boot_hdr : ALIGN(4)
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{
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FILL(0xff)
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. = 0x400 ;
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__boot_hdr_start__ = ABSOLUTE(.) ;
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KEEP(*(.boot_hdr.conf))
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. = 0x1000 ;
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KEEP(*(.boot_hdr.ivt))
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. = 0x1020 ;
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KEEP(*(.boot_hdr.boot_data))
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. = 0x1030 ;
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KEEP(*(.boot_hdr.dcd_data))
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__boot_hdr_end__ = ABSOLUTE(.) ;
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. = 0x2000 ;
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} >flash
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.vectors :
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{
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KEEP(*(.vectors))
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*(.text .text.__start)
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} >flash
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.itcmfunc :
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{
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. = ALIGN(8);
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_sitcmfuncs = ABSOLUTE(.);
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FILL(0xFF)
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. = 0x40 ;
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. = ALIGN(8);
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_eitcmfuncs = ABSOLUTE(.);
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} > itcm AT > flash
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_fitcmfuncs = LOADADDR(.itcmfunc);
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/* The RAM vector table (if present) should lie at the beginning of SRAM */
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.ram_vectors (COPY) : {
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*(.ram_vectors)
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} > dtcm
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.text : ALIGN(4)
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{
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_stext = ABSOLUTE(.);
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*(.vectors)
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. = ALIGN(32);
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/*
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This signature provides the bootloader with a way to delay booting
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*/
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_bootdelay_signature = ABSOLUTE(.);
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FILL(0xffecc2925d7d05c5)
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. += 8;
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*(.text .text.*)
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*(.fixup)
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*(.gnu.warning)
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*(.gnu.linkonce.t.*)
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*(.glue_7)
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*(.glue_7t)
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*(.got)
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*(.gcc_except_table)
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*(.gnu.linkonce.r.*)
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. = ALIGN(4096);
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_etext = ABSOLUTE(.);
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_srodata = ABSOLUTE(.);
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*(.rodata .rodata.*)
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. = ALIGN(4096);
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_erodata = ABSOLUTE(.);
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} > flash
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.init_section :
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{
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_sinit = ABSOLUTE(.);
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KEEP(*(.init_array .init_array.*))
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_einit = ABSOLUTE(.);
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} > flash
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.ARM.extab :
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{
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*(.ARM.extab*)
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} > flash
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.ARM.exidx :
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{
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__exidx_start = ABSOLUTE(.);
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*(.ARM.exidx*)
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__exidx_end = ABSOLUTE(.);
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} > flash
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_eronly = ABSOLUTE(.);
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.data :
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{
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_sdata = ABSOLUTE(.);
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*(.data .data.*)
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*(.gnu.linkonce.d.*)
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CONSTRUCTORS
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. = ALIGN(4);
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_edata = ABSOLUTE(.);
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} > sram AT > flash
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.ramfunc ALIGN(4):
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{
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_sramfuncs = ABSOLUTE(.);
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*(.ramfunc .ramfunc.*)
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_eramfuncs = ABSOLUTE(.);
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} > sram AT > flash
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_framfuncs = LOADADDR(.ramfunc);
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.bss :
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{
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_sbss = ABSOLUTE(.);
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*(.bss .bss.*)
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*(.gnu.linkonce.b.*)
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*(COMMON)
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. = ALIGN(4);
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_ebss = ABSOLUTE(.);
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} > sram
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/* Stabs debugging sections. */
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.stab 0 : { *(.stab) }
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.stabstr 0 : { *(.stabstr) }
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.stab.excl 0 : { *(.stab.excl) }
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.stab.exclstr 0 : { *(.stab.exclstr) }
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.stab.index 0 : { *(.stab.index) }
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.stab.indexstr 0 : { *(.stab.indexstr) }
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.comment 0 : { *(.comment) }
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.debug_abbrev 0 : { *(.debug_abbrev) }
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.debug_info 0 : { *(.debug_info) }
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.debug_line 0 : { *(.debug_line) }
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.debug_pubnames 0 : { *(.debug_pubnames) }
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.debug_aranges 0 : { *(.debug_aranges) }
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_boot_loadaddr = ORIGIN(flash);
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_boot_size = LENGTH(flash);
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_ram_size = LENGTH(sram);
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_sdtcm = ORIGIN(dtcm);
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_edtcm = ORIGIN(dtcm) + LENGTH(dtcm);
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}
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