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#pragma once

// DMAMUX1 Using at most 8 Channels on DMA1 --------   Assigned
//                                                     V

#define DMAMAP_SPI1_RX    DMAMAP_DMA12_SPI1RX_0     /* 1 DMA1:37  */
#define DMAMAP_SPI1_TX    DMAMAP_DMA12_SPI1TX_0     /* 2 DMA1:38  */

#define DMAMAP_SPI3_RX    DMAMAP_DMA12_SPI3RX_0     /* 3 DMA1:39 FRAM */
#define DMAMAP_SPI3_TX    DMAMAP_DMA12_SPI3TX_0     /* 4 DMA1:40 FRAM */

// TODO
//#define DMAMAP_USART1_RX  DMAMAP_DMA12_USART1RX_0 /*  DMA1:41  GPS1 */
//#define DMAMAP_USART1_TX  DMAMAP_DMA12_USART1TX_0 /*  DMA1:42  GPS1 */

//#define DMAMAP_USART2_RX  DMAMAP_DMA12_USART2RX_0 /*  DMA1:43 Telem3 */
//#define DMAMAP_USART2_TX  DMAMAP_DMA12_USART2TX_0 /*  DMA1:44 Telem3 */

//#define DMAMAP_USART3_RX  DMAMAP_DMA12_USART3RX_0 /*  DMA1:45 DEBUG */
//#define DMAMAP_USART3_TX  DMAMAP_DMA12_USART3TX_0 /*  DMA1:46 DEBUG */

//#define DMAMAP_UART4_RX   DMAMAP_DMA12_UART4RX_0  /*  DMA1:63 EXT2 */
//#define DMAMAP_UART4_TX   DMAMAP_DMA12_UART4TX_0  /*  DMA1:64 EXT2 */

//#define DMAMAP_USART6_RX  DMAMAP_DMA12_USART6RX_0   /* 5 DMA1:71 PX4IO */
//#define DMAMAP_USART6_TX  DMAMAP_DMA12_USART6TX_0   /* 6 DMA1:72 PX4IO */

// Dynamically assigned in timer_config.cpp for DShot (allocated/freed per cycle):
// Timer 1 TIM1UP (burst) + TIM1CH1-4 (capture)
// Timer 2 TIM2UP (burst) + TIM2CH1-4 (capture)
// Timer 3 TIM3UP (burst) + TIM3CH1-4 (capture)
// Timer 4 TIM4UP (burst) + TIM4CH1-3 (capture, CH4 has no DMA)
// Timer 5 TIM5UP (burst) + TIM5CH1-4 (capture)
// Timer 15 - no TIM15UP DMA, cannot do DShot

// DMAMUX2 Using at most 8 Channels on DMA2 --------   Assigned
//                                                     V

// TODO
#define DMAMAP_USART3_RX  DMAMAP_DMA12_USART3RX_1   /* 1 DMA2:45  */
#define DMAMAP_USART3_TX  DMAMAP_DMA12_USART3TX_1   /* 2 DMA2:46  */

#define DMAMAP_UART5_RX   DMAMAP_DMA12_UART5RX_1    /* 3 DMA2:65  */
#define DMAMAP_UART5_TX   DMAMAP_DMA12_UART5TX_1    /* 4 DMA2:66  */

//#define DMAMAP_USART6_RX  DMAMAP_DMA12_USART6RX_1   /* 5 DMA2:71  */
//#define DMAMAP_USART6_TX  DMAMAP_DMA12_USART6TX_1   /* 6 DMA2:72  */

#define DMAMAP_UART7_RX   DMAMAP_DMA12_UART7RX_1    /* 7 DMA1:79  */
#define DMAMAP_UART7_TX   DMAMAP_DMA12_UART7TX_1    /* 8 DMA1:80  */