/****************************************************************************
 *
 *   Copyright (C) 2019 PX4 Development Team. All rights reserved.
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 * modification, are permitted provided that the following conditions
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 *
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in
 *    the documentation and/or other materials provided with the
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 * 3. Neither the name PX4 nor the names of its contributors may be
 *    used to endorse or promote products derived from this software
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 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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/**
 * @file timer_config.c
 *
 * Configuration data for the stm32 pwm_servo, input capture and pwm input driver.
 *
 * Note that these arrays must always be fully-sized.
 */

#include <stdint.h>

#include <chip.h>
#include <stm32_gpio.h>
#include <stm32_tim.h>

#include <drivers/drv_pwm_output.h>
#include <px4_arch/io_timer.h>

#include "board_config.h"

__EXPORT const io_timers_t io_timers[MAX_IO_TIMERS] = {
	{
		.base = STM32_TIM3_BASE,
		.clock_register = STM32_RCC_APB1ENR,
		.clock_bit = RCC_APB1ENR_TIM3EN,
		.clock_freq = STM32_APB1_TIM3_CLKIN,
		.first_channel_index = 0,
		.last_channel_index = 1,
		.handler = io_timer_handler0,
		.vectorno =  STM32_IRQ_TIM3,
		.dshot = {
			.dma_base = DSHOT_DMA1_BASE,
			.channel = DShot_Channel5,
			.stream = DShot_Stream2,
			.start_ccr_register = TIM_DMABASE_CCR3,
			.channels_number = 2u /* CCR3 and CCR4 */
		}
	},
	{
		.base = STM32_TIM1_BASE,
		.clock_register = STM32_RCC_APB2ENR,
		.clock_bit = RCC_APB2ENR_TIM1EN,
		.clock_freq = STM32_APB2_TIM1_CLKIN,
		.first_channel_index = 2,
		.last_channel_index = 3,
		.handler = io_timer_handler1,
		.vectorno =  STM32_IRQ_TIM1CC,
		.dshot = {
			.dma_base = DSHOT_DMA2_BASE,
			.channel = DShot_Channel6,
			.stream = DShot_Stream5,
			.start_ccr_register = TIM_DMABASE_CCR1,
			.channels_number = 2u /* CCR1 and CCR2 */
		}
	},
	{
		.base = STM32_TIM8_BASE,
		.clock_register = STM32_RCC_APB2ENR,
		.clock_bit = RCC_APB2ENR_TIM8EN,
		.clock_freq = STM32_APB2_TIM8_CLKIN,
		.first_channel_index = 4,
		.last_channel_index = 4,
		.handler = io_timer_handler2,
		.vectorno =  STM32_IRQ_TIM8CC,
		.dshot = {
			.dma_base = DSHOT_DMA2_BASE,
			.channel = DShot_Channel7,
			.stream = DShot_Stream1,
			.start_ccr_register = TIM_DMABASE_CCR4,
			.channels_number = 1u /* CCR4 */
		}
	},
	{
		.base = STM32_TIM5_BASE,
		.clock_register = STM32_RCC_APB1ENR,
		.clock_bit = RCC_APB1ENR_TIM5EN,
		.clock_freq = STM32_APB1_TIM5_CLKIN,
		.first_channel_index = 5,
		.last_channel_index = 5,
		.handler = io_timer_handler3,
		.vectorno =  STM32_IRQ_TIM5,
		.dshot = {
			.dma_base = DSHOT_DMA1_BASE,
			.channel = DShot_Channel6,
			.stream = DShot_Stream6, // alternatively DShot_Stream0
			.start_ccr_register = TIM_DMABASE_CCR4,
			.channels_number = 1u /* CCR4 */
		}
	}
};

__EXPORT const timer_io_channels_t timer_io_channels[MAX_TIMER_IO_CHANNELS] = {
	{
		.gpio_out = GPIO_TIM3_CH3OUT,
		.gpio_in  = GPIO_TIM3_CH3IN,
		.timer_index = 0,
		.timer_channel = 3,
		.ccr_offset = STM32_GTIM_CCR3_OFFSET,
		.masks  = GTIM_SR_CC3IF | GTIM_SR_CC3OF
	},
	{
		.gpio_out = GPIO_TIM3_CH4OUT,
		.gpio_in = GPIO_TIM3_CH4IN,
		.timer_index = 0,
		.timer_channel = 4,
		.ccr_offset = STM32_GTIM_CCR4_OFFSET,
		.masks  = GTIM_SR_CC4IF | GTIM_SR_CC4OF
	},
	{
		.gpio_out = GPIO_TIM1_CH1OUT,
		.gpio_in = GPIO_TIM1_CH1IN,
		.timer_index = 1,
		.timer_channel = 1,
		.ccr_offset = STM32_GTIM_CCR1_OFFSET,
		.masks  = GTIM_SR_CC1IF | GTIM_SR_CC1OF
	},
	{
		.gpio_out = GPIO_TIM1_CH2OUT,
		.gpio_in = GPIO_TIM1_CH2IN,
		.timer_index = 1,
		.timer_channel = 2,
		.ccr_offset = STM32_GTIM_CCR2_OFFSET,
		.masks  = GTIM_SR_CC2IF | GTIM_SR_CC2OF
	},
	{
		.gpio_out = GPIO_TIM8_CH4OUT,
		.gpio_in = GPIO_TIM8_CH4IN,
		.timer_index = 2,
		.timer_channel = 4,
		.ccr_offset = STM32_GTIM_CCR4_OFFSET,
		.masks  = GTIM_SR_CC4IF | GTIM_SR_CC4OF
	},
	{
		.gpio_out = GPIO_TIM5_CH4OUT,
		.gpio_in = GPIO_TIM5_CH4IN,
		.timer_index = 3,
		.timer_channel = 4,
		.ccr_offset = STM32_GTIM_CCR4_OFFSET,
		.masks  = GTIM_SR_CC4IF | GTIM_SR_CC4OF
	},
};