From f5e84c35f58ba4d3bb5e25f42d1e9c8abfe76bdb Mon Sep 17 00:00:00 2001 From: Daniel Agar Date: Mon, 5 Dec 2022 18:45:41 -0500 Subject: [PATCH] WIP --- .../nuttx-config/bootloader/defconfig | 33 +--- .../cubeorange/nuttx-config/nsh/defconfig | 2 +- boards/holybro/kakuteh7/default.px4board | 2 - .../nuttx-config/bootloader/defconfig | 33 +--- .../kakuteh7/nuttx-config/nsh/defconfig | 52 +++---- boards/holybro/kakuteh7/src/init.c | 3 - boards/matek/h743/init/rc.board_extras | 11 +- boards/matek/h743/init/rc.board_sensors | 4 +- .../h743/nuttx-config/bootloader/defconfig | 2 +- .../matek/h743/nuttx-config/include/board.h | 145 ++---------------- .../h743/nuttx-config/include/board_dma_map.h | 8 +- boards/matek/h743/nuttx-config/nsh/defconfig | 2 +- .../nuttx-config/scripts/bootloader_script.ld | 6 +- boards/matek/h743/src/board_config.h | 23 --- boards/matek/h743/src/hw_config.h | 2 +- boards/matek/h743/src/init.c | 71 ++++++--- boards/matek/h743/src/led.c | 6 - boards/matek/h743/src/spi.cpp | 3 +- boards/matek/h743/src/timer_config.cpp | 25 +-- boards/matek/h743/src/usb.c | 5 +- .../fmu-v6x/nuttx-config/bootloader/defconfig | 33 +--- 21 files changed, 117 insertions(+), 354 deletions(-) diff --git a/boards/cubepilot/cubeorange/nuttx-config/bootloader/defconfig b/boards/cubepilot/cubeorange/nuttx-config/bootloader/defconfig index d38c01a4e0..a8e3af912c 100644 --- a/boards/cubepilot/cubeorange/nuttx-config/bootloader/defconfig +++ b/boards/cubepilot/cubeorange/nuttx-config/bootloader/defconfig @@ -7,7 +7,6 @@ # # CONFIG_DEV_CONSOLE is not set # CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set -# CONFIG_DISABLE_PTHREAD is not set # CONFIG_SPI_EXCHANGE is not set # CONFIG_STM32H7_SYSCFG is not set CONFIG_ARCH="arm" @@ -23,14 +22,13 @@ CONFIG_ARMV7M_BASEPRI_WAR=y CONFIG_ARMV7M_ICACHE=y CONFIG_ARMV7M_MEMCPY=y CONFIG_ARMV7M_USEBASEPRI=y -CONFIG_BOARDCTL_RESET=y CONFIG_BOARDCTL=y +CONFIG_BOARDCTL_RESET=y +CONFIG_BOARD_ASSERT_RESET_VALUE=0 CONFIG_BOARD_INITTHREAD_PRIORITY=254 CONFIG_BOARD_LATE_INITIALIZE=y CONFIG_BOARD_LOOPSPERMSEC=79954 CONFIG_BOARD_RESET_ON_ASSERT=2 -CONFIG_BOARD_ASSERT_RESET_VALUE=0 -CONFIG_C99_BOOL8=y CONFIG_CDCACM=y CONFIG_CDCACM_IFLOWCONTROL=y CONFIG_CDCACM_PRODUCTID=0x1016 @@ -39,37 +37,17 @@ CONFIG_CDCACM_RXBUFSIZE=600 CONFIG_CDCACM_TXBUFSIZE=12000 CONFIG_CDCACM_VENDORID=0x2DAE CONFIG_CDCACM_VENDORSTR="CubePilot" -CONFIG_CLOCK_MONOTONIC=y CONFIG_DEBUG_FULLOPT=y CONFIG_DEBUG_SYMBOLS=y CONFIG_DEFAULT_SMALL=y -# CONFIG_NSH_DISABLE_ECHO is not set -# CONFIG_NSH_DISABLE_ENV is not set -# CONFIG_NSH_DISABLE_FREE is not set -# CONFIG_NSH_DISABLE_HELP is not set -# CONFIG_NSH_DISABLE_KILL is not set -# CONFIG_NSH_DISABLE_LS is not set -# CONFIG_NSH_DISABLE_MKDIR is not set -# CONFIG_NSH_DISABLE_MODCMDS is not set -# CONFIG_NSH_DISABLE_MOUNT is not set -# CONFIG_NSH_DISABLE_MV is not set -# CONFIG_NSH_DISABLE_PRINTF is not set -# CONFIG_NSH_DISABLE_PSSTACKUSAGE -# CONFIG_NSH_DISABLE_PWD is not set -# CONFIG_NSH_DISABLE_SOURCE is not set -# CONFIG_NSH_DISABLE_SLEEP is not set -# CONFIG_NSH_DISABLE_TEST is not set -# CONFIG_NSH_DISABLE_UMOUNT is not set -# CONFIG_NSH_DISABLE_UNSET is not set -# CONFIG_NSH_DISABLE_USLEEP is not set -CONFIG_DISABLE_MQUEUE=y -CONFIG_DISABLE_PTHREAD=y CONFIG_EXPERIMENTAL=y CONFIG_FDCLONE_DISABLE=y CONFIG_FDCLONE_STDIO=y CONFIG_HAVE_CXX=y CONFIG_HAVE_CXXINITIALIZE=y CONFIG_IDLETHREAD_STACKSIZE=750 +CONFIG_INIT_ENTRYPOINT="bootloader_main" +CONFIG_INIT_STACKSIZE=2944 CONFIG_LIBC_FLOATINGPOINT=y CONFIG_LIBC_LONG_LONG=y CONFIG_LIBC_STRERROR=y @@ -80,7 +58,6 @@ CONFIG_PTHREAD_STACK_MIN=512 CONFIG_RAM_SIZE=245760 CONFIG_RAM_START=0x20010000 CONFIG_RAW_BINARY=y -CONFIG_SDCLONE_DISABLE=y CONFIG_SERIAL_TERMIOS=y CONFIG_SIG_DEFAULT=y CONFIG_SIG_SIGALRM_ACTION=y @@ -110,5 +87,3 @@ CONFIG_USBDEV=y CONFIG_USBDEV_BUSPOWERED=y CONFIG_USBDEV_MAXPOWER=500 CONFIG_USEC_PER_TICK=1000 -CONFIG_INIT_STACKSIZE=2944 -CONFIG_INIT_ENTRYPOINT="bootloader_main" diff --git a/boards/cubepilot/cubeorange/nuttx-config/nsh/defconfig b/boards/cubepilot/cubeorange/nuttx-config/nsh/defconfig index caf8b16039..4de0460c75 100644 --- a/boards/cubepilot/cubeorange/nuttx-config/nsh/defconfig +++ b/boards/cubepilot/cubeorange/nuttx-config/nsh/defconfig @@ -68,10 +68,10 @@ CONFIG_ARMV7M_MEMCPY=y CONFIG_ARMV7M_USEBASEPRI=y CONFIG_ARM_MPU_EARLY_RESET=y CONFIG_BOARDCTL_RESET=y +CONFIG_BOARD_ASSERT_RESET_VALUE=0 CONFIG_BOARD_CRASHDUMP=y CONFIG_BOARD_LOOPSPERMSEC=79954 CONFIG_BOARD_RESET_ON_ASSERT=2 -CONFIG_BOARD_ASSERT_RESET_VALUE=0 CONFIG_BUILTIN=y CONFIG_CDCACM=y CONFIG_CDCACM_IFLOWCONTROL=y diff --git a/boards/holybro/kakuteh7/default.px4board b/boards/holybro/kakuteh7/default.px4board index 9e53c4a38d..925ca5a9fa 100644 --- a/boards/holybro/kakuteh7/default.px4board +++ b/boards/holybro/kakuteh7/default.px4board @@ -18,12 +18,10 @@ CONFIG_DRIVERS_IMU_INVENSENSE_MPU6000=y CONFIG_COMMON_LIGHT=y CONFIG_COMMON_MAGNETOMETER=y CONFIG_COMMON_OPTICAL_FLOW=y -CONFIG_DRIVERS_OSD=y CONFIG_DRIVERS_POWER_MONITOR_INA226=y CONFIG_DRIVERS_PWM_OUT=y CONFIG_DRIVERS_RC_INPUT=y CONFIG_DRIVERS_ROBOCLAW=y -CONFIG_DRIVERS_RPM=y CONFIG_DRIVERS_SMART_BATTERY_BATMON=y CONFIG_COMMON_TELEMETRY=y CONFIG_DRIVERS_TONE_ALARM=y diff --git a/boards/holybro/kakuteh7/nuttx-config/bootloader/defconfig b/boards/holybro/kakuteh7/nuttx-config/bootloader/defconfig index 09847a6355..a3aed2247f 100644 --- a/boards/holybro/kakuteh7/nuttx-config/bootloader/defconfig +++ b/boards/holybro/kakuteh7/nuttx-config/bootloader/defconfig @@ -7,7 +7,6 @@ # # CONFIG_DEV_CONSOLE is not set # CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set -# CONFIG_DISABLE_PTHREAD is not set # CONFIG_SPI_EXCHANGE is not set # CONFIG_STM32H7_SYSCFG is not set CONFIG_ARCH="arm" @@ -23,14 +22,13 @@ CONFIG_ARMV7M_BASEPRI_WAR=y CONFIG_ARMV7M_ICACHE=y CONFIG_ARMV7M_MEMCPY=y CONFIG_ARMV7M_USEBASEPRI=y -CONFIG_BOARDCTL_RESET=y CONFIG_BOARDCTL=y +CONFIG_BOARDCTL_RESET=y +CONFIG_BOARD_ASSERT_RESET_VALUE=0 CONFIG_BOARD_INITTHREAD_PRIORITY=254 CONFIG_BOARD_LATE_INITIALIZE=y CONFIG_BOARD_LOOPSPERMSEC=22114 CONFIG_BOARD_RESET_ON_ASSERT=2 -CONFIG_BOARD_ASSERT_RESET_VALUE=0 -CONFIG_C99_BOOL8=y CONFIG_CDCACM=y CONFIG_CDCACM_IFLOWCONTROL=y CONFIG_CDCACM_PRODUCTID=0x0050 @@ -39,37 +37,17 @@ CONFIG_CDCACM_RXBUFSIZE=600 CONFIG_CDCACM_TXBUFSIZE=12000 CONFIG_CDCACM_VENDORID=0x3162 CONFIG_CDCACM_VENDORSTR="Holybro" -CONFIG_CLOCK_MONOTONIC=y CONFIG_DEBUG_FULLOPT=y CONFIG_DEBUG_SYMBOLS=y CONFIG_DEFAULT_SMALL=y -# CONFIG_NSH_DISABLE_ECHO is not set -# CONFIG_NSH_DISABLE_ENV is not set -# CONFIG_NSH_DISABLE_FREE is not set -# CONFIG_NSH_DISABLE_HELP is not set -# CONFIG_NSH_DISABLE_KILL is not set -# CONFIG_NSH_DISABLE_LS is not set -# CONFIG_NSH_DISABLE_MKDIR is not set -# CONFIG_NSH_DISABLE_MODCMDS is not set -# CONFIG_NSH_DISABLE_MOUNT is not set -# CONFIG_NSH_DISABLE_MV is not set -# CONFIG_NSH_DISABLE_PRINTF is not set -# CONFIG_NSH_DISABLE_PSSTACKUSAGE -# CONFIG_NSH_DISABLE_PWD is not set -# CONFIG_NSH_DISABLE_SOURCE is not set -# CONFIG_NSH_DISABLE_SLEEP is not set -# CONFIG_NSH_DISABLE_TEST is not set -# CONFIG_NSH_DISABLE_UMOUNT is not set -# CONFIG_NSH_DISABLE_UNSET is not set -# CONFIG_NSH_DISABLE_USLEEP is not set -CONFIG_DISABLE_MQUEUE=y -CONFIG_DISABLE_PTHREAD=y CONFIG_EXPERIMENTAL=y CONFIG_FDCLONE_DISABLE=y CONFIG_FDCLONE_STDIO=y CONFIG_HAVE_CXX=y CONFIG_HAVE_CXXINITIALIZE=y CONFIG_IDLETHREAD_STACKSIZE=750 +CONFIG_INIT_ENTRYPOINT="bootloader_main" +CONFIG_INIT_STACKSIZE=2944 CONFIG_LIBC_FLOATINGPOINT=y CONFIG_LIBC_LONG_LONG=y CONFIG_LIBC_STRERROR=y @@ -80,7 +58,6 @@ CONFIG_PTHREAD_STACK_MIN=512 CONFIG_RAM_SIZE=245760 CONFIG_RAM_START=0x20010000 CONFIG_RAW_BINARY=y -CONFIG_SDCLONE_DISABLE=y CONFIG_SERIAL_TERMIOS=y CONFIG_SIG_DEFAULT=y CONFIG_SIG_SIGALRM_ACTION=y @@ -110,5 +87,3 @@ CONFIG_USBDEV=y CONFIG_USBDEV_BUSPOWERED=y CONFIG_USBDEV_MAXPOWER=500 CONFIG_USEC_PER_TICK=1000 -CONFIG_INIT_STACKSIZE=2944 -CONFIG_INIT_ENTRYPOINT="bootloader_main" diff --git a/boards/holybro/kakuteh7/nuttx-config/nsh/defconfig b/boards/holybro/kakuteh7/nuttx-config/nsh/defconfig index 024a4909c7..b0275fda55 100644 --- a/boards/holybro/kakuteh7/nuttx-config/nsh/defconfig +++ b/boards/holybro/kakuteh7/nuttx-config/nsh/defconfig @@ -14,14 +14,31 @@ # CONFIG_NSH_DISABLEBG is not set # CONFIG_NSH_DISABLESCRIPT is not set # CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_ENV is not set # CONFIG_NSH_DISABLE_EXEC is not set # CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set # CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set # CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_KILL is not set # CONFIG_NSH_DISABLE_LOOPS is not set +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MKDIR is not set # CONFIG_NSH_DISABLE_MKFATFS is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_PRINTF is not set +# CONFIG_NSH_DISABLE_PWD is not set # CONFIG_NSH_DISABLE_SEMICOLON is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_SOURCE is not set +# CONFIG_NSH_DISABLE_TEST is not set # CONFIG_NSH_DISABLE_TIME is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set # CONFIG_SPI_CALLBACK is not set CONFIG_ARCH="arm" CONFIG_ARCH_BOARD_CUSTOM=y @@ -41,13 +58,11 @@ CONFIG_ARMV7M_MEMCPY=y CONFIG_ARMV7M_USEBASEPRI=y CONFIG_ARM_MPU_EARLY_RESET=y CONFIG_BOARDCTL_RESET=y -CONFIG_BOARDCTL=y +CONFIG_BOARD_ASSERT_RESET_VALUE=0 CONFIG_BOARD_CRASHDUMP=y CONFIG_BOARD_LOOPSPERMSEC=95150 CONFIG_BOARD_RESET_ON_ASSERT=2 -CONFIG_BOARD_ASSERT_RESET_VALUE=0 CONFIG_BUILTIN=y -CONFIG_C99_BOOL8=y CONFIG_CDCACM=y CONFIG_CDCACM_IFLOWCONTROL=y CONFIG_CDCACM_PRODUCTID=0x004b @@ -56,31 +71,11 @@ CONFIG_CDCACM_RXBUFSIZE=600 CONFIG_CDCACM_TXBUFSIZE=12000 CONFIG_CDCACM_VENDORID=0x3162 CONFIG_CDCACM_VENDORSTR="Holybro" -CONFIG_CLOCK_MONOTONIC=y CONFIG_DEBUG_FULLOPT=y CONFIG_DEBUG_HARDFAULT_ALERT=y CONFIG_DEBUG_MEMFAULT=y CONFIG_DEBUG_SYMBOLS=y CONFIG_DEFAULT_SMALL=y -# CONFIG_NSH_DISABLE_ECHO is not set -# CONFIG_NSH_DISABLE_ENV is not set -# CONFIG_NSH_DISABLE_FREE is not set -# CONFIG_NSH_DISABLE_HELP is not set -# CONFIG_NSH_DISABLE_KILL is not set -# CONFIG_NSH_DISABLE_LS is not set -# CONFIG_NSH_DISABLE_MKDIR is not set -# CONFIG_NSH_DISABLE_MODCMDS is not set -# CONFIG_NSH_DISABLE_MOUNT is not set -# CONFIG_NSH_DISABLE_MV is not set -# CONFIG_NSH_DISABLE_PRINTF is not set -# CONFIG_NSH_DISABLE_PSSTACKUSAGE -# CONFIG_NSH_DISABLE_PWD is not set -# CONFIG_NSH_DISABLE_SOURCE is not set -# CONFIG_NSH_DISABLE_SLEEP is not set -# CONFIG_NSH_DISABLE_TEST is not set -# CONFIG_NSH_DISABLE_UMOUNT is not set -# CONFIG_NSH_DISABLE_UNSET is not set -# CONFIG_NSH_DISABLE_USLEEP is not set CONFIG_DEV_FIFO_SIZE=0 CONFIG_DEV_PIPE_MAXSIZE=1024 CONFIG_DEV_PIPE_SIZE=70 @@ -106,8 +101,11 @@ CONFIG_HAVE_CXXINITIALIZE=y CONFIG_I2C=y CONFIG_I2C_RESET=y CONFIG_IDLETHREAD_STACKSIZE=750 +CONFIG_INIT_ENTRYPOINT="nsh_main" +CONFIG_INIT_STACKSIZE=2944 CONFIG_LIBC_FLOATINGPOINT=y CONFIG_LIBC_LONG_LONG=y +CONFIG_LIBC_MAX_EXITFUNS=1 CONFIG_LIBC_STRERROR=y CONFIG_MEMSET_64BIT=y CONFIG_MEMSET_OPTSPEED=y @@ -125,9 +123,6 @@ CONFIG_NSH_ARGCAT=y CONFIG_NSH_BUILTIN_APPS=y CONFIG_NSH_CMDPARMS=y CONFIG_NSH_CROMFSETC=y -CONFIG_NSH_DISABLE_IFCONFIG=y -CONFIG_NSH_DISABLE_IFUPDOWN=y -CONFIG_NSH_DISABLE_TELNETD=y CONFIG_NSH_LINELEN=128 CONFIG_NSH_MAXARGUMENTS=15 CONFIG_NSH_MMCSDSPIPORTNO=1 @@ -150,7 +145,6 @@ CONFIG_RAW_BINARY=y CONFIG_READLINE_CMD_HISTORY=y CONFIG_READLINE_TABCOMPLETION=y CONFIG_RTC_DATETIME=y -CONFIG_LIBC_MAX_EXITFUNS=1 CONFIG_SCHED_HPWORK=y CONFIG_SCHED_HPWORKPRIORITY=249 CONFIG_SCHED_HPWORKSTACKSIZE=1280 @@ -161,7 +155,6 @@ CONFIG_SCHED_LPWORK=y CONFIG_SCHED_LPWORKPRIORITY=50 CONFIG_SCHED_LPWORKSTACKSIZE=1632 CONFIG_SCHED_WAITPID=y -CONFIG_SDCLONE_DISABLE=y CONFIG_SEM_PREALLOCHOLDERS=32 CONFIG_SERIAL_IFLOWCONTROL_WATERMARKS=y CONFIG_SERIAL_TERMIOS=y @@ -201,7 +194,6 @@ CONFIG_STM32H7_SPI2=y CONFIG_STM32H7_SPI4=y CONFIG_STM32H7_SPI4_DMA=y CONFIG_STM32H7_SPI4_DMA_BUFFER=1024 -CONFIG_STM32H7_SPI_DMA=y CONFIG_STM32H7_UART4=y CONFIG_STM32H7_UART7=y CONFIG_STM32H7_USART1=y @@ -241,6 +233,4 @@ CONFIG_USBDEV=y CONFIG_USBDEV_BUSPOWERED=y CONFIG_USBDEV_MAXPOWER=500 CONFIG_USEC_PER_TICK=1000 -CONFIG_INIT_STACKSIZE=2944 -CONFIG_INIT_ENTRYPOINT="nsh_main" CONFIG_WATCHDOG=y diff --git a/boards/holybro/kakuteh7/src/init.c b/boards/holybro/kakuteh7/src/init.c index a9fe66548e..dc2a8ed164 100644 --- a/boards/holybro/kakuteh7/src/init.c +++ b/boards/holybro/kakuteh7/src/init.c @@ -194,14 +194,12 @@ stm32_boardinitialize(void) * ****************************************************************************/ - __EXPORT int board_app_initialize(uintptr_t arg) { /* Power on Interfaces */ board_control_spi_sensors_power(true, 0xffff); /* Need hrt running before using the ADC */ - px4_platform_init(); /* configure SPI interfaces */ @@ -209,7 +207,6 @@ __EXPORT int board_app_initialize(uintptr_t arg) stm32_spiinitialize(); /* configure the DMA allocator */ - if (board_dma_alloc_init() < 0) { syslog(LOG_ERR, "[boot] DMA alloc FAILED\n"); } diff --git a/boards/matek/h743/init/rc.board_extras b/boards/matek/h743/init/rc.board_extras index a39b81bdc2..4c6bc61dbc 100644 --- a/boards/matek/h743/init/rc.board_extras +++ b/boards/matek/h743/init/rc.board_extras @@ -3,13 +3,10 @@ # board specific extras init #------------------------------------------------------------------------------ -# if ! param compare OSD_ATXXXX_CFG 0 -# then -# atxxxx start -s -# fi - -atxxxx start -s - +if ! param compare OSD_ATXXXX_CFG 0 +then + atxxxx start -s +fi # DShot telemetry is always on UART7 # dshot telemetry /dev/ttyS5 diff --git a/boards/matek/h743/init/rc.board_sensors b/boards/matek/h743/init/rc.board_sensors index 7e970b2cde..95d5d785ae 100644 --- a/boards/matek/h743/init/rc.board_sensors +++ b/boards/matek/h743/init/rc.board_sensors @@ -20,7 +20,5 @@ then fi # Internal baro -dps310 -I start -a 118 +dps310 -I start -a 0x118 -# External mag -qmc5883l -X start -a 13 diff --git a/boards/matek/h743/nuttx-config/bootloader/defconfig b/boards/matek/h743/nuttx-config/bootloader/defconfig index 65f888fe8c..bbc2fd9b60 100644 --- a/boards/matek/h743/nuttx-config/bootloader/defconfig +++ b/boards/matek/h743/nuttx-config/bootloader/defconfig @@ -32,7 +32,7 @@ CONFIG_BOARD_RESET_ON_ASSERT=2 CONFIG_CDCACM=y CONFIG_CDCACM_IFLOWCONTROL=y CONFIG_CDCACM_PRODUCTID=0x1013 -CONFIG_CDCACM_PRODUCTSTR="MatekH743" +CONFIG_CDCACM_PRODUCTSTR="PX4 BL Matek H743" CONFIG_CDCACM_RXBUFSIZE=600 CONFIG_CDCACM_TXBUFSIZE=12000 CONFIG_CDCACM_VENDORID=0x1209 diff --git a/boards/matek/h743/nuttx-config/include/board.h b/boards/matek/h743/nuttx-config/include/board.h index 878fbdb3a4..f8efa4721e 100644 --- a/boards/matek/h743/nuttx-config/include/board.h +++ b/boards/matek/h743/nuttx-config/include/board.h @@ -1,8 +1,6 @@ /************************************************************************************ - * nuttx-configs/px4_fmu-v6u/include/board.h * - * Copyright (C) 2016-2019 Gregory Nutt. All rights reserved. - * Authors: David Sidrane + * Copyright (C) 2016-2022 Gregory Nutt. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -34,10 +32,6 @@ ************************************************************************************/ #pragma once -/************************************************************************************ - * Included Files - ************************************************************************************/ - #include "board_dma_map.h" #include @@ -49,10 +43,6 @@ #include "stm32_rcc.h" #include "stm32_sdmmc.h" -/************************************************************************************ - * Pre-processor Definitions - ************************************************************************************/ - /* Clocking *************************************************************************/ /* The board provides the following clock sources: * @@ -60,16 +50,15 @@ * * So we have these clock source available within the STM32 * - * HSI: 64 MHz RC factory-trimmed + * HSI: 16 MHz RC factory-trimmed * HSE: 8 MHz crystal for HSE */ - #define STM32_BOARD_XTAL 8000000ul #define STM32_HSI_FREQUENCY 16000000ul #define STM32_LSI_FREQUENCY 32000 #define STM32_HSE_FREQUENCY STM32_BOARD_XTAL -#define STM32_LSE_FREQUENCY 32768 +#define STM32_LSE_FREQUENCY 0 /* Main PLL Configuration. * @@ -92,10 +81,6 @@ * CPUCLK <= 480 MHz */ -#define STM32_BOARD_USEHSE - -#define STM32_PLLCFG_PLLSRC RCC_PLLCKSELR_PLLSRC_HSE - /* PLL1, wide 4 - 8 MHz input, enable DIVP, DIVQ, DIVR * * PLL1_VCO = (8,000,000 / 1) * 120 = 960 MHz @@ -104,12 +89,7 @@ * PLL1Q = PLL1_VCO/4 = 960 MHz / 4 = 240 MHz * PLL1R = PLL1_VCO/8 = 960 MHz / 8 = 120 MHz */ - -#define STM32_PLLCFG_PLL1CFG (RCC_PLLCFGR_PLL1VCOSEL_WIDE | \ - RCC_PLLCFGR_PLL1RGE_4_8_MHZ | \ - RCC_PLLCFGR_DIVP1EN | \ - RCC_PLLCFGR_DIVQ1EN | \ - RCC_PLLCFGR_DIVR1EN) +#define STM32_PLLCFG_PLL1CFG (RCC_PLLCFGR_PLL1VCOSEL_WIDE|RCC_PLLCFGR_PLL1RGE_4_8_MHZ|RCC_PLLCFGR_DIVP1EN|RCC_PLLCFGR_DIVQ1EN|RCC_PLLCFGR_DIVR1EN) #define STM32_PLLCFG_PLL1M RCC_PLLCKSELR_DIVM1(1) #define STM32_PLLCFG_PLL1N RCC_PLL1DIVR_N1(120) #define STM32_PLLCFG_PLL1P RCC_PLL1DIVR_P1(2) @@ -122,12 +102,7 @@ #define STM32_PLL1R_FREQUENCY (STM32_VCO1_FREQUENCY / 8) /* PLL2 */ - -#define STM32_PLLCFG_PLL2CFG (RCC_PLLCFGR_PLL2VCOSEL_WIDE | \ - RCC_PLLCFGR_PLL2RGE_4_8_MHZ | \ - RCC_PLLCFGR_DIVP2EN | \ - RCC_PLLCFGR_DIVQ2EN | \ - RCC_PLLCFGR_DIVR2EN) +#define STM32_PLLCFG_PLL2CFG (RCC_PLLCFGR_PLL2VCOSEL_WIDE|RCC_PLLCFGR_PLL2RGE_4_8_MHZ|RCC_PLLCFGR_DIVP2EN|RCC_PLLCFGR_DIVQ2EN|RCC_PLLCFGR_DIVR2EN) #define STM32_PLLCFG_PLL2M RCC_PLLCKSELR_DIVM2(2) #define STM32_PLLCFG_PLL2N RCC_PLL2DIVR_N2(48) #define STM32_PLLCFG_PLL2P RCC_PLL2DIVR_P2(2) @@ -140,10 +115,7 @@ #define STM32_PLL2R_FREQUENCY (STM32_VCO2_FREQUENCY / 2) /* PLL3 */ - -#define STM32_PLLCFG_PLL3CFG (RCC_PLLCFGR_PLL3VCOSEL_WIDE | \ - RCC_PLLCFGR_PLL3RGE_4_8_MHZ | \ - RCC_PLLCFGR_DIVQ3EN) +#define STM32_PLLCFG_PLL3CFG (RCC_PLLCFGR_PLL3VCOSEL_WIDE|RCC_PLLCFGR_PLL3RGE_4_8_MHZ|RCC_PLLCFGR_DIVQ3EN) #define STM32_PLLCFG_PLL3M RCC_PLLCKSELR_DIVM3(2) #define STM32_PLLCFG_PLL3N RCC_PLL3DIVR_N3(48) #define STM32_PLLCFG_PLL3P RCC_PLL3DIVR_P3(2) @@ -158,7 +130,6 @@ /* SYSCLK = PLL1P = 480MHz * CPUCLK = SYSCLK / 1 = 480 MHz */ - #define STM32_RCC_D1CFGR_D1CPRE (RCC_D1CFGR_D1CPRE_SYSCLK) #define STM32_SYSCLK_FREQUENCY (STM32_PLL1P_FREQUENCY) #define STM32_CPUCLK_FREQUENCY (STM32_SYSCLK_FREQUENCY / 1) @@ -168,19 +139,16 @@ /* AHB clock (HCLK) is SYSCLK/2 (240 MHz max) * HCLK1 = HCLK2 = HCLK3 = HCLK4 = 240 */ - #define STM32_RCC_D1CFGR_HPRE RCC_D1CFGR_HPRE_SYSCLKd2 /* HCLK = SYSCLK / 2 */ #define STM32_ACLK_FREQUENCY (STM32_CPUCLK_FREQUENCY / 2) /* ACLK in D1, HCLK3 in D1 */ #define STM32_HCLK_FREQUENCY (STM32_CPUCLK_FREQUENCY / 2) /* HCLK in D2, HCLK4 in D3 */ #define STM32_BOARD_HCLK STM32_HCLK_FREQUENCY /* same as above, to satisfy compiler */ /* APB1 clock (PCLK1) is HCLK/2 (120 MHz) */ - #define STM32_RCC_D2CFGR_D2PPRE1 RCC_D2CFGR_D2PPRE1_HCLKd2 /* PCLK1 = HCLK / 2 */ #define STM32_PCLK1_FREQUENCY (STM32_HCLK_FREQUENCY/2) /* APB2 clock (PCLK2) is HCLK/2 (120 MHz) */ - #define STM32_RCC_D2CFGR_D2PPRE2 RCC_D2CFGR_D2PPRE2_HCLKd2 /* PCLK2 = HCLK / 2 */ #define STM32_PCLK2_FREQUENCY (STM32_HCLK_FREQUENCY/2) @@ -213,62 +181,23 @@ #define STM32_APB2_TIM17_CLKIN (2*STM32_PCLK2_FREQUENCY) /* Kernel Clock Configuration - * - * Note: look at Table 54 in ST Manual + * Note: look at Table 54 in ST Manual */ +#define STM32_RCC_D1CCIPR_SDMMCSEL RCC_D1CCIPR_SDMMC_PLL1 -/* I2C123 clock source */ -#define STM32_RCC_D2CCIP2R_I2C123SRC RCC_D2CCIP2R_I2C123SEL_HSI - -/* I2C4 clock source */ -#define STM32_RCC_D3CCIPR_I2C4SRC RCC_D3CCIPR_I2C4SEL_HSI - -/* SPI123 clock source */ -#define STM32_RCC_D2CCIP1R_SPI123SRC RCC_D2CCIP1R_SPI123SEL_PLL2 - -/* SPI45 clock source */ -#define STM32_RCC_D2CCIP1R_SPI45SRC RCC_D2CCIP1R_SPI45SEL_PLL2 - -/* SPI6 clock source */ -#define STM32_RCC_D3CCIPR_SPI6SRC RCC_D3CCIPR_SPI6SEL_PLL2 - -/* USB 1 and 2 clock source */ -#define STM32_RCC_D2CCIP2R_USBSRC RCC_D2CCIP2R_USBSEL_PLL3 - -/* ADC 1 2 3 clock source */ -#define STM32_RCC_D3CCIPR_ADCSEL RCC_D3CCIPR_ADCSEL_PLL2 - -/* FDCAN 1 clock source */ +#define STM32_RCC_D2CCIP2R_I2C123SRC RCC_D2CCIP2R_I2C123SEL_HSI /* I2C123 clock source */ +#define STM32_RCC_D2CCIP1R_SPI123SRC RCC_D2CCIP1R_SPI123SEL_PLL2 /* SPI123 clock source */ +#define STM32_RCC_D2CCIP1R_SPI45SRC RCC_D2CCIP1R_SPI45SEL_PLL2 /* SPI45 clock source */ +#define STM32_RCC_D2CCIP2R_USBSRC RCC_D2CCIP2R_USBSEL_PLL3 /* USB 1 and 2 clock source */ #define STM32_RCC_D2CCIP1R_FDCANSEL RCC_D2CCIP1R_FDCANSEL_HSE /* FDCAN 1 2 clock source */ -#define STM32_FDCANCLK STM32_HSE_FREQUENCY - -/* FLASH wait states - * - * ------------ ---------- ----------- - * Vcore MAX ACLK WAIT STATES - * ------------ ---------- ----------- - * 1.15-1.26 V 70 MHz 0 - * (VOS1 level) 140 MHz 1 - * 210 MHz 2 - * 1.05-1.15 V 55 MHz 0 - * (VOS2 level) 110 MHz 1 - * 165 MHz 2 - * 220 MHz 3 - * 0.95-1.05 V 45 MHz 0 - * (VOS3 level) 90 MHz 1 - * 135 MHz 2 - * 180 MHz 3 - * 225 MHz 4 - * ------------ ---------- ----------- - */ +#define STM32_RCC_D3CCIPR_ADCSEL RCC_D3CCIPR_ADCSEL_PLL2 /* ADC 1 2 3 clock source */ +/* FLASH wait states */ #define BOARD_FLASH_WAITSTATES 2 /* SDMMC definitions ********************************************************/ - /* Init 480kHz, freq = PLL1Q/(2*div) div = PLL1Q/(2*freq) */ - #define STM32_SDMMC_INIT_CLKDIV (300 << STM32_SDMMC_CLKCR_CLKDIV_SHIFT) /* 20 MHz Max for now - more reliable on some boards than 25 MHz @@ -288,35 +217,8 @@ #define STM32_SDMMC_CLKCR_EDGE STM32_SDMMC_CLKCR_NEGEDGE -/* LED definitions ******************************************************************/ -/* The board has two, LED_GREEN a Green LED and LED_BLUE a Blue LED, - * that can be controlled by software. - * - * If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs in any way. - * The following definitions are used to access individual LEDs. - */ - -/* LED index values for use with board_userled() */ - -#define BOARD_LED1 0 -#define BOARD_LED2 1 -#define BOARD_NLEDS 2 - -#define BOARD_LED_BLUE BOARD_LED1 -#define BOARD_LED_GREEN BOARD_LED2 - -/* LED bits for use with board_userled_all() */ -#define BOARD_LED1_BIT (1 << BOARD_LED1) -#define BOARD_LED2_BIT (1 << BOARD_LED2) - -/* Thus if the Green LED is statically on, NuttX has successfully booted and - * is, apparently, running normally. If the Red LED is flashing at - * approximately 2Hz, then a fatal error has been detected and the system - * has halted. - */ - -/* Alternate function pin selections ************************************************/ +/* UART/USART */ #define GPIO_USART1_RX GPIO_USART1_RX_2 /* PA10 */ #define GPIO_USART1_TX GPIO_USART1_TX_2 /* PA9 */ @@ -365,6 +267,7 @@ #define GPIO_SPI4_MOSI GPIO_SPI4_MOSI_1 /* PE14 */ #define GPIO_SPI4_SCK ADJ_SLEW_RATE(GPIO_SPI4_SCK_1) /* PE12 */ + /* I2C */ #define GPIO_I2C1_SCL GPIO_I2C1_SCL_1 /* PB6 */ #define GPIO_I2C1_SDA GPIO_I2C1_SDA_1 /* PB7 */ @@ -372,19 +275,3 @@ #define GPIO_I2C2_SCL GPIO_I2C2_SCL_1 /* PB10 */ #define GPIO_I2C2_SDA GPIO_I2C2_SDA_1 /* PB11 */ -/* SDMMC1 - * - * SDMMC1_D0 PC8 - * SDMMC1_D1 PC9 - * SDMMC1_D2 PC10 - * SDMMC1_D3 PC11 - * SDMMC1_CK PC12 - * SDMMC1_CMD PD2 - */ - -// #define GPIO_SDMMC1_D0 GPIO_SDMMC1_D0 /* PC8 */ -// #define GPIO_SDMMC1_D1 GPIO_SDMMC1_D1 /* PC9 */ -// #define GPIO_SDMMC1_D2 GPIO_SDMMC1_D2 /* PC10 */ -// #define GPIO_SDMMC1_D3 GPIO_SDMMC1_D3 /* PC11 */ -// #define GPIO_SDMMC1_CK GPIO_SDMMC1_CK /* PC12 */ -// #define GPIO_SDMMC1_CMD GPIO_SDMMC1_CMD /* PD2 */ diff --git a/boards/matek/h743/nuttx-config/include/board_dma_map.h b/boards/matek/h743/nuttx-config/include/board_dma_map.h index 693132c389..1780458729 100644 --- a/boards/matek/h743/nuttx-config/include/board_dma_map.h +++ b/boards/matek/h743/nuttx-config/include/board_dma_map.h @@ -34,10 +34,10 @@ #pragma once // DMAMUX1 -#define DMAMAP_SPI1_RX DMAMAP_DMA12_SPI1RX_0 /* DMA1:37 */ -#define DMAMAP_SPI1_TX DMAMAP_DMA12_SPI1TX_0 /* DMA1:38 */ +#define DMAMAP_SPI1_RX DMAMAP_DMA12_SPI1RX_0 /* DMA1:37 */ +#define DMAMAP_SPI1_TX DMAMAP_DMA12_SPI1TX_0 /* DMA1:38 */ // DMAMUX2 -#define DMAMAP_SPI4_RX DMAMAP_DMA12_SPI4RX_1 /* DMA2:83 */ -#define DMAMAP_SPI4_TX DMAMAP_DMA12_SPI4TX_1 /* DMA2:84 */ +#define DMAMAP_SPI4_RX DMAMAP_DMA12_SPI4RX_1 /* DMA2:83 */ +#define DMAMAP_SPI4_TX DMAMAP_DMA12_SPI4TX_1 /* DMA2:84 */ diff --git a/boards/matek/h743/nuttx-config/nsh/defconfig b/boards/matek/h743/nuttx-config/nsh/defconfig index 86936d55c5..c2afffc493 100644 --- a/boards/matek/h743/nuttx-config/nsh/defconfig +++ b/boards/matek/h743/nuttx-config/nsh/defconfig @@ -178,7 +178,7 @@ CONFIG_STM32H7_I2C_DYNTIMEO_STARTSTOP=10 CONFIG_STM32H7_OTGFS=y CONFIG_STM32H7_PROGMEM=y CONFIG_STM32H7_RTC=y -CONFIG_STM32H7_RTC_HSECLOCK=y +CONFIG_STM32H7_RTC_AUTO_LSECLOCK_START_DRV_CAPABILITY=y CONFIG_STM32H7_RTC_MAGIC_REG=1 CONFIG_STM32H7_SAVE_CRASHDUMP=y CONFIG_STM32H7_SDMMC1=y diff --git a/boards/matek/h743/nuttx-config/scripts/bootloader_script.ld b/boards/matek/h743/nuttx-config/scripts/bootloader_script.ld index 511ef26242..f9c5b0b585 100644 --- a/boards/matek/h743/nuttx-config/scripts/bootloader_script.ld +++ b/boards/matek/h743/nuttx-config/scripts/bootloader_script.ld @@ -34,7 +34,7 @@ * ****************************************************************************/ -/* The Durandal-v1 uses an STM32H743II has 2048Kb of main FLASH memory. +/* The board uses an STM32H743II has 2048Kb of main FLASH memory. * The flash memory is partitioned into a User Flash memory and a System * Flash memory. Each of these memories has two banks: * @@ -105,12 +105,14 @@ * When booting from FLASH, FLASH memory is aliased to address 0x0000:0000 * where the code expects to begin execution by jumping to the entry point in * the 0x0800:0000 address range. + * + * The bootloader uses the first sector of the flash, which is 128K in length. */ MEMORY { itcm (rwx) : ORIGIN = 0x00000000, LENGTH = 64K - flash (rx) : ORIGIN = 0x08000000, LENGTH = 2048K + flash (rx) : ORIGIN = 0x08000000, LENGTH = 128K dtcm1 (rwx) : ORIGIN = 0x20000000, LENGTH = 64K dtcm2 (rwx) : ORIGIN = 0x20010000, LENGTH = 64K sram (rwx) : ORIGIN = 0x24000000, LENGTH = 512K diff --git a/boards/matek/h743/src/board_config.h b/boards/matek/h743/src/board_config.h index f977a2e8dd..1e81deef3f 100644 --- a/boards/matek/h743/src/board_config.h +++ b/boards/matek/h743/src/board_config.h @@ -154,11 +154,6 @@ // #define GPIO_RSSI_IN /* PC5 */ (GPIO_INPUT|GPIO_PULLUP|GPIO_PORTC|GPIO_PIN5) - -/* SD Card */ -#define SDIO_SLOTNO 0 /* Only one slot */ -#define SDIO_MINOR 0 - /* This board provides a DMA pool and APIs */ #define BOARD_DMA_ALLOC_POOL_SIZE 5120 @@ -199,24 +194,6 @@ __BEGIN_DECLS * Public Functions ****************************************************************************************************/ -/**************************************************************************** - * Name: stm32_sdio_initialize - * - * Description: - * Initialize SDIO-based MMC/SD card support - * - ****************************************************************************/ - -int stm32_sdio_initialize(void); - -/**************************************************************************************************** - * Name: stm32_spiinitialize - * - * Description: - * Called to configure SPI chip select GPIO pins for the board. - * - ****************************************************************************************************/ - extern void stm32_spiinitialize(void); extern void stm32_usbinitialize(void); diff --git a/boards/matek/h743/src/hw_config.h b/boards/matek/h743/src/hw_config.h index 3256b9c63d..a2d865a920 100644 --- a/boards/matek/h743/src/hw_config.h +++ b/boards/matek/h743/src/hw_config.h @@ -94,7 +94,7 @@ //#define USE_VBUS_PULL_DOWN #define INTERFACE_USART 1 -#define INTERFACE_USART_CONFIG "/dev/ttyS0,57600" +#define INTERFACE_USART_CONFIG "/dev/ttyS0,115200" #define BOOT_DELAY_ADDRESS 0x000001a0 #define BOARD_TYPE 1013 #define _FLASH_KBYTES (*(uint32_t *)0x1FF1E880) diff --git a/boards/matek/h743/src/init.c b/boards/matek/h743/src/init.c index f78e570c5a..6aa2b0f8f2 100644 --- a/boards/matek/h743/src/init.c +++ b/boards/matek/h743/src/init.c @@ -34,7 +34,7 @@ /** * @file init.c * - * FMU-specific early startup code. This file implements the + * board specific early startup code. This file implements the * board_app_initialize() function that is called early by nsh during startup. * * Code here is run before the rcS script is invoked; it should start required @@ -124,8 +124,10 @@ __EXPORT void stm32_boardinitialize(void) const uint32_t gpio[] = PX4_GPIO_INIT_LIST; px4_gpio_init(gpio, arraySize(gpio)); - /* configure SPI interfaces */ - stm32_spiinitialize(); + board_control_spi_sensors_power_configgpio(); + + /* Turn bluetooth off by default (no mavlink support yet) */ + px4_arch_gpiowrite(GPIO_RF_SWITCH, 0); /* configure USB interfaces */ stm32_usbinitialize(); @@ -152,51 +154,70 @@ __EXPORT void stm32_boardinitialize(void) ****************************************************************************/ __EXPORT int board_app_initialize(uintptr_t arg) { + /* Power on Interfaces */ + board_control_spi_sensors_power(true, 0xffff); + /* Need hrt running before using the ADC */ px4_platform_init(); + /* configure SPI interfaces */ + stm32_spiinitialize(); + /* configure the DMA allocator */ if (board_dma_alloc_init() < 0) { syslog(LOG_ERR, "[boot] DMA alloc FAILED\n"); } +#if defined(SERIAL_HAVE_RXDMA) + // set up the serial DMA polling at 1ms intervals for received bytes that have not triggered a DMA event. + static struct hrt_call serial_dma_call; + hrt_call_every(&serial_dma_call, 1000, 1000, (hrt_callout)stm32_serial_dma_poll, NULL); +#endif + /* initial LED state */ drv_led_start(); led_off(LED_RED); led_off(LED_BLUE); if (board_hardfault_init(2, true) != 0) { + led_on(LED_RED); + } + + /* Get the SPI port for the microSD slot */ + struct spi_dev_s *spi_dev = stm32_spibus_initialize(CONFIG_NSH_MMCSDSPIPORTNO); + + if (!spi_dev) { + syslog(LOG_ERR, "[boot] FAILED to initialize SPI port %d\n", CONFIG_NSH_MMCSDSPIPORTNO); led_on(LED_BLUE); } -#ifdef CONFIG_MMCSD - int ret = stm32_sdio_initialize(); + /* Now bind the SPI interface to the MMCSD driver */ + int result = mmcsd_spislotinitialize(CONFIG_NSH_MMCSDMINOR, CONFIG_NSH_MMCSDSLOTNO, spi_dev); - if (ret != OK) { + if (result != OK) { led_on(LED_BLUE); + syslog(LOG_ERR, "[boot] FAILED to bind SPI port 1 to the MMCSD driver\n"); + } + + up_udelay(20); + + +#if defined(FLASH_BASED_PARAMS) + static sector_descriptor_t params_sector_map[] = { + {15, 128 * 1024, 0x081E0000}, + {0, 0, 0}, + }; + + /* Initialize the flashfs layer to use heap allocated memory */ + result = parameter_flashfs_init(params_sector_map, NULL, 0); + + if (result != OK) { + syslog(LOG_ERR, "[boot] FAILED to init params in FLASH %d\n", result); + led_on(LED_AMBER); } #endif - -// #if defined(FLASH_BASED_PARAMS) -// static sector_descriptor_t params_sector_map[] = { -// {6, 128 * 1024, 0x081C0000}, -// {7, 128 * 1024, 0x081E0000}, -// {0, 0, 0}, -// }; - -// /* Initialize the flashfs layer to use heap allocated memory */ -// int result = parameter_flashfs_init(params_sector_map, NULL, 0); - -// if (result != OK) { -// syslog(LOG_ERR, "[boot] FAILED to init params in FLASH %d\n", result); -// led_on(LED_BLUE); -// return -ENODEV; -// } - -// #endif - /* Configure the HW based on the manifest */ px4_platform_configure(); diff --git a/boards/matek/h743/src/led.c b/boards/matek/h743/src/led.c index 2d60d89be9..c4f3e55dc8 100644 --- a/boards/matek/h743/src/led.c +++ b/boards/matek/h743/src/led.c @@ -31,12 +31,6 @@ * ****************************************************************************/ -/** - * @file led.c - * - * LED backend. - */ - #include #include diff --git a/boards/matek/h743/src/spi.cpp b/boards/matek/h743/src/spi.cpp index a83701fef5..f174303e77 100644 --- a/boards/matek/h743/src/spi.cpp +++ b/boards/matek/h743/src/spi.cpp @@ -1,6 +1,6 @@ /**************************************************************************** * - * Copyright (C) 2021 PX4 Development Team. All rights reserved. + * Copyright (C) 2021-2022 PX4 Development Team. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -35,7 +35,6 @@ #include #include - constexpr px4_spi_bus_t px4_spi_buses[SPI_BUS_MAX_BUS_ITEMS] = { initSPIBus(SPI::Bus::SPI1, { initSPIDevice(DRV_IMU_DEVTYPE_MPU6000, SPI::CS{GPIO::PortC, GPIO::Pin15}, SPI::DRDY{GPIO::PortB, GPIO::Pin2}), diff --git a/boards/matek/h743/src/timer_config.cpp b/boards/matek/h743/src/timer_config.cpp index e862bf2a7a..d3cda6f58f 100644 --- a/boards/matek/h743/src/timer_config.cpp +++ b/boards/matek/h743/src/timer_config.cpp @@ -1,6 +1,6 @@ /**************************************************************************** * - * Copyright (C) 2021 PX4 Development Team. All rights reserved. + * Copyright (C) 2021-2022 PX4 Development Team. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -57,26 +57,3 @@ constexpr timer_io_channels_t timer_io_channels[MAX_TIMER_IO_CHANNELS] = { constexpr io_timers_channel_mapping_t io_timers_channel_mapping = initIOTimerChannelMapping(io_timers, timer_io_channels); - - - -constexpr io_timers_t led_pwm_timers[MAX_LED_TIMERS] = { - initIOTimer(Timer::Timer1), -}; - -// #define CCER_C1_NUM_BITS 4 -// #define POLARITY(c) (GTIM_CCER_CC1P << (((c)-1) * CCER_C1_NUM_BITS)) -// #define DRIVE_TYPE(p) ((p)|GPIO_OPENDRAIN|GPIO_PULLUP) - -// static inline constexpr timer_io_channels_t initIOTimerChannelLED(const io_timers_t io_timers_conf[MAX_LED_TIMERS], -// Timer::TimerChannel timer, GPIO::GPIOPin pin, int ui_polarity) -// { -// timer_io_channels_t ret = initIOTimerChannel(io_timers_conf, timer, pin); -// ret.gpio_out = DRIVE_TYPE(ret.gpio_out); -// ret.masks = POLARITY(ui_polarity); -// return ret; -// } - -// constexpr timer_io_channels_t led_pwm_channels[MAX_TIMER_LED_CHANNELS] = { -// initIOTimerChannelLED(led_pwm_timers, {Timer::Timer1, Timer::Channel1}, {GPIO::PortA, GPIO::Pin8}, 1), -// }; diff --git a/boards/matek/h743/src/usb.c b/boards/matek/h743/src/usb.c index 4fdfafd250..000c2e0f2b 100644 --- a/boards/matek/h743/src/usb.c +++ b/boards/matek/h743/src/usb.c @@ -1,6 +1,6 @@ /**************************************************************************** * - * Copyright (C) 2021 PX4 Development Team. All rights reserved. + * Copyright (C) 2021-2022 PX4 Development Team. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -57,7 +57,7 @@ __EXPORT void stm32_usbinitialize(void) /* Configure the OTG FS VBUS sensing GPIO, Power On, and Overcurrent GPIOs */ -#ifdef CONFIG_STM32F7_OTGFS +#ifdef CONFIG_STM32H7_OTGFS stm32_configgpio(GPIO_OTGFS_VBUS); #endif } @@ -72,6 +72,7 @@ __EXPORT void stm32_usbinitialize(void) * while the USB is suspended. * ************************************************************************************/ + __EXPORT void stm32_usbsuspend(FAR struct usbdev_s *dev, bool resume) { uinfo("resume: %d\n", resume); diff --git a/boards/px4/fmu-v6x/nuttx-config/bootloader/defconfig b/boards/px4/fmu-v6x/nuttx-config/bootloader/defconfig index bdc8cbd023..bcc5c06fca 100644 --- a/boards/px4/fmu-v6x/nuttx-config/bootloader/defconfig +++ b/boards/px4/fmu-v6x/nuttx-config/bootloader/defconfig @@ -7,7 +7,6 @@ # # CONFIG_DEV_CONSOLE is not set # CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set -# CONFIG_DISABLE_PTHREAD is not set # CONFIG_SPI_EXCHANGE is not set # CONFIG_STM32H7_SYSCFG is not set CONFIG_ARCH="arm" @@ -23,14 +22,13 @@ CONFIG_ARMV7M_BASEPRI_WAR=y CONFIG_ARMV7M_ICACHE=y CONFIG_ARMV7M_MEMCPY=y CONFIG_ARMV7M_USEBASEPRI=y -CONFIG_BOARDCTL_RESET=y CONFIG_BOARDCTL=y +CONFIG_BOARDCTL_RESET=y +CONFIG_BOARD_ASSERT_RESET_VALUE=0 CONFIG_BOARD_INITTHREAD_PRIORITY=254 CONFIG_BOARD_LATE_INITIALIZE=y CONFIG_BOARD_LOOPSPERMSEC=95150 CONFIG_BOARD_RESET_ON_ASSERT=2 -CONFIG_BOARD_ASSERT_RESET_VALUE=0 -CONFIG_C99_BOOL8=y CONFIG_CDCACM=y CONFIG_CDCACM_IFLOWCONTROL=y CONFIG_CDCACM_PRODUCTID=0x0035 @@ -39,37 +37,17 @@ CONFIG_CDCACM_RXBUFSIZE=600 CONFIG_CDCACM_TXBUFSIZE=12000 CONFIG_CDCACM_VENDORID=0x3185 CONFIG_CDCACM_VENDORSTR="Auterion" -CONFIG_CLOCK_MONOTONIC=y CONFIG_DEBUG_FULLOPT=y CONFIG_DEBUG_SYMBOLS=y CONFIG_DEFAULT_SMALL=y -# CONFIG_NSH_DISABLE_ECHO is not set -# CONFIG_NSH_DISABLE_ENV is not set -# CONFIG_NSH_DISABLE_FREE is not set -# CONFIG_NSH_DISABLE_HELP is not set -# CONFIG_NSH_DISABLE_KILL is not set -# CONFIG_NSH_DISABLE_LS is not set -# CONFIG_NSH_DISABLE_MKDIR is not set -# CONFIG_NSH_DISABLE_MODCMDS is not set -# CONFIG_NSH_DISABLE_MOUNT is not set -# CONFIG_NSH_DISABLE_MV is not set -# CONFIG_NSH_DISABLE_PRINTF is not set -# CONFIG_NSH_DISABLE_PSSTACKUSAGE -# CONFIG_NSH_DISABLE_PWD is not set -# CONFIG_NSH_DISABLE_SOURCE is not set -# CONFIG_NSH_DISABLE_SLEEP is not set -# CONFIG_NSH_DISABLE_TEST is not set -# CONFIG_NSH_DISABLE_UMOUNT is not set -# CONFIG_NSH_DISABLE_UNSET is not set -# CONFIG_NSH_DISABLE_USLEEP is not set -CONFIG_DISABLE_MQUEUE=y -CONFIG_DISABLE_PTHREAD=y CONFIG_EXPERIMENTAL=y CONFIG_FDCLONE_DISABLE=y CONFIG_FDCLONE_STDIO=y CONFIG_HAVE_CXX=y CONFIG_HAVE_CXXINITIALIZE=y CONFIG_IDLETHREAD_STACKSIZE=750 +CONFIG_INIT_ENTRYPOINT="bootloader_main" +CONFIG_INIT_STACKSIZE=2944 CONFIG_LIBC_FLOATINGPOINT=y CONFIG_LIBC_LONG_LONG=y CONFIG_LIBC_STRERROR=y @@ -80,7 +58,6 @@ CONFIG_PTHREAD_STACK_MIN=512 CONFIG_RAM_SIZE=245760 CONFIG_RAM_START=0x20010000 CONFIG_RAW_BINARY=y -CONFIG_SDCLONE_DISABLE=y CONFIG_SERIAL_TERMIOS=y CONFIG_SIG_DEFAULT=y CONFIG_SIG_SIGALRM_ACTION=y @@ -113,5 +90,3 @@ CONFIG_USBDEV=y CONFIG_USBDEV_BUSPOWERED=y CONFIG_USBDEV_MAXPOWER=500 CONFIG_USEC_PER_TICK=1000 -CONFIG_INIT_STACKSIZE=2944 -CONFIG_INIT_ENTRYPOINT="bootloader_main"